COOLMOS aging test scheme generation method and platform
By acquiring COOLMOS specification information, building physical test scenarios, connecting to automated test platforms, introducing logic test plugins, determining test sequences in stages, triggering test decisions based on knowledge reasoning, generating aging test sequences, and managing the test process in parallel, the problem of insufficient efficiency and accuracy in existing COOLMOS aging tests is solved, achieving more efficient and accurate test results.
Patent Information
- Application Number
- CN202511349114.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-22
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2045-09-22
AI Technical Summary
Existing COOLMOS aging test methods are inefficient and inaccurate, making it difficult to simulate complex real-world service environments, resulting in inaccurate and incomplete test results.
By acquiring COOLMOS specification information, building physical test scenarios, connecting to automated test platforms, introducing logic test plugins, determining test sequences in stages, triggering test decisions based on knowledge reasoning, generating aging test sequences, and managing the test process in parallel.
This improves the efficiency and accuracy of COOLMOS aging tests, enabling a more comprehensive assessment of its performance stability and reliability.
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Figure CN120870802A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor device aging testing, and in particular to a method and platform for generating COOLMOS aging test schemes. Background Technology
[0002] As an important power semiconductor device, the performance stability and reliability of COOLMOS are crucial for the normal operation of electronic devices. Aging testing is a key step in ensuring COOLMOS quality. Currently, the main method for solving the aging testing problem of COOLMOS is to use traditional testing procedures and schemes, and to conduct tests manually or semi-automatically. However, traditional methods are cumbersome, inefficient, and unable to accurately simulate the complex conditions of COOLMOS in actual service environments, resulting in inaccurate and comprehensive test results that cannot effectively evaluate the aging performance of COOLMOS.
[0003] Currently, COOLMOS aging tests suffer from insufficient testing efficiency and accuracy. Summary of the Invention
[0004] This application provides a method and platform for generating COOLMOS aging test schemes. It employs techniques such as acquiring COOLMOS specification information and building a physical test scenario, connecting to an automated test platform, introducing and initializing a logic test plugin, dividing the COOLMOS service life into stages and determining the test sequence, triggering the logic test plugin to perform test decisions based on knowledge reasoning for each stage's test sequence, generating aging test sequences, introducing edge nodes to connect to the physical test end, and executing parallel test management. These techniques solve the technical problems of insufficient test efficiency and accuracy in existing COOLMOS aging tests, achieving the technical effect of improving test efficiency and accuracy.
[0005] This application provides a method for generating a COOLMOS aging test scheme, comprising: acquiring COOLMOS specification information and deploying a physical test scenario; connecting an automated test platform and introducing a logic test plugin, initializing the logic test plugin based on the physical test scenario, the automated test platform dividing the COOLMOS service life into stages and determining a stage test sequence; for the stage test sequence, triggering the logic test plugin, with the goal of test circuit topology-stage circuit switching-circuit stability acceleration, performing test decisions based on knowledge reasoning stage by stage, and generating an aging test sequence; introducing edge nodes and connecting them to a physical test terminal, and executing parallel test management based on the collaboration between the automated test platform and the physical test terminal.
[0006] In a possible implementation, the following processing is performed: the physical test scenario includes a test section and a monitoring section; the test section converts the scenario into a stress spectrum, which includes at least electrical stress, thermal stress, and mechanical environmental stress, wherein the electrical stress triggers a dynamic avalanche of a preset pulse magnitude, the thermal stress triggers gradient temperature control of a preset temperature cycle, and the mechanical environmental stress triggers multi-axis vibration and environmental loss under a random spectrum.
[0007] In a possible implementation, the following processing is performed: the monitoring section includes the deployment of a sensor array; wherein the deployment method includes at least: a thermopile is deployed directly below the die, strain gauges are packaged at the four corners, and a microwave reflection probe is mounted on the gate lead.
[0008] In a possible implementation, with the goal of testing circuit topology - stage circuit switching - circuit stabilization acceleration, test decisions based on knowledge reasoning are made stage by stage, and the following processes are performed: determining the first stage test node, wherein the first stage test node is any sequence node in the stage test sequence; triggering the logic test plug-in, based on the physical test field as the basic condition, making decisions on circuit structure and circuit driving parameters, determining the first test circuit topology, wherein the first test circuit topology is the access circuit of COOLMOS; and generating a first aging test scheme based on the first test circuit topology.
[0009] In a possible implementation, a first aging test scheme is generated based on a first test circuit topology, and the following processes are performed: for the first test circuit topology, a steady node is located, wherein the steady node is a test timing node that satisfies the stability of circuit testing and the stability of COOLMOS state; for the stage test part after the steady node, an aging accelerated test decision is made to determine the acceleration circuit drive parameters; the first test circuit topology-steady node-acceleration circuit drive parameters are added to the first aging test scheme.
[0010] In a possible implementation, a phased test sequence is generated, and the following processing is performed: the phased test sequence is traversed to determine N aging test schemes; the N aging test schemes are integrated in a forward serialization manner, and a scheme switching instruction based on phase iteration is introduced to generate the aging test sequence.
[0011] In a possible implementation, parallel test management based on the collaboration between the automated test platform and the physical test terminal is performed, and the following processes are executed: the aging test sequence is deployed to the edge node, and a connection is established between the edge node and the physical test terminal; the edge node drives the physical test terminal, and the automated test platform's scheme is used for self-driven simulation to collaboratively perform COOLMOS aging test management.
[0012] In a possible implementation, the following processing is performed: Parallel testing includes dual-sided parallel testing and single-sided test frequency management based on the physical test terminal and the automated test platform.
[0013] In a possible implementation, after performing parallel test management based on the collaboration between the automated test platform and the physical test terminal, the following processes are performed: setting directional test objectives and determining the evaluation combination of failure mode-monitoring indicators; evaluating the test data of COOLMOS aging test according to the evaluation combination and generating an aging trend curve.
[0014] This application also provides a COOLMOS aging test scheme generation platform, including: a physical test scenario deployment module, used to obtain COOLMOS specification information and deploy physical test scenarios; a stage test sequence determination module, used to connect to an automated test platform and introduce a logic test plugin, initialize the logic test plugin based on the physical test scenario, and the automated test platform divides the COOLMOS service life into stages to determine the stage test sequence; an aging test sequence generation module, used to trigger the logic test plugin for the stage test sequence, with the goal of test circuit topology-stage circuit switching-circuit stability acceleration, and perform test decisions based on knowledge reasoning stage by stage to generate an aging test sequence; and a parallel test management module, used to introduce edge nodes and connect to the physical test end, and execute parallel test management based on the collaboration between the automated test platform and the physical test end.
[0015] This application proposes a method and platform for generating COOLMOS aging test schemes. First, it acquires COOLMOS specifications and deploys a physical test scenario. Then, it connects to an automated test platform and introduces a logic test plugin. Based on the physical test scenario, the logic test plugin is initialized. The automated test platform divides the COOLMOS service life into stages, determines the stage test sequence, and then triggers the logic test plugin for each stage test sequence. With the goal of testing circuit topology, stage circuit switching, and circuit stabilization acceleration, it makes test decisions based on knowledge reasoning stage by stage, generating an aging test sequence. Finally, it introduces edge nodes and connects them to the physical test terminal, executing parallel test management based on the collaboration between the automated test platform and the physical test terminal. This achieves the technical effect of improving test efficiency and accuracy. Attached Figure Description
[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings of the embodiments of the present invention will be briefly described below. Flowcharts are used in this application to illustrate the operations performed by the platform according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed precisely in sequence. Instead, various steps can be processed in reverse order or simultaneously as needed. Furthermore, other operations can be added to these processes, or one or more steps can be removed from these processes.
[0017] Figure 1 This is a flowchart illustrating a method for generating a COOLMOS aging test scheme, as provided in an embodiment of this application.
[0018] Figure 2 An example diagram of the aging trend curve in a COOLMOS aging test scheme generation method provided in an embodiment of this application.
[0019] Figure 3 This is a schematic diagram of the structure of a COOLMOS aging test scheme generation platform provided in an embodiment of this application.
[0020] Figure labeling: Physical test scenario deployment module 10, phase test sequence determination module 20, aging test sequence generation module 30, parallel test management module 40. Detailed Implementation
[0021] The above description is merely an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below.
[0022] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description of this application will be provided in conjunction with the accompanying drawings. The described embodiments should not be considered as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0023] In the following description, references to "some embodiments" describe a subset of all possible embodiments. However, it is understood that "some embodiments" can be the same or different subsets of all possible embodiments and can be combined with each other without conflict. The terms "first" and "second" are used merely to distinguish similar objects and do not represent a specific ordering of objects. The terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, platform, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or modules not explicitly listed or inherent to these processes, methods, products, or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only.
[0024] This application provides a method for generating a COOLMOS aging test scheme, such as... Figure 1 As shown, the method includes: Step S100: Obtain COOLMOS specification information and deploy physical test scenario.
[0025] Specifically, COOLMOS is a power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). It features high voltage, high power, and low on-resistance, and is used in power electronics fields such as power conversion and motor drives. Aging tests primarily focus on changes in its electrical performance over long-term operation, such as changes in switching characteristics and drain-source resistance. Specifications are obtained using a data acquisition module from COOLMOS's official documentation, datasheets, or through interface communication with the COOLMOS manufacturer. These specifications include, but are not limited to, voltage range, current capacity, and switching speed. Based on the obtained specifications, a test scenario setup is used to deploy the physical test scenario, including components such as power supplies, load resistors, and capacitors, as well as the circuit boards and wires used to connect these components.
[0026] For example, suppose you obtain specifications from the online database provided by the COOLMOS manufacturer. Through an HTTP request, you obtain parameters such as the COOLMOS's voltage range of 12V-48V, maximum current capacity of 15A, and switching speed of 80ns. Based on these specifications, you set up a test scenario in the laboratory. The power supply is set to an adjustable voltage range of 12V-48V. A 2Ω load resistor is connected between the drain and source of the COOLMOS, and a 200μF capacitor is added to the circuit to simulate the load characteristics in a real-world working environment. This completes the deployment of the physical test scenario.
[0027] In one possible implementation, step S100 further includes: the physical test scenario includes a test part and a monitoring part; the test part converts the scenario into a stress spectrum, which includes at least electrical stress, thermal stress, and mechanical environmental stress, wherein the electrical stress triggers a dynamic avalanche of a preset pulse magnitude, the thermal stress triggers gradient temperature control of a preset temperature cycle, and the mechanical environmental stress triggers multi-axis vibration and environmental loss under a random spectrum.
[0028] Specifically, dynamic avalanche refers to the phenomenon of a sharp increase in current due to avalanche breakdown when a high-voltage pulse is applied between the drain and source of a COOLMOS transistor. By triggering dynamic avalanche with a preset pulse magnitude, the changes in the electrical performance of the COOLMOS transistor under extreme electrical stress can be observed, such as increased drain-source resistance and decreased avalanche tolerance, which is used to evaluate the overload protection capability and reliability of the COOLMOS transistor in practical applications. Temperature cycling refers to the process of raising and lowering the temperature within a certain temperature range according to a preset cycle. Through gradient temperature control of the preset temperature cycle, the thermal stability of the COOLMOS transistor during temperature changes can be observed, such as changes in the coefficient of thermal expansion and thermal fatigue damage, which is used to evaluate the temperature adaptability and reliability of the COOLMOS transistor in practical applications. Multi-axis vibration refers to the process of applying vibration simultaneously on multiple vibration axes (such as X, Y, and Z axes). In aging tests, multi-axis vibration is used to simulate the working state of the COOLMOS transistor in a complex mechanical environment to evaluate its mechanical performance and reliability. Environmental degradation refers to the phenomenon that affects the performance of the COOLMOS transistor under specific environmental conditions, such as gas corrosion and humidity changes. In aging tests, environmental degradation is used to simulate the long-term operating conditions of COOLMOS in real industrial environments to evaluate its chemical stability and reliability.
[0029] The electrical stress test is performed as follows: A pulse signal of a preset pulse magnitude is generated by a pulse generator and applied between the drain and source of the COOLMOS transistor to trigger dynamic avalanche. The pulse amplitude, width, and frequency can be adjusted according to the COOLMOS specifications and test requirements. For example, the pulse amplitude can be set to 20V, the pulse width to 100ns, and the pulse frequency to 1kHz.
[0030] The thermal stress test is as follows: The COOLMOS is subjected to gradient temperature control with a preset temperature cycle using a temperature control device (such as a temperature cycling chamber). The temperature cycle range can be set from -40℃ to 125℃, with a cycle time of 1 hour. The temperature control device can precisely control the rate of temperature change, for example, a heating rate of 10℃ / min and a cooling rate of 5℃ / min.
[0031] Mechanical environmental stress testing is conducted as follows: A vibration table generates multi-axis vibrations under a random frequency spectrum, combined with an environmental loss simulation device (such as a gas corrosion device) to simulate an industrial environment. The vibration table can be set with multiple vibration axes (such as X, Y, and Z axes), with a vibration frequency range of 10Hz-2000Hz and an acceleration amplitude of 1g-10g. The gas corrosion device can introduce specific corrosive gases (such as sulfur dioxide, chlorine, etc.) into the test environment; the concentration can be adjusted according to the actual industrial environment, for example, a sulfur dioxide concentration of 10ppm.
[0032] The monitoring components include voltage monitoring, current monitoring, temperature monitoring, and vibration monitoring. A high-precision oscilloscope is used to monitor the voltage change between the drain and source of the COOLMOS transistor. The oscilloscope's sampling rate can be set to 100MHz, and its bandwidth to 1GHz, enabling precise capture of voltage waveforms during dynamic avalanche events. A current sensor measures the current flowing through the COOLMOS transistor. The current sensor's range can be set to 0-20A with an accuracy of 0.1%, allowing real-time monitoring of current changes, especially during dynamic avalanche and temperature cycling. Multiple temperature sensors, such as thermocouples or thermistors, are installed on the COOLMOS surface and in the surrounding environment. These temperature sensors have a measurement range of -50℃ to 150℃ and an accuracy of ±0.5℃, enabling real-time monitoring of temperature changes under different stress conditions. An accelerometer is used to monitor the vibration response of the COOLMOS transistor in a vibrating environment. The accelerometer's measurement range is -10g to 10g, and its frequency response range is 0Hz to 5000Hz, recording acceleration changes during multi-axis vibration.
[0033] This approach, by introducing electrical stress, thermal stress, and mechanical environmental stress, comprehensively simulates the various complex stress conditions that COOLMOS may face in real-world industrial applications. This comprehensive stress testing helps to more accurately assess the aging characteristics of COOLMOS and identify potential reliability issues. Real-time monitoring of voltage, current, temperature, and vibration allows for timely acquisition of detailed electrical and physical parameter changes of COOLMOS under various stress conditions. This monitoring data can be used for subsequent data analysis, such as establishing aging models and assessing reliability lifetime.
[0034] In one possible implementation, step S100 further includes: the monitoring portion includes the deployment of a sensing array; wherein the deployment method includes at least: a thermopile is deployed directly below the die, strain gauges are packaged at the four corners, and a microwave reflection probe is mounted on the gate lead.
[0035] Specifically, a thermopile is deployed directly beneath the COOLMOS die. This thermopile, a temperature sensor composed of multiple thermocouples connected in series, converts temperature changes into voltage signals for precise measurement of die temperature variations. Its measurement range is -50℃ to 150℃ with an accuracy of ±0.5℃. This deployment method allows direct monitoring of die temperature changes under different stress conditions, especially during dynamic avalanche and temperature cycling tests. Strain gauges are deployed at the four corners of the COOLMOS package. These strain gauges, strain sensors, convert strain changes into resistance changes to measure strain changes under mechanical stress. Their measurement range is -1000με to 1000με with an accuracy of ±1με. This deployment method allows monitoring of mechanical performance changes under multiaxial vibration and mechanical environmental stress. A microwave reflection probe is installed on the COOLMOS gate lead. The microwave reflection probe is a high-frequency electrical characteristic sensor that can measure the reflection coefficient of microwave signals to monitor changes in the electrical characteristics of the gate lead. Its frequency range is 1GHz-10GHz, and the reflection coefficient measurement accuracy is ±0.01dB. This deployment method can monitor changes in the electrical performance of the gate lead under electrical stress and temperature changes.
[0036] This approach, through the integrated deployment of thermopile, strain gauges, and microwave reflective probes, enables comprehensive monitoring of the electrical and physical parameter changes of COOLMOS under various stress conditions. This monitoring data can be used for subsequent data analysis, such as establishing aging models and assessing reliability lifetime.
[0037] Step S200: Connect to the automated testing platform and introduce the logic testing plugin. Initialize the logic testing plugin based on the physical testing scenario. The automated testing platform divides the COOLMOS service life into stages and determines the stage test sequence.
[0038] Specifically, an automated test platform is a system that integrates the control and data acquisition functions of multiple test devices. It can automatically control test devices (such as power supplies, oscilloscopes, multimeters, etc.) to perform test operations and collect test data according to preset test procedures. In this application, the automated test platform is used to control the entire aging test process, including triggering logic test plug-ins and managing test sequences. The logic test plug-in is a software module loaded onto the automated test platform, containing logic control algorithms for specific test tasks. During aging testing, the logic test plug-in can control the test equipment to perform circuit topology testing, stage circuit switching testing, and circuit steady-state acceleration testing based on preset test sequences and real-time acquired test data.
[0039] The automated test platform connects to devices in the physical test scenario via standardized interfaces (such as GPIB and USBTMC). These interfaces allow the automated test platform to control the operation of test devices (such as power supplies and oscilloscopes). Logic test plugins are loaded onto the automated test platform; these plugins contain logic control algorithms for different test phases. The logic test plugins are initialized according to the configuration of the physical test scenario (such as power supply voltage and load resistance parameters). Based on the COOLMOS's service life characteristics, such as an expected operating time of 1000 hours and 1 million switching cycles, the automated test platform divides the service life into multiple phases. The test sequence for each phase is determined by a test sequence generation algorithm according to preset rules (such as time ratio or switching cycle ratio).
[0040] For example, suppose the automated test platform connects to the power supply and oscilloscope in the physical test scenario via a USBTMC interface. The logic test plugin loading module loads a plugin named "CoolmosTestPlugin" onto the automated test platform. The initialization process includes setting parameters such as the power supply's output voltage range to 12V-48V and the oscilloscope's sampling rate to 200MHz. Assuming the COOLMOS's service life is expected to be 1000 hours, the automated test platform divides it into 10 phases, each lasting 100 hours. In each phase, the test sequence includes: low-frequency (500Hz) switching tests for the first 40 hours, medium-frequency (5kHz) switching tests for the middle 40 hours, and high-frequency (50kHz) switching tests for the last 20 hours. This test sequence is determined by a test sequence generation algorithm based on a preset frequency distribution rule.
[0041] Step S300: For the stage test sequence, trigger the logic test plugin, with the goal of test circuit topology - stage circuit switching - circuit stability acceleration, and make test decisions based on knowledge reasoning stage by stage to generate aging test sequence.
[0042] Specifically, the automated testing platform triggers the logic test plugins stage by stage according to the stage test sequence. The triggering mechanism can be based on time (e.g., triggering once every 10 minutes) or event (e.g., completing a switching cycle). In each stage, the logic test plugin automatically generates the circuit structure and circuit driving parameters according to the requirements of the current stage.
[0043] At the start of each stage, the logic test plugin makes decisions regarding the circuit structure and drive parameters based on the parameters of the current test node and the basic conditions of the physical test field. The basic conditions of the physical test field include deployed test equipment, sensor arrays, etc. The logic test plugin uses these basic conditions and rules from the knowledge base to perform knowledge reasoning, generating the test circuit topology and drive parameters for this stage. For example, assuming the parameter requirement for the current test node is the steady-state acceleration characteristics of the test circuit within a certain voltage range (e.g., 12V-30V), the logic test plugin will determine the circuit structure (e.g., a series circuit topology with a 10Ω resistor in series) and drive parameters (e.g., drive voltage 15V, drive frequency 1kHz) for this stage based on the basic conditions of the physical test field (e.g., connected power supplies, oscilloscopes, etc.) and rules from the knowledge base (e.g., circuit topology optimization rules, drive parameter selection rules, etc.). Based on the logic test plugin's decision, an aging test plan for this stage is generated. This plan details the test operations for this stage, including test parameters (e.g., voltage, current, frequency, etc.) and test time. The test operations at each stage are arranged in a certain order to form a complete aging test sequence.
[0044] In one possible implementation, with the goal of testing circuit topology, stage circuit switching, and circuit stabilization acceleration, test decisions based on knowledge reasoning are made stage by stage. Step S300 further includes step S310, determining the first-stage test node, wherein the first-stage test node is any sequence node in the stage test sequence. Specifically, in the stage test sequence, a specific test node is selected as the first-stage test node. This node can be any node in the sequence, for example, the third node in the sequence is selected as the first-stage test node. The test parameters of this node are determined, including test time, test voltage, test current, etc. For example, the test time is 1 hour, the test voltage is 20V, and the test current is 5A.
[0045] Step S320: The logic test plugin is triggered to make decisions on circuit structure and circuit driving parameters based on the physical test field, determining a first test circuit topology, wherein the first test circuit topology is the access circuit of COOLMOS. Specifically, the logic test plugin is triggered according to the parameters of the first-stage test node. The logic test plugin makes decisions on circuit structure and circuit driving parameters according to preset rules and a knowledge base. Circuit structure refers to the connection method of the circuit, such as series circuit, parallel circuit, etc. Circuit driving parameters refer to the parameters used to drive the circuit to work, such as driving voltage, driving frequency, etc. The logic test plugin determines the circuit structure according to the parameters of the test node. For example, it decides to use a series circuit topology, connecting COOLMOS in series with a 10Ω resistor. At the same time, the logic test plugin determines the circuit driving parameters according to the parameters of the test node. For example, it decides to set the driving voltage to 15V and the driving frequency to 1kHz.
[0046] Step S330: Generate a first aging test scheme based on the first test circuit topology. Specifically, the first aging test scheme is generated according to the first test circuit topology. The aging test scheme includes specific test steps, test parameters, and test time. The parameters of the first aging test scheme can be listed in detail, for example, the test time is 1 hour, the test voltage is 20V, the test current is 5A, the drive voltage is 15V, and the drive frequency is 1kHz. This implementation method, through knowledge-based reasoning test decision-making, can fully utilize existing test data and knowledge bases to make intelligent test decisions. This data-driven test decision-making method can improve the efficiency and accuracy of testing and reduce human error.
[0047] In one possible implementation, a first aging test scheme is generated based on a first test circuit topology. Step S330 further includes step S331, which locates a steady-state node for the first test circuit topology. The steady-state node is a test timing node that satisfies both circuit test stability and COOLMOS state stability. Specifically, a steady-state node refers to a test timing node in the test sequence that satisfies both circuit test stability and COOLMOS state stability. This node is the key point for the circuit topology and COOLMOS state to reach a stable state. The steady-state node is determined by monitoring parameters such as circuit voltage, current, and temperature. For example, when voltage and current fluctuations are less than a certain threshold (e.g., voltage fluctuation less than 0.1V, current fluctuation less than 0.01A), and the temperature change rate is less than a certain threshold (e.g., temperature change rate less than 0.05℃ / s), the circuit and COOLMOS state can be considered to have reached stability.
[0048] Step S332: For the stage test section after the steady-state node, an accelerated aging test decision is made to determine the acceleration circuit drive parameters. Specifically, in the stage test section after the steady-state node, an accelerated aging test decision is made. The logic test plugin determines the acceleration circuit drive parameters based on rules in the knowledge base and current test data. These parameters may include higher drive voltage, higher drive frequency, etc., to accelerate the aging process. For example, suppose the rules in the knowledge base indicate that after the steady-state node, in order to accelerate the aging test, the drive voltage can be increased to 20V and the drive frequency can be increased to 2kHz. The logic test plugin makes decisions based on these rules to determine the acceleration circuit drive parameters.
[0049] Step S333: Add the first test circuit topology, steady-state node, and acceleration circuit drive parameters to the first aging test scheme. Specifically, add the first test circuit topology, steady-state node, and acceleration circuit drive parameters to the first aging test scheme. This scheme details the test operations in the first stage, including test parameters (such as voltage, current, frequency, etc.) and test time. This implementation, by locating the steady-state node, ensures that subsequent test operations are performed under stable circuit and COOLMOS conditions, improving the accuracy and reliability of the test.
[0050] In one possible implementation, an aging test sequence is generated, and step S300 further includes step S340, which involves traversing the stage test sequence to determine N aging test schemes. Specifically, the automated test platform traverses the entire stage test sequence and generates an aging test scheme for each stage. Each scheme includes the circuit topology, steady-state node parameters, and acceleration circuit drive parameters for that stage. For example, assuming the stage test sequence contains 5 stages, then N=5. The aging test scheme for each stage details the test operations for that stage, including test parameters (such as voltage, current, frequency, etc.) and test time.
[0051] Step S350: The N aging test schemes are sequentially integrated, and a scheme switching instruction based on stage iteration is introduced to generate the aging test sequence. Specifically, the N aging test schemes are sequentially integrated according to the stage order to ensure that the test operations of each stage are executed in a predetermined order. At the end of each stage, a scheme switching instruction is introduced to switch from the current stage to the next stage. This instruction ensures that the test equipment can switch according to the predetermined order and parameters. An example of an aging test sequence is shown in Table 1.
[0052] Table 1: Examples of Aging Test Sequences
[0053] This implementation method ensures that the test operations at each stage are executed in a predetermined order by sequentially integrating N aging test plans. This orderly integration method avoids confusion and errors during the testing process, improving the efficiency and accuracy of the test.
[0054] Step S400: Introduce edge nodes and connect them to the physical test terminal to perform parallel test management based on the collaboration between the automated test platform and the physical test terminal.
[0055] Specifically, edge nodes are introduced into the test environment and connected to the physical test endpoints. The edge nodes act as a bridge between the automated test platform and the physical test endpoints, ensuring smooth data transmission and command interaction between them. The automated test platform generates a virtual test environment based on the aging test sequence. In this virtual environment, the automated test platform simulates various conditions and operations during the actual test process, including changes in circuit topology and adjustments to drive parameters. The physical test endpoints execute the actual test operations according to the aging test sequence generated by the automated test platform. The physical test endpoints include actual test equipment, such as power supplies, oscilloscopes, and load resistors. These devices operate according to the requirements of the aging test sequence, collecting actual test data.
[0056] The automated testing platform works in conjunction with the physical testing end to achieve parallel test management. Specifically, the automated testing platform synchronizes the results of virtual tests with the actual test data from the physical testing end. By comparing the results of virtual and actual tests, deviations and problems can be identified promptly. Based on the results of the virtual tests, the automated testing platform sends instructions to the physical testing end to adjust the parameters and operations of the actual tests. The physical testing end provides data feedback to the automated testing platform based on the progress of the actual tests, allowing the platform to make further optimizations and adjustments. The automated testing platform monitors the testing process of the physical testing end in real time to ensure that the tests are conducted according to the predetermined aging test sequence. If any abnormalities are detected, the automated testing platform can promptly adjust the test plan or suspend the test to protect the test equipment and the object under test.
[0057] In one possible implementation, parallel test management based on the collaboration between the automated test platform and the physical test terminal is performed. Step S400 further includes step S410, which involves distributing the aging test sequence to the edge node and establishing a connection between the edge node and the physical test terminal. Specifically, the automated test platform distributes the generated aging test sequence to the edge node. The aging test sequence contains detailed test operations for each stage, including circuit topology, drive parameters, test time, and steady-state node parameters. The edge node establishes a connection with the physical test terminal, which can be achieved through a network interface (such as Ethernet) or a fieldbus interface (such as PROFIBUS) to ensure smooth data transmission and command interaction.
[0058] Step S420: The edge node drives the physical test terminal, and the automated test platform performs self-driven simulation to collaboratively manage COOLMOS aging tests. Specifically, the edge node drives the physical test terminal to perform actual tests according to the aging test sequence. The edge node is responsible for controlling the physical test equipment (such as power supply, oscilloscope, load resistor, etc.) to operate according to the requirements of the aging test sequence and collecting actual test data. The automated test platform performs self-driven simulation according to the aging test sequence, that is, the automated test platform simulates the actual test process in a virtual environment and generates virtual test results, including voltage and current waveforms and other data.
[0059] The automated testing platform collaborates with edge nodes to manage COOLMOS aging tests. The specific collaboration mechanism includes: the automated testing platform synchronizing virtual test results with actual test data collected by the edge nodes; the automated testing platform sending instructions to the edge nodes based on the virtual test results to adjust the parameters and operations of the actual tests; the edge nodes providing feedback data to the automated testing platform based on the progress of the actual tests, allowing for further optimization and adjustments; and the automated testing platform monitoring the physical testing process driven by the edge nodes in real time to ensure that the tests proceed according to the predetermined aging test sequence. If any anomalies are detected, the automated testing platform can promptly adjust the test plan or pause the test to protect the test equipment and the object under test. This implementation, by delegating the aging test sequence to the edge nodes, which then drive the physical testing end to perform the actual tests, while the automated testing platform performs self-driven simulation of the plan, achieves efficient aging test management. This collaborative mechanism ensures the efficiency and accuracy of the testing process, reducing test time and resource consumption.
[0060] In one possible implementation, step S420 further includes: parallel testing includes dual-sided parallel testing and single-sided test frequency management based on the physical test terminal and the automated test platform.
[0061] Specifically, in dual-side parallel testing, the physical testing terminal and the automated testing platform perform testing operations simultaneously. The physical testing terminal conducts actual tests and collects real test data; the automated testing platform conducts virtual tests and generates virtual test results. By comparing the actual data from the physical testing terminal and the virtual data from the automated testing platform, cross-verification can be achieved, ensuring the accuracy and reliability of the test results.
[0062] However, in certain complex testing phases or when physical testing is challenging, virtual testing can be performed solely using an automated testing platform. In such cases, the virtual test results from the automated testing platform can serve as a reference, ensuring that each testing phase is synchronized. For example, under extreme conditions, the physical testing end may struggle to perform certain complex test operations; in this situation, the virtual test results from the automated testing platform can guide the testing process. For instance, in the first three phases, a dual-sided parallel testing approach can be used for aging test management, while in the fourth and fifth phases, a single-sided, synchronized testing approach can be used. This implementation method allows for virtual testing solely using an automated testing platform in certain complex testing phases or when physical testing is challenging. This flexible test management approach can effectively address complex testing requirements, ensure the smooth progress of the testing process, and reduce the burden on the physical testing end.
[0063] In one possible implementation, after performing parallel test management based on the collaboration between the automated test platform and the physical test terminal, the method further includes: setting directional test objectives, determining an evaluation combination of failure mode-monitoring indicators; evaluating the test data of the COOLMOS aging test according to the evaluation combination, and generating an aging trend curve.
[0064] Specifically, targeted testing aims to focus on specific failure modes under certain aging factors during aging testing. This includes clearly defined failure modes such as gate oxide degradation and solder fatigue. These failure modes are determined based on typical aging phenomena that COOLMOS may exhibit under long-term operating conditions.
[0065] For each failure mode, corresponding accelerating stress parameters are set. For example, for gate oxide degradation, the accelerating stress parameter is Vgs (gate-to-source voltage) overvoltage, achieved by increasing the pulse. Specifically, a voltage pulse exceeding the rated value is applied to the gate, with a pulse amplitude of 20V, a pulse width of 100ns, and a pulse frequency of 1kHz. For solder fatigue, the accelerating stress parameter is temperature cycling, achieved by increasing the temperature change rate. Specifically, the COOLMOS is placed in a temperature cycling chamber with a temperature range of -40℃ to 125℃, a cycle period of 1 hour, a heating rate of 10℃ / min, and a cooling rate of 5℃ / min. For each failure mode, corresponding monitoring indicators are determined. For example, for gate oxide degradation, the monitoring indicators are the Igss (gate leakage current) and Qg (gate charge) change rate. Specific monitoring methods include measuring Igss with a high-precision multimeter and measuring Qg with a capacitance-voltage (CV) meter. For weld fatigue, the monitoring indicators are the weld resistance change rate and weld deformation. The specific monitoring methods can be to use a four-probe resistance tester to measure the weld resistance and an optical microscope to measure the weld deformation.
[0066] Based on the established targeted testing objectives, an evaluation combination of failure modes and monitoring indicators is established. The evaluation combination details the specific indicators that need to be monitored for each failure mode during aging testing. Examples of targeted testing objectives and evaluation combinations are shown in Table 2.
[0067] Table 2: Examples of Combinations of Oriented Testing Objectives and Evaluation
[0068] In each testing phase, monitoring data related to the failure mode are collected, and the collected data is processed to calculate key indicators such as the rate of change. For example, the formula for calculating the rate of change of Igss is: ΔIgss / Igss initial ×100%, where ΔIgss is the change in Igss. initial This is the initial Igss value. The formula for calculating the rate of change of Qg is: ΔQg / Qg initial ×100%, where ΔQg is the change in Qg, Qg initial This is the initial Qg value. The formula for calculating the rate of change of solder layer resistance is: ΔR / R initial ×100%, where ΔR is the change in weld resistance, R initialThis is the initial solder resistivity value. Solder deformation is directly recorded as a measured value. Based on the evaluation combination, the data is assessed to determine if it conforms to the expected aging trend. For example, if the Igss change rate exceeds 5% and the Qg change rate exceeds 10%, significant gate oxide degradation is considered significant; if the solder resistivity change rate exceeds 2% and the solder deformation exceeds 0.05 mm, significant solder fatigue is considered significant. Based on the evaluation results, an aging trend curve is generated, which visually displays the changing trend of the monitored indicators over time during the aging test. An example of tabular data for the aging trend curve is shown in Table 3, and a corresponding example of graphical data is shown in... Figure 2 As shown.
[0069] Table 3: Example of Aging Trend Curve Data
[0070] This approach generates an aging trend curve, which visually displays the changing trends of monitored indicators over time during aging testing. This intuitive aging trend curve helps to promptly identify aging phenomena, assess the degree of aging, and provide strong technical support for reliability design and applications.
[0071] This application's embodiments employ techniques such as acquiring COOLMOS specification information and building a physical test scenario, connecting to an automated test platform, introducing and initializing a logic test plugin, dividing the COOLMOS service life into stages and determining the test sequence, triggering the logic test plugin to make test decisions based on knowledge reasoning for each stage test sequence, generating an aging test sequence, introducing edge nodes to connect to the physical test end, and executing parallel test management. These techniques solve the technical problems of insufficient test efficiency and accuracy in existing COOLMOS aging tests, achieving the technical effect of improving test efficiency and accuracy.
[0072] In the above text, refer to Figure 1 and Figure 2 A method for generating a COOLMOS aging test scheme according to an embodiment of the present invention is described in detail. Next, reference will be made to... Figure 3 This invention describes a COOLMOS aging test scheme generation platform according to an embodiment of the present invention.
[0073] A COOLMOS aging test scheme generation platform according to an embodiment of the present invention addresses the technical problems of insufficient testing efficiency and accuracy in existing COOLMOS aging tests, thereby improving testing efficiency and accuracy. The COOLMOS aging test scheme generation platform includes: a physical test scenario deployment module 10, a stage test sequence determination module 20, an aging test sequence generation module 30, and a parallel test management module 40.
[0074] The physical test scenario deployment module 10 is used to acquire COOLMOS specification information and deploy physical test scenarios; the stage test sequence determination module 20 is used to connect to the automated test platform and introduce logic test plugins, initialize the logic test plugins based on the physical test scenarios, and the automated test platform divides the COOLMOS service life into stages to determine the stage test sequence; the aging test sequence generation module 30 is used to trigger the logic test plugins for the stage test sequence, and generate aging test sequences by making test decisions based on knowledge reasoning stage by stage with the goal of test circuit topology-stage circuit switching-circuit stabilization acceleration; the parallel test management module 40 is used to introduce edge nodes and connect to the physical test end, and execute parallel test management based on the collaboration between the automated test platform and the physical test end.
[0075] The specific configuration of the physical test scenario deployment module 10 will be described in detail below. As mentioned above, the physical test scenario deployment module 10 may further include: the physical test scenario includes a testing part and a monitoring part; the testing part converts the scenario into a stress spectrum, which includes at least electrical stress, thermal stress, and mechanical environmental stress; wherein the electrical stress triggers a dynamic avalanche of a preset pulse magnitude; the thermal stress triggers gradient temperature control of a preset temperature cycle; and the mechanical environmental stress triggers multi-axis vibration and environmental loss under a random spectrum.
[0076] The physical testing scenario deployment module 10 may further include: the monitoring part includes the deployment of a sensor array, wherein the deployment method includes at least: deploying a thermopile directly below the die, encapsulating the four corners of the strain gauge, and installing a microwave reflection probe on the gate lead.
[0077] The specific configuration of the aging test sequence generation module 30 will be described in detail below. As mentioned above, with the goal of test circuit topology-stage circuit switching-circuit stabilization acceleration, test decisions are made stage by stage based on knowledge reasoning. The aging test sequence generation module 30 may further include: a first-stage test node determination unit for determining the first-stage test node, wherein the first-stage test node is any sequence node in the stage test sequence; a first test circuit topology determination unit for triggering the logic test plug-in, and based on the physical test field as the basic condition, performing circuit structure and circuit driving parameter decisions to determine the first test circuit topology, wherein the first test circuit topology is the access circuit of COOLMOS; and a first aging test scheme generation unit for generating a first aging test scheme based on the first test circuit topology.
[0078] The first aging test scheme is generated based on the first test circuit topology. The first aging test scheme generation unit may further include: a steady node positioning subunit for locating steady nodes for the first test circuit topology, wherein the steady node is a test timing node that satisfies circuit test steadyness and COOLMOS state steadyness; an aging acceleration test decision subunit for performing aging acceleration test decisions for the stage test part after the steady node, and determining the acceleration circuit drive parameters; and the first aging test scheme generation subunit for adding the first test circuit topology-steady node-acceleration circuit drive parameters into the first aging test scheme.
[0079] The aging test sequence generation module 30 may further include: an N-item aging test scheme determination unit for traversing the stage test sequence and determining N aging test schemes; and a forward serialization integration unit for performing forward serialization integration on the N aging test schemes, introducing a scheme switching instruction based on stage iteration, and generating the aging test sequence.
[0080] The specific configuration of the parallel test management module 40 will be described in detail below. As mentioned above, to perform parallel test management based on the collaboration between the automated test platform and the physical test terminal, the parallel test management module 40 may further include: a connection establishment unit for distributing the aging test sequence to the edge node and establishing a connection between the edge node and the physical test terminal; and a self-driven simulation unit for driving the physical test terminal with the edge node, performing self-driven simulation using the automated test platform's scheme, and collaboratively managing COOLMOS aging tests.
[0081] The parallel test management module 40 may further include: parallel testing includes dual-sided parallel testing and single-sided test synchronous management based on the physical test terminal and the automated test platform.
[0082] After executing parallel test management based on the collaboration between the automated test platform and the physical test terminal, the platform may further include: a directional test target setting module for setting directional test targets and determining the evaluation combination of failure mode-monitoring indicators; and an aging trend curve generation module for evaluating the test data of COOLMOS aging test according to the evaluation combination and generating an aging trend curve.
[0083] The COOLMOS aging test scheme generation platform provided in this embodiment of the invention can execute the COOLMOS aging test scheme generation method provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0084] Although this application makes various references to certain modules in the platform according to the embodiments of this application, any number of different modules can be used and run on user terminals and / or servers. The various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of each functional unit are only for easy distinction between each other and are not used to limit the scope of protection of this invention.
[0085] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application. In some cases, the actions or steps described in this application can be performed in a different order than that shown in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
Claims
1. A method for generating a COOLMOS aging test scheme, characterized in that, The method includes: Obtain COOLMOS specifications and deploy physical test scenarios; Connect to the automated testing platform and introduce the logic testing plugin. Initialize the logic testing plugin based on the physical testing scenario. The automated testing platform divides the COOLMOS service life into stages and determines the stage test sequence. For the aforementioned stage test sequence, the logic test plugin is triggered to make test decisions based on knowledge reasoning in each stage, with the goal of test circuit topology-stage circuit switching-circuit stability acceleration, and to generate aging test sequences. Edge nodes are introduced and connected to the physical test terminal to perform parallel test management based on the collaboration between the automated test platform and the physical test terminal.
2. The method for generating a COOLMOS aging test scheme as described in claim 1, characterized in that, The physical testing scenario includes a testing component and a monitoring component; The test section converts the scenario into a stress spectrum, which includes at least electrical stress, thermal stress, and mechanical environmental stress. The electrical stress triggers a dynamic avalanche of a preset pulse magnitude, the thermal stress triggers gradient temperature control of a preset temperature cycle, and the mechanical environmental stress triggers multi-axis vibration and environmental loss under a random spectrum.
3. The method for generating a COOLMOS aging test scheme as described in claim 2, characterized in that, The monitoring component includes the deployment of a sensor array; The deployment methods include at least the following: A thermopile is deployed directly beneath the die, strain gauges are packaged at the four corners, and a microwave reflector is mounted on the gate lead.
4. The method for generating a COOLMOS aging test scheme as described in claim 1, characterized in that, With the goal of testing circuit topology, stage circuit switching, and circuit steady-state acceleration, test decisions based on knowledge reasoning are made stage by stage, including: Determine the first-stage test node, wherein the first-stage test node is any sequence node in the stage test sequence; The logic test plugin is triggered to make decisions on circuit structure and circuit drive parameters based on the physical test field as the basic condition, and to determine the first test circuit topology, wherein the first test circuit topology is the access circuit of COOLMOS. A first aging test scheme is generated based on the first test circuit topology.
5. The method for generating a COOLMOS aging test scheme as described in claim 4, characterized in that, Based on the first test circuit topology, a first aging test scheme is generated, including: For the first test circuit topology, a steady node is located, wherein the steady node is a test timing node that satisfies the stability of circuit testing and the stability of COOLMOS state; For the stage test section after the steady node, aging acceleration test decision is made to determine the acceleration circuit drive parameters; Add the first test circuit topology - steady node - acceleration circuit drive parameters to the first aging test scheme.
6. The method for generating a COOLMOS aging test scheme as described in claim 5, characterized in that, Generate an aging test sequence, including: Traverse the aforementioned stage test sequence to determine N aging test schemes; The N aging test schemes are sequentially integrated, and a scheme switching instruction based on stage iteration is introduced to generate the aging test sequence.
7. The method for generating a COOLMOS aging test scheme as described in claim 1, characterized in that, Performing parallel test management based on the collaboration between the automated testing platform and the physical testing terminal includes: The aging test sequence is deployed to the edge node, and a connection is established between the edge node and the physical test terminal; The physical test terminal is driven by the edge node, and the automated test platform is used to perform self-driven simulation and collaborative COOLMOS aging test management.
8. The method for generating a COOLMOS aging test scheme as described in claim 7, characterized in that, Parallel testing includes dual-sided parallel testing and single-sided synchronous management based on the physical testing terminal and the automated testing platform.
9. The method for generating a COOLMOS aging test scheme as described in claim 1, characterized in that, After executing parallel test management based on the collaboration between the automated testing platform and the physical testing terminal, the process includes: Set targeted testing objectives and determine the evaluation combination of failure modes and monitoring indicators; Based on the evaluation combination, the test data of the COOLMOS aging test are evaluated to generate an aging trend curve.
10. A COOLMOS aging test scheme generation platform, characterized in that, The platform is used to implement the COOLMOS aging test scheme generation method according to any one of claims 1-9, and the platform includes: The physical test scenario deployment module is used to obtain COOLMOS specification information and deploy physical test scenarios; The phase test sequence determination module is used to connect to the automated test platform and introduce logic test plugins. The logic test plugins are initialized based on the physical test scenario. The automated test platform divides the COOLMOS service life into phases and determines the phase test sequence. The aging test sequence generation module is used to trigger the logic test plugin for the stage test sequence, and to make test decisions based on knowledge reasoning stage by stage with the goal of test circuit topology-stage circuit switching-circuit stability acceleration, and generate aging test sequences. The parallel test management module is used to introduce edge nodes and connect them to the physical test terminal to perform parallel test management based on the collaboration between the automated test platform and the physical test terminal.
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