Display device

Abstract

The invention discloses a display device. A support of at least one light-emitting unit in the display device is provided with a first end and a second end which are arranged in the first direction, and a third end and a fourth end which are arranged in the second direction. The first chip is configured to be a red light chip, and at least one of the second chip and the third chip emits light with the wavelength different from that of the first chip. The first bonding pad and the second bonding pad are respectively connected with the first chip, the third bonding pad and the fourth bonding pad are respectively connected with the second chip, and the fifth bonding pad and the sixth bonding pad are respectively connected with the third chip; the first bonding pad and the second bonding pad are located at the first end and the second end respectively; the third bonding pad and the fourth bonding pad are located at the third end and the fourth end respectively; the fifth bonding pad and the sixth bonding pad are located at the third end and the fourth end respectively. The third bonding pad and the fifth bonding pad are arranged at intervals in the first direction. The fourth bonding pad and the sixth bonding pad are arranged at intervals in the first direction. According to the display device, an electrochemical reaction path between the bonding pads can be blocked, and the performance reliability of the display device is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display device. Background Technology

[0002] Currently, with the rapid development of LED display technology, chips that can emit light of different wavelengths are usually integrated into the same bracket, such as red light chips, green light chips, and blue light chips, and are electrically connected to the substrate by external solder pads.

[0003] However, with the increase in pixel density and the miniaturization of package size, the number of pads has increased significantly. In a water-oxygen environment, local electrolyte microenvironments are easily formed between adjacent pads, which can lead to spontaneous electrochemical reactions between the pads, resulting in performance failure of the display device and affecting its lifespan. Summary of the Invention

[0004] This application discloses a display device that can improve the reliability of display device performance by changing the distance between pads to block the path of electrochemical reaction between pads.

[0005] To achieve the above objectives, embodiments of this application disclose a display device, including:

[0006] Display panel;

[0007] A backlight module, wherein the display panel is disposed on the light-emitting side of the backlight module, and the backlight module includes:

[0008] Multiple light-emitting units, at least one of the light-emitting units comprising:

[0009] The bracket is provided with a receiving groove, and the bracket has a first end and a second end arranged along a first direction, and a third end and a fourth end arranged along a second direction;

[0010] A first chip, a second chip, and a third chip are disposed in the receiving slot. The first chip is configured as a red light chip, and at least one of the second chip and the third chip emits light of a different wavelength than the first chip.

[0011] A first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad are disposed on the bracket. The first pad and the second pad are respectively connected to the first chip, the third pad and the fourth pad are respectively connected to the second chip, and the fifth pad and the sixth pad are respectively connected to the third chip.

[0012] The first pad and the second pad are located at the first end and the second end, respectively;

[0013] The third pad and the fourth pad are located at the third end and the fourth end, respectively;

[0014] The fifth pad and the sixth pad are located at the third end and the fourth end, respectively, and the third pad and the fifth pad, as well as the fourth pad and the sixth pad, are all spaced apart along the first direction;

[0015] Wherein, the first direction is perpendicular to the second direction.

[0016] Due to the different epitaxial materials of the chips, the voltage difference between the red light chip and the other chips is relatively large, making electrochemical reactions more likely. By placing the first and second pads connected to the first chip at the first and second ends of the bracket, and placing the third and fourth pads connected to the second chip, and the fifth and sixth pads connected to the third chip at the third and fourth ends of the bracket, that is, placing the first and second pads of the first chip at different ends of the bracket from the pads of the other two chips, the distance between the first and second pads of the first chip and the pads of the other chips can be set as far as possible. This increases the distance between the pads of the first chip and the pads of the other two chips, reduces the electric field gradient between the pads of the first chip and the pads of the other two chips, thereby suppressing the migration path of silver ions and making it less likely for the pads of the first chip to react with the pads of the other two chips. This reduces or prevents the risk of electrochemical reactions between the pads, improves the reliability of the light-emitting unit performance, and thus helps to extend the service life of the display device.

[0017] As an alternative implementation, the size of the first pad and / or the second pad is larger than the size of any one of the third pad, the fourth pad, the fifth pad, and the sixth pad.

[0018] Because the first chip has a low voltage but a high current requirement, by setting the size of the pads connected to the first chip to be larger than the size of the pads connected to other chips, while still increasing the distance between the first pad, the second pad, and other pads to block the electrochemical reaction path, the pads can have a larger heat dissipation area. This reduces the impact of temperature rise on the first chip, thus improving the overall heat dissipation performance of the light-emitting unit. Simultaneously, increasing the size of the pads connected to the first chip reduces resistance and localized heat generation, decreasing the risk of silver ion dissociation due to current concentration.

[0019] In addition, large-sized pads can disperse the electric field intensity, reduce the dissociation rate of silver ions, and delay the formation of Ag2O (silver oxide) gel, thereby ensuring the performance of the light-emitting unit.

[0020] As an optional implementation, the first pad and the second pad are respectively disposed opposite to each other along the first direction;

[0021] The third and fourth pads are respectively arranged opposite each other along the second direction, and the fifth and sixth pads are respectively arranged opposite each other along the second direction. The third pad is configured to be connected to the positive electrode of the second chip, and the fifth pad is configured to be connected to the positive electrode of the third chip. The third and fifth pads are arranged adjacent to each other along the second direction.

[0022] The first and second pads are respectively arranged opposite each other along a first direction, that is, the positive and negative pads of the first chip are arranged opposite each other in the first direction. The third pad is configured to be connected to the positive terminal of the second chip, that is, the third and fourth pads are respectively the positive and negative pads connected to the second chip. The fifth pad is configured to be connected to the positive terminal of the third chip, that is, the fifth and sixth pads are respectively the positive and negative pads connected to the third chip. In this application, by arranging the positive and negative pads connected to each chip opposite each other, and placing the positive pads connected to the second chip and the positive pads connected to the third chip at the same end, a symmetrical electric field distribution can be formed between the pads, avoiding excessively high local field strength that could cause tip discharge. Furthermore, the ion migration path length between the positive and negative pads can be increased, extending the silver ion migration time. In addition, unifying the positive and negative orientation of the pads simplifies circuit wiring design and facilitates the control of automated soldering processes.

[0023] As an optional implementation, the first pad and the second pad are respectively located at the middle of the first end and the second end along the second direction; and / or,

[0024] The bracket has a first edge and a second edge that are disposed opposite to each other along a first direction, and the third pad and the fifth pad are disposed sequentially along a direction from the first edge to the second edge;

[0025] The bracket has a dimension of T in the first direction, the distances from the third and fourth pads to the first edge are 1 / 4T, and the distances from the fifth and sixth pads to the second edge are 1 / 4T.

[0026] By placing the first and second pads at the midpoints of the first and second ends along the second direction, respectively—that is, symmetrically distributing the distances from the first and second pads of the first chip to the edge of the support along the second direction—and by setting the distances from the pads of the second and third chips along the first direction to the first and second edges of the support to 1 / 4T, that is, uniformly arranging the third and fifth pads at the second end, with the distances from the third pad to the first edge, the distance between the third and fifth pads, and the distance from the fifth pad to the second edge being approximately the same, this arrangement effectively balances the electric field distribution at both ends of the support in the first and second directions, reducing the likelihood of electrochemical reactions. Furthermore, the uniform and symmetrical arrangement of the pads balances mechanical stress, preventing poor contact due to soldering misalignment.

[0027] As an optional implementation, in an embodiment of the first aspect of this application, the bracket has a first surface and a second surface disposed opposite to each other along a third direction, the receiving groove is recessed on the first surface, and at least a portion of the first pad, the second pad, the third pad, the fourth pad, the fifth pad and the sixth pad are disposed on the second surface;

[0028] The second surface is provided with a barrier portion, which is located between any two adjacent pads connected to different chips among the first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad. The barrier portion is configured to be spaced apart from any two adjacent pads connected to different chips.

[0029] Wherein, the third direction is the thickness direction of the bracket, which is perpendicular to the first direction and the second direction, respectively.

[0030] By setting a barrier between any two adjacent pads connected to different chips in the first, second, third, fourth, fifth, and sixth pads, the barrier can disrupt the continuous interface of the electrochemical reaction, act as a spacer between adjacent pads, and increase the tortuosity of the silver ion migration path, inhibiting or reducing the migration and deposition of silver ions, thereby delaying or preventing electrochemical deposition, thus improving the reliability of the display device performance and extending the service life of the display device.

[0031] As an alternative implementation, in an embodiment of the first aspect of this application, the barrier portion is configured as a groove recessed relative to the second surface of the bracket.

[0032] By constructing the barrier portion as a groove formed on the second surface, the barrier portion can be blocked without protruding from the second surface and occupying the space between the light-emitting unit and the substrate, thus avoiding an increase in the thickness of the display device. This is more conducive to meeting the demand for thinner and lighter display devices.

[0033] As an optional implementation, in an embodiment of the first aspect of this application, the display device further includes:

[0034] A colloid, which fills the barrier portion and covers at least a portion of any two adjacent pads connected to different chips.

[0035] Filling the barrier portion with colloid and covering at least part of the pads can prevent water and oxygen from directly contacting the pads, achieving a double barrier effect. Furthermore, covering at least part of the pads with colloid reduces the risk of oxidation and improves the stability of the pads under long-term conditions. Moreover, by placing the colloid on the light-emitting unit based on the grooved barrier structure, the barrier portion guides the colloid to fill the gap between the pads and the support, increasing the contact area between the colloid and the pads and forming a continuous sealing layer to prevent water and oxygen intrusion. On the other hand, the groove also provides a mechanical positioning function to ensure the consistency of colloid filling. In addition, after curing, the colloid enhances the adhesion between the support and the substrate, reducing solder joint cracking caused by vibration or thermal stress.

[0036] As an optional implementation, the barrier portion is configured as a strip structure, the length of the colloid filled in the barrier portion is L1, the length of the barrier portion is L2, wherein L1≥1 / 2L2.

[0037] By limiting the minimum filling ratio of the colloid in the barrier section, the colloid is ensured to fill at least half of the barrier section in the length direction, so that the colloid can cover the critical area of ​​the pad edge and prevent local water and oxygen penetration due to insufficient filling.

[0038] As an optional implementation, at least one of the light-emitting units further includes:

[0039] The seventh pad is provided in the receiving groove. The first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad are arranged around the outer periphery of the seventh pad. The first chip, the second chip, and the third chip are all disposed on the seventh pad.

[0040] The barrier portion is configured as an elongated structure, having a fifth end and a sixth end along its length, the fifth end being located at the edge of the bracket, and the sixth end extending to the seventh pad.

[0041] By placing the seventh pad among multiple pads, a central heat dissipation structure is formed, which allows the seventh pad to centrally dissipate heat from each chip, reducing the overall temperature of the light-emitting unit (higher temperature will accelerate silver dissociation and migration). At the same time, the seventh pad can separate the positive and negative pads of each chip, thereby blocking the ion migration path and reducing the risk of electrochemical reactions.

[0042] Furthermore, by setting the seventh pad, the barrier extends to the connection with it, which allows the barrier to play an effective role in spacing without being too long and thus avoiding excessive occupation of the bracket space. This makes the layout between the components more reasonable and ensures that the seventh pad has sufficient heat dissipation area to work with the barrier to conduct heat and improve heat dissipation efficiency.

[0043] As an alternative implementation, one of the second chip and the third chip is configured as a green light chip, and the other of the second chip and the third chip is configured as a blue light chip.

[0044] By setting the first, second, and third chips as red, green, and blue light-emitting chips respectively, the mixing of these three colors allows the light-emitting unit to create various colors. Furthermore, by placing the pads of the three color chips at different ends of the bracket, especially by positioning the pads of the red light chip far away from the pads of the green and blue light chips, crosstalk between different drive current signals can be avoided, reducing the risk of color mixing and ensuring the stability of color output.

[0045] Compared with the prior art, the beneficial effects of this application are:

[0046] The display device provided in this application suffers from a large voltage difference between the first chip and the second chip due to the different epitaxial materials of the chips, which easily leads to electrochemical reactions. By placing the first and second pads connected to the first chip at the first and second ends of the support, and placing the third and fourth pads connected to the second chip, and the fifth and sixth pads connected to the third chip at the third and fourth ends of the support, that is, placing the first and second pads of the first chip at different ends of the support from the pads of the other two chips, the distance between the first and second pads of the first chip and the pads of the other chips can be set as far as possible. This increases the distance between the pads of the first chip and the pads of the other two chips, reduces the electric field gradient between the pads of the first chip and the pads of the other two chips, thereby suppressing the migration path of silver ions and making it less likely for the pads of the first chip to react with the pads of the other two chips. This reduces or prevents the risk of electrochemical reactions between the pads, improves the reliability of the light-emitting unit performance, and thus helps to extend the service life of the display device. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a schematic diagram of the display device disclosed in this application;

[0049] Figure 2 This is an exploded view of the display device disclosed in this application;

[0050] Figure 3 This is one of the structural schematic diagrams of the light-emitting unit disclosed in this application;

[0051] Figure 4 This is a top view schematic diagram of the light-emitting unit disclosed in this application;

[0052] Figure 5 This is the second schematic diagram of the structure of the light-emitting unit disclosed in this application;

[0053] Figure 6 This is a side view of the light-emitting unit when the barrier portion is a groove, as disclosed in this application;

[0054] Figure 7 This is a side view of the light-emitting unit when the barrier portion disclosed in this application is a protrusion;

[0055] Figure 8 This is one of the bottom-view schematic diagrams of the light-emitting unit disclosed in this application;

[0056] Figure 9 This is a second bottom-view schematic diagram of the light-emitting unit disclosed in this application;

[0057] Figure 10 This is the third bottom-view schematic diagram of the light-emitting unit disclosed in this application;

[0058] Figure 11 This is a schematic diagram of the structure of the colloid filling the barrier portion disclosed in this application;

[0059] Figure 12 This is a schematic diagram of the structure of the colloid covering the pads located on the side surface disclosed in this application;

[0060] Figure 13 This is a schematic diagram of the structure of the light-emitting unit disclosed in this application disposed on the substrate.

[0061] Explanation of reference numerals in the attached figures:

[0062] 1000, Display device; 1, Display panel; 2, Backlight module; 2a, Light-emitting area; 100, Light-emitting unit; 10, Bracket; 101, Receiving groove; 10a, First end; 10b, Second end; 10c, Third end; 10d, Fourth end; 10e, First edge; 10f, Second edge; 102, First surface; 103, Second surface; 104, Side surface; 11, Barrier portion; 11a, Fifth end; 11b, Sixth end; 20, Chip; 21, First chip; 22, Second chip; 23, Third chip; 31, First pad; 32, ... 2 pads; 33, 3 pads; 34, 4 pads; 35, 5 pads; 36, 6 pads; 40, 7 pads; 40a, 3rd surface; 40b, 4th surface; 50, colloid; 200, substrate; 201, 8th pad; 202, groove; X, 1st direction; Y, 2nd direction; Z, 3rd direction; T, dimensional of the support in the 1st direction; 1 / 4T, distance from the 3rd and 4th pads to the 1st edge / distance from the 5th and 6th pads to the 2nd edge; H, dimensional of the barrier in the 3rd direction; W, width of the barrier;

[0063] L1 is the length of the colloid filling the barrier section; L2 is the length of the barrier section. Detailed Implementation

[0064] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0065] In this application, the terms "upper," "left," "right," "front," "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0066] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0067] Furthermore, the terms "set up," "equipped with," and "connected" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0068] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, elements, or components (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0069] The technical solution of this application will be further described below with reference to the embodiments and accompanying drawings.

[0070] See Figure 1 and Figure 2 This application discloses a display device 1000, which includes a display panel 1 and a backlight module 2. The display panel 1 is disposed on the light-emitting side of the backlight module 2. The backlight module 2 is used to provide backlight, and the display panel 1 is used to display image information for user viewing.

[0071] The display device 1000 can be, but is not limited to, electronic display products such as televisions, computer monitors, and LCD panels, and can be widely used in places such as homes, offices, conference halls, exhibition halls, stations, hospitals, or shopping malls.

[0072] In some embodiments, the backlight module 2 may include a lamp plate, a reflector, a diffuser, and an optical film group (not shown) arranged sequentially from back to front. The display panel 1 is located in front of the optical film group. The light emitted by the lamp plate is reflected by the reflector and then passes through the diffuser and the optical film group in sequence before reaching the display panel 1. The liquid crystal molecules in the front panel are deflected by the electric field, reducing the transmittance of the light emitted by the optical film group into the liquid crystal panel. This causes the light to be projected onto filters of different colors to form an image, thereby displaying image information on the display panel 1.

[0073] The optical film assembly may include multiple films. These films may include brightness enhancement films and multiple prism sheets, or multiple films may include multiple prism sheets.

[0074] Continue reading Figure 2 In some embodiments, the backlight module 2 includes a plurality of light-emitting units 100, which can serve as light-emitting sources for the backlight module 2.

[0075] In some embodiments, the backlight module 2 includes a substrate 200, and a plurality of light-emitting units 100 are disposed on the substrate 200. It is understood that the substrate 200, as a carrier substrate for the light-emitting units 100, can be electrically connected to the light-emitting units 100 to provide light-emitting driving signals to the light-emitting units 100. The substrate 200 can be a rigid substrate, such as glass.

[0076] It should be noted that multiple light-emitting units 100 can form multiple light-emitting areas 2a on the substrate 200. For example, the multiple light-emitting areas 2a are spaced apart along the height direction (vertical direction) of the display panel 1, each light-emitting area 2a is rectangular, the length direction of each light-emitting area 2a extends along the width direction of the display panel 1, and the width direction of each light-emitting area 2a extends along the height direction of the display panel 1. Each light-emitting area 2a may have multiple light-emitting units 100. Of course, in other examples, the multiple light-emitting areas 2a can be spaced apart along the width direction (horizontal direction) of the display panel 1, each light-emitting area 2a is rectangular, the length direction of each light-emitting area 2a extends along the height direction of the display panel 1, and the width direction of each light-emitting area extends along the width direction of the display panel 1.

[0077] Please refer to the following: Figures 3 to 5 In some embodiments, at least one light-emitting unit 100 includes a support 10, which has a receiving groove 101. The support 10 can be disposed on a substrate 200 to realize the electrical connection of the light-emitting unit. It should be noted that the receiving groove 101 has an opening, and the side wall of the receiving groove 101 is sloping and forms a reflective inner cavity. That is, the receiving groove 101 is roughly bowl-shaped, and the side wall of the receiving groove 101 can reflect light. The opening can be circular, square, or rectangular, etc., but whether it is a circular or square opening, it makes the receiving groove 101 of the support 10 sloping. The specific shape is not limited in this embodiment.

[0078] In some embodiments, the bracket 10 has a first end 10a and a second end 10b disposed along a first direction X, and a third end 10c and a fourth end 10d disposed along a second direction Y. The first direction X is perpendicular to the second direction Y. Specifically, the angle between the first direction X and the second direction Y can be 90°, or the angle between the first direction X and the second direction Y can be within the range of 90° ± 5°, for example, it can be 87°, 89°, or 91°, etc.

[0079] Optionally, the support 10 can be a square block structure, such as a square or rectangle. When the block structure support 10 is rectangular, it means that the support 10 can have two opposite long sides and two opposite short sides. Of course, as other examples, the support 10 can also be an irregular block structure, a plate structure, etc.

[0080] Combination Figure 3 and Figure 5 In some embodiments, the bracket 10 further has a first surface 102 and a second surface 103 disposed opposite to each other along a third direction Z, and a receiving groove is recessed on the first surface 102. The third direction Z is the thickness direction of the bracket 10, and is perpendicular to the first direction X and the second direction Y, respectively.

[0081] It is understood that the second surface 103 of the support 10 refers to the outer surface opposite to the surface of the receiving groove 101 used to set the chip along the thickness direction of the support 10. After being soldered to the substrate 200, the second surface 103 can refer to the side facing the substrate 200.

[0082] In some embodiments, at least one light-emitting unit includes a plurality of chips 20 disposed in a receiving groove 101. The plurality of chips 20 emit light of different colors. The light emitted by the plurality of chips 20 is reflected by the sidewall of the receiving groove 101 and exits from the opening.

[0083] See Figure 3 and Figure 4 In some embodiments, at least one light-emitting unit includes a first chip 21, a second chip 22, and a third chip 23, all of which are disposed in a receiving groove.

[0084] In some embodiments, at least one light-emitting unit 100 includes a first pad 31, a second pad 32, a third pad 33, a fourth pad 34, a fifth pad 35, and a sixth pad 36, all of which are disposed on the bracket 10.

[0085] The first pad 31 and the second pad 32 are connected to the first chip 21, the third pad 33 and the fourth pad 34 are connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 are connected to the third chip 23.

[0086] For example, the first pad 31 and the second pad 32 are connected to the positive and negative terminals of the first chip 21, respectively; that is, the first pad 31 and the second pad 32 are the positive and negative pads of the first chip 21, respectively. The third pad 33 and the fourth pad 34 are connected to the positive and negative terminals of the second chip 22, respectively; that is, the third pad 33 and the fourth pad 34 are the positive and negative pads of the second chip 22, respectively. The fifth pad 35 and the sixth pad 36 are connected to the positive and negative terminals of the third chip 23, respectively; that is, the fifth pad 35 and the sixth pad 36 are the positive and negative pads of the third chip 23, respectively. Of course, in other examples, the first pad 31 and the second pad 32 can also be connected to the negative and positive terminals of the first chip 21, respectively; that is, the first pad 31 and the second pad 32 are the negative and positive pads of the first chip 21, respectively. The third pad 33 and the fourth pad 34 can also be connected to the negative and positive terminals of the second chip 22, respectively. That is, the third pad 33 and the fourth pad 34 are the negative and positive pads of the second chip 22, respectively. The fifth pad 35 and the sixth pad 36 can also be connected to the negative and positive terminals of the third chip 23, respectively. That is, the fifth pad 35 and the sixth pad 36 are the negative and positive pads of the third chip 23, respectively.

[0087] It should be noted that, in combination Figure 4 Each of the following pads—first pad 31, second pad 32, third pad 33, fourth pad 34, fifth pad 35, and sixth pad 36—may comprise two parts: one part located within the receiving groove 101, used for the positive or negative electrical connection of the first chip 21, second chip 22, and third chip 23; and the other part located outside the receiving groove 101, and at least partially located on the second surface 103 of the support 10. Any one of the following pads may be integrally formed, extending from within the receiving groove 101 of the support 10 to the outside of the support 10, thereby ensuring that the support 10 has pads both inside and outside.

[0088] The bracket 10 can be soldered to the substrate 200 via the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 located on the second surface 103.

[0089] In some embodiments, the first chip 21 is configured as a red light chip, and at least one of the second chip 22 and the third chip 23 emits light of a different wavelength than the first chip 21.

[0090] Due to the different epitaxial materials used in different chips, the voltage difference between the red light chip and other chips is relatively large, making electrochemical reactions more likely. Based on this, combined with... Figure 4 and Figure 5 In some embodiments, the first pad 31 and the second pad 32 are located at the first end 10a and the second end 10b, respectively.

[0091] In some embodiments, the third pad 33 and the fourth pad 34 are located at the third end 10c and the fourth end 10d, respectively.

[0092] In some embodiments, the fifth pad 35 and the sixth pad 36 are located at the third end 10c and the fourth end 10d, respectively, and the third pad 33 and the fifth pad 35, the fourth pad 34 and the sixth pad 36 are all spaced apart along the first direction X.

[0093] That is, the first end 10a of the bracket 10 has a first pad 31 of the first chip 21, and the second end 10b has a second pad 32 of the first chip 21. The third end 10c of the bracket 10 has a third pad 33 of the second chip 22 and a fifth pad 35 of the third chip 23, which are spaced apart along the first direction X. The fourth end 10d of the bracket 10 has a fourth pad 34 of the second chip 22 and a sixth pad 36 of the third chip 23, which are spaced apart along the first direction X.

[0094] By placing the first pad 31 and the second pad 32 connected to the first chip 21 at the first end 10a and the second end 10b of the bracket 10, and placing the third pad 33 and the fourth pad 34 connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 connected to the third chip 23 at the third end 10c and the fourth end 10d of the bracket 10, that is, placing the first pad 31 and the second pad 32 of the first chip 21 at different ends of the bracket 10 with the pads of the other two chips, the distance between the first pad 31 and the second pad 32 of the first chip 21 and the pads of the other chips can be set as far as possible. This increases the distance between the pads of the first chip 21 and the pads of the other two chips, reduces the electric field gradient between the pads of the first chip 21 and the pads of the other two chips, thereby suppressing the migration path of silver ions and making it less likely for the pads of the first chip 21 to react with the pads of the other two chips. This reduces or prevents the risk of electrochemical reactions between the pads, improves the reliability of the light-emitting unit performance, and thus helps to extend the service life of the display device.

[0095] It can be understood that, taking a rectangular bracket 10 as an example, the first direction X can be the length direction of the bracket 10, and the second direction Y can be the width direction of the bracket 10. Therefore, the two first ends 10a and the second end 10b can be the two oppositely arranged short sides of the bracket 10, and the two third ends 10c and the fourth end 10d can be the two oppositely arranged long sides of the bracket 10. Alternatively, the first direction X can be the width direction of the bracket 10, and the second direction Y can be the length direction of the bracket 10. Therefore, the first ends 10a and the second end 10b can be the two oppositely arranged long sides of the bracket 10, and the third ends 10c and the fourth end 10d can be the two oppositely arranged long sides of the bracket 10.

[0096] Since the two pads of the first chip 21 are separately located at the first end 10a and the second end 10b of the bracket 10, and the pads of the second chip 22 and the third chip 23 are located at the third end 10c and the fourth end 10d, that is, both the third end 10c and the fourth end 10d have two pads, in order to ensure that the spacing between adjacent pads is not too small, preferably, the bracket 10 is rectangular in shape, with the first end 10a and the second end 10b being the two short sides of the bracket 10, and the third end 10c and the fourth end 10d being the two long sides of the bracket 10. That is, the first direction X is the length direction of the bracket 10, and the second direction Y is the width direction of the bracket 10. In this way, the first pad 31 and the second pad 32 are respectively located on the two short sides of the bracket 10, and the third pad 33 and the fourth pad 34, the fifth pad 35 and the sixth pad 36 are respectively located on the two long sides of the bracket 10, which ensures that the spacing between adjacent third pads 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36 is not too small, reducing the risk of short circuits.

[0097] Optionally, the first chip 21 can be connected to the first pad 31 and the second pad 32 via wires, or the first chip 21 can be directly soldered to the first pad 31 and the second pad 32 without wires. Taking different chips on the market as examples, the PN junction of a standard chip is on the front side of the chip, and is connected to the pads by wire bonding; while the PN junction of a flip chip is on the bottom of the chip, and is connected by soldering, without wire bonding, thus enhancing the reliability of the connection. Correspondingly, the second chip 22 can also be connected to the third pad 33 and the fourth pad 34, and the third chip 23 can also be connected to the fifth pad 35 and the sixth pad 36 via wires or soldering.

[0098] Optionally, when the chip is connected to the pad via wires, the wires can be gold wires or copper wires. Since gold wires have stable performance, connecting via gold wires can extend the lifespan of the wires, thereby increasing the lifespan of the light-emitting unit 100.

[0099] In some embodiments, the receiving groove 101 is further filled with a transparent colloid (not shown), which is used to encapsulate the chip 20. The transparent colloid may be hemispherical in shape and possess high refractive index and high light transmittance, which facilitates a large light emission angle for the chip 20, thereby increasing the luminous flux. Furthermore, the transparent colloid also provides protection, preventing defects in the chip 20 caused by moisture, dust corrosion, or poor contact and detachment due to vibration, thus improving the lifespan and reliability of the chip 20 and the light-emitting unit 100.

[0100] Alternatively, the transparent colloid can be a plastic material such as epoxy resin or silicone resin.

[0101] In this embodiment, the chip 20 is fixed by the bracket 10, and then the positive and negative terminals of the chip 20 are connected to the pads by bonding wires, and then encapsulated with potting resin to obtain a complete light-emitting unit 100.

[0102] In some embodiments, one of the second chip 22 and the third chip 23 is configured as a green light chip, and the other of the second chip 22 and the third chip 23 is configured as a blue light chip.

[0103] By setting the first chip 21, the second chip 22, and the third chip 23 as red, green, and blue light chips, respectively, the light-emitting unit can create various colors by mixing these three colors. Furthermore, by placing the pads of the three color chips at different ends of the bracket 10, especially by positioning the pads of the red light chip far away from the pads of the green and blue light chips, crosstalk between different drive current signals can be avoided, reducing the risk of color mixing and ensuring the stability of color output.

[0104] In one example, the second chip 22 and the third chip 23 are configured as a green light chip and a blue light chip, respectively. That is, the first chip 21, the second chip 22 and the third chip 23 are red light chips, green light chips and blue light chips, respectively. When powered on, the first chip 21 can emit red light, the second chip 22 can emit red light, and the third chip 23 can emit blue light.

[0105] Optionally, the first chip 21, the second chip 22, and the third chip 23 can be controlled independently. For example, in a red scene, the red chip 20 can be controlled to work alone so that the light-emitting unit 100 emits red light; in a green scene, the green chip 20 can be controlled to work alone so that the light-emitting unit 100 emits green light; in a blue scene, the blue chip 20 can be controlled to work alone so that the light-emitting unit 100 emits blue light; and in a white scene, the first chip 21, the second chip 22, and the third chip 23 can be controlled to work simultaneously so that the three colors of light are mixed so that the light-emitting unit 100 emits white light.

[0106] Of course, as other examples, the first chip 21, the second chip 22, and the third chip 23 are respectively a red light chip, a blue light chip, and a green light chip, or the first chip 21, the second chip 22, and the third chip 23 are respectively a red light chip, a blue light chip, and a blue light chip. That is, when the first chip 21 is a red light chip, the other two chips can emit light rays different from red light. The specific settings are not limited in the embodiments of this application.

[0107] Taking RGB LEDs as an example, the first chip 21 is a red light chip, which is usually vertical and uses GaN (gallium arsenide) epitaxial material. It is significantly different from the upright structure and GaN (gallium nitride) epitaxial material used by the third chip 23 (blue light chip) and the second chip 22 (blue light chip). As a result, the luminous flux of the first chip 21 decreases rapidly with increasing temperature compared to the third chip 23 (blue light chip) and the second chip 22 (blue light chip), leading to a reduction in luminous efficiency.

[0108] To reduce the impact of temperature rise on the first chip 21, in some embodiments, the size of the first pad 31 and / or the second pad 32 is larger than the size of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36. It should be noted that the aforementioned pad size refers to the size of the first pad 31, the second pad 32, and the third pad 33 located on the second surface 103.

[0109] Because the first chip 21 has a low voltage but a high current requirement, by setting the size of the pads connected to the first chip 21 to be larger than the size of the pads connected to other chips, while still allowing for increased distance between the first pad 31, the second pad 32, and other pads to block the electrochemical reaction path, the pads can have a larger heat dissipation area. This reduces the impact of temperature rise on the first chip 21, thus improving the overall heat dissipation performance of the light-emitting unit. Simultaneously, increasing the size of the pads connected to the first chip 21 reduces resistance and localized heating, decreasing the risk of silver ion dissociation due to current concentration.

[0110] In addition, large-sized pads can disperse the electric field intensity, reduce the dissociation rate of silver ions, and delay the formation of Ag2O (silver oxide) gel, thereby ensuring the performance of the display device.

[0111] For example, the dimensions of the first pad 31 and the second pad 32 in the first direction X are both greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the first direction X; or, the dimensions of the first pad 31 and the second pad 32 in the second direction Y are greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the second direction Y; or, the dimensions of the first pad 31 and the second pad 32 in the first direction X and the second direction Y are both greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the first direction X and the second direction Y. Regardless of the dimensions in the first direction X and / or the second direction Y, as long as the area of ​​the first pad 31 and / or the second pad 32 located on the second surface 103 is greater than the area of ​​the pads of the other two chips, it is acceptable.

[0112] Continue reading Figure 4 In some embodiments, the first pad 31 and the second pad 32 are respectively disposed opposite to each other along the first direction X. That is, the positive pad and the negative pad of the first chip 21 are disposed opposite to each other in the first direction X.

[0113] In some embodiments, the third pad 33 and the fourth pad 34 are respectively disposed opposite to each other along the second direction Y, and the fifth pad 35 and the sixth pad 36 are respectively disposed opposite to each other along the second direction Y. The third pad 33 is configured to be connected to the positive electrode of the second chip 22, and the fifth pad 35 is configured to be connected to the positive electrode of the third chip 23. The third pad 33 and the fifth pad 35 are disposed adjacent to each other along the second direction Y. That is, the third pad 33 and the fourth pad 34 are respectively the positive and negative pads connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 are respectively the positive and negative pads connected to the third chip 23.

[0114] In other words, the first pad 31 and the second pad 32 are on the same straight line along the first direction X, the third pad 33 and the fourth pad 34 are on the same straight line along the second direction Y, the fifth pad 35 and the sixth pad 36 are on the same straight line along the second direction Y, and the third pad 33 and the fifth pad 35 are located at one of the second ends 10b, while the fourth pad 34 and the sixth pad 36 are located at the other second end 10b.

[0115] In this application, by arranging the positive and negative pads connected to each chip opposite each other, and by placing the positive pads connected to the second chip 22 and the third chip 23 at the same end, a symmetrical electric field distribution can be formed between the pads. This avoids excessively high local field strength that could cause tip discharge, and also increases the ion migration path length between the positive and negative pads, thus extending the silver ion migration time. Furthermore, unifying the positive and negative orientation of the pads simplifies circuit wiring design and facilitates the control of automated soldering processes.

[0116] For ease of understanding, the following description will be based on the arrangement of the pads of each chip. The first pad 31 and the second pad 32 are located at the first end 10a and the second end 10b of the bracket 10, respectively. The third pad 33 and the fourth pad 34 are located at the third end 10c and the fourth end 10d of the bracket 10, respectively. The fifth pad 35 and the sixth pad 36 are located at the third end 10c and the fourth end 10d of the bracket 10, respectively. The third pad 33 and the fifth pad 35 are arranged adjacent to each other along the first direction X. The fourth pad 34 and the sixth pad 36 are arranged adjacent to each other along the first direction X. The first pad 31 is arranged adjacent to the third pad 33 and the fourth pad 34. The second pad 32 is arranged adjacent to the fifth pad 35 and the sixth pad 36.

[0117] Combination Figures 4 to 5 In some embodiments, at least one light-emitting unit 100 further includes a seventh pad 40, which is at least partially disposed in the receiving groove 101. A first pad 31, a second pad 32, a third pad 33, a fourth pad 34, a fifth pad 35, and a sixth pad 36 are disposed around the outer periphery of the seventh pad 40. A first chip 21, a second chip 22, and a third chip 23 are disposed on the seventh pad 40.

[0118] Specifically, the seventh pad 40 may have a third surface 40a and a fourth surface 40b disposed opposite each other along a third direction Z. The third surface 40a is located in the receiving groove 101, and the first chip 21, the second chip 22, and the third chip 23 are disposed on the third surface 40a. The fourth surface 40b is exposed on the second surface 103 of the bracket 10. The heat generated by the first chip 21, the second chip 22, and the third chip 23 is transferred to the seventh pad 40, and then transferred to the external environment through the seventh pad 40.

[0119] By placing the seventh pad 40 between multiple pads, a central heat dissipation structure is formed, which allows the seventh pad 40 to centrally dissipate the heat from each chip, reducing the overall temperature of the light-emitting unit (higher temperature will accelerate silver dissociation and migration). At the same time, the seventh pad 40 can separate the positive and negative pads of each chip, thereby blocking the ion migration path and reducing the risk of electrochemical reactions.

[0120] It should be noted that the aforementioned seventh pad 40 can not only serve as a heat dissipation pad, but also as a pad for electrical connection with the substrate. Furthermore, the portion of the seventh pad 40 located in the receiving groove 101 can also serve as a reflective element, which is more conducive to the emission of light.

[0121] In some embodiments, the first pad 31 and the second pad 32 are located at the middle of the first end 10a and the second end 10b along the second direction Y, respectively. That is, the distances of the first pad 31 and the second pad 32 along the second direction Y to the edge of the bracket 10 are approximately the same, thus making the distances of the first pad 31 and the second pad 32 of the first chip 21 along the second direction Y to the edge of the bracket 10 symmetrical.

[0122] See Figure 6 In some embodiments, the bracket 10 has a first edge 10e and a second edge 10f disposed opposite to each other along a first direction X, and a third pad 33 and a fifth pad 35 are disposed sequentially along a direction from the first edge 10e to the second edge 10f.

[0123] In some embodiments, the bracket 10 has a dimension of T in the first direction X, the distances from the third pad 33 and the fourth pad 34 to the first edge 10e are 1 / 4T, and the distances from the fifth pad 35 and the sixth pad 36 to the second edge 10f are 1 / 4T. The third pad 33 and the fifth pad 35 are evenly arranged at the second end 10b, and the distances from the third pad 33 to the first edge 10e, the distance between the third pad 33 and the fifth pad 35, and the distance from the fifth pad 35 to the second edge 10f are approximately the same.

[0124] In other words, the bracket 10 is divided into two symmetrical parts along the first direction X, with the third pad 33 and the fourth pad 34 located in the center of the left part, and the fifth pad 35 and the sixth pad 36 located in the center of the right part.

[0125] This configuration effectively balances the electric field distribution at both ends of the support 10 in the first direction X and the second direction Y, reducing the likelihood of electrochemical reactions. Furthermore, the uniform and symmetrical arrangement of the pads balances mechanical stress, preventing poor contact caused by soldering misalignment.

[0126] In some embodiments, at least a portion of the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 are disposed on the second surface 103.

[0127] Combination Figures 5 to 7In some embodiments, the bracket 10 further has a side surface 104 connected to the first surface 102 and the second surface 103, and the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 are at least partially located on the side surface 104.

[0128] It is understood that the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 located outside the receiving groove 101 each include two interconnected parts. The first part is located on the side surface 104 and the second part is located on the second surface 103, and the connection between the two is located at the corner of the bracket 10.

[0129] It is understood that the side surface 104 refers to the outer peripheral surface that is disposed opposite to the side wall surface of the receiving groove 101 along the first direction X and the second direction Y. Taking the square bracket 10 as an example, the side surface 104 consists of four side surfaces.

[0130] Currently, to achieve more flexible color control and richer light effect variations, the number of pads on the light-emitting unit 100 typically includes four, six, eight, or even more. However, with the increase in the number of pads, spontaneous electrochemical reactions easily occur between the pads under the influence of water and oxygen. Specifically, at the anode, silver dissociates into Ag+ (silver ions) under the influence of an electric field and OH- (hydroxyl ions), and forms AgOH (silver hydroxide) with OH-. The Ag-OH chemical bond in AgOH is weak and easily decomposes into gel-like Ag2O (silver oxide) and water. At the cathode, H+ (hydrogen ions) accept electrons to form H2 (hydrogen gas). The Ag+ dissociated at the anode migrates directly from the electrolyte to the cathode under the influence of an electric field, accepts electrons, and completes electrochemical deposition to form metallic silver. This can easily lead to the failure of the light-emitting unit 100 and affect the service life of the backlight module 2.

[0131] Based on the above, see Figure 5 In some embodiments, a barrier portion 11 is provided on the second surface 103. The barrier portion 11 is located between any two adjacent pads connected to different chips among the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36. The barrier portion 11 is configured to space any two adjacent pads connected to different chips.

[0132] By providing a barrier portion 11 between any two adjacent pads connected to different chips among the first pad 31, second pad 32, third pad 33, fourth pad 34, fifth pad 35, and sixth pad 36, the barrier portion 11 can disrupt the continuous interface of the electrochemical reaction, act as a separator between two adjacent pads, and increase the tortuosity of the silver ion migration path, inhibiting or reducing the migration and deposition of silver ions, thereby delaying or preventing electrochemical deposition, thus improving the reliability of the display device performance and extending the service life of the display device.

[0133] It is understood that for the pads connected to different chips, in addition to the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36 being arranged adjacently, the first pad 31 is also arranged adjacently to the third pad 33 and the fourth pad 34, and the second pad 32 is also arranged adjacently to the fifth pad 35 and the sixth pad 36. Therefore, at least two of the aforementioned adjacent pads are provided with a barrier portion 11. Preferably, a barrier portion 11 is provided between any two adjacent pads.

[0134] Optionally, combined Figure 6 and Figure 7 The barrier portion 11 can be a protrusion on the second surface 103, such as a bump or a strip. Alternatively, the barrier portion 11 can be a groove recessed on the second surface 103, as long as it can play a blocking role to block the electrochemical reaction path of two adjacent sets of solder pads.

[0135] In some embodiments, portions of the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 located outside the receiving groove 101 are disposed on the edge of the bracket 10, and one end of the blocking portion 11 extends to the edge of the bracket 10.

[0136] Setting the pads at the edge facilitates alignment during the soldering process, thereby improving the assembly yield of the light-emitting unit 100. At the same time, extending the barrier portion 11 to the edge of the bracket 10 ensures that the setting of the barrier portion 11 and the pads are consistent, forming a continuous physical isolation.

[0137] In some embodiments, combined with Figure 5 and Figure 6 The dimension of the barrier portion 11 in the third direction Z (thickness direction of the bracket 10) is H, and H satisfies: H≥0.1mm.

[0138] If the dimension H of the barrier portion 11 in the thickness direction Z of the support 10 is less than 0.1 mm, then when the barrier portion 11 is a protrusion on the second surface 103, the height of the barrier portion 11 is too low. And when the barrier portion 11 is a recess on the second surface 103, the depth of the barrier portion 11 is too low. That is, regardless of whether the barrier portion 11 is a protrusion or a recess, it cannot provide effective isolation. Silver ions are easily migrated under the influence of the electric field, forming metal deposition, thus affecting the performance of the light-emitting unit 100. Therefore, by setting the dimension H of the barrier portion 11 in the thickness direction Z of the support 10 to be not less than 0.1 mm, the size of the barrier portion 11 can be made appropriate, thereby enabling the barrier portion 11 to provide effective physical isolation and prevent the formation of ion migration channels between adjacent pads.

[0139] In some embodiments, the dimension of the barrier portion 11 in the third direction Z (thickness direction Z of the bracket 10) is H, where H satisfies: H≤0.3mm.

[0140] If the dimension H of the barrier portion 11 in the thickness direction Z of the bracket 10 is greater than 0.3 mm, when the barrier portion 11 is a protrusion on the second surface 103, the height of the barrier portion 11 is too high, which will excessively occupy the space between the light-emitting unit 100 and the substrate 200, resulting in an increase in the overall thickness of the light-emitting unit 100 and hindering the welding of the bracket 10 and the substrate 200. When the barrier portion 11 is a groove recessed on the second surface 103, the depth of the barrier portion 11 is too high, which will excessively occupy the space on the bracket 10 and affect the mechanical strength of the bracket 10. Therefore, by setting the dimension H of the barrier portion 11 in the thickness direction Z of the bracket 10 to be no greater than 0.3 mm, the barrier portion 11 can be prevented from being too high, avoiding affecting the welding of the bracket 10 and the substrate 200, or excessively occupying the space on the bracket 10, reducing the impact on the structural strength of the bracket 10 itself.

[0141] In some embodiments, the dimension of the barrier portion 11 in the third direction Z is H, where H satisfies: 0.1mm ≤ H ≤ 0.3mm. Optionally, H may satisfy 0.1mm ≤ H ≤ 0.2mm, 0.2mm ≤ H ≤ 0.3mm, or 0.15mm ≤ H ≤ 0.25mm, etc. For example, H may be 0.1mm, 0.2mm, or 0.3mm, etc.

[0142] When the dimension of the barrier portion 11 in the thickness direction Z of the bracket 10 is 0.1mm≤H≤0.3mm, H can be kept within a reasonable range. This not only provides effective isolation but also reduces the impact on the welding process or protects the structure of the bracket 10 itself. When the barrier portion 11 is a protrusion, this size range is more conducive to meeting the requirement of thinner and lighter light-emitting unit 100 while ensuring effective blocking of ion migration.

[0143] In some embodiments, the dimension of the barrier portion 11 in the second direction Y is W, where W ≥ 0.2 mm. If the dimension W of the barrier portion 11 in the second direction Y is less than 0.2 mm, then the barrier portion 11 is too narrow in the second direction Y and cannot effectively isolate two adjacent pads.

[0144] In some embodiments, the barrier portion 11 is configured as an elongated structure, and the width of the barrier portion 11 is W, where W ≤ 0.8 mm. If the width W of the barrier portion 11 is greater than 0.8 mm, the width of the barrier portion 11 is too wide. An overly wide barrier portion 11 will make the distance between the barrier portion 11 and the pads on both sides too close. During the pad soldering process, it is easily affected by the solder, thus failing to effectively perform the isolation function of the barrier portion 11.

[0145] In some embodiments, the width of the barrier portion 11 is W, where W satisfies: 0.2mm ≤ W ≤ 0.8mm.

[0146] When the width of the barrier portion 11 is 0.2mm ≤ W ≤ 0.8mm, W can be kept within a reasonable range. This ensures effective isolation while preventing the barrier portion 11 from being too close to the pads on both sides, thus avoiding the impact of pad soldering. When the barrier portion 11 is a groove, this suitable size range can balance the isolation effect and structural strength.

[0147] It can be understood that when the blocking part 11 is a protrusion on the second surface 103, the dimension of the blocking part 11 in the thickness direction Z of the bracket 10 is the height; when the blocking part 11 is a groove on the second surface 103, the dimension of the blocking part 11 in the thickness direction Z of the bracket 10 is the depth.

[0148] In some embodiments, the barrier portion 11 located between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, is located at the middle of two adjacent pads. In other words, if the distance between the third pad 33 and the fifth pad 35 in the first direction X is L, then the barrier portion 11 is located at 1 / 2L, that is, the distance from the barrier portion 11 to the third pad 33 and the fifth pad 35 is approximately the same.

[0149] By placing the barrier portion 11 in the middle between the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36, that is, making the distance from the barrier portion 11 to the pads on both sides in the first direction approximately the same, the difference in electric field angle between adjacent pads is reduced, the driving force for silver ion migration is decreased, and electrochemical reactions are less likely to occur between adjacent pads. Furthermore, the above arrangement also makes the distance from the barrier portion 11 to the pads on both sides symmetrical, resulting in a uniform electric field distribution and avoiding the situation where local electric field concentration accelerates electrochemical reactions.

[0150] See Figure 8 In some embodiments, the barrier portion 11 is configured as an elongated structure, having a fifth end 11a and a sixth end 11b along its length. The fifth end 11a is located at the edge of the support 10, and the sixth end 11b extends to the seventh pad 40. In other words, the fifth end 11a is located on the side surface 104 of the support 10, and the sixth end 11b extends to connect with the seventh pad 40.

[0151] By setting the seventh pad 40, the barrier portion 11 extends to be connected to it, so that the barrier portion 11 can play an effective separation role while avoiding excessive length of the barrier portion 11, which would cause excessive occupation of the space of the bracket 10. This makes the layout between the components more reasonable and ensures that the seventh pad 40 has sufficient heat dissipation area to conduct heat in conjunction with the barrier portion 11, thereby improving heat dissipation efficiency.

[0152] It should be noted that, since the first pad 31 and the second pad 32 are respectively located at the two first ends 10a, and the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 are respectively located at the two second ends 10b, and the pads of each chip are located at different ends of the bracket 10, the barrier portion 11 can have multiple configuration methods. The configuration of the barrier portion 11 will be explained in detail below according to different cases.

[0153] In the first example, see [link / reference] Figure 8 Along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Along the second direction Y, a barrier portion 11 can be provided between the first pad 31 and the third pad 33, between the first pad 31 and the fourth pad 34, between the second pad 32 and the fifth pad 35, and between the second pad 32 and the sixth pad 36, thereby physically separating adjacent pads of different chips.

[0154] In this example, the fifth end 11a of the barrier portion 11 located between any two pads is located at the edge of the bracket 10, and the second end 10b is connected to the seventh pad 40.

[0155] In the second example, combined Figure 9Along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36. Along the second direction Y, a barrier portion 11 is provided between the first pad 31 and the second pad 32, and between the third pad 33 and the fifth pad 35, extending along the first direction X to a first end 10a and a second end 10b. Correspondingly, along the second direction Y, a barrier portion 11 is provided between the first pad 31 and the second pad 32, and between the fourth pad 34 and the sixth pad 36, extending along the first direction X to a first end 10a and a second end 10b.

[0156] In the third example, see [reference] Figure 10 Along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Barrier portions 11 are also provided between the first pad 31 and the third pad 33, between the first pad 31 and the fourth pad 34, between the second pad 32 and the fifth pad 35, and between the second pad 32 and the sixth pad 36. The barrier portions 11 are arranged along the diagonal of the bracket 10, resulting in a cross-shaped structure on the second surface 103.

[0157] In this example, the fifth end 11a of the barrier portion 11 located between any two pads is located at the edge of the bracket 10, and the second end 10b is connected to the seventh pad 40.

[0158] Understandably, regardless of the above structural configuration, the barrier portion 11 extends to the edge of the bracket 10.

[0159] In some embodiments, the barrier portion 11 is configured as a groove recessed relative to the second surface 103 of the support 10. That is, the groove design is used to isolate two adjacent pads.

[0160] Since the light-emitting unit 100 is usually soldered on the substrate 200, by constructing the barrier portion 11 as a groove formed on the second surface 103, the barrier portion 11 will not protrude on the second surface 103 and occupy the space between the light-emitting unit 100 and the substrate 200 while being able to separate two adjacent solder pads. This will prevent the thickness of the light-emitting unit 100 from increasing, which is beneficial to the thinning of the backlight module 2.

[0161] In some embodiments, see Figure 11 and Figure 12The display device also includes an adhesive 50, which fills the barrier portion 11 and covers at least a portion of any two adjacent pads connected to different chips. Exemplarily, after the light-emitting unit 100 is soldered to the substrate 200, adhesive is applied to the connection points of the corresponding pads. Utilizing the fluidity of the adhesive 50 and guided by the barrier portion 11, the adhesive 50 gradually fills the second surface 103 of the support 10, covering the pads.

[0162] Filling the barrier portion 11 with colloid 50 and covering at least a portion of the pads can prevent water and oxygen from directly contacting the pads, achieving a double barrier effect. Furthermore, covering at least a portion of the pads with colloid 50 reduces the risk of oxidation and improves the stability of the pads under long-term conditions. Moreover, by placing colloid 50 on the light-emitting unit based on the groove design of the barrier portion 11, the barrier portion 11 guides the colloid 50 to fill the gap between the pads and the support 10, increasing the contact area between the colloid 50 and the pads, forming a continuous sealing layer to prevent water and oxygen intrusion. On the other hand, the groove also provides a mechanical positioning function to ensure the consistency of colloid 50 filling. In addition, after curing, the colloid 50 can enhance the bonding force between the support 10 and the substrate, reducing solder joint cracking caused by vibration or thermal stress.

[0163] It should be noted that the colloid 50 can cover the pads located outside the receiving tank 101. Specifically, a portion of the colloid 50 can cover the pads located on the side surface 104, and another portion of the colloid 50 can cover the pads located on the second surface 103, thereby improving the overall water and oxygen isolation effect of the pads.

[0164] Optionally, the colloid 50 can be epoxy resin, polyurethane adhesive, etc., which can effectively isolate water and oxygen from the solder pads.

[0165] Combination Figure 11A barrier portion 11 is provided between the first pad 31 and the third pad 33, the first pad 31 and the fourth pad 34, the second pad 32 and the fifth pad 35, the second pad 32 and the sixth pad 36, the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Since the seventh pad 40 is disposed between the aforementioned pads, and the fifth end 11a of the barrier portion 11 is located at the edge of the support 10, and the sixth end 11b is connected to the seventh pad 40, that is, a barrier portion 11 can be provided on the outer periphery of the seventh pad 40. Correspondingly, each barrier portion 11 can be filled with adhesive 50. Thus, while setting a barrier portion 11 between any two adjacent pads to achieve the function of separating the pads, the barrier portion 11 can also guide the adhesive 50 to fill the gaps between all pads and the support 10, achieving a complete or near-complete seal for the pads on the support 10. Furthermore... By using the colloid 50 filled in the barrier portion 11, the heat distribution can be optimized, the impact of temperature rise on the colloid 50 can be reduced, and the colloid 50 can be filled in sections to avoid gaps caused by the barrier portion 11 being too long. This makes the filling effect of the colloid 50 better and effectively isolates water and oxygen.

[0166] It should be noted that during the filling of colloid 50, in order to ensure the heat dissipation effect of the seventh pad 40, the colloid 50 can be made not to cover the seventh pad 40, so that the colloid 50 is present at the position where the pad is located on the outer periphery of the seventh pad 40.

[0167] like Figure 11 As shown, in some embodiments, the barrier portion 11 is configured as an elongated structure, the length of the colloid 50 filling the barrier portion 11 is L1, and the length of the barrier portion 11 is L2, wherein L1 ≥ 1 / 2 L2. Optionally, L1 = 1 / 2 L2, that is, the colloid 50 fills half of the barrier portion 11, or L1 = L2, that is, the colloid 50 completely fills the barrier portion 11.

[0168] By limiting the minimum filling ratio of the colloid 50 in the barrier portion 11, the colloid 50 is ensured to fill at least half of the barrier portion 11 on the third-direction ZX, thereby ensuring that the colloid 50 covers the critical area of ​​the pad edge and preventing local water and oxygen penetration due to insufficient filling.

[0169] It is understandable that the lengths of the colloid 50 in the barrier portion 11 between different pads may be equal or unequal.

[0170] In some embodiments, combined with Figure 12The colloid 50 covers at least a portion of any two adjacent pads on the side surface 104 that are connected to different chips, and at least one end of the barrier portion 11 is located on the side surface 104 (that is, at least one end of the barrier portion 11 extends to the edge of the support 10), so that the colloid 50 covers at least a portion of any two adjacent pads on the second surface 103 that are connected to different chips. Specifically, the fifth end 11a of the barrier portion 11 is located at the edge of the support 10.

[0171] It is understandable that in order to achieve the coverage of the pads on the side surface 104 by the colloid 50, since the colloid 50 may be irregular in shape, the maximum height of the colloid 50 in the thickness direction of the support 10 is greater than the height of the pads on the side surface 104.

[0172] By covering the pads on the side surface 104 with colloid 50, a full circumferential seal is achieved on the pads on the side surface 104, reducing the possibility of corrosion or oxidation of the weak point of the side pads of the bracket 10, while providing mechanical cushioning to resist lateral impacts.

[0173] As can be seen from the foregoing, see the following: Figure 13 The backlight module 2 also includes a substrate 200, and at least one light-emitting unit 100 is connected to the substrate 200. Specifically, the substrate 200 is provided with an eighth pad 201 corresponding to the pads on the bracket 10. The first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 located on the second surface 103 are respectively soldered to the eighth pad 201 so that each chip can achieve electrical conduction.

[0174] In some embodiments, a groove 202 is provided on the substrate 200, and the groove 202 is disposed corresponding to the barrier portion 11 in the third direction Z. The groove 202 is filled with colloid 50.

[0175] A groove 202 corresponding to the barrier portion 11 is provided on the substrate 200, forming a nested structure with the barrier portion 11 of the support 10. After dispensing, the adhesive 50 can form a more three-dimensional sealing structure under the guidance of the upper and lower grooves, and can also prevent water and oxygen from entering from the side of the substrate 200, enhance the sealing performance, effectively block the path of electrochemical generation between two adjacent pads, and improve the performance of the light-emitting unit 100.

[0176] The display device disclosed in the embodiments of this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the display device and its core ideas. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A display device, characterized in that, include: Display panel; A backlight module, wherein the display panel is disposed on the light-emitting side of the backlight module, and the backlight module includes: Multiple light-emitting units, at least one of the light-emitting units comprising: The bracket is provided with a receiving groove, and the bracket has a first end and a second end arranged along a first direction, and a third end and a fourth end arranged along a second direction; A first chip, a second chip, and a third chip are disposed in the receiving slot. The first chip is configured as a red light chip, and at least one of the second chip and the third chip emits light of a different wavelength than the first chip. A first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad are disposed on the bracket. The first pad and the second pad are respectively connected to the first chip, the third pad and the fourth pad are respectively connected to the second chip, and the fifth pad and the sixth pad are respectively connected to the third chip. The first pad and the second pad are located at the first end and the second end, respectively; The third pad and the fourth pad are located at the third end and the fourth end, respectively; The fifth pad and the sixth pad are located at the third end and the fourth end, respectively, and the third pad and the fifth pad, as well as the fourth pad and the sixth pad, are all spaced apart along the first direction; Wherein, the first direction is perpendicular to the second direction.

2. The display device according to claim 1, characterized in that, The size of the first pad and / or the second pad is greater than the size of any one of the third pad, the fourth pad, the fifth pad, and the sixth pad.

3. The display device according to claim 1, characterized in that, The first pad and the second pad are respectively arranged opposite to each other along the first direction; The third and fourth pads are respectively arranged opposite each other along the second direction, and the fifth and sixth pads are respectively arranged opposite each other along the second direction. The third pad is configured to be connected to the positive electrode of the second chip, and the fifth pad is configured to be connected to the positive electrode of the third chip. The third and fifth pads are arranged adjacent to each other along the second direction.

4. The display device according to claim 3, characterized in that, The first pad and the second pad are respectively located at the middle of the first end and the second end along the second direction; and / or, The bracket has a first edge and a second edge that are disposed opposite to each other along a first direction, and the third pad and the fifth pad are disposed sequentially along a direction from the first edge to the second edge; The bracket has a dimension of T in the first direction, the distances from the third and fourth pads to the first edge are 1 / 4T, and the distances from the fifth and sixth pads to the second edge are 1 / 4T.

5. The display device according to claim 1, characterized in that, The bracket has a first surface and a second surface disposed opposite to each other along a third direction, the receiving groove is recessed on the first surface, and at least a portion of the first pad, the second pad, the third pad, the fourth pad, the fifth pad and the sixth pad are disposed on the second surface; The second surface is provided with a barrier portion, which is located between any two adjacent pads connected to different chips among the first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad. The barrier portion is configured to be spaced apart from any two adjacent pads connected to different chips. Wherein, the third direction is the thickness direction of the bracket, which is perpendicular to the first direction and the second direction, respectively.

6. The display device according to claim 5, characterized in that, The barrier portion is configured as a groove recessed relative to the second surface of the support.

7. The display device according to claim 6, characterized in that, The display device further includes: A colloid, which fills the barrier portion and covers at least a portion of any two adjacent pads connected to different chips.

8. The display device according to claim 7, characterized in that, The barrier portion is configured as a long strip structure, the length of the colloid filled in the barrier portion is L1, the length of the barrier portion is L2, wherein L1≥1 / 2L2.

9. The display device according to claim 5, characterized in that, At least one of the light-emitting units further includes: The seventh pad is disposed in the receiving groove. The first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad are arranged around the outer periphery of the seventh pad. The first chip, the second chip, and the third chip are all disposed on the seventh pad. The barrier portion is configured as an elongated structure, having a fifth end and a sixth end along its length, the fifth end being located at the edge of the bracket, and the sixth end extending to the seventh pad.

10. The display device according to any one of claims 1-9, characterized in that, One of the second chip and the third chip is configured as a green light chip, and the other of the second chip and the third chip is configured as a blue light chip.

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