A memory bank information burning intelligent control method and system

Abstract

The application is suitable for the technical field of memory burning control and its automatic management, and provides a memory bank information burning intelligent control method and system.The method comprises the following steps: obtaining historical burning data of a target burning device, extracting a plurality of same kind burning records consistent with the packaging type of the target heterogeneous packaging memory particles from the historical burning data, and extracting a plurality of reference burning records of the memory particles of the specified type but not of the heterogeneous packaging.The application first realizes the dynamic correction of the page switching control time length of the heterogeneous packaging memory particles by constructing a double-parameter delay offset factor based on the delay time deviation amplitude and the stable time deviation amplitude.When the performance of the target burning device decreases but has not triggered the failure threshold, the mechanism can accurately identify the abnormal trend in the response evolution of the heterogeneous packaging particles, and actively adjust the control rhythm accordingly.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of memory burning control and its automatic management, and particularly relates to a memory information burning intelligent control method and system. BACKGROUND

[0002] In the current burning control field, the writing process of memory information usually adopts preset control parameters to manage the switching rhythm between data pages, especially in the page writing operation, the setting of the page switching control duration has a key influence on the overall burning efficiency and stability. The existing system generally sets the page switching control duration according to the experience parameters provided by the chip supplier or the fixed configuration value under the general test condition, and basically meets the burning needs of ordinary non-heterogeneous packaging particles under standard conditions. However, with the improvement of packaging structure complexity, especially under the background of wide application of heterogeneous packaging memory particles, the traditional static configuration mode gradually exposes its limitations.

[0003] Specifically, due to the uneven internal structure or response path difference of the heterogeneous packaging memory particles, the response delay may dynamically fluctuate in the actual burning process, which shows a trend that the level establishment delay time and the response stable time gradually increase with the increase of the burning times. Such evolution changes are often difficult to identify and respond in time in the existing technology, and potential risks are easily accumulated in the interval where the device performance declines but has not yet triggered the failure threshold, eventually leading to page writing failure or system abnormal stop. More importantly, the existing technology lacks the ability to distinguish the differences between heterogeneous and non-heterogeneous packaging, and has not established a corresponding delay dynamic monitoring mechanism and control rhythm adaptive adjustment strategy. SUMMARY

[0004] The purpose of the present application is to provide a memory information burning intelligent control method and system, which aims to solve the problems raised in the background art.

[0005] The present application is implemented as follows: a memory information burning intelligent control method, the method comprising:

[0006] obtaining historical burning data of a target burning device, extracting a plurality of same kind burning records consistent with the packaging type of the target heterogeneous packaging memory particles and a plurality of reference burning records of the specified type of non-heterogeneous packaging memory particles from the historical burning data;

[0007] extracting the level establishment delay time and the response stable time after the first page writing in the burning process from the same kind burning records and the reference burning records respectively, and constructing the delay time trend sequence and the stable time trend sequence of the heterogeneous packaging memory particles and the non-heterogeneous packaging memory particles in the burning time sequence respectively;

[0008] determining whether a specific trend pattern exists: the delay time trend sequence and the stable time trend sequence of the heterogeneous package memory particles start to show continuous rising trends in a preset time interval, but the trend does not appear in the corresponding trend sequence of the non-heterogeneous package particles;

[0009] If it is determined that the specific trend pattern exists, the last level establishment delay time and the response stable time of the same type of heterogeneous package particles are extracted, and are compared with historical reference values before the continuous rising trend appears, respectively, to calculate corresponding deviation amplitudes;

[0010] An initial page switching control time length set for the target heterogeneous package memory particle is obtained, a two-parameter delay offset factor for correcting the initial page switching control time length is constructed based on the two deviation amplitudes, and the corrected page switching control time length is applied to a burning control process of the target heterogeneous package memory particle.

[0011] As a further limitation of the technical scheme of the embodiment of the present application, the step of determining whether a specific trend pattern exists: the delay time trend sequence and the stable time trend sequence of the heterogeneous package memory particles start to show continuous rising trends in a preset time interval, but the trend does not appear in the corresponding trend sequence of the non-heterogeneous package particles includes:

[0012] The delay time trend sequence and the stable time trend sequence of the heterogeneous package memory particles are analyzed to determine whether both of them show continuous rising of all level establishment delay times and response stable times after a specific time point in the time evolution process;

[0013] If the above conditions are met, it is further determined whether the time interval at which the specific time point appears in the two trend sequences is less than a preset time interval;

[0014] If yes, it is analyzed whether the delay time trend sequence and the stable time trend sequence of the non-heterogeneous package memory particles do not show continuous rising trends in the preset time interval;

[0015] If it is confirmed that no rising trend is shown, it is determined that the target burning device has the specific trend pattern when burning the heterogeneous package memory particles of the same type as the target heterogeneous package memory particles.

[0016] As a further limitation of the technical scheme of the embodiment of the present application, if it is determined that the specific trend pattern exists, the step of extracting the last level establishment delay time and the response stable time of the same type of heterogeneous package particles, and comparing them with historical reference values before the continuous rising trend appears, respectively, to calculate corresponding deviation amplitudes includes:

[0017] After determining the existence of the specific trend pattern, the last level establishment delay time and the last response stabilization time are extracted from the delay time trend sequence and the stabilization time trend sequence of the heterogeneous package memory particle;

[0018] The total level establishment delay time and response stabilization time before the appearance of the continuous rising trend are extracted from the trend sequence, and the average values thereof are calculated as the delay time historical reference value and the stabilization time historical reference value, respectively;

[0019] The last level establishment delay time and the delay time historical reference value, and the last response stabilization time and the stabilization time historical reference value are compared, and the corresponding delay time deviation amplitude and stabilization time deviation amplitude are calculated.

[0020] As a further limitation of the technical scheme of the embodiment of the application, the steps of obtaining an initial page switching control time length set for the target heterogeneous package memory particle, constructing a two-parameter delay offset factor for correcting the initial page switching control time length based on the two deviation amplitudes, and applying the corrected page switching control time length to the burning control process of the target heterogeneous package memory particle include:

[0021] Obtaining an initial page switching control time length set for the target heterogeneous package memory particle;

[0022] Constructing a two-parameter delay offset factor based on the delay time deviation amplitude and the stabilization time deviation amplitude, and calling a preset page switching control time length adjustment function to correct the initial page switching control time length in combination with the two-parameter delay offset factor to obtain a corrected page switching control time length;

[0023] The corrected page switching control time length is used to control the switching rhythm of the target heterogeneous package memory particle between the writing of each page data.

[0024] As a further limitation of the technical scheme of the embodiment of the application, the page switching control time length adjustment function is:

[0025] ;

[0026] Wherein, denotes the corrected page switching control time length, denotes the initial page switching control time length, denotes the two-parameter delay offset factor;

[0027] In the page switching control time length adjustment function:

[0028] ;

[0029] Wherein, denotes the last level establishment delay time, refers to a delay time history reference value, refers to a delay time deviation amplitude, refers to an adjustment weight of the delay time deviation amplitude, refers to a last response stabilization time, refers to a stabilization time history reference value, refers to a stabilization time deviation amplitude, refers to an adjustment weight of the stabilization time deviation amplitude, and and are greater than 0.

[0030] An intelligent control system for burning memory information, the system comprising: a data acquisition module, a trend sequence construction module, a specific mode judgment module, a deviation amplitude calculation module, and a control duration correction module, wherein:

[0031] The data acquisition module is configured to acquire historical burning data of a target burning device, extract a plurality of same-type burning records consistent with the packaging type of the target heterogeneous packaging memory particle from the historical burning data, and extract a plurality of reference burning records of the same type of non-heterogeneous packaging memory particles;

[0032] The trend sequence construction module is configured to extract the first level establishment delay time and the response stabilization time corresponding to the burning process from the same-type burning records and the reference burning records, respectively, and construct the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles and the non-heterogeneous packaging memory particles in the order of burning time, respectively;

[0033] The specific mode judgment module is configured to determine whether there is a specific trend mode: the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles start to show a continuous upward trend within a preset time interval, but the trend does not appear in the corresponding trend sequence of the non-heterogeneous packaging particles;

[0034] The deviation amplitude calculation module is configured to, if it is determined that there is a specific trend mode, extract the last level establishment delay time and the response stabilization time of the same-type heterogeneous packaging particles, and compare them with the historical reference values before the continuous upward trend appears, respectively, to calculate the corresponding deviation amplitudes;

[0035] The control duration correction module is configured to acquire an initial page switching control duration set for the target heterogeneous packaging memory particles, construct a two-parameter delay offset factor for correcting the initial page switching control duration based on the two deviation amplitudes, and apply the corrected page switching control duration to the burning control process of the target heterogeneous packaging memory particles.

[0036] As a further limitation of the technical scheme of the embodiments of the present application, the specific mode judgment module specifically comprises:

[0037] The trend extraction unit is used to analyze the latency trend sequence and the stable time trend sequence of heterogeneous packaged memory chips, and to analyze whether both of them show a continuous increase in the setup latency and response stability time of all levels after a certain point in time during the time evolution process.

[0038] The time interval judgment unit is used to further determine whether the time interval between the occurrence of the specific time point in the two trend sequences is less than the preset time interval if the above conditions are met.

[0039] Anomaly comparison unit is used to analyze whether the latency trend sequence and stable time trend sequence of non-heterogeneous packaged memory chips do not show a continuous upward trend within the preset time interval if the anomaly is true.

[0040] The pattern confirmation unit is used to determine, if no pattern is presented, that the target programming device has a specific trend pattern when programming heterogeneous packaged memory chips of the same type as the target heterogeneous packaged memory chips.

[0041] As a further limitation of the technical solution of this embodiment of the invention, the deviation magnitude calculation module specifically includes:

[0042] The parameter extraction unit is used to extract the last level setup delay time and the last response stabilization time from the delay time trend sequence and the stable time trend sequence of heterogeneous packaged memory chips after determining that a specific trend pattern exists.

[0043] The benchmark calculation unit is used to extract the level establishment delay time and response stabilization time of all levels before the continuous upward trend appears from the trend sequence, and calculate their average values ​​as the historical benchmark values ​​of delay time and stabilization time, respectively.

[0044] The deviation calculation unit is used to compare the last level establishment delay time with the historical delay time reference value and the last response stabilization time with the historical stabilization time reference value, and calculate the corresponding delay time deviation magnitude and stabilization time deviation magnitude.

[0045] As a further limitation of the technical solution of this embodiment of the invention, the control duration correction module specifically includes:

[0046] The initial value reading unit is used to obtain the initial page switching control duration set for the target heterogeneous packaged memory chip;

[0047] The correction calculation unit is used to construct a two-parameter delay offset factor based on the delay time deviation magnitude and the stability time deviation magnitude, and call a preset page switching control duration adjustment function to correct the initial page switching control duration in combination with the two-parameter delay offset factor to obtain the corrected page switching control duration.

[0048] The control execution unit is used to apply the modified page switching control duration to control the switching rhythm between page data writes of the target heterogeneous packaged memory chips.

[0049] As a further limitation of the technical solution of this embodiment of the invention, the page switching control duration adjustment function is:

[0050] ;

[0051] in, This refers to the revised page switching control duration. This refers to the initial page switching control duration. This refers to the two-parameter delay offset factor;

[0052] In the page switching control duration adjustment function:

[0053] ;

[0054] in, This refers to the last level establishment delay time. This refers to the historical baseline value of the delay time. This refers to the deviation of the delay time. This refers to the adjustment weight of the deviation of the delay time. This refers to the time it took for the last response to stabilize. This refers to the historical baseline value of the stable time. This refers to the deviation from the settling time. This refers to the adjustment weight for the deviation of the settling time, and and All are greater than 0.

[0055] Compared with the prior art, the present invention has the following beneficial effects:

[0056] This invention, by constructing a dual-parameter delay offset factor based on the magnitude of delay time deviation and the magnitude of stable time deviation, achieves for the first time dynamic correction of page switching control duration for heterogeneous packaged memory chips. When the performance of the target programming device degrades but has not yet triggered a failure threshold, this mechanism can accurately identify abnormal trends in the response evolution of heterogeneous packaged chips and proactively adjust the control rhythm accordingly. Compared to the response stability exhibited by non-heterogeneous packaged chips under similar operating conditions, this invention models the sensitivity differences brought about by heterogeneous structures, exhibiting higher adaptability and robustness. Unlike existing methods that rely on fixed empirical values ​​to set page switching strategies, this invention effectively reduces the page write failure rate and improves the intelligence and engineering adaptability of the overall programming control. Attached Figure Description

[0057] Figure 1 A flowchart of the method provided in the embodiments of the present invention;

[0058] Figure 2 This is a flowchart illustrating the method for determining a specific trend pattern provided in an embodiment of the present invention;

[0059] Figure 3 This is a flowchart illustrating the method for calculating the deviation magnitude provided in the embodiments of the present invention;

[0060] Figure 4 This is a flowchart illustrating the process for correcting the page switching control duration in the method provided in this embodiment of the invention;

[0061] Figure 5 Application architecture diagram of the system provided in the embodiments of the present invention;

[0062] Figure 6 This is a structural block diagram of a specific pattern determination module in the system provided in the embodiments of the present invention;

[0063] Figure 7 This is a structural block diagram of the deviation amplitude calculation module in the system provided in the embodiment of the present invention;

[0064] Figure 8 This is a structural block diagram of the control duration correction module in the system provided in the embodiment of the present invention. Detailed Implementation

[0065] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0066] Figure 1 A flowchart of the method provided by an embodiment of the present invention is shown.

[0067] Specifically, a method for intelligent control of memory module information burning includes the following steps:

[0068] Step S100: Obtain historical programming data of the target programming device, extract several programming records of the same type as the target heterogeneous packaged memory chip package type from the historical programming data, and several reference programming records of non-heterogeneous packaged memory chips of a specified type.

[0069] In this embodiment of the invention, the target programming device usually refers to a programming device that has the ability to identify memory chips and control the writing of data to memory modules. This device can write parameters to different types of memory modules before mass production or during quality inspection in a factory or experimental environment. Its historical programming data usually includes the writing behavior performance under various types of packaging structures.

[0070] The heterogeneous packaged memory chips referred to in this invention refer to a combination of memory chips with heterogeneous structures or different manufacturing sources that are contained within the package, compared to the traditional single package structure. For example, the use of memory cells from different supply chains or different manufacturing processes in the same package unit may result in more complex timing response characteristics during the programming process.

[0071] For the extraction of several similar burning records of the same type, the selection is usually carried out by matching multiple dimensions such as package structure identifier, chip identification information (such as ID code, bit width, capacity), and production batch information to ensure that the selected records are consistent with the current target heterogeneous packaged memory chips in terms of key packaging parameters, so as to ensure the comparability and relevance of subsequent trend judgment.

[0072] Non-heterogeneous packaged memory chips of a specified type refer to memory chips that have the same logical structure (such as capacity, interface protocol, and speed specifications) as the target heterogeneous chip under the current process system, but adopt a standard single package form. They are used as a benchmark to compare their programming response trends under similar conditions, in order to identify specific response anomalies that only appear under heterogeneous structures.

[0073] Page switching control duration refers to the control interval used by the programming control logic to switch from the current data page to the next page during the programming process. This duration determines the rhythm setting between page writes. In existing programming systems, common default settings or configurations based on chip manufacturer recommendations are typically used, without dynamic adjustments for the characteristics of different package types of flash memory.

[0074] The target programming device refers to the hardware device that performs memory programming operations. During long-term operation, its performance may degrade due to internal circuit aging, heat loss, or other physical mechanisms. This degradation manifests as a slow accumulation of processing latency and unstable response. In this context, heterogeneous packaged memory chips, due to their complex structural paths or interface differences, are more prone to exhibiting fluctuations in response to this type of performance degradation during the programming process, thus becoming an important observation object reflecting changes in device performance.

[0075] Therefore, when collecting historical programming data, this invention pays special attention to the latency response evolution characteristics exhibited by heterogeneous packaged memory chips, in order to help identify potential performance sensitivity trends of the target programming device, and adjust the page switching control duration accordingly to better fit the current actual working conditions.

[0076] Historical programming data should include at least the following types of information: corresponding programming time point, target memory chip identification information, level establishment delay time, response stabilization time, number and order of data written pages, programming result status, and external environment information (such as temperature, voltage, etc., optional). Among them, the delay time and stabilization time are the core basic data used in this invention for trend judgment and deviation calculation.

[0077] Furthermore, the intelligent control method for burning memory module information also includes the following steps:

[0078] Step S200: Extract the level establishment delay time and response stabilization time after the first page write during the burning process from the same type of burning record and the reference burning record, respectively, and construct the delay time trend sequence and stabilization time trend sequence of heterogeneous packaged memory chips and non-heterogeneous packaged memory chips according to the burning time order.

[0079] In this embodiment of the invention, the level establishment delay time refers to the time elapsed from the issuance of the page write start command by the programming control logic to the initial stable establishment of the corresponding data pin level in the target memory chip during a page write operation. It reflects the initial delay between the transmission of the control signal and the chip's receiving response. The response stabilization time, on the other hand, refers to the time window required for signal fluctuations during the data write process to stabilize after level establishment. It is typically the duration of the data bus in a stable write state, reflecting the response consistency and signal convergence capability of the target chip during the page write phase.

[0080] The two time parameters mentioned above can be obtained by recording and comparing data and control pins through the timing monitoring module in the existing burning equipment or through signal analysis instruments. They are measurable indicators that are commonly used to analyze burning efficiency and particle behavior in the existing technology.

[0081] The selection of the time point "after the first page write" as the sampling object is primarily based on the following considerations: the period after the first page write typically reflects the degree of adaptation between the initial response state of the particle and the current output capability of the device more sensitively. If the particle itself has differences in packaging structure or the device performance fluctuates, this stage is most likely to expose latency and stability issues. Therefore, in this invention, response behavior indicators at this stage are extracted first to improve the accuracy of identifying trend evolution characteristics.

[0082] In constructing the latency trend sequence and stable time trend sequence, the system iterates through all similar burning records and reference burning records that meet the filtering criteria. Following the burning time sequence of each record, it sequentially extracts the corresponding level setup latency and response stabilization time, and then arranges these values ​​into a continuous data sequence in chronological order. Records for heterogeneous packaged memory chips constitute heterogeneous latency trend sequences and heterogeneous stable trend sequences, while records for non-heterogeneous packaged memory chips constitute non-heterogeneous latency trend sequences and non-heterogeneous stable trend sequences, used for subsequent trend pattern recognition and deviation calculation. This process can be automatically completed through database indexing and structured time stamps, possessing a clear and feasible implementation path.

[0083] Furthermore, the intelligent control method for burning memory module information also includes the following steps:

[0084] Step S300: Determine whether a specific trend pattern exists: The latency trend sequence and stable time trend sequence of heterogeneous packaged memory chips begin to show a continuous upward trend within a preset time interval, but this trend does not appear in the corresponding trend sequence of non-heterogeneous packaged chips.

[0085] Specifically, Figure 2 A flowchart for identifying a specific trend pattern is shown.

[0086] The determination of whether a specific trend pattern exists includes the following steps: the latency trend sequence and stable time trend sequence of heterogeneous packaged memory chips begin to show a continuous upward trend within a preset time interval, but this trend does not appear in the corresponding trend sequence of non-heterogeneous packaged chips.

[0087] Step S301: Analyze the delay time trend sequence and the stable time trend sequence of heterogeneous packaged memory chips, and analyze whether both of them show a continuous increase in the establishment delay time and response stability time of all levels after a certain point in time during the time evolution process.

[0088] Step S302: If the above conditions are met, further determine whether the time interval between the occurrence of the specific time point in the two trend sequences is less than the preset time interval.

[0089] Step S303: If yes, then analyze whether the latency trend sequence and stable time trend sequence of the non-heterogeneous packaged memory chip do not show a continuous upward trend within the preset time interval.

[0090] Step S304: If it is confirmed that no pattern is displayed, it is determined that the target programming device has a specific trend pattern when programming heterogeneous packaged memory chips of the same type as the target heterogeneous packaged memory chips.

[0091] In this embodiment of the invention, the system first extracts time series data from the latency trend sequence and stable time trend sequence of the constructed heterogeneous packaged memory chips, and analyzes the level setup delay time and response stabilization time corresponding to each time point. Based on this, the system analyzes whether these two time series show a continuous upward trend after a certain specific time point during their time evolution. Here, "continuous upward" does not require an absolutely monotonous increase, but rather refers to an overall upward trend in the time series within a certain data sliding window, indicating that the target device's response to the programmed chips is slower or more unstable, exhibiting obvious systematic deviation characteristics.

[0092] In step S302, if it is determined that both trend sequences of the heterogeneous packaged memory chips exhibit the aforementioned continuous upward trend, the system further determines whether the interval between the time points when the upward trend appears in the two trend sequences is less than a preset time interval. This time interval is set to ensure that the issues reflected by the two indicators are synchronous or strongly correlated, thereby eliminating spurious trend matching caused by occasional anomalies or background noise. If the two trends appear within a large time span, it often cannot prove that they are driven by the same factor.

[0093] In step S303, after confirming that both the delay time trend sequence and the stable time trend sequence of the heterogeneous chips begin to rise within the time interval, the system further analyzes the corresponding two trend sequences of the non-heterogeneous packaged memory chips to determine whether they do not exhibit the same continuous upward trend within the same preset time interval. If not, the response delay change caused by the systematic fluctuation of general-purpose equipment can be ruled out, indicating that the response fluctuation is more likely related to the type of heterogeneous chips being burned.

[0094] In step S304, if it is ultimately confirmed that the delay and stabilization time series of the heterogeneous particles both show a synchronous and continuous increase within a preset time interval, while the non-heterogeneous particles do not exhibit a similar trend within the corresponding time interval, then the system determines that the target programming device exhibits a specific trend pattern when programming particles of the same type as the target heterogeneous packaged particles. This specific trend pattern reflects the increased sensitivity of the heterogeneous structure to the current device's response performance, and is manifested as a coordinated increase in delay time and stabilization time.

[0095] The core purpose of identifying this specific trend pattern is to verify whether the response behavior of the target heterogeneous packaged particles under current device conditions differs systematically from that of non-heterogeneous particles. Compared to traditional control mechanisms based on general parameter settings, this invention, by constructing trend sequences and introducing comparative analysis, can dynamically identify the abnormal response evolution characteristics that heterogeneous particles are more likely to trigger under the background of degraded device performance. This response difference provides a basis for judging the subsequent adjustment of page switching control duration, ensuring the targeting and necessity of the adjustment, thereby solving the problem in the prior art that the interaction between particle structure differences and device operating status is not considered.

[0096] Furthermore, the intelligent control method for burning memory module information also includes the following steps:

[0097] Step S400: If a specific trend pattern is determined, extract the level setup delay time and response stabilization time of the last heterogeneous packaged chip of the same type, and compare them with the historical benchmark values ​​before the continuous upward trend appeared, and calculate the corresponding deviation.

[0098] Specifically, Figure 3 A flowchart for calculating the deviation magnitude is shown.

[0099] If a specific trend pattern is identified, the setup delay time and response settling time of the last heterogeneous packaged chip of the same type are extracted and compared with the historical benchmark values ​​before the continuous upward trend appeared. The corresponding deviation is calculated by the following steps:

[0100] Step S401: After determining that a specific trend pattern exists, extract the last level setup delay time and the last response stabilization time from the delay time trend sequence and the stable time trend sequence of the heterogeneous packaged memory chips.

[0101] Step S402: Extract all level establishment delay times and response stabilization times before the continuous upward trend appears from the trend sequence, and calculate their average values ​​as historical reference values ​​for delay time and stabilization time, respectively.

[0102] Step S403: Compare the last level establishment delay time with the historical delay time reference value, and the last response stabilization time with the historical stabilization time reference value, and calculate the corresponding delay time deviation and stabilization time deviation.

[0103] In this embodiment of the invention, the "last level establishment delay time" and "last response stabilization time" are chosen based on their representativeness of the current state. As heterogeneous packaged memory chips are continuously programmed in the target programming device, the device may exhibit a trend of anomaly due to the gradual decline in response performance in the early stages. The "last" response value, located at the end of the trend sequence, precisely reflects the latest performance of the device at the tail end of this trend evolution and is an important input required to construct a dynamic correction strategy.

[0104] On the other hand, to establish a basis for comparison, representative reference values ​​need to be extracted from the stable phase before the trend forms. Therefore, all response records prior to the emergence of a continuous upward trend were extracted to calculate the average value, which was used as the "historical baseline value for delay time" and the "historical baseline value for stable time," respectively. These two historical baseline values ​​represent the normal response level of this type of particle before any performance changes occur in the current device, and are used as reference axes for the degree of deviation.

[0105] The operation in step S403, namely calculating the "delay time deviation" and the "stabilization time deviation," essentially quantifies the relative change between the latest response state and the normal state. These two deviations reflect the degree of dynamic anomalies that occur during the level establishment phase and the stable response phase of the target device during the programming of the target heterogeneous packaged memory chip. Specifically, the delay time deviation reflects the change in the time required for level establishment, representing the sensitivity change in the interface establishment process; the stabilization time deviation reflects the change in the time required for the response to stabilize, representing the degree of degradation in data transmission stability.

[0106] Furthermore, the intelligent control method for burning memory module information also includes the following steps:

[0107] Step S500: Obtain the initial page switching control duration set for the target heterogeneous packaged memory chip, construct a two-parameter delay offset factor based on the two deviation magnitudes to correct the initial page switching control duration, and apply the corrected page switching control duration to the burning control process of the target heterogeneous packaged memory chip.

[0108] Specifically, Figure 4 A flowchart for correcting the page switching control duration is shown.

[0109] The process of obtaining the initial page switching control duration set for the target heterogeneous packaged memory chip, constructing a two-parameter delay offset factor based on two deviation magnitudes to correct the initial page switching control duration, and applying the corrected page switching control duration to the programming control process of the target heterogeneous packaged memory chip specifically includes the following steps:

[0110] Step S501: Obtain the initial page switching control duration set for the target heterogeneous packaged memory chip;

[0111] Step S502: Construct a two-parameter delay offset factor based on the delay time deviation magnitude and the stable time deviation magnitude, and call the preset page switching control duration adjustment function. Combine the two-parameter delay offset factor to correct the initial page switching control duration and obtain the corrected page switching control duration.

[0112] Step S503: The modified page switching control duration is used to control the switching rhythm between page data writes of the target heterogeneous packaged memory chip.

[0113] The page switching control duration adjustment function is:

[0114] ;

[0115] in, This refers to the revised page switching control duration. This refers to the initial page switching control duration. This refers to the two-parameter delay offset factor;

[0116] In the page switching control duration adjustment function:

[0117] ;

[0118] in, This refers to the last level establishment delay time. This refers to the historical baseline value of the delay time. This refers to the deviation of the delay time. This refers to the adjustment weight of the deviation of the delay time. This refers to the time it took for the last response to stabilize. This refers to the historical baseline value of the stable time. This refers to the deviation from the settling time. This refers to the adjustment weight for the deviation of the settling time, and and All are greater than 0.

[0119] In this embodiment of the invention, "delay time deviation" and "stabilization time deviation" are selected as dual-parameter indicators to construct the delay offset factor. This is based on a comprehensive consideration of the impact of these two key response parameters on page switching timing. On the one hand, the delay time deviation reflects the change in the programming device's ability to establish a response level during the page writing initiation phase; on the other hand, the stabilization time deviation reflects the change in the time required for the device to stabilize and recover after completing the page writing. These two parameters together determine the processing pressure and response risks that the device may face during page switching. Therefore, using dual parameters to jointly construct the offset factor allows for a more comprehensive assessment of the distance between the current state and the normal state.

[0120] By correcting the initial page switching control duration using this two-parameter delay offset factor, the following beneficial effects can be achieved:

[0121] 1. Dynamically improve the adaptability of page switching control parameters so that they can adjust to changes in device responsiveness and avoid using overly aggressive switching durations during performance degradation phases;

[0122] 2. Reduce the risk of data write failure and stability delay accumulation caused by excessively fast page switching, and enhance the overall robustness of the burning process;

[0123] 3. It provides an entry point for dynamic timing control at the chip level, breaking through the technical limitations of existing static settings.

[0124] The core technical pain point addressed is that traditional page switching control time is often set based on default experience values ​​or supplier recommendations, failing to fully consider individual response differences caused by packaging heterogeneity. In particular, it lacks an effective adjustment mechanism during periods of performance fluctuation in the target device, which can easily lead to burning failures or system anomalies.

[0125] In step S503, the revised page switching control duration is applied to the control logic in real time. After each page of data is written, this revised duration is used as a reference for the switching rhythm between the current page and the next page. Specifically, after detecting that the data writing of the current page is complete, the control logic automatically executes a waiting period corresponding to the revised control duration before entering the data writing process for the next page. This not only improves the rhythm matching between page writings but also reduces the risk of response conflicts caused by overly rapid switching.

[0126] The core logic of the page switching control duration adjustment function is as follows: it maps the two-parameter deviation factor to a relative gain value, which is used to linearly weight the initial control duration. In simple terms, if both deviations are small, the correction is approximately zero, maintaining the original rhythm; if either deviation is large, the control duration is increased to enhance the buffer redundancy of the write interval, thereby balancing the risk of response capability degradation.

[0127] For example, the historical latency benchmark for a certain heterogeneous packaged memory chip is 90ns, while the current latency is 117ns, a deviation of 30%. The stable latency benchmark is 80ns, while the current latency is 96ns, a deviation of 20%. The offset factor calculated after combining these two adjustment weights is 0.25. If the initial page switching control duration is 200ns, the corrected duration is 200ns multiplied by (1 + 0.25), which is 250ns. This correction value directly participates in the execution of subsequent programming control rhythms, avoiding data write failures due to insufficient device performance.

[0128] It is worth noting that the page switching control duration adjustment function provided in this invention is only an intuitive and engineering-feasible mapping method. Other more complex or adaptable methods can also be used in subsequent implementations, such as: nonlinear mapping functions based on machine learning models; dynamic control strategies obtained from equipment state regression modeling; and time series functions combined with historical multi-cycle response curve prediction models.

[0129] These methods can improve control precision while enhancing the generalization ability of the method, further expanding the application scope of the invention in adapting to multiple types of equipment and multiple batches of particles.

[0130] Furthermore, Figure 5 An application architecture diagram of the system provided in an embodiment of the present invention is shown.

[0131] In another preferred embodiment of the present invention, a memory module information burning intelligent control system includes:

[0132] The data acquisition module 100 is used to acquire historical programming data of the target programming device, extract several programming records of the same type that are consistent with the packaging type of the target heterogeneous packaged memory chip from the historical programming data, and several reference programming records of non-heterogeneous packaged memory chips of a specified type.

[0133] Furthermore, the intelligent control system for burning memory module information also includes:

[0134] The trend sequence construction module 200 is used to extract the level establishment delay time and response stabilization time after the first page write during the burning process from the same type of burning record and the reference burning record, respectively, and to construct the delay time trend sequence and stabilization time trend sequence of heterogeneous packaged memory chips and non-heterogeneous packaged memory chips according to the burning time order.

[0135] Furthermore, the intelligent control system for burning memory module information also includes:

[0136] The specific pattern judgment module 300 is used to determine whether a specific trend pattern exists: the latency trend sequence and the stable time trend sequence of heterogeneous packaged memory chips begin to show a continuous upward trend within a preset time interval, but this trend does not appear in the corresponding trend sequence of non-heterogeneous packaged chips.

[0137] Specifically, Figure 6 The diagram shows a structural block diagram of a specific pattern determination module 300 in a system provided by an embodiment of the present invention.

[0138] In a preferred embodiment of the present invention, the specific pattern determination module 300 specifically includes:

[0139] The trend extraction unit 301 is used to analyze the delay time trend sequence and the stable time trend sequence of heterogeneous packaged memory chips, and to analyze whether both of them show a continuous increase in the establishment delay time and response stability time of all levels after a certain point in time during the time evolution process.

[0140] The time interval judgment unit 302 is used to further determine whether the time interval between the occurrence of the specific time point in the two trend sequences is less than a preset time interval if the above conditions are met.

[0141] Anomaly comparison unit 303 is used to analyze, if so, whether the latency trend sequence and stable time trend sequence of non-heterogeneous packaged memory chips do not show a continuous upward trend within the preset time interval.

[0142] The pattern confirmation unit 304 is used to determine, if no pattern is confirmed, that the target programming device has a specific trend pattern when programming heterogeneous packaged memory chips of the same type as the target heterogeneous packaged memory chips.

[0143] Furthermore, the intelligent control system for burning memory module information also includes:

[0144] The deviation magnitude calculation module 400 is used to extract the level setup delay time and response stabilization time of the last heterogeneous packaged chip of the same type if a specific trend pattern is determined, and compare them with the historical reference values ​​before the continuous upward trend appeared to calculate the corresponding deviation magnitude.

[0145] Specifically, Figure 7 The diagram shows a structural block diagram of the deviation amplitude calculation module 400 in the system provided in an embodiment of the present invention.

[0146] In a preferred embodiment provided by the present invention, the deviation amplitude calculation module 400 specifically includes:

[0147] The initial value reading unit 401 is used to obtain the initial page switching control duration set for the target heterogeneous packaged memory chip;

[0148] The correction calculation unit 402 is used to construct a two-parameter delay offset factor based on the delay time deviation magnitude and the stable time deviation magnitude, and call a preset page switching control duration adjustment function to correct the initial page switching control duration in combination with the two-parameter delay offset factor to obtain the corrected page switching control duration.

[0149] The control execution unit 403 is used to use the modified page switching control duration to control the switching rhythm between page data writes of the target heterogeneous packaged memory chip.

[0150] Furthermore, the intelligent control system for burning memory module information also includes:

[0151] The control duration correction module 500 is used to obtain the initial page switching control duration set for the target heterogeneous packaged memory chip, construct a two-parameter delay offset factor based on two deviation magnitudes to correct the initial page switching control duration, and apply the corrected page switching control duration to the burning control process of the target heterogeneous packaged memory chip.

[0152] Specifically, Figure 8 A structural block diagram of the control duration correction module 500 in the system provided by an embodiment of the present invention is shown.

[0153] In a preferred embodiment provided by the present invention, the control duration correction module 500 specifically includes:

[0154] The initial value reading unit 501 is used to obtain the initial page switching control duration set for the target heterogeneous packaged memory chip;

[0155] The correction calculation unit 502 is used to construct a two-parameter delay offset factor based on the delay time deviation magnitude and the stability time deviation magnitude, and call a preset page switching control duration adjustment function to correct the initial page switching control duration in combination with the two-parameter delay offset factor to obtain the corrected page switching control duration.

[0156] The control execution unit 503 is used to use the modified page switching control duration to control the switching rhythm between page data writes of the target heterogeneous packaged memory chips.

[0157] The page switching control duration adjustment function is:

[0158] ;

[0159] in, This refers to the revised page switching control duration. This refers to the initial page switching control duration. This refers to the two-parameter delay offset factor;

[0160] In the page switching control duration adjustment function:

[0161] ;

[0162] in, This refers to the last level establishment delay time. This refers to the historical baseline value of the delay time. This refers to the deviation of the delay time. This refers to the adjustment weight of the deviation of the delay time. This refers to the time it took for the last response to stabilize. This refers to the historical baseline value of the stable time. This refers to the deviation from the settling time. This refers to the adjustment weight for the deviation of the settling time, and and All are greater than 0.

[0163] It should be understood that although the steps in the flowcharts of the various embodiments of the present invention are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the various embodiments may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0164] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

Claims

1. A memory stick information burning intelligent control method, characterized in that, The method comprises: acquiring historical burning data of a target burning device, extracting a plurality of same kind burning records consistent with the packaging type of the target heterogeneous packaging memory particles from the historical burning data, and a plurality of reference burning records of the same type of non-heterogeneous packaging memory particles; extracting the corresponding first page write level establishment delay time and response stabilization time in the burning process from the same kind burning records and the reference burning records respectively, and constructing the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles and the non-heterogeneous packaging memory particles in the burning time sequence respectively; determining whether there is a specific trend mode: the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles start to show a continuous rising trend in a preset time interval respectively, and the rising trend does not appear in the corresponding trend sequence of the non-heterogeneous packaging particles; specifically comprising: analyzing the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles, and analyzing whether both satisfy the condition that all the level establishment delay time and the response stabilization time continuously rise after a certain specific time point in the time evolution process; if the above condition is met, further determining whether the time interval of the specific time point appearing in the two trend sequences is less than the preset time interval; if yes, analyzing whether the delay time trend sequence and the stabilization time trend sequence of the non-heterogeneous packaging memory particles do not show a continuous rising trend in the preset time interval; if it is confirmed that it does not show, it is determined that the target burning device has a specific trend mode when burning the heterogeneous packaging memory particles consistent with the type of the target heterogeneous packaging memory particles; if it is determined that there is a specific trend mode, extracting the last level establishment delay time and response stabilization time of the same kind of heterogeneous packaging particles, and comparing them with the historical reference values before the continuous rising trend does not appear respectively, and calculating the corresponding deviation amplitude; acquiring the initial page switching control time length set for the target heterogeneous packaging memory particles, constructing a two-parameter delay offset factor for correcting the initial page switching control time length based on the two deviation amplitudes, and applying the corrected page switching control time length to the burning control process of the target heterogeneous packaging memory particles.

2. The method of claim 1, wherein, The step of determining whether there is a specific trend mode, extracting the last level establishment delay time and response stabilization time of the same kind of heterogeneous packaging particles, and comparing them with the historical reference values before the continuous rising trend does not appear respectively, and calculating the corresponding deviation amplitude if it is determined that there is a specific trend mode, comprises: after it is determined that there is a specific trend mode, extracting the last level establishment delay time and the last response stabilization time recorded from the delay time trend sequence and the stabilization time trend sequence of the heterogeneous packaging memory particles; extracting all the level establishment delay time and the response stabilization time before the continuous rising trend appears from the trend sequence, and calculating the average values of each as the delay time historical reference value and the stabilization time historical reference value respectively; comparing the last level establishment delay time with the delay time historical reference value, and the last response stabilization time with the stabilization time historical reference value, and calculating the corresponding delay time deviation amplitude and stabilization time deviation amplitude.

3. The method of claim 2, wherein the method further comprises: The steps of obtaining an initial page switching control time length set for a target heterogeneous packaging memory particle, constructing a two-parameter delay offset factor for correcting the initial page switching control time length based on two deviation amplitudes, and applying the corrected page switching control time length to a burning control process of the target heterogeneous packaging memory particle include: obtaining an initial page switching control time length set for a target heterogeneous packaging memory particle; constructing a two-parameter delay offset factor based on a delay time deviation amplitude and a stable time deviation amplitude, and calling a preset page switching control time length adjustment function to correct the initial page switching control time length in combination with the two-parameter delay offset factor to obtain a corrected page switching control time length; applying the corrected page switching control time length to control the switching rhythm of the target heterogeneous packaging memory particle between each page data writing.

4. The intelligent control method for burning information of a memory bank according to claim 3, wherein, The page switching control time length adjustment function is: ； wherein, denotes the modified page switching control duration, denotes the initial page switching control duration, denotes the two-parameter delay offset factor; In the page switching control time length adjustment function: ； wherein denotes the last level setup delay time, denotes the delay time history reference value, denotes the delay time deviation amplitude, denotes the adjustment weight of the delay time deviation amplitude, denotes the last response settling time, denotes the settling time history reference value, denotes the settling time deviation amplitude, denotes the adjustment weight of the settling time deviation amplitude, and and are greater than 0.

5. A memory stick information burning intelligent control system, characterized in that, The system includes a data acquisition module, a trend sequence construction module, a specific mode judgment module, a deviation amplitude calculation module, and a control time length correction module, wherein: The data acquisition module is configured to obtain historical burning data of a target burning device, extract a plurality of same-type burning records of the target heterogeneous packaging memory particle with the same packaging type from the historical burning data, and extract a plurality of reference burning records of the same type of non-heterogeneous packaging memory particles; The trend sequence construction module is configured to extract the level establishment delay time and the response stable time after the first page writing in the burning process from the same-type burning records and the reference burning records, respectively, and construct the delay time trend sequence and the stable time trend sequence of the heterogeneous packaging memory particle and the non-heterogeneous packaging memory particle in the burning time sequence, respectively; The specific mode judgment module is configured to judge whether there is a specific trend mode: the delay time trend sequence and the stable time trend sequence of the heterogeneous packaging memory particle start to show a continuous rising trend in a preset time interval, respectively, and the rising trend does not appear in the corresponding trend sequence of the non-heterogeneous packaging particle; The specific mode judgment module specifically includes: The trend extraction unit is configured to analyze the delay time trend sequence and the stable time trend sequence of the heterogeneous packaging memory particle, and analyze whether both satisfy the condition that all level establishment delay times and response stable times continuously rise after a specific time point in the time evolution process; The time interval judgment unit is configured to further judge whether the time interval of the specific time point appearing in the two trend sequences is less than a preset time interval if the above condition is satisfied; The abnormality comparison unit is configured to analyze whether the delay time trend sequence and the stable time trend sequence of the non-heterogeneous packaging memory particle do not show a continuous rising trend in the preset time interval if yes; The mode confirmation unit is configured to determine that the target burning device has the specific trend mode when burning the heterogeneous packaging memory particle with the same type as the target heterogeneous packaging memory particle if it is confirmed that the specific trend mode does not appear. The deviation amplitude calculation module is configured to, if it is determined that the specific trend pattern exists, extract the last level establishment delay time and response stabilization time of the isomeric package particle, and compare the last level establishment delay time and response stabilization time with historical reference values before the continuous rising trend occurs, respectively, to calculate corresponding deviation amplitudes. The control duration correction module is configured to obtain an initial page switching control duration set for the target isomeric package memory particle, construct a two-parameter delay offset factor for correcting the initial page switching control duration based on the two deviation amplitudes, and apply the corrected page switching control duration to a programming control process of the target isomeric package memory particle.

6. The memory stick information burning intelligent control system according to claim 5, wherein, The deviation amplitude calculation module specifically includes: The parameter extraction unit is configured to, after it is determined that the specific trend pattern exists, extract the last recorded level establishment delay time and the last recorded response stabilization time from the delay time trend sequence and the stabilization time trend sequence of the isomeric package memory particle. The reference calculation unit is configured to extract all level establishment delay times and response stabilization times before the continuous rising trend occurs from the trend sequence, and calculate average values of the level establishment delay times and the response stabilization times, respectively, as a delay time historical reference value and a stabilization time historical reference value. The deviation calculation unit is configured to compare the last level establishment delay time with the delay time historical reference value, and compare the last response stabilization time with the stabilization time historical reference value, to calculate a delay time deviation amplitude and a stabilization time deviation amplitude.

7. The memory stick information burning intelligent control system according to claim 6, wherein, The control duration correction module specifically includes: The initial value reading unit is configured to obtain an initial page switching control duration set for the target isomeric package memory particle. The correction calculation unit is configured to construct a two-parameter delay offset factor based on the delay time deviation amplitude and the stabilization time deviation amplitude, and call a preset page switching control duration adjustment function to correct the initial page switching control duration in combination with the two-parameter delay offset factor, to obtain a corrected page switching control duration. The control execution unit is configured to apply the corrected page switching control duration to control a switching rhythm of the target isomeric package memory particle between page data writing.

8. The memory stick information burning intelligent control system according to claim 7, wherein, The page switching control duration adjustment function is: ； wherein, refers to the modified page switch control duration, refers to the initial page switch control duration, refers to the two-parameter delay offset factor; In the page switching control duration adjustment function: ； wherein denotes the last level setup delay time, denotes the delay time history reference value, denotes the delay time deviation amplitude, denotes the adjustment weight of the delay time deviation amplitude, denotes the last response settling time, denotes the settling time history reference value, denotes the settling time deviation amplitude, denotes the adjustment weight of the settling time deviation amplitude, and and are greater than 0.

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