Energy storage system, battery management system and slave plate coding method thereof

Abstract

The invention relates to the technical field of energy storage, and discloses an energy storage system, a battery management system and a slave plate coding method thereof. The slave board comprises M first ID pins and M second ID pins, the second ID pins are connected with the corresponding first ID pins, and the first ID pins and the second ID pins are default high levels when being suspended; the M first ID pins of the first slave board are connected with the grounding end of the power distribution box, the M first ID pin of the nth slave board and the first second ID pin of the (n-1) th slave board are suspended from the second slave board, the mth first ID pin of the nth slave board is connected with the (m + 1) th second ID pin of the (n-1) th slave board, and the mth first ID pin of the nth slave board is connected with the (m + 1) th second ID pin of the (n-1) th slave board. At least part of the second ID pins of the Nth slave board are suspended, and the second ID pins needing to be grounded are connected with the grounding end of the Nth slave board so as to generate ID codes of the slave boards. The slave plate assembly accuracy can be improved, and the cost is reduced.

Description

Technical Field

[0001] This application relates to the field of energy storage technology, and in particular to an energy storage system, a battery management system and a slave board coding method thereof. Background Technology

[0002] Energy storage systems enable the storage, release, and management of electrical energy, thereby optimizing energy utilization efficiency.

[0003] With the rapid development of new energy and energy storage technologies, the importance of battery management systems in energy storage systems is increasing.

[0004] In existing battery management systems, slave boards are set up within each battery pack. Each slave board communicates with the main board, feeding back parameters of individual cells within the battery pack and receiving and executing control commands from the main board. To achieve accurate addressing during communication between the main board and slave boards, each slave board needs to be encoded with an identifier (ID). The main board uses the slave board's ID code as the communication address. One existing method for encoding slave boards involves setting up an additional ID encoding board for each slave board. This increases material costs, and during assembly, careful attention must be paid to the wiring positions of the corresponding ID encoding boards for different slave board locations, which can easily lead to misassembly. Summary of the Invention

[0005] The purpose of this application is to provide at least one energy storage system, battery management system and slave board coding method, which can at least solve the problems of misassembly and high cost of existing slave board coding methods, and can at least achieve the effect of improving slave board assembly accuracy and reducing cost.

[0006] In a first aspect, this application provides a battery management system, comprising: N slave boards located in different battery packs; The slave board includes M first ID pins and M second ID pins corresponding one-to-one with the M first ID pins. The second ID pins are connected to the corresponding first ID pins. When the first ID pins and the second ID pins are floating, they are at a default high level. The logic level of the M first ID pins of the slave board is used to generate the ID code of the slave board for communication with the main board of the battery management system. N and M are both positive integers greater than 1. In the N slave boards, the M first ID pins of the first slave board are connected to the ground terminal of the distribution box. Starting from the second slave board, the M first ID pin of the nth slave board and the first second ID pin of the (n-1)th slave board are left floating, and the m first ID pin of the nth slave board is connected to the m+1 second ID pin of the (n-1)th slave board. At least some of the second ID pins of the Nth slave board are left floating, and the second ID pins that need to be grounded are connected to the ground terminal of the Nth slave board to generate the ID code of each slave board.

[0007] Optional, also includes: The motherboard is communicatively connected to each of the slave boards and is used to pre-store an ID encoding table, which includes the ID encoding of each of the slave boards. When the motherboard is powered on, it communicates with each of the slave boards based on the pre-stored ID encoding table.

[0008] Optionally, the slave board includes a CAN gateway module; the CAN gateway module is an MC33665 chip; The CAN gateway module includes M first ID pins; The CAN gateway module is used to enable CAN communication between the slave board and the motherboard based on the slave board's ID encoding.

[0009] Optionally, the CAN gateway module further includes a first communication interface and a second communication interface; The first communication interface of the CAN gateway module of the first slave board is used to connect to the CAN communication interface of the motherboard; Starting from the second slave board, the first communication interface of the CAN gateway module of the nth slave board is connected to the second communication interface of the CAN gateway module of the (n-1)th slave board.

[0010] Optionally, the maximum value of N is determined based on the value of M, such that the N ID codes of the slave boards generated by the logic levels of the M first ID pins of the N slave boards are different.

[0011] Optionally, M can be 4, and N can be a maximum of 8.

[0012] Optionally, N is 8, the second to fourth second ID pins of the eighth slave board are connected to the ground terminal of the eighth slave board, and the first second ID pin is left floating; or, The value of N is 7. The third and fourth second ID pins of the seventh slave board are connected to the ground terminal of the seventh slave board, and the first and second second ID pins are left floating; or, The value of N is 6. The fourth second ID pin of the sixth slave board is connected to the ground terminal of the sixth slave board, and the first to third second ID pins are left floating; or, The value of N is 5, and the 5th pin is left floating from the 1st to the 4th pins of the second ID pin on the board; or, The value of N is 4. The first second ID pin of the fourth slave board is connected to the ground terminal of the fourth slave board, and the second to fourth second ID pins are left floating; or, The value of N is 3. The first and second second ID pins of the third slave board are connected to the ground terminal of the third slave board, and the third and fourth second ID pins are left floating; or, The value of N is 2. The first to third second ID pins of the second slave board are connected to the ground terminal of the second slave board, and the fourth second ID pin is left floating.

[0013] Secondly, this application provides a slave board encoding method for a battery management system as described in any of the above, comprising: When the motherboard is powered on, the first ID pin and the second ID pin that are floating in the slave board are set to the default high level; The M first ID pins of the first slave board are set to low level by the ground terminal of the power distribution box. The level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board. When the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set to low level, so that each slave board completes ID encoding based on the final M first ID pin levels.

[0014] Optionally, before setting the first ID pin and the second ID pin, which are floating on the board, to the default high level when the motherboard is powered on, the method further includes: The motherboard pre-stores an ID encoding table, wherein the ID encoding table includes the ID encoding of each slave board; The method further includes: M first ID pins of the first slave board are set low by the ground terminal of the distribution box; the level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board; when the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set low; after each slave board completes ID encoding based on the final M first ID pin levels, the method further includes: The motherboard communicates with each of the slave boards based on the pre-stored ID encoding table.

[0015] Thirdly, this application provides an energy storage system, including: a power distribution box and a battery management system as described in any of the above.

[0016] The advantages of this application compared to the prior art are: The battery management system of this application includes N slave boards located in different battery packs. Each slave board includes M first ID pins and M second ID pins. The second ID pins are connected to the corresponding first ID pins. When the first ID pins and second ID pins are floating, they are at a default high level. Among the N slave boards, the M first ID pins of the first slave board are connected to the ground terminal of the power distribution box. Starting from the second slave board, the M first ID pin of the nth slave board and the first second ID pin of the (n-1)th slave board are floating. The m first ID pin of the nth slave board is connected to the (m+1)th second ID pin of the (n-1)th slave board. At least some of the second ID pins of the Nth slave board are floating, and the second ID pins that need to be grounded are connected to the ground terminal of the Nth slave board. This allows the logic level of the M first ID pins of each slave board to generate the ID code of the slave board, so as to communicate with the main board of the battery management system. Since the wiring harness connection method between each slave board and the previous slave board is consistent, it is not easy to misassemble and no additional marking is required, which facilitates production and assembly. This solves the problem of slave board ID coding being prone to misassembly and costly, improves slave board assembly accuracy and reduces costs.

[0017] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0018] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, and these illustrative descriptions do not constitute a limitation on the embodiments.

[0019] Figure 1 This is a schematic diagram of the structure implemented using the board ID encoding scheme in the existing technology. Figure 1 ; Figure 2 This is a schematic diagram of the structure implemented using the board ID encoding scheme in the existing technology. Figure 2 ; Figure 3 This is a schematic diagram of the structure of a battery management system provided in one embodiment of this application. Figure 1 ; Figure 4 This is a schematic diagram of the structure of a battery management system provided in one embodiment of this application. Figure 2 ; Figure 5 This is a flowchart of a slave board address encoding method for a battery management system provided in one embodiment of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the various embodiments of this application will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the various embodiments of this application to help readers better understand this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various changes and modifications based on the following embodiments. The division of the various embodiments below is for the convenience of description and should not constitute any limitation on the specific implementation of this application. The various embodiments can be combined with and referenced by each other without contradiction.

[0021] To facilitate understanding of the embodiments of this application, the relevant content of the battery management system of the energy storage system will be introduced first.

[0022] In existing battery management systems, the slave board within the battery pack typically uses a microcontroller unit (MCU) as a gateway module. Address allocation is performed via communication between the MCU and the main board. However, this approach requires separate development of the MCU on the slave board, increasing software development workload. The existing MC33665 chip can directly communicate via Controller Area Network (CAN) without needing an MCU, reducing software development tasks; only the MCU on the main board needs to be developed.

[0023] Energy storage systems can employ a one-master-eight-slave design (i.e., one mainboard and eight slave boards). Using the MC33665 chip presents an encoding challenge. The MC33665 chip can be encoded via its ID pin configuration. To ensure consistency among the slave boards produced, one solution is to add an additional ID encoding board to encode the slave boards. Figure 1As shown, the MC33665 chip (MC33665A) has an ID configuration module, which includes pins ID0, ID1, ID2, and ID3. The ID encoding board includes an ID configuration circuit, which includes a high-level configuration circuit and a low-level configuration circuit. The high-level configuration circuit includes a resistor R connected to the positive terminal of the 12V power supply and configuration pins U1, U2, U3, and U4 to provide a high level. The low-level configuration circuit includes a power ground and configuration pins G1, G2, G3, and G4 to provide a low level. Pins ID0, ID1, ID2, and ID3 of the ID configuration module are connected to corresponding configuration pins via configuration lines 1, 2, 3, and 4, respectively. This encoding method requires an additional ID encoding board, which increases material costs. Furthermore, during assembly, attention must be paid to the wiring positions of the corresponding ID encoding boards connected to the main board in different locations, as misassembly can easily occur. Another approach is to process the ID encoding on the wiring harness itself. This involves leading the ID encoding line to the battery pack and then customizing different wiring harnesses according to the battery pack's sequence to encode the slave board's ID. For example... Figure 2 As shown, each of the eight battery packs PACK_1 to PACK_8 has an MC33665 chip on its slave board. NC in the diagram represents an unused pin. The connection methods for pins ID0, ID1, ID2, and ID3 of the MC33665 chip differ depending on their location. The wiring harnesses on the slave boards between battery packs will be inconsistent depending on the encoding position, easily leading to misassembly, hindering production, and increasing manufacturing difficulty. Therefore, using the MC33665 chip to replace the MCU for CAN communication requires a simple and production-friendly method to solve the encoding problem.

[0024] The embodiments of this application relate to a battery management system.

[0025] Compared with the prior art, the implementation of this application includes a battery management system comprising N slave boards located in different battery packs. Each slave board includes M first ID pins and M second ID pins, with the second ID pins connected to their corresponding first ID pins. When the first ID pins and second ID pins are floating, they are at a default high level. Among the N slave boards, the M first ID pins of the first slave board are connected to the ground terminal of the power distribution box. Starting from the second slave board, the M first ID pin of the nth slave board and the first second ID pin of the (n-1)th slave board are floating, and the m first ID pin of the nth slave board is connected to the (m+1)th second ID pin of the (n-1)th slave board. At least some of the second ID pins of the Nth slave board are floating, and the second ID pins that need to be grounded are connected to the ground terminal of the Nth slave board. This allows the logic level of the M first ID pins of each slave board to generate the ID code of the slave board, enabling communication with the main board of the battery management system. Since the wiring harness connection method between each slave board and the previous slave board is consistent, it is not easy to misassemble and no additional marking is required, which facilitates production and assembly. This solves the problem of slave board ID coding being prone to misassembly and costly, improves slave board assembly accuracy and reduces costs.

[0026] The following is a detailed description of the implementation details of the battery management system in this embodiment. The following content is only for the convenience of understanding and is not necessary for implementing this solution.

[0027] This embodiment provides a battery management system, such as Figure 1 As shown, it includes: N slave boards 100 located in different battery packs; The slave board 100 includes M first ID pins and M second ID pins corresponding one-to-one with the M first ID pins. The second ID pins are connected to the corresponding first ID pins. When the first ID pins and the second ID pins are floating, they are at a default high level. The logic level of the M first ID pins of the slave board 100 is used to generate the ID code of the slave board for communication with the main board of the battery management system. N and M are both positive integers greater than 1. In the N slave boards 100, the M first ID pins of the first slave board 100 are connected to the ground terminal of the distribution box 200. Starting from the second slave board 100, the M first ID pin of the nth slave board 100 and the first second ID pin of the (n-1)th slave board 100 are left floating, and the m first ID pin of the nth slave board 100 is connected to the m+1 second ID pin of the (n-1)th slave board 100. At least some of the second ID pins of the Nth slave board are left floating, and the second ID pins that need to be grounded are connected to the ground terminal of the Nth slave board to generate the ID code of each slave board.

[0028] Where n takes the values ​​2, 3, ..., N. m takes the values ​​1, 2, ..., M-1.

[0029] The distribution box 200 can be a high-voltage distribution box (i.e., a high-voltage box) for an energy storage system. A grounding terminal is provided on the panel socket of the distribution box 200.

[0030] The first ID pin and the second ID pin can be set to a default high level by pull-up resistors from inside board 100. When the first ID pin and the second ID pin are connected to the ground terminal, the grounded terminal is set to a low level.

[0031] In a specific implementation, the battery pack is equipped with a first connector 101 and a second connector 102. M first ID pins from the board are connected to the first connector 101 via leads, and M second ID pins are connected to the second connector 102 via leads.

[0032] N slave boards 100 are arranged in a first preset order. M first ID pins of slave boards 100 are arranged in a second preset order. Second ID pins of slave boards 100 are arranged in a third preset order.

[0033] When the mainboard is powered on, the floating first ID pin and second ID pin in each slave board 100 are set to the default high level. Among the N slave boards 100, the M first ID pins of the first slave board are set to low level by the ground terminal of the power distribution box. The level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board. When the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set to low level, so that each slave board completes ID encoding based on the final M first ID pin levels. In this way, the wiring harness connections between slave boards 100 can remain consistent, achieving ID encoding for each slave board. It eliminates the need to adapt different wiring harnesses for slave boards 100 in different battery pack locations, and eliminates the need for additional ID encoding boards. During assembly, the wiring harnesses can be directly connected without additional markings, simplifying production and assembly, and enhancing mass production feasibility.

[0034] The board's ID is encoded as a combination of logic levels of M first ID pins arranged in a second preset order.

[0035] It should be noted that when all the second ID pins of the Nth slave board are floating, there are no second ID pins that need to be grounded. When the motherboard powers on, none of the second ID pins of the Nth slave board need to be set to low level. When some of the second ID pins of the Nth slave board are floating, the other part of the second ID pins are second ID pins that need to be grounded and are connected to the ground terminal of the Nth slave board. When the motherboard powers on, when the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin will be set to low level. In specific implementation, the wiring method of the second ID pin of the Nth slave board can be determined according to the ID code of the Nth slave board.

[0036] In the battery management system of this embodiment, the slave board 100 of the battery pack includes M first ID pins and M second ID pins. The second ID pins are connected to the corresponding first ID pins. When the first ID pins and the second ID pins are floating, they are at a default high level. Among the N slave boards 100, the M first ID pins of the first slave board 100 are connected to the ground terminal of the power distribution box 200. Starting from the second slave board 100, the M first ID pin of the nth slave board 100 and the first second ID pin of the (n-1)th slave board 100 are floating. The m first ID pin of the nth slave board 100 is connected to the m+1 second ID pin of the (n-1)th slave board 100. Some of the second ID pins of the Nth slave board 100 are connected to the ground terminal of the Nth slave board 100, and the other part of the second ID pins are floating. This allows the logic level of the M first ID pins of each slave board 100 to generate the ID code of the slave board, so as to communicate with the main board of the battery management system. Since the wiring harness connection method between each slave board 100 and the previous slave board 100 is consistent, it is not easy to misassemble and no additional marking is required, which facilitates production and assembly. This solves the problem that the ID coding of slave boards is prone to misassembly and has high cost, improves assembly accuracy and reduces costs.

[0037] In some embodiments, the battery management system further includes: The motherboard is communicatively connected to each of the slave boards 100 and is used to pre-store an ID encoding table, which includes the ID encoding of each of the slave boards. When the motherboard is powered on, it communicates with each of the slave boards 100 based on the pre-stored ID encoding table.

[0038] The motherboard can be installed inside the power distribution box 200. The motherboard's communication interface includes CANH and CANL terminals, which are connected to the panel socket of the power distribution box 200 via wiring. The motherboard communicates with each slave board 100 through the panel socket.

[0039] The slave board's ID code is generated by the logic level of the first ID pin. Each slave board has a fixed ID code, and the motherboard does not need to allocate addresses for slave board 100. In practical applications, an ID code table can be pre-created based on the ID codes of each slave board. The motherboard stores the ID code table in advance. During communication between the motherboard and slave board 100, the motherboard looks up the slave board's ID code in the ID code table and generates the corresponding CAN message, which is then sent to slave board 100. The motherboard can also receive CAN messages from slave board 100 and parse the CAN messages according to the ID code table.

[0040] In this embodiment, since the motherboard pre-stores the ID encoding table, when the motherboard is powered on, each of the slave boards 100 quickly completes the ID encoding based on the logic levels of the M first ID pins. The motherboard directly communicates with each of the slave boards 100 based on the pre-stored ID encoding table, resulting in higher communication efficiency.

[0041] In some embodiments, the slave board 100 includes a CAN gateway module; the CAN gateway module is an MC33665 chip; The CAN gateway module includes M first ID pins; The CAN gateway module is used to enable CAN communication between the slave board 100 and the motherboard based on the ID encoding of the slave board.

[0042] In a specific implementation, the M first ID pins of the CAN gateway module are connected to the first connector via leads.

[0043] In this embodiment, the slave board 100 uses the MC33665 chip for CAN communication. There is no need to develop an MCU for the slave board 100; only the motherboard software needs to be developed, which reduces the workload of software development. Furthermore, the M first ID pins of the MC33665 chip are connected to the wiring harness of the adjacent slave board 100, which improves assembly accuracy and reduces costs.

[0044] In some embodiments, the CAN gateway module further includes a first communication interface and a second communication interface; The first communication interface of the CAN gateway module of the first slave board 100 is used to connect to the CAN communication interface of the motherboard; Starting from the second slave board 100, the first communication interface of the CAN gateway module of the nth slave board 100 is connected to the second communication interface of the CAN gateway module of the (n-1)th slave board 100.

[0045] In this case, the second communication interface of the CAN gateway module of the Nth slave board 100 is provided with a plug.

[0046] See Figure 3 The first communication interface includes a first CANH terminal CANH_UP and a first CANL terminal CANL_UP. The second communication interface includes a second CANH terminal CANH_DN and a second CANL terminal CANL_DN.

[0047] In a specific implementation, the first communication interface of the CAN gateway module is connected to the first connector 101 via a lead wire, and the second communication interface is connected to the second connector 102 via a lead wire.

[0048] The first connector 101 also includes a first power supply positive terminal (shown as 24V_UP in the figure) and a first power supply negative terminal GND_UP. The second connector 102 also includes a second power supply positive terminal (shown as 24V_DN in the figure) and a second power supply negative terminal GND_DN.

[0049] The positive power supply terminal is set on the panel socket of the distribution box 200. Figure 3 (Illustrated with 24V) and ground terminal GND.

[0050] The first power supply positive terminal of the first power supply plate 100 is connected to the power supply positive terminal of the distribution box 200, and the first power supply negative terminal is connected to the ground terminal of the distribution box 200.

[0051] Starting from the second slave plate 100, the first power positive terminal of the nth slave plate 100 is connected to the second power positive terminal of the (n-1)th slave plate 100, and the first power negative terminal of the nth slave plate 100 is connected to the second power negative terminal of the (n-1)th slave plate 100.

[0052] In this embodiment, the CAN gateway modules of each slave board 100 are connected in series, which enables long-distance communication.

[0053] In some embodiments, the maximum value of N is determined based on the value of M, such that the N ID codes of the slave boards generated by the logic levels of the M first ID pins of the N slave boards 100 are different.

[0054] Each slave board has a unique ID code, but the number of first ID pins is limited, thus limiting the number of slave board ID codes that can be generated. Therefore, the number of slave boards 100 is also limited. In other words, the maximum value of N is determined by the value of M, ensuring that the N slave board ID codes generated by the logic levels of the M first ID pins of the N slave boards 100 are different. In practical implementation, the number of first ID pins can be flexibly set according to the actual needs of the slave boards, thereby flexibly designing a master-slave architecture.

[0055] For example, M can be 4, and N can be a maximum of 8.

[0056] Table 1 ID Encoding Table

[0057] Table 1 illustrates the ID codes of the slave boards for the eight battery packs PACK_1 to PACK_8. The first ID pin is ID3, the second is ID2, the third is ID1, and the fourth is ID4. The ID code of the slave board for the battery pack is a combination of the logic levels of the first four first ID pins: ID3, ID2, ID1, and ID0. The slave board ID code for the first battery pack PACK_1 is 0000, the second battery pack PACK_2's slave board ID code is 0001, the third battery pack PACK_3's slave board ID code is 0011, the fourth battery pack PACK_4's slave board ID code is 0111, the fifth battery pack PACK_5's slave board ID code is 1111, the sixth battery pack PACK_6's slave board ID code is 1110, the seventh battery pack PACK_7's slave board ID code is 1100, and the eighth battery pack PACK_8's slave board ID code is 1000. As can be seen from the table, the logic levels of the four first ID pins can generate a maximum of eight different slave board ID codes.

[0058] For example, N is 8, the second to fourth second ID pins of the eighth slave board are connected to the ground terminal of the eighth slave board, and the first second ID pin is left floating.

[0059] Alternatively, N can be 7, with the 3rd and 4th second ID pins of the 7th slave board connected to the ground terminal of the 7th slave board, and the 1st and 2nd second ID pins left floating. See [link to relevant documentation]. Figure 4 . Alternatively, N can be 6, the fourth second ID pin of the sixth slave board is connected to the ground terminal of the sixth slave board, and the first to third second ID pins are left floating.

[0060] Alternatively, N can be 5, and the 5th pin of the second ID pin from the 1st to the 4th pins of the board can be left floating.

[0061] Alternatively, N can be 4, the first second ID pin of the fourth slave board is connected to the ground terminal of the fourth slave board, and the second to fourth second ID pins are left floating.

[0062] Alternatively, N can be 3, the first to second second ID pins of the third slave board are connected to the ground terminal of the third slave board, and the third to fourth second ID pins are left floating.

[0063] Alternatively, N can be 2, the first to third second ID pins of the second slave board are connected to the ground terminal of the second slave board, and the fourth second ID pin is left floating.

[0064] The wiring method of the second ID pin of the last slave board 100 is determined based on the ID code of the last slave board.

[0065] Thus, the number of slave boards 100 can be set according to actual needs. For example, a one-master-eight-slave architecture can be adopted. By adjusting the connection harness of the slave board 100 of the last battery pack, a design compatible with one-master-eight-slave and lower architectures can be achieved. As needed, it can be changed to a seven-slave-board-100, six-slave-board-100, ..., two-slave-board-100 architecture, etc., making the solution more flexible.

[0066] The above-mentioned embodiments can be implemented in combination as needed.

[0067] The embodiments of this application also relate to a slave board ID encoding method for a battery management system as described in any of the above embodiments, such as... Figure 5 As shown, it includes: Step S501: When the motherboard is powered on, the first ID pin and the second ID pin that are floating in the board are set to the default high level.

[0068] Step S502: The M first ID pins of the first slave board are set to low level by the ground terminal of the power distribution box. The level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board. When the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set to low level, so that each slave board completes ID encoding based on the final M first ID pin levels.

[0069] In some embodiments, before setting the first ID pin and the second ID pin, which are floating on the board, to the default high level when the motherboard is powered on, the method further includes: The motherboard pre-stores an ID encoding table, wherein the ID encoding table includes the ID encoding of each slave board; The method further includes: M first ID pins of the first slave board are set low by the ground terminal of the distribution box; the level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board; when the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set low; after each slave board completes ID encoding based on the final M first ID pin levels, the method further includes: The motherboard communicates with each of the slave boards based on the pre-stored ID encoding table.

[0070] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0071] The embodiments of this application also relate to an energy storage system, including: a power distribution box and a battery management system as described in any of the above embodiments. In this embodiment, the energy storage system has a battery pack slave board comprising M first ID pins and M second ID pins, with the second ID pins connected to their corresponding first ID pins. When the first ID pins and second ID pins are floating, they are at a default high level. Of the N slave boards, the M first ID pins of the first slave board are connected to the ground terminal of the power distribution box. Starting from the second slave board, the Mth first ID pin of the nth slave board and the first second ID pin of the (n-1)th slave board are floating, and the mth first ID pin of the nth slave board is connected to the (m+1)th second ID pin of the (n-1)th slave board. A portion of the second ID pins of the Nth slave board are connected to the ground terminal of the Nth slave board, while another portion of the second ID pins are floating. This allows the logic level of the M first ID pins of each slave board to generate the ID code of the slave board, enabling communication with the main board of the battery management system. Since the wiring harness connection method between each slave board and the previous slave board is the same, it is not easy to misassemble and no additional marking is required, which facilitates production and assembly. This solves the problem of slave board ID coding being prone to misassembly and costly, improves assembly accuracy and reduces costs.

[0072] Those skilled in the art will understand that the above embodiments are specific embodiments for implementing this application, and in practical applications, various changes can be made to them in form and detail without departing from the spirit and scope of this application.

Claims

1. A battery management system, characterized in that, include: N slave boards located in different battery packs; The slave board includes M first ID pins and M second ID pins corresponding one-to-one with the M first ID pins. The second ID pins are connected to the corresponding first ID pins. When the first ID pins and the second ID pins are floating, they are at a default high level. The logic level of the M first ID pins of the slave board is used to generate the ID code of the slave board for communication with the main board of the battery management system. N and M are both positive integers greater than 1. In the N slave boards, the M first ID pins of the first slave board are connected to the ground terminal of the distribution box. Starting from the second slave board, the M first ID pin of the nth slave board and the first second ID pin of the (n-1)th slave board are left floating. The m first ID pin of the nth slave board is connected to the m+1 second ID pin of the (n-1)th slave board. At least some of the second ID pins of the Nth slave board are left floating, and the second ID pins that need to be grounded are connected to the ground terminal of the Nth slave board to generate the ID code of each slave board.

2. The battery management system according to claim 1, characterized in that, Also includes: A motherboard, which is communicatively connected to each of the slave boards, is used to pre-store an ID encoding table, the ID encoding table including the ID encoding of each of the slave boards; When the motherboard is powered on, it communicates with each of the slave boards based on the pre-stored ID encoding table.

3. The battery management system according to claim 1, characterized in that, The slave board includes a CAN gateway module; the CAN gateway module is an MC33665 chip. The CAN gateway module includes M first ID pins; The CAN gateway module is used to enable CAN communication between the slave board and the motherboard based on the slave board's ID encoding.

4. The battery management system according to claim 3, characterized in that, The CAN gateway module also includes a first communication interface and a second communication interface; The first communication interface of the CAN gateway module of the first slave board is used to connect to the CAN communication interface of the motherboard; Starting from the second slave board, the first communication interface of the CAN gateway module of the nth slave board is connected to the second communication interface of the CAN gateway module of the (n-1)th slave board.

5. The battery management system according to claim 1, characterized in that, The maximum value of N is determined based on the value of M, so that the N ID codes of the N slave boards generated by the logic levels of the M first ID pins of the N slave boards are different.

6. The battery management system according to claim 1, characterized in that, The value of M is 4, and the maximum value of N is 8.

7. The battery management system according to claim 6, characterized in that, The value of N is 8. The second ID pins of the 2nd to 4th pins of the 8th slave board are connected to the ground terminal of the 8th slave board, and the first second ID pin is left floating; or, The value of N is 7. The third and fourth second ID pins of the seventh slave board are connected to the ground terminal of the seventh slave board, and the first and second second ID pins are left floating; or, The value of N is 6. The fourth second ID pin of the sixth slave board is connected to the ground terminal of the sixth slave board, and the first to third second ID pins are left floating; or, The value of N is 5, and the 5th pin is left floating from the 1st to the 4th pins of the second ID pin on the board; or, The value of N is 4. The first second ID pin of the fourth slave board is connected to the ground terminal of the fourth slave board, and the second to fourth second ID pins are left floating; or, The value of N is 3. The first and second second ID pins of the third slave board are connected to the ground terminal of the third slave board, and the third and fourth second ID pins are left floating; or, The value of N is 2. The first to third second ID pins of the second slave board are connected to the ground terminal of the second slave board, and the fourth second ID pin is left floating.

8. A slave board encoding method for a battery management system as described in any one of claims 1 to 7, characterized in that, include: When the motherboard is powered on, the first ID pin and the second ID pin that are floating in the slave board are set to the default high level; The M first ID pins of the first slave board are set to low level by the ground terminal of the power distribution box. The level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board. When the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set to low level, so that each slave board completes ID encoding based on the final M first ID pin levels.

9. The slave board encoding method of the battery management system according to claim 8, characterized in that, Before setting the first ID pin and the second ID pin, which are floating on the board, to the default high level when the motherboard is powered on, the method further includes: The motherboard pre-stores an ID encoding table, wherein the ID encoding table includes the ID encoding of each slave board; The method further includes: M first ID pins of the first slave board are set low by the ground terminal of the distribution box; the level of the (m+1)th second ID pin of the (n-1)th slave board is transmitted to the mth first ID pin of the nth slave board; when the ground terminal of the Nth slave board is connected to the second ID pin of the Nth slave board, the connected second ID pin is set low; after each slave board completes ID encoding based on the final M first ID pin levels, the method further includes: The motherboard communicates with each of the slave boards based on the pre-stored ID encoding table.

10. An energy storage system, characterized in that, include: The power distribution box and the battery management system as described in any one of claims 1 to 7.

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