A high-voltage interlock protection method and system for a marine lithium battery pack

Abstract

The application discloses a high-voltage interlocking protection method and system for a marine lithium battery pack, and relates to the technical field of circuit emergency protection; the method comprises the following steps: generating a continuous interlocking feedback signal through a mechanical normally-closed detection switch; a high-voltage interlocking monitoring circuit receives the signal and performs real-time diagnosis; when the signal is diagnosed to be interrupted, a delay confirmation mechanism based on a continuous judgment logic is started, the mechanism continuously monitors whether the signal is restored within a preset irreversible delay time; if the signal is not restored all the time, a negative logic jump instruction is generated; and a relay is cut off according to the instruction to cut off the main high-voltage loop. The irreversible delay confirmation mechanism introduced in the application can effectively distinguish between transient signal jitter and a real connection fault, thereby preventing misoperation and refusal of operation of the system under extreme working conditions at the same time, and the reliability and safety of the high-voltage system of the marine lithium battery are significantly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit emergency protection, in particular to a high-voltage interlock protection method and system for a marine lithium battery pack. BACKGROUND

[0002] Marine power systems widely use high-voltage lithium battery packs as power sources, and the connection reliability of the high-voltage loop directly relates to the safety of the ship operation. The high-voltage interlock system is the key to ensuring this safety, which monitors the connection state of the high-voltage connector and cuts off the power supply in the event of an abnormality to prevent arc, short circuit and other dangers. However, the marine environment is extremely complex, and the high-voltage connector is subjected to harsh working conditions such as severe vibration and humid salt spray for a long time, which can easily cause the connector to be temporarily physically loose, thereby causing the interlock feedback signal reflecting the connection state to appear short-term and high-frequency jitter.

[0003] Traditional high-voltage interlock protection strategies mostly use simple level triggering or short-time filtering, which cannot effectively distinguish such transient jitter from real permanent connection faults. This often leads to system misoperation, i.e., unnecessary cutting off of the main power supply when the connection is still safe, affecting the normal navigation of the ship; or refusal to act, i.e., failing to trigger protection due to signal jitter when a real danger has occurred, which poses a serious safety hazard. Therefore, the existing technology is in a dilemma of misoperation and refusal to act in the high-reliability marine scene, and an intelligent judgment mechanism that is immune to signal jitter interference is urgently needed. SUMMARY

[0004] In order to overcome the above-mentioned defects of the prior art, the embodiments of the present application provide a high-voltage interlock protection method for a marine lithium battery pack to solve the problems raised in the background art.

[0005] To achieve the above-mentioned purpose, the present application provides a high-voltage interlock protection method for a marine lithium battery pack, comprising:

[0006] S1, generating a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at the interface of the high-voltage connector;

[0007] S2, the high-voltage interlock monitoring circuit receives the interlock feedback signal and performs real-time diagnosis on the integrity of the interlock feedback signal based on a preset signal logic judgment rule;

[0008] S3, when the interlock feedback signal is diagnosed to be interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within a preset delay time which is irreversible;

[0009] S4, if the interlock feedback signal is not recovered in the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction;

[0010] S5, the relay receives the negative logic jump instruction and cuts off the main high-voltage circuit of the marine lithium battery pack.

[0011] Optionally, the continuous interlock feedback signal is generated by a mechanical normally closed detection switch arranged at the high-voltage connector interface, comprising:

[0012] The contact of the mechanical normally closed detection switch is mechanically linked with the physical locking mechanism of the high-voltage connector;

[0013] When the high-voltage connector is in a fully inserted state, the physical locking mechanism presses the contact of the mechanical normally closed detection switch to close, thereby forming a path for the continuous interlock feedback signal.

[0014] Optionally, the high-voltage interlock monitoring circuit receives the interlock feedback signal and diagnoses the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule, comprising:

[0015] The high-voltage interlock monitoring circuit includes a signal acquisition unit, which acquires the level state of the interlock feedback signal in a periodic sampling manner;

[0016] The signal logic judgment rule is defined as: if the collected level state is low in a plurality of consecutive sampling periods, it is diagnosed that the interlock feedback signal is interrupted.

[0017] Optionally, when the interlock feedback signal is diagnosed to be interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic, comprising:

[0018] The high-voltage interlock monitoring circuit immediately triggers a timer to start counting an irreversible preset delay time at the moment of diagnosing interruption;

[0019] At the same time, the high-voltage interlock monitoring circuit locks the interruption diagnosis state until the timer completes the counting, and does not respond to new interruption diagnosis triggers during this period.

[0020] Optionally, the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is recovered within the irreversible preset delay time, comprising:

[0021] During the entire irreversible counting process of the timer, the signal acquisition unit continuously acquires the level state of the interlock feedback signal in the periodic sampling manner;

[0022] The continuous judgment logic compares the level state obtained in each sampling period with a high level threshold representing signal recovery;

[0023] If the level state obtained in any sampling period reaches the high level threshold, it is determined that the interlock feedback signal is recovered.

[0024] Optionally, if the interlock feedback signal has not been recovered for the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction, including:

[0025] If the continuous judgment logic has not determined signal recovery until the timer completes timing, the instruction generation unit of the high-voltage interlock monitoring circuit generates a level jump signal from high level to low level;

[0026] The instruction generation unit outputs the level jump signal as the negative logic jump instruction to the signal output port.

[0027] Optionally, the execution relay receives the negative logic jump instruction and cuts off the main high-voltage loop of the marine lithium battery pack according to the negative logic jump instruction, including:

[0028] The execution relay includes a drive coil, and a power supply loop of the drive coil is connected in series with the signal output port of the high-voltage interlock monitoring circuit;

[0029] The low level in the negative logic jump instruction causes the power supply loop of the drive coil to be disconnected;

[0030] After the drive coil loses power, the normally open main contact controlled by the drive coil is disconnected, thereby cutting off the main high-voltage loop.

[0031] Optionally, the timing process of the irreversible preset delay time cannot be interrupted or reset by the recovery of the interlock feedback signal.

[0032] Optionally, in step S2, the process of real-time diagnosis further includes: the high-voltage interlock monitoring circuit monitors its working voltage, and when the working voltage is lower than a preset voltage threshold, the delay confirmation mechanism of step S3 is skipped, the negative logic jump instruction is directly generated and output by the high-voltage interlock monitoring circuit, and step S5 is executed to cut off the main high-voltage loop.

[0033] To solve the above problems, the application also provides a high-voltage interlock protection system for a marine lithium battery pack, the system comprising:

[0034] An interlock signal generation module for generating a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at a high-voltage connector interface;

[0035] An interlock signal diagnosis module is configured to receive the interlock feedback signal by the high-voltage interlock monitoring circuit, and to diagnose the integrity of the interlock feedback signal in real time based on preset signal logic judgment rules.

[0036] A delay confirmation control module is configured to start a delay confirmation mechanism based on a continuous judgment logic when the interlock feedback signal is diagnosed to be interrupted by the high-voltage interlock monitoring circuit; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time.

[0037] A protection instruction generation module is configured to generate and output a negative logic jump instruction by the high-voltage interlock monitoring circuit if the interlock feedback signal is not restored within the preset delay time.

[0038] A high-voltage loop execution module is configured to execute the relay to receive the negative logic jump instruction, and to cut off the main high-voltage loop of the marine lithium battery pack accordingly.

[0039] The application effectively solves the reliability problem of the marine high-voltage interlock system under harsh working conditions by introducing a delay confirmation mechanism based on a continuous judgment logic, and strictly limiting its work within an irreversible preset delay time. The technical effect is first reflected in the prevention of misoperation: when the connector is slightly loosened due to transient vibration, and the interlock feedback signal is temporarily interrupted, the high-voltage interlock monitoring circuit will preliminarily diagnose the signal interruption, but will not immediately trigger protection, but will start an irreversible delay confirmation window. Within this window, the system continuously monitors the signal state, and as long as the signal is restored within this period, it is determined that the interruption is caused by interference and the fault state is cleared, and the system returns to normal monitoring. This process provides a key time criterion for distinguishing between transient interference and real failure, effectively filters signal jitter, avoids the misoperation of cutting off the main power supply due to transient interference, and ensures the continuity of the ship power supply.

[0040] Secondly, the occurrence of the rejection action is fundamentally eliminated, and the safety of the system is improved. The timing process of the delay confirmation mechanism is designed to be irreversible, and once it is started, it must complete the monitoring of the entire preset delay time. This means that even if the signal has a complex jitter of "interruption-temporary recovery-reinterruption" during the delay period, the timer will not be interrupted or reset, and the system will make a global final decision on the signal state in the entire delay window. Only if the signal is not restored in the entire delay time, it is finally confirmed that it is a real and continuous connection failure, and the protection instruction is executed. This design ensures that the system will not be paralyzed by continuous signal jitter, and can make a decisive and reliable response to real connection failure, and cut off the main high-voltage circuit in time, thereby greatly improving the intrinsic safety level of the ship high-voltage electrical system. In addition, the monitoring of the working voltage of the high-voltage interlocking monitoring circuit and the corresponding direct protection strategy further serve as a safety redundancy, ensuring that even in the event of abnormal power supply to the monitoring circuit, the system can be guided into a safe state, forming a multi-level safety protection system. BRIEF DESCRIPTION OF DRAWINGS

[0041] Figure 1 A flowchart of a high-voltage interlocking protection method for a marine lithium battery pack according to an embodiment of the present application is provided.

[0042] Figure 2 A functional module diagram of a high-voltage interlocking protection system for a marine lithium battery pack according to an embodiment of the present application is provided.

[0043] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0044] It should be understood that the specific embodiments described herein are merely intended to explain the present application and are not intended to limit the present application.

[0045] An embodiment of the present application provides a high-voltage interlocking protection method for a marine lithium battery pack. The execution subject of the high-voltage interlocking protection method for the marine lithium battery pack includes but is not limited to at least one of electronic devices such as a server and a terminal which can be configured to execute the method provided by the present application. In other words, the high-voltage interlocking protection method for the marine lithium battery pack can be executed by software or hardware installed in a terminal device or a server device. The server includes but is not limited to a single server, a server cluster, a cloud server or a cloud server cluster, etc. The server can be a stand-alone server, or a cloud server providing cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content distribution networks, and big data and artificial intelligence platforms, etc. Basic cloud computing services.

[0046] The implementation of the method of the application relies on a hardware system composed of a mechanical normally closed detection switch, a high-voltage interlock monitoring circuit and an execution relay. The mechanical normally closed detection switch is installed at the interface of the high-voltage connector. The high-voltage interlock monitoring circuit is a control unit with a microcontroller as the core, which receives signals from the detection switch and processes them. The execution relay is a power switching device controlled by the monitoring circuit, and its contacts are connected in series in the main high-voltage circuit.

[0047] Referring to Figure 1 Fig. 1 is a flowchart of a high-voltage interlock protection method for a marine lithium battery pack according to an embodiment of the application. In this embodiment, the high-voltage interlock protection method for the marine lithium battery pack comprises:

[0048] S1, generating a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at the interface of the high-voltage connector.

[0049] In some embodiments, the step of generating a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at the interface of the high-voltage connector comprises:

[0050] The contacts of the mechanical normally closed detection switch are mechanically linked to the physical locking mechanism of the high-voltage connector;

[0051] When the high-voltage connector is in a fully inserted state, the physical locking mechanism presses the contacts of the mechanical normally closed detection switch to close them, thereby forming a path for the continuous interlock feedback signal.

[0052] In the embodiment of the application, the mechanical normally closed detection switch is a switching element whose contacts are in a closed and conductive state under the action of no external force, and it is linked to the physical structure of the high-voltage connector; the high-voltage connector is an electrical connection component for transmitting high-voltage electrical energy; the interlock feedback signal is a continuous electrical signal reflecting the connection state of the high-voltage connector.

[0053] In the embodiment of the application, the contacts of the mechanical normally closed detection switch are mechanically linked to the physical locking mechanism of the high-voltage connector. When the operator fully inserts and locks the high-voltage connector, the physical locking mechanism (such as a buckle or a slider) of the connector will move to a certain position, which will press the triggering component of the mechanical normally closed detection switch. After the switch is pressed, the normally closed contacts inside it will change from the default closed state to the open state. This open contact state will generate a high-level signal representing "reliable connection" in the entire monitoring circuit. Conversely, if the connector is not fully locked or loosens due to vibration and impact, the physical locking mechanism will retract, thereby releasing the pressure on the detection switch. The normally closed contacts of the detection switch will reset and close, pulling the signal of the monitoring circuit to a low level, which is the interlock feedback signal indicating "connection failure".

[0054] That is, when the high-voltage connector is fully inserted, the locking mechanism presses the detection switch, so that the normally closed contact changes from closed to open, thereby generating a high-level signal in the monitoring circuit (indicating that the connection is reliable); when the connector is not inserted or loose, the switch resets to close, generating a low-level signal (indicating that the connection is faulty).

[0055] For example, the mechanical normally closed detection switch uses an IP67 protection level micro switch, the button of which is mechanically linked to the physical locking mechanism (such as a buckle slider) of the high-voltage connector. When the high-voltage connector is fully inserted and locked, the locking mechanism presses the button of the detection switch, so that the normally closed contact is open. At this time, the input port of the monitoring circuit detects a high-level signal (for example, 12V). Conversely, when the connector is not fully locked or falls off, the locking mechanism no longer presses the switch button, and the normally closed contact resets to close, pulling the input port of the monitoring circuit to a low level (0V).

[0056] S2, the high-voltage interlock monitoring circuit receives the interlock feedback signal, and diagnoses the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule.

[0057] In some embodiments, the high-voltage interlock monitoring circuit receives the interlock feedback signal, and diagnoses the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule, including:

[0058] The high-voltage interlock monitoring circuit includes a signal acquisition unit, which acquires the level state of the interlock feedback signal in a periodic sampling manner;

[0059] The signal logic judgment rule is defined as: if the collected level state is low in a plurality of consecutive sampling periods, it is diagnosed that the interlock feedback signal is interrupted.

[0060] In the embodiments of the present application, the signal logic judgment rule is a program algorithm stored in the monitoring circuit in advance, which defines how to judge whether the connection state is normal according to the input signal level.

[0061] In the embodiments of the present application, the high-voltage interlock monitoring circuit internally includes a signal acquisition unit, which is usually an analog-to-digital conversion module of a microcontroller. This signal acquisition unit samples and reads the level state of the interlock feedback signal at fixed and periodic time intervals. For example, the sampling period can be set to ten milliseconds.

[0062] For example, the high-voltage interlock monitoring circuit is composed of a piece of automotive MCU (such as Infineon TC275) as the core, and the internal ADC module thereof is used as a signal acquisition unit to sample the interlock feedback signal voltage at the input end once in a fixed period (for example, every 10 ms).

[0063] In the embodiments of the present application, the signal logic judgment rule is specifically defined as follows: if the collected level states are all identified as low levels in a plurality of continuous sampling periods, the interlock feedback signal is diagnosed as interrupted. For example, the monitoring circuit can be set to a rule that low levels are detected in three continuous sampling periods (i.e., within 30 ms) to preliminarily determine a signal interruption. This rule of multiple confirmations itself is a simple software filtering, which can filter out some extremely high-frequency noise glitches of nanoseconds or microseconds.

[0064] For example, the signal logic judgment rule fixed in the MCU is as follows: if the collected voltage values are all lower than the low level threshold (such as 1.5 V) in three continuous sampling periods (i.e., within 30 ms), the MCU diagnoses and determines that the "interlock feedback signal is interrupted". This digital filtering mode can preliminarily filter out extremely short noise interference.

[0065] In some embodiments, the process of real-time diagnosis further includes that the high-voltage interlock monitoring circuit monitors the working voltage of itself, and when the working voltage is lower than a preset voltage threshold, the delay confirmation mechanism of step S3 is skipped, the negative logic jump instruction is directly generated and output by the high-voltage interlock monitoring circuit, and step S5 is executed to cut off the main high-voltage loop.

[0066] In the embodiments of the present application, as a kind of safety redundancy design, the high-voltage interlock monitoring circuit also continuously monitors the working voltage of itself. If the working voltage is lower than a certain preset threshold, it indicates that the monitoring circuit itself may not work reliably due to power failure. At this time, the circuit will bypass the delay confirmation mechanism of step S3, the normal process, and directly jump to S4 and S5, and immediately issue an instruction to cut off the high-voltage loop. This ensures that even in the case of failure of the monitoring system itself, the system can also enter a safe state, further improving the overall reliability.

[0067] For example, in the real-time diagnosis process of S2, the MCU also monitors the working voltage (Vdd) of itself in real time through the internal monitoring circuit. If the working voltage is lower than a preset voltage threshold (such as 6 V), it indicates that the circuit may fail due to power failure. At this time, the MCU will skip the 100 ms delay confirmation mechanism of S3, directly output the negative logic jump instruction, and forcibly cut off the high-voltage loop.

[0068] S3, when the interlock feedback signal is diagnosed to be interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time.

[0069] In the embodiments of the present application, the irreversible preset delay time refers to a length of time that must complete the entire timing period once the timing starts, during which the timing process will not be interrupted or reset by any external conditions; the continuous judgment logic is a signal processing algorithm pre-programmed in the monitoring circuit, which is used for continuously judging the signal state within a specific time window.

[0070] In the embodiments of the present application, the timer is implemented by a hardware timer, which cannot be interrupted or reset by software once it is started, ensuring the integrity and reliability of the delay confirmation process.

[0071] In some embodiments, when the interlock feedback signal is diagnosed to be interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic, including:

[0072] The high-voltage interlock monitoring circuit immediately triggers the timer to start timing an irreversible preset delay time at the moment of diagnosing the interruption;

[0073] At the same time, the high-voltage interlock monitoring circuit locks the interruption diagnosis state until the timer completes the timing, during which it does not respond to new interruption diagnosis triggers.

[0074] In the embodiments of the present application, the delay confirmation mechanism is a protection strategy for verifying the authenticity of signal abnormalities by introducing time delay.

[0075] In the embodiments of the present application, the high-voltage interlock monitoring circuit immediately triggers the internal timer to start a timing process of an irreversible preset delay time at the moment of diagnosing the interruption of the interlock feedback signal through signal logic judgment rules, and this preset delay time is a reasonable time value pre-set according to typical vibration characteristics of the ship and mechanical characteristics of the connector. At the same time, the high-voltage interlock monitoring circuit locks the current interruption diagnosis state, which will be maintained until the timer completes the entire timing process, during which the system will not respond to any new interruption diagnosis triggers. This design ensures the integrity and independence of the confirmation process.

[0076] In some embodiments, the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time, including:

[0077] During the whole process of the irreversible timing of the timer, the signal acquisition unit continuously acquires the level state of the interlock feedback signal in the periodic sampling mode;

[0078] The continuous judgment logic compares the level state acquired in each sampling period with a high level threshold value representing signal recovery;

[0079] If the level state acquired in any sampling period reaches the high level threshold value, it is determined that the interlock feedback signal is recovered.

[0080] In the embodiment of the present application, when the high-voltage interlock monitoring circuit diagnoses signal interruption according to the rule of step S2, it will immediately trigger an internal timer to start timing a preset delay time, which can be set according to the typical vibration frequency of the ship, for example, one hundred milliseconds. Crucially, this timing process is irreversible and cannot be interrupted or reset once started. At the same time, the monitoring circuit will lock the current "interruption diagnosis state". During the entire one hundred millisecond delay time, the monitoring circuit will temporarily ignore the new interruption trigger that may be generated by step S2, thereby stabilizing the system state in the current diagnosis confirmation process. During the entire delay process, the continuous judgment logic continuously works, which instructs the signal acquisition unit to continue sampling and monitoring the interlock feedback signal at the original ten millisecond period, and judges whether it is recovered to the high level representing normal connection.

[0081] For example, once the signal interruption is diagnosed, the MCU immediately starts an irreversible timer and sets a preset delay time T (for example, 100 ms). At the same time, the MCU will lock the current interruption diagnosis state, and during the 100 ms delay time, even if the diagnosis logic of step S2 detects a high level again (temporary recovery), it will not exit the current delay confirmation process, that is, "not responding to new interruption diagnosis triggers". During the entire 100 ms delay process, the continuous judgment logic (MCU program) continuously samples the signal level at a period of 10 ms. If the voltage collected at any sampling point is higher than the high level threshold value (such as 3.5V), it is determined that the signal is recovered. The MCU will clear the interruption flag and exit the delay confirmation process, and the system returns to the normal monitoring state.

[0082] In the embodiment of the present application, the timing process of the timer is irreversible. Once the 100 ms timing starts, even if the signal is recovered at 50 ms and disconnected again at 60 ms, the timer will not be interrupted or reset, and it will continue to run for the remaining 40 ms. This design is a key protection against continuous signal jitter, preventing the system from triggering protection in the "diagnosis-recovery-re-diagnosis" cycle, thereby solving the "refusal to act" problem.

[0083] In the embodiments of the present application, the irreversible delay mechanism is the core of solving the contradiction between "misoperation" and "refusal to operate". On the one hand, the one-hundred-millisecond delay window provides sufficient recovery time for signal jitter caused by instantaneous vibration. As long as the signal recovers within this window, the system considers it to be interference and recovers normally, thereby preventing misoperation. On the other hand, the irreversibility of timing ensures that once the timing starts, the system must make a "global decision" on the signal state within one hundred milliseconds, even if the signal is disconnected after a short recovery in the middle, the timing will not stop, and the system will eventually still execute the protection action, which completely eliminates the risk of system paralysis (refusal to operate) due to continuous signal jitter.

[0084] S4, if the interlock feedback signal has not been recovered within the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction.

[0085] In some embodiments, if the interlock feedback signal has not been recovered within the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction, comprising:

[0086] If the continuous judgment logic has not determined signal recovery until the timer completes timing, the instruction generation unit of the high-voltage interlock monitoring circuit generates a level jump signal from high level to low level;

[0087] The instruction generation unit outputs the level jump signal as the negative logic jump instruction to the signal output port.

[0088] In the embodiments of the present application, if the continuous judgment logic has not detected signal recovery to the valid high level at each ten-millisecond sampling point within the entire irreversible one-hundred-millisecond delay time, the instruction generation unit (usually an output pin of a microcontroller) in the high-voltage interlock monitoring circuit will generate a clear control instruction at the moment the timer completes timing. This instruction is a jump in potential, from a higher level (for example, twelve volts) to a lower level (for example, zero volts), and this high-to-low jump is the negative logic jump instruction.

[0089] In some embodiments, the timing process of the irreversible preset delay time cannot be interrupted or reset by the recovery of the interlock feedback signal.

[0090] In the embodiments of the present application, if the continuous judgment logic has not detected signal recovery (i.e., all sampling points are low) within the entire 100ms irreversible delay time, the instruction generation unit (a GPIO port) of the MCU will perform a negative logic jump operation: pull its output level from high level (12V) to low level (0V).

[0091] S5, the execution relay receives the negative logic jump instruction, and cuts off the main high-voltage loop of the marine lithium battery pack according to the negative logic jump instruction.

[0092] In some embodiments, the execution relay receives the negative logic jump instruction, and cuts off the main high-voltage loop of the marine lithium battery pack according to the negative logic jump instruction, including:

[0093] The execution relay includes a drive coil, and a power supply loop of the drive coil is connected in series with a signal output port of the high-voltage interlock monitoring circuit.

[0094] The low level in the negative logic jump instruction causes the power supply loop of the drive coil to be disconnected.

[0095] After the drive coil loses power, the normally open main contact controlled by the drive coil is disconnected, thereby cutting off the main high-voltage loop.

[0096] In the embodiments of the present application, the execution relay internally includes a drive coil, and a power supply loop of the drive coil is connected in series with a signal output port of the high-voltage interlock monitoring circuit. When the negative logic jump instruction output by S4 is in a low level (zero volts), it is equivalent to cutting off the power supply loop of the drive coil. The magnetic force of the drive coil disappears due to the loss of power, and the normally open main contact controlled by the drive coil is quickly disconnected under the action of the spring. Since the main contact is connected in series in the main high-voltage loop of the marine lithium battery pack, its disconnection physically cuts off the transmission path of the high-voltage power.

[0097] In the embodiments of the present application, the high-voltage interlock monitoring circuit outputs a high level under normal circumstances to keep the execution relay attracted, and outputs a low level (negative logic jump) when a fault occurs to make the relay open.

[0098] For example, one end of the drive coil of the execution relay is connected to a power supply (12V), and the other end is connected to the above-mentioned output port of the MCU. Under normal circumstances, the MCU outputs a high level, the coil is powered, the relay is attracted, and the main high-voltage loop is turned on. When the MCU outputs a negative logic jump instruction (low level 0V), it is equivalent to disconnecting the ground loop of the drive coil, and the coil loses power. The normally open main contact controlled thereby is disconnected, thereby completely cutting off the main high-voltage loop of the marine lithium battery pack, and safety protection is achieved.

[0099] As shown in FIG. 1, it is a functional module diagram of the high-voltage interlock protection system of the marine lithium battery pack provided by an embodiment of the present application. Figure 2

[0100] ​The high-voltage interlock protection system 100 of the marine lithium battery pack described in the application can be installed in an electronic device. According to the functions implemented, the high-voltage interlock protection system 100 of the marine lithium battery pack can include an interlock signal generation module 101, an interlock signal diagnosis module 102, a delay confirmation control module 103, a protection instruction generation module 104, and a high-voltage loop execution module 105. The modules described in the application can also be referred to as units, which refer to a series of computer program segments that can be executed by an electronic device processor and can complete a fixed function, which are stored in the memory of the electronic device.

[0101] In the present embodiment, the functions of each module / unit are as follows:

[0102] The interlock signal generation module 101 is configured to generate a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at the high-voltage connector interface.

[0103] The interlock signal diagnosis module 102 is configured to receive the interlock feedback signal by the high-voltage interlock monitoring circuit, and to diagnose the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule.

[0104] The delay confirmation control module 103 is configured to start a delay confirmation mechanism based on a continuous judgment logic when the interlock feedback signal is diagnosed to be interrupted; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within a preset delay time which is irreversible.

[0105] The protection instruction generation module 104 is configured to generate and output a negative logic jump instruction by the high-voltage interlock monitoring circuit if the interlock feedback signal has not been restored within the preset delay time.

[0106] The high-voltage loop execution module 105 is configured to execute the relay to receive the negative logic jump instruction and accordingly cut off the main high-voltage loop of the marine lithium battery pack.

[0107] In several embodiments provided in the present application, it should be understood that the disclosed methods and systems can be implemented in other ways. For example, the system embodiments described above are only illustrative, for example, the division of the modules is only a logical function division, and another division method can be used in actual implementation.

[0108] The modules described as separate components can or can not be physically separated, and the components displayed as modules can or can not be physical units, i.e., they can be located in one place or distributed on multiple network units. Part or all of the modules can be selected to achieve the purpose of the present embodiment scheme according to actual needs.

[0109] In addition, each function module in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware, or in the form of hardware plus software function module.

[0110] It is obvious for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, and the present application can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application.

[0111] Embodiments of the present application can acquire and process related data based on artificial intelligence technology. Among them, artificial intelligence is to use digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit it. Although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present application can be modified or replaced equivalently without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A high-voltage interlock protection method for a marine lithium battery pack, characterized in that, The method comprises: S1, generating a continuous interlock feedback signal by a mechanical normally closed detection switch arranged at a high-voltage connector interface, comprising: The contact of the mechanical normally closed detection switch is mechanically linked with a physical locking mechanism of the high-voltage connector; When the high-voltage connector is in a fully plugged state, the physical locking mechanism presses the contact of the mechanical normally closed detection switch to make it closed, thereby forming a path of the continuous interlock feedback signal; S2, a high-voltage interlock monitoring circuit receives the interlock feedback signal and diagnoses the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule, comprising: The high-voltage interlock monitoring circuit comprises a signal acquisition unit, which acquires the level state of the interlock feedback signal in a periodic sampling manner; The signal logic judgment rule is defined as: if the collected level state is all low in a plurality of consecutive sampling periods, it is diagnosed that the interlock feedback signal is interrupted; S3, when it is diagnosed that the interlock feedback signal is interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time, wherein the timing process of the irreversible preset delay time cannot be interrupted or reset by the restoration of the interlock feedback signal; S4, if the interlock feedback signal has not been restored within the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction; S5, a relay receives the negative logic jump instruction and cuts off the main high-voltage loop of the marine lithium battery pack accordingly.

2. The high-voltage interlock protection method for a marine lithium battery pack according to claim 1, characterized in that, When it is diagnosed that the interlock feedback signal is interrupted, the high-voltage interlock monitoring circuit starts a delay confirmation mechanism based on a continuous judgment logic, comprising: The high-voltage interlock monitoring circuit triggers a timer to start timing an irreversible preset delay time immediately at the moment of diagnosing interruption; At the same time, the high-voltage interlock monitoring circuit locks the interruption diagnosis state until the timer completes timing, during which it does not respond to new interruption diagnosis triggers.

3. The method of high voltage interlock protection for a marine lithium battery pack of claim 2, wherein, The continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time, comprising: During the entire process of irreversible timing of the timer, the signal acquisition unit continuously acquires the level state of the interlock feedback signal in the periodic sampling manner; The continuous judgment logic compares the level state acquired in each sampling period with a high-level threshold representing signal restoration; If the level state collected in any sampling period reaches the high-level threshold, it is determined that the interlock feedback signal is restored.

4. The method of high voltage interlock protection for a marine lithium battery pack of claim 2, wherein, If the interlock feedback signal has not been restored within the preset delay time, the high-voltage interlock monitoring circuit generates and outputs a negative logic jump instruction, comprising: If the continuous judgment logic does not determine signal restoration until the timer completes timing, the instruction generation unit of the high-voltage interlock monitoring circuit generates a level jump signal from high level to low level; The instruction generation unit outputs the level jump signal as the negative logic jump instruction to a signal output port.

5. The method of high voltage interlock protection for marine lithium battery packs of claim 1, wherein, The execution relay receives the negative logic jump instruction and cuts off a main high-voltage loop of the marine lithium battery pack according to the negative logic jump instruction, including: The execution relay includes a drive coil, and a power supply loop of the drive coil is connected in series with the signal output port of the high-voltage interlock monitoring circuit; The low level in the negative logic jump instruction causes the power supply loop of the drive coil to be disconnected; After the drive coil loses power, the normally open main contact controlled by the drive coil is disconnected, thereby cutting off the main high-voltage loop.

6. The method for high voltage interlock protection of marine lithium battery pack of claim 1, wherein, In step S2, the process of real-time diagnosis further includes: the high-voltage interlock monitoring circuit monitors the working voltage of itself, when the working voltage is lower than a preset voltage threshold, the delay confirmation mechanism of step S3 is skipped, the negative logic jump instruction is directly generated and output by the high-voltage interlock monitoring circuit, and step S5 is executed to cut off the main high-voltage loop.

7. A high-voltage interlock protection system for a marine lithium battery pack for implementing the method of any one of claims 1-6, characterized in that, The system comprises: An interlock signal generation module is configured to generate a continuous interlock feedback signal through a mechanical normally closed detection switch arranged at a high-voltage connector interface, including: Contacts of the mechanical normally closed detection switch are mechanically linked with a physical locking mechanism of the high-voltage connector; When the high-voltage connector is in a fully inserted state, the physical locking mechanism presses the contacts of the mechanical normally closed detection switch to make them closed, thereby forming a path of the continuous interlock feedback signal; An interlock signal diagnosis module is configured to receive the interlock feedback signal by the high-voltage interlock monitoring circuit, and to diagnose the integrity of the interlock feedback signal in real time based on a preset signal logic judgment rule, including: The high-voltage interlock monitoring circuit includes a signal acquisition unit, and the signal acquisition unit acquires the level state of the interlock feedback signal in a periodic sampling manner; The signal logic judgment rule is defined as: if the acquired level state is all low level in continuous multiple sampling periods, the interlock feedback signal is diagnosed as interrupted; A delay confirmation control module is configured to start a delay confirmation mechanism based on a continuous judgment logic by the high-voltage interlock monitoring circuit when the interlock feedback signal is diagnosed as interrupted; the continuous judgment logic is configured to continuously monitor whether the interlock feedback signal is restored within an irreversible preset delay time, wherein the timing process of the irreversible preset delay time cannot be interrupted or reset by the restoration of the interlock feedback signal; A protection instruction generation module is configured to generate and output a negative logic jump instruction by the high-voltage interlock monitoring circuit if the interlock feedback signal has not been restored within the preset delay time; A high-voltage loop execution module is configured to receive the negative logic jump instruction by an execution relay, and to cut off a main high-voltage loop of a marine lithium battery pack according to the negative logic jump instruction.

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