Radio frequency power amplifier, radio frequency front-end module and electronic equipment
By incorporating ground vias in the RF power amplifier, the problem of transistor overheating was solved, achieving more efficient heat dissipation and thermal balance, thus improving the performance of the RF power amplifier.
Patent Information
- Application Number
- CN202510895983.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2025-10-31
AI Technical Summary
Existing RF power amplifier chips are prone to overheating, which affects their performance.
In radio frequency power amplifiers, efficient heat dissipation is achieved by placing ground holes between adjacent transistors, reducing thermal coupling and enhancing thermal balance between transistors.
This improved the heat dissipation performance of the RF power amplifier, reduced thermal resistance, and enhanced the stability and performance of the device.
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Figure CN120880348A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of radio frequency technology, and in particular to a radio frequency power amplifier, a radio frequency front-end module, and an electronic device. Background Technology
[0002] As a core component of wireless communication systems, the power amplifier chip's operational stability directly determines signal amplification efficiency and equipment reliability. Power amplifier chips typically consist of multiple transistors connected in parallel to form an amplification circuit. Due to the high output power of power amplifier chips, overheating is a common issue, limiting their performance. Summary of the Invention
[0003] This application provides an RF power amplifier, an RF front-end module, and an electronic device that can prevent the RF power amplifier from overheating, thereby improving the performance of the RF power amplifier.
[0004] In a first aspect, embodiments of this application provide a radio frequency power amplifier, the radio frequency power amplifier comprising:
[0005] The substrate includes opposing first and second surfaces, wherein a grounding metal thin film for grounding is disposed on the second surface;
[0006] A device layer, the device layer including a plurality of transistors formed on the first surface, wherein the plurality of transistors are arranged along a first direction;
[0007] A first metal layer is formed on the side of the device layer away from the substrate. The first metal layer has metal electrodes corresponding to each end of the transistor. The first metal layer also includes at least one first metallization region, which is connected to the ground metal film through a ground hole penetrating the device layer and the substrate.
[0008] Wherein, at least two adjacent transistors are provided with ground vias; and / or, the number of ground vias is at least two, and at least two ground vias are arranged along the first direction, and at least one transistor is disposed between two ground vias arranged along the first direction.
[0009] Secondly, embodiments of this application provide a radio frequency front-end module, which includes the aforementioned radio frequency power amplifier.
[0010] Thirdly, embodiments of this application provide an electronic device, which includes the aforementioned radio frequency power amplifier or the aforementioned radio frequency front-end module.
[0011] The radio frequency (RF) power amplifier, RF front-end module, and electronic device provided in this application embodiment include a substrate, a device layer, and a first metal layer. The substrate includes a first surface and a second surface facing each other, and the second surface is provided with a grounding metal film for grounding. The device layer includes a plurality of transistors formed on the first surface, and the plurality of transistors are arranged along a first direction. The first metal layer is formed on the side of the device layer away from the substrate, and the first metal layer is provided with metal electrodes corresponding to each end of the transistors. The first metal layer also includes at least one first metallization region, and the first metallization region is connected to the grounding metal film through a ground via penetrating the device layer and the substrate. A ground via is provided between at least two adjacent transistors; and / or, the number of ground vias is at least two, and at least two ground vias are arranged along the first direction, and at least one transistor is disposed between the two ground vias arranged along the first direction. The heat generated by the transistors can be conducted away more efficiently through ground vias arranged adjacent to the transistors. By providing ground vias between adjacent transistors, heat dissipation can be enhanced, and thermal coupling between different transistors can be reduced, thereby reducing the thermal resistance of the transistors and improving the performance of the RF power amplifier.
[0012] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the disclosure of the embodiments of this application. Attached Figure Description
[0013] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0014] Figure 1 This is a schematic diagram of a radio frequency power amplifier provided in an embodiment of this application;
[0015] Figures 2a to 2f This is a schematic diagram of the layout of transistors and ground holes in some embodiments of this application;
[0016] Figure 3 This is a schematic diagram of the layout of transistors and ground holes in related technologies;
[0017] Figure 4 This is a schematic diagram of a radio frequency power amplifier in some embodiments of this application;
[0018] Figures 5 to 11 This is a schematic diagram of a radio frequency power amplifier in other embodiments of this application;
[0019] Figures 12a to 12b This is a schematic diagram of the first metallized region in some embodiments of this application;
[0020] Figure 13 This is a schematic diagram of the first amplifier circuit in some embodiments of this application;
[0021] Figure 14 This is a schematic block diagram of a radio frequency front-end module provided in an embodiment of this application;
[0022] Figure 15 This is a schematic block diagram of a radio frequency front-end module according to one embodiment of this application;
[0023] Figure 16 This is a schematic block diagram of an electronic device provided in an embodiment of this application.
[0024] Explanation of reference numerals in the attached figures:
[0025] 10. Substrate; 11. First surface; 12. Second surface; 102. Grounded metal thin film; 13. First region; 14. Second region; 20. Device layer; 21. Transistor; 201. Metal electrode; 211. First transistor; 212. Second transistor; 213. Third transistor; 214. Fourth transistor; 215. Fifth transistor; 216. Sixth transistor; 31. First metal layer; 311. First metallized region; 313. Third metallized region; 314. Fourth metallized region; 32. Second metal layer; 321. Second metallized region; 322. First via; 323. Second via; 301, First metal trace; 302, Second metal trace; 303, First trace; 304, Second trace; 305, Third trace; 306, Fourth trace; 307, First connecting line; 308, Second connecting line; 309, Third connecting line; 40, Ground via; 41, First ground via; 42, Second ground via; 43, Third ground via; 44, Fourth ground via; 401, First conductive ground via; 402, Second conductive ground via; 403, Third conductive ground via; 50, Output port; 51, First output port; 52, Second output port; 60, Bonding wire; 110, First amplifier circuit; 120, Second amplifier circuit. Detailed Implementation
[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0027] It should be understood that this application can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions of layers and regions, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.
[0028] To fully understand this application, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.
[0029] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0030] Please see Figure 1 , Figure 1 This is a schematic block diagram of a radio frequency power amplifier provided in an embodiment of this application.
[0031] like Figure 1 As shown, the radio frequency power amplifier includes: a substrate 10, a device layer 20 and a first metal layer 31. The substrate 10 includes a first surface 11 and a second surface 12 opposite to each other. The second surface 12 is provided with a grounding metal film 102 for grounding. In some embodiments, the grounding metal film 102 may be referred to as a ground layer or a back gold layer.
[0032] The device layer 20 includes a plurality of transistors 21 formed on the first surface 11. As an example, the transistors 21 may be HBT transistors (Heterojunction Bipolar Transistors 21);
[0033] Of course, it is not limited to this. For example, transistor 21 can also be a BJT transistor (Bipolar Junction Transistor), an LDMOS (Laterally Diffused Metal Oxide Semiconductor) transistor, a GaN (Gallium Nitride) transistor, or a GaAs (Gallium Arsenide) transistor. For ease of explanation, this application mainly uses an HBT transistor as an example. An HBT transistor is a three-terminal semiconductor device, generally including three doped regions: the emitter, the base, and the collector. Different semiconductor materials are used for the emitter and base regions, thereby significantly improving performance.
[0034] like Figure 1 As shown, a first metal layer 31 is formed on the side of the device layer 20 away from the substrate 10. The first metal layer 31 has metal electrodes 201 corresponding to each end of the transistor 21. For example, taking the transistor 21 as an HBT transistor, the metal electrode 201 connected to the emitter region can be called the emitter E, the metal electrode 201 connected to the base region can be called the base B, and the metal electrode 201 connected to the collector region can be called the collector C. For ease of explanation, the metal electrodes 201 corresponding to each end of the transistor 21 can be considered part of the transistor 21. For example, if a low-power radio frequency signal is input to the base of the transistor 21, a higher-power radio frequency signal can be output from the collector of the transistor 21, thus achieving power amplification of the radio frequency signal.
[0035] like Figures 2a to 2f As shown, multiple transistors 21 are arranged along a first direction. In some embodiments, the multiple transistors 21 arranged along the first direction are connected in parallel. By connecting multiple transistors 21 in parallel, the multiple transistors 21 can share the current and power load, thereby improving the overall output power of the RF power amplifier.
[0036] like Figure 1 As shown, the first metal layer 31 also includes at least one first metallization region 311. The first metallization region 311 is connected to the ground metal film 102 through a ground hole 40 that penetrates the device layer 20 and the substrate 10, so that the first metallization region 311 can be grounded through the ground hole 40.
[0037] In this configuration, a ground via 40 is provided between at least two adjacent transistors 21; and / or, the number of ground vias 40 is at least two, and the at least two ground vias 40 are arranged along a first direction, with at least one transistor 21 disposed between the two ground vias 40 arranged along the first direction. For example Figure 2a or Figure 2c A ground hole 40 is provided between at least two adjacent transistors 21, such as Figure 2b or Figure 2c or Figure 2d At least two ground vias 40 are arranged along a first direction, and at least one transistor 21 is disposed between the two ground vias 40 arranged along the first direction. By staggering the transistors 21 and ground vias 40 in the first direction, the heat generated by the transistors 21 can be conducted away more efficiently through the ground vias 40 adjacent to the transistors 21, which helps to dissipate heat from the transistors 21. By placing ground vias 40 between adjacent transistors 21, the distance between the transistors 21 disposed on both sides of the ground vias 40 is larger, which can prevent thermal coupling between different transistors 21 when they are placed close together, which would lead to an increase in the thermal resistance of the transistors 21. An imbalance in the thermal resistance of different transistors 21 would lead to an imbalance in the performance of different transistors 21, thereby affecting the performance of the RF power amplifier.
[0038] Figure 3 A schematic diagram of the layout of transistors 21 and ground vias 40 in a related art RF power amplifier is shown. The distance between transistors 21 is small, making it easy for heat generated by transistors 21 to accumulate, and thermal coupling easily occurs between different transistors 21. Based on this, this application improves at least the layout of transistors 21 and ground vias 40 in the RF power amplifier, improving the heat dissipation performance of transistors 21 and reducing thermal coupling between transistors 21, thus improving the thermal balance of transistors 21 in the RF power amplifier and enhancing the performance of the RF power amplifier.
[0039] In some implementations, such as Figure 2c or Figure 2f As shown, multiple transistors 21 and multiple ground holes 40 are arranged along a first direction. Among them, as... Figure 2c or Figure 2d As shown, a transistor 21 is disposed between at least two adjacent ground vias 40. For example, as Figure 2c As shown, in the first direction, a transistor 21 is disposed between every two adjacent ground holes 40 and a ground hole 40 is disposed between every two adjacent transistors 21, that is, each transistor 21 and a ground hole 40 are arranged alternately; in the first direction, a ground hole 40 is disposed on at least one side of each transistor 21, which can conduct heat generated by the transistor 21 more efficiently.
[0040] In other implementations, such as Figure 2d or Figure 2e or Figure 2f As shown, a plurality of transistors 21 are disposed between at least two adjacent ground vias 40; for example, in Figure 2f In this configuration, multiple (e.g., two) transistors 21 are grouped together, with each group of transistors 21 interleaved with a ground via 40. Compared to providing a ground via 40 on at least one side of each transistor 21, this reduces the number of ground vias 40 required, thereby reducing the size occupied by the transistors 21 and the ground vias 40. This facilitates a compact layout of the RF power amplifier or reduces the overall size of the RF power amplifier. Optionally, when the number of transistors 21 in the first direction is large, providing multiple transistors 21 between at least two adjacent ground vias 40 can further facilitate a compact layout of the RF power amplifier or reduce its overall size.
[0041] In some other implementations, such as Figure 2d As shown, a transistor 21 is disposed between some adjacent ground vias 40, and multiple transistors 21 are disposed between other adjacent ground vias 40. This can improve the flexibility of the layout of devices such as transistors 21 and ground vias 40 in the RF power amplifier.
[0042] In some embodiments, when the number of transistors 21 in the first direction is small, such as Figure 2e As shown, multiple transistors 21 can be arranged sequentially, and a ground hole 40 can be provided on both sides of each of the sequentially arranged transistors 21; this can both ground the emitters of the multiple transistors 21 and improve the heat dissipation of the transistors 21. For example, when the number of transistors 21 in the first direction is less than or equal to 4, the multiple transistors 21 arranged along the first direction can be placed between two ground holes.
[0043] In some implementations, such as Figure 4 and Figure 5 As shown, the RF power amplifier also includes a second metal layer 32 spaced apart from the first metal layer 31; a second metallization region 321 is formed on the second metal layer 32, and the first ends of a plurality of transistors 21 are respectively connected to the second metallization region 321 through corresponding metal electrodes 201 and first vias 322, and each first metallization region 311 is connected to the second metallization region 321 through a corresponding second via 323.
[0044] For example, the metal electrode 201 connected to the first end of transistor 21 can be the emitter E of the HBT transistor. The emitter E is connected to the second metallization region 321 through the first via 322, and grounded through the second via 323, the first metallization region 311, and the ground via 40. The emitter E of transistor 21 is grounded. For example, with the emitter E of the HBT transistor grounded, the base B of the HBT transistor receives the bias signal and the RF input signal to be amplified, and the collector of the HBT transistor can output the amplified RF signal.
[0045] In some implementation methods, please refer to Figure 4 See Figure 6 The RF power amplifier also includes a second metal layer 32. The first metal layer 31 and the second metal layer 32 form a first metal trace 301 for transmitting RF signals and a second metal trace 302 for transmitting bias signals. Both the first metal trace 301 and the second metal trace 302 are disposed on the same side of a plurality of transistors 21 disposed along the first direction. The third terminals of the plurality of transistors 21 disposed along the first direction are connected to the first metal trace 301 and the second metal trace 302. The third terminal of the transistor 21 is, for example, the base B of an HBT transistor. The second metal trace 302 provides a bias voltage to the base B, enabling the HBT transistor to operate in the amplification region and amplify the RF signal transmitted through the first metal trace 301. The fact that both the first metal trace 301 and the second metal trace 302 are disposed on the same side of the plurality of transistors 21 disposed along the first direction reduces wiring complexity, avoids cross-interference, optimizes the signal transmission path, and ensures that the bias conditions of each transistor 21 in the first direction are consistent, thereby improving the stability of the RF power amplifier performance.
[0046] Optionally, the first metal trace 301 is formed on the first metal layer 31, and the second metal trace 302 is formed on at least the second metal layer 32. For example, when the second metal trace 302 formed on the second metal layer 32 is connected to the transistor 21, it is not limited by the connection between the first metal trace 301 and the transistor 21, which is beneficial for the wiring design of the connection. Optionally, the second metal trace 302 can be formed on both the first metal layer 31 and the second metal layer 32, or it can be formed on the second metal layer 32 without being formed on the first metal layer 31.
[0047] For example, when the second metal trace 302 is formed on both the first metal layer 31 and the second metal layer 32, the projections of the second metal trace 302 on the first metal layer 31 and the second metal trace 302 on the substrate can at least partially overlap, so as to reduce the area occupied by the first metal trace 301 and facilitate the compact layout of the RF power amplifier.
[0048] For example, when the second metal trace 302 is formed on the second metal layer 32 instead of the first metal layer 31, the projection of the second metal trace 302 on the first metal layer 31 can at least partially overlap with the first metal trace 301, which can reduce the area occupied by the first metal trace 301 and the second metal trace 302, and is conducive to achieving a compact layout of the RF power amplifier.
[0049] Optionally, the first metal trace 301 is formed on the second metal layer 32, and the second metal trace 302 is formed at least on the first metal layer 31. For example, when the second metal trace 302 formed on the first metal layer 31 is connected to the transistor 21, it is not limited by the connection between the first metal trace 301 and the transistor 21, which is beneficial for the wiring design of the connection. Optionally, the second metal trace 302 can be formed on both the first metal layer 31 and the second metal layer 32, or it can be formed on the first metal layer 31 without being formed on the second metal layer 32.
[0050] For example, when the second metal trace 302 is formed on both the first metal layer 31 and the second metal layer 32, the projections of the second metal trace 302 on the first metal layer 31 and the second metal trace 302 on the substrate can at least partially overlap, so as to reduce the area occupied by the first metal trace 301 and facilitate the compact layout of the RF power amplifier.
[0051] For example, when the second metal trace 302 is formed on the first metal layer 31 but not on the second metal layer 32, the projection of the second metal trace 302 on the second metal layer 32 can at least partially overlap with the first metal trace 301, which can reduce the area occupied by the first metal trace 301 and the second metal trace 302, and is conducive to achieving a compact layout of the RF power amplifier.
[0052] In some implementations, such as Figure 2c or Figure 2e or Figure 5 As shown, the RF power amplifier also includes an output port 50, which is connected to the second terminal of transistor 21. For example, the second terminals of transistors 21 in the first direction (such as the collector C of an HBT transistor) are all connected to the output port 50, realizing the parallel connection of multiple transistors 21, so as to output the amplified RF signal through the output port 50.
[0053] For example, the output port 50 is disposed in a second direction of the plurality of transistors 21, the second direction intersecting the first direction, such as... Figure 5 As shown, the second direction is perpendicular to the first direction. Compared to related technologies (such as...) Figure 3In this embodiment, a ground hole 40 is provided between the output port 50 and the transistor 21. By arranging the ground hole 40 and the multiple transistors 21 in a first direction and setting the output port 50 in a second direction of the multiple transistors 21, the parasitic capacitance between the output port 50 and the ground hole 40 can be reduced, thereby improving the performance of the RF power amplifier.
[0054] For example, the two outermost transistors 21 arranged along the first direction are equidistant from the output port 50. This makes the signal transmission delay and loss between the multiple transistors 21 and the output port 50 more balanced, thereby improving the stability and performance of the RF power amplifier.
[0055] For example, such as Figure 2c or Figure 5 As shown, the projections of the plurality of transistors 21 arranged along the first direction onto the plane containing the output port 50 are symmetrical about a first virtual straight line, which is the straight line containing the center of the projection and the center of the output port 50. Figure 2c or Figure 5 As shown, multiple transistors 21 are symmetrically arranged on the upper and lower sides of the first virtual straight line, which can improve the balance of delay and loss in signal transmission between the multiple transistors 21 and the output port 50, thereby improving the stability and performance of the RF power amplifier.
[0056] For example, please refer to Figure 5 The multiple transistors 21 arranged along the first direction are all equidistant from the output port 50. This ensures that the signal transmission delay and loss between the multiple transistors 21 arranged along the first direction and the output port 50 are similar, thereby improving the stability and performance of the RF power amplifier.
[0057] Optionally, the projection of the plurality of transistors 21 arranged along the first direction onto the second virtual straight line is located within the projection area of the output port 50 on the second virtual straight line, which is parallel to the first direction. By setting the range of the output port 50 to completely cover the plurality of transistors 21 arranged along the first direction, the distance between the plurality of transistors 21 arranged along the first direction and the output port 50 can be made equal, improving the balance of signal transmission delay and loss between the plurality of transistors 21 and the output port 50, thereby improving the stability and performance of the RF power amplifier.
[0058] In some implementations, such as Figure 7a or Figure 7bAs shown, the plurality of transistors 21 includes a plurality of first transistors 211 and a plurality of second transistors 212. The plurality of first transistors 211 are arranged along a first direction on a first side of the output port 50, and the plurality of second transistors 212 are arranged along a first direction on a second side of the output port 50. The first side and the second side are opposite sides. The ground via 40 includes a first ground via 41 and a second ground via 42. The first ground via 41 is disposed between two adjacent first transistors 211, and the second ground via 42 is disposed between two adjacent second transistors 212. By dividing the plurality of transistors 21 into two columns and placing the output port 50 between the two columns of transistors 21, the aspect ratio of the area where the plurality of transistors 21 are located can be made more reasonable. Especially when the number of transistors 21 is large, compared with the plurality of transistors 21 being arranged along the first direction on the same side of the output port 50, dividing the plurality of transistors 21 into two columns and placing the output port 50 between the two columns of transistors 21 can reduce the length occupied by the plurality of transistors 21 in the first direction, which is beneficial to the layout design of the devices in the RF power amplifier. Furthermore, it can make the path length from each transistor 21 to the output port 50 more consistent, resulting in a more balanced output power distribution, which in turn can improve the stability and performance of the RF power amplifier.
[0059] In some implementations, such as Figure 8As shown, the output port 50 includes a first output port 51, a plurality of first transistors 211 arranged along a first direction on a first side of the first output port 51, and a plurality of second transistors 212 arranged along a first direction on a second side of the first output port 51; the first output port 51, the first transistors 211, the first ground via 41, the second transistors 212, and the second ground via 42 are disposed in a first region 13 of the substrate 10. The output port 50 also includes a second output port 52, and the plurality of transistors 21 further includes a plurality of third transistors 213 and a plurality of fourth transistors 214, the plurality of third transistors 213 arranged along a first direction on a first side of the second output port 52, and the plurality of fourth transistors 214 arranged along a first direction on a second side of the second output port 52; the ground via 40 further includes a third ground via 43 and a fourth ground via 44, the third ground via 43 being disposed between adjacent third transistors 213, and the fourth ground via 44 being disposed between adjacent fourth transistors 214; the second output port 52, the third transistors 213, the third ground via 43, the fourth transistors 214, and the fourth ground via 44 are disposed in a second region 14 of the substrate 10. By dividing multiple transistors 21 into four columns, placing the first output port 51 between two columns of transistors 21 and the second output port 52 between the other two columns, the aspect ratio of the area containing the multiple transistors 21 can be made more reasonable. Especially when there are a large number of transistors 21, compared to placing multiple transistors 21 along the same side of the output port 50 along the first direction, dividing the multiple transistors 21 into four columns, placing the first output port 51 between two columns of transistors 21 and the second output port 52 between the other two columns of transistors 21, can reduce the length occupied by multiple transistors 21 in the first direction, which is beneficial to the layout design of devices in the RF power amplifier. Moreover, it can make the path length from each transistor 21 to the corresponding output port 50 more consistent, resulting in a more balanced output power distribution, thereby improving the stability and performance of the RF power amplifier.
[0060] For example, the second terminals of multiple first transistors 211 (such as the collector C of an HBT transistor) and the second terminals of multiple second transistors 212 (such as the collector C of an HBT transistor) are all connected to a first output port 51. The multiple first transistors 211 and multiple second transistors 212 connected to the first output port 51 are connected in parallel to output the amplified radio frequency signals from the first transistors 211 and 212 through the first output port 51. The second terminals of multiple third transistors 213 (such as the collector C of an HBT transistor) and multiple fourth transistors 214 (such as the collector C of an HBT transistor) are all connected to a second output port 52. The multiple third transistors 213 and four fourth transistors 214 connected to the second output port 52 are connected in parallel to output the amplified radio frequency signals from the third transistors 213 and four fourth transistors 214 through the second output port 52. In this example, the multiple first transistors 211 and multiple second transistors 212 connected in parallel can constitute a single-ended power amplifier circuit.
[0061] For example, please refer to Figure 9a or Figure 9b As shown, the metal traces in the RF power amplifier include a first trace 303, a second trace 304, a third trace 305, and a fourth trace 306. The first trace 303 is disposed along a first direction on the side of the first transistor 211 away from the first output port 51. The second trace 304 is disposed along a first direction on the side of the second transistor 212 away from the first output port 51. The third trace 305 is disposed along a first direction on the side of the third transistor 213 away from the second output port 52. The fourth trace 306 is disposed along a first direction on the side of the fourth transistor 214 away from the second output port 52. The third terminals of multiple first transistors 211 are connected to the first trace 303. The third terminals of multiple second transistors 212 are connected to the second trace 304. The third terminals of multiple third transistors 213 are connected to the third trace 305. The third terminals of multiple fourth transistors 214 are connected to the fourth trace 306. The closer distance between each transistor 21 and its corresponding metal trace makes the difference between signals transmitted from the metal trace to each transistor 21 smaller, thereby improving the consistency of signal transmission and the stability of the RF power amplifier, and also reducing signal delay and power consumption.
[0062] For example, please refer to Figure 6 See Figure 9a or Figure 9bThe first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 can be first metal traces 301 used for transmitting radio frequency (RF) signals. The differences between the signals transmitted from the first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 to their respective transistors 21 are smaller, improving the consistency of RF signal transmission and making the differences between the RF signals transmitted from the metal traces to each transistor 21 smaller. Alternatively, the first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 can be second metal traces 302 used for transmitting bias signals, improving the consistency of bias signal transmission and making the differences between the bias signals transmitted from the metal traces to each transistor 21 smaller.
[0063] For example, such as Figure 9a As shown, the first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 are first metal traces 301 used for transmitting radio frequency (RF) signals. The first trace 303 and the second trace 304 are connected to input a first RF signal. The first output port 51 is used to output the first RF signal processed by the first transistor 211 and the second transistor 212. The third trace 305 and the fourth trace 306 are connected to input a second RF signal. The second output port 52 is used to output the second RF signal processed by the third transistor 213 and the fourth transistor 214. The first transistor 211 and the second transistor 212 can be transistor 21 in a first power amplifier (PA), and the third transistor 213 and the fourth transistor 214 can be transistor 21 in a second power amplifier. The first power amplifier and the second power amplifier can process different RF signals respectively, or they can process the same RF signal.
[0064] For example, the second radio frequency signal and the first radio frequency signal are differential signals. The first power amplifier and the second power amplifier can differentially amplify the second radio frequency signal and the first radio frequency signal, and the amplified differential signal is output from the first output port 51 and the second output port 52.
[0065] For example, such as Figure 9aAs shown, the first end of the first trace 303 is connected to the first end of the second trace 304 via the first connecting line 307, and the midpoint of the first connecting line 307 is used to input the first radio frequency (RF) signal; the first end of the third trace 305 is connected to the first end of the fourth trace 306 via the second connecting line 308, and the midpoint of the second connecting line 308 is used to input the second RF signal. Inputting the first RF signal at the midpoint of the first connecting line 307 reduces the difference between the signals transmitted to the first transistor 211 and the second transistor 212, and inputting the second RF signal at the midpoint of the second connecting line 308 reduces the difference between the signals transmitted to the third transistor 213 and the fourth transistor 214, thereby improving the consistency of signal transmission and the stability of the RF power amplifier.
[0066] For example, such as Figure 9b As shown, the first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 are first metal traces 301 used for transmitting radio frequency (RF) signals. The first trace 303, the second trace 304, the third trace 305, and the fourth trace 306 are connected to input a third RF signal. The first output port 51 is used to output the RF signal processed by the first transistor 211 and the second transistor 212, and the second output port 52 is used to output the RF signal processed by the third transistor 213 and the fourth transistor 214. The first output port 51 and the second output port 52 are connected. The first transistor 211, the second transistor 212, the third transistor 213, and the fourth transistor 214 are connected in parallel, which can improve the overall output power of the RF power amplifier. Optionally, such as... Figure 9b As shown, the first output port 51 and the second output port 52 can be connected to different areas of the substrate via bonding wires 60, and then further connected via traces or bonding wires 60 on the substrate; of course, it is not limited to this, for example, the first output port 51 and the second output port 52 can be connected to the same area of the substrate via bonding wires 60, so as to output the third radio frequency signal processed by the first transistor 211, the second transistor 212, the third transistor 213 and the fourth transistor 214 through that area; or the first output port 51 and the second output port 52 can also be connected inside the radio frequency power amplifier.
[0067] For example, such as Figure 9bAs shown, the first end of the first trace 303 is sequentially connected to the first ends of the second trace 304, the third trace 305, and the fourth trace 306 via the third connecting line 309. The midpoint of the third connecting line 309 is used to input a third radio frequency (RF) signal. By inputting the third RF signal at the midpoint of the third connecting line 309, the differences between the signals transmitted to the first transistor 211, the second transistor 212, the third transistor 213, and the fourth transistor 214 can be reduced, thereby improving the consistency of signal transmission and the stability of the RF power amplifier.
[0068] As an example, please refer to Figure 9a or Figure 9b See Figure 7a or Figure 7b In the case where the RF power amplifier includes a first transistor 211 and a second transistor 212, but excludes a third transistor 213 and a fourth transistor 214, the metal traces in the RF power amplifier may include a first trace 303 and a second trace 304. The first trace 303 is disposed along a first direction on the side of the first transistor 211 away from the first output port 51, and the second trace 304 is disposed along the first direction on the side of the second transistor 212 away from the first output port 51. The third terminals of multiple first transistors 211 are connected to the first trace 303, and the third terminals of multiple second transistors 212 are connected to the second trace 304. Optionally, the first trace 303 and the second trace... The first output port 51 is used to output the first radio frequency signal processed by the first transistor 211 and the second transistor 212. The difference between the signals transmitted to their respective transistors 21 by the first trace 303 and the second trace 304 is smaller, which improves the consistency of radio frequency signal transmission. Optionally, the first end of the first trace 303 is connected to the first end of the second trace 304 through the first connecting line 307. The midpoint of the first connecting line 307 is used to input the first radio frequency signal. By inputting the first radio frequency signal at the midpoint of the first connecting line 307, the difference between the signals transmitted to the first transistor 211 and the second transistor 212 can be smaller.
[0069] In some implementations, such as Figure 10a or Figure 10b As shown, the ground via 40 disposed between adjacent transistors 21 is a first conductive ground via 401. The RF power amplifier also includes a second conductive ground via 402 connected to the ground metal film 102. The first metal layer 31 also includes a third metallization region 313, which is connected to the ground metal film 102 through at least one second conductive ground via 402, i.e., the third metallization region 313 is grounded through the second conductive ground via 402. The second conductive ground via 402 is disposed between the output port 50 and the transistor 21 connected to the third metallization region 313.
[0070] In this configuration, at least one of the transistors 21 arranged along the first direction has its first end connected to the third metallization region 313 via a corresponding metal electrode 201 (such as the emitter E of an HBT transistor). This allows the first end of the at least one transistor 21 to be grounded; for example, the emitter E of an HBT transistor can be grounded. The base B of the HBT transistor receives the bias signal and the RF input signal to be amplified, and the collector of the HBT transistor can output the amplified RF signal. For instance, when there are many transistors 21 between the two first conductive ground holes 401, at least the first end of the transistor 21 furthest from the first conductive ground hole 401 can be connected to the third metallization region 313 via a corresponding metal electrode 201. This makes the path from the first end of the multiple transistors 21 to the grounded metal film 102 more balanced, further enhancing heat dissipation and reducing thermal coupling between adjacent transistors 21. For example, when there are four or more transistors 21 between the two first conductive ground holes 401, at least the first ends of the two middle transistors 21 can be connected to the third metallization region 313 via corresponding metal electrodes 201.
[0071] For example, such as Figure 10b As shown, at least one transistor 21 has its first end connected to the second metallization region 321 through a corresponding metal electrode 201 and a first via 322, and is connected to the third metallization region 313 through a corresponding metal electrode 201, thus achieving dual grounding. This makes the path between the first end of each transistor 21 and the grounding metal film 102 more balanced.
[0072] Optional, such as Figure 10b As shown, the size of the second conductive ground via 402 is smaller than the size of the first conductive ground via 401. For example, the length of the second conductive ground via 402 is smaller than the length of the first conductive ground via 401. Optionally, the projections of both the first conductive ground via 401 and the second conductive ground via 402 onto the substrate are rectangular, and the length directions of the first conductive ground via 401 and the second conductive ground via 402 can be the same or different. For example, as... Figure 10b As shown, the length direction of the first conductive ground hole 401 is parallel to the second direction, while the length direction of the second conductive ground hole 402 is parallel to the first direction. This reduces the size of the RF power amplifier in the second direction and makes the internal layout of the RF power amplifier more compact.
[0073] In some implementations, such as Figure 11As shown, the RF power amplifier includes a first amplification circuit 110 and a second amplification circuit 120, each including a plurality of transistors 21. At least two transistors 21 in the first amplification circuit 110 are arranged along a first direction, and / or at least two transistors 21 in the second amplification circuit 120 are arranged along a first direction. The first direction corresponding to the first amplification circuit 110 and the first direction corresponding to the second amplification circuit 120 can be the same or different; for example, in Figure 10, the first direction corresponding to the first amplification circuit 110 is vertical, and the first direction corresponding to the second amplification circuit 120 is horizontal. When at least two transistors 21 in the first amplification circuit 110 are arranged along the first direction, a ground via 40 is provided between at least two adjacent transistors 21 arranged along the first direction; and / or, the number of ground vias 40 is at least two, and at least two ground vias 40 are arranged along the first direction, with at least one transistor 21 disposed between two ground vias 40 arranged along the first direction. When at least two transistors 21 in the second amplifier circuit 120 are arranged along the first direction, a ground hole 40 is provided between at least two adjacent transistors 21 arranged along the first direction in the second amplifier circuit 120; and / or, the number of ground holes 40 is at least two, and at least two ground holes 40 are arranged along the first direction, and at least one transistor 21 is disposed between two ground holes 40 arranged along the first direction.
[0074] For example, the second amplifier circuit 120 is used to process the radio frequency signal amplified by the first amplifier circuit 110; wherein the first amplifier circuit 110 can be called the pre-amplifier circuit and the second amplifier circuit 120 can be called the post-amplifier circuit; the output power of the radio frequency power amplifier can be improved through multi-stage amplification.
[0075] Optionally, at least two ground holes 40 corresponding to transistor 21 in the first amplifier circuit 110 are provided with their respective first metallization regions 311 spaced apart; and / or at least two ground holes 40 corresponding to transistor 21 in the second amplifier circuit 120 are connected through the first metallization regions 311.
[0076] like Figure 12aAs shown, at least two ground vias 40 corresponding to transistor 21 in the second amplifier circuit 120 are connected through a first metallization region 311. For example, at least two ground vias 40 corresponding to transistor 21 in the second amplifier circuit 120 are connected to the same first metallization region 311, or the first metallization regions 311 of the at least two ground vias 40 are also connected through metal traces. By connecting the ground vias 40 corresponding to transistor 21 in the second amplifier circuit 120 through the first metallization region 311, it is equivalent to connecting the parasitic inductance of multiple ground vias 40 in parallel, which can reduce the parasitic inductance of the ground vias 40 corresponding to the second amplifier circuit 120, thereby improving the performance of the second amplifier circuit 120, for example, increasing the gain of the second amplifier circuit 120.
[0077] like Figure 12b As shown, at least two ground vias 40 corresponding to transistor 21 in the first amplifier circuit 110 are spaced apart by their respective first metallization regions 311. The parasitic inductance of the ground vias 40 can be used for impedance matching between the first amplifier circuit 110 and the second amplifier circuit 120.
[0078] In some implementations, such as Figure 11 As shown, the radio frequency power amplifier includes a first amplifier circuit 110 and a second amplifier circuit 120. The number of transistors 21 in the first amplifier circuit 110 is less than the number of transistors 21 in the second amplifier circuit 120. Among the multiple transistors 21 in the first amplifier circuit 110, transistors 21 arranged along a first direction are disposed on both sides of a ground hole 40. Among the multiple transistors 21 in the second amplifier circuit 120, a ground hole 40 is disposed between at least two adjacent transistors 21 arranged along the first direction.
[0079] In other embodiments, a plurality of ground vias 40 may also be provided in the first amplifier circuit 110. For example, the plurality of transistors 21 and ground vias 40 in the first amplifier circuit 110 may be configured as follows: Figure 2e As shown, transistors 21 arranged along a first direction are positioned between two ground vias 40 arranged along the first direction, allowing the plurality of transistors 21 of the first amplifier circuit 110 to be grounded through a relatively small number of ground vias 40. Exemplarily, the arrangement of the plurality of transistors 21 and ground vias 40 in the first amplifier circuit 110 can also be as follows... Figure 2d , Figure 2f , Figures 7a to 11 As shown in any of the schematic diagrams, among the multiple transistors 21 of the first amplifier circuit 110, the transistors 21 arranged along the first direction are disposed between two ground holes 40 arranged along the first direction, and the multiple transistors 21 of the first amplifier circuit 110 can be grounded through the multiple ground holes 40.
[0080] In some implementations, such as Figure 11As shown, the radio frequency power amplifier includes a first amplification circuit 11033 and a second amplification circuit 120. The second amplification circuit 120 includes a plurality of transistors 21 arranged along a first direction for processing the radio frequency signal amplified by the first amplification circuit 110.
[0081] Please combine Figure 11 See Figure 13 The first metal layer 31 also includes a fourth metallization region 314, which is connected to the grounded metal film 102 through at least one third conductive ground hole 403, that is, the fourth metallization region 314 is grounded through the third conductive ground hole 403.
[0082] like Figure 13 As shown, the first amplifier circuit 110 includes a plurality of fifth transistors 215 and a plurality of sixth transistors 216. The first terminals of the fifth transistors 215 and the sixth transistors 216 are respectively connected to the fourth metallization region 314 through corresponding metal electrodes 201. The first terminals of the fifth transistors 215 and the sixth transistors 216 are grounded through the fourth metallization region 314 and the third conductive ground via 403. Exemplarily, the second terminals of the fifth transistors 215 and the sixth transistors 216 can also be connected to a specific metallization region (not shown in the figure) on the second metal layer through vias, and connected to the output port 50 through the specific metallization region on the second metal layer.
[0083] In this circuit, multiple fifth transistors 215 are arranged along a third direction on one side of the third conductive ground hole 403, and multiple sixth transistors 216 are arranged along a third direction on the other side of the third conductive ground hole 403. By dividing the transistors in the first amplifier circuit 110 into two rows, with each row of transistors arranged along a third direction on one side of the third conductive ground hole 403, the compactness of the transistor and ground hole 403 layout in the first amplifier circuit 110 can be improved.
[0084] In this configuration, a third direction is parallel to either the first or second direction, the second direction intersects the first direction, and the output port 50 of the RF power amplifier is positioned along the second direction of the plurality of transistors. For example, as shown... Figure 13 As shown, a third direction intersects (e.g., is perpendicular to) the first direction, and the third direction is parallel to the second direction. At least one fifth transistor 215 and at least one sixth transistor 216 are arranged along the first direction, and a third conductive ground hole 403 is provided between the at least one fifth transistor 215 and at least one sixth transistor 216 arranged along the first direction.
[0085] Optionally, when there are at least two third conductive ground holes 403, the at least two third conductive ground holes 403 are arranged along the first direction, and at least one fifth transistor 215 or at least one sixth transistor 216 is disposed between the two third conductive ground holes 403 arranged along the first direction. By arranging the transistors and ground holes 403 alternately in the first direction, the heat generated by the transistors can be conducted away more efficiently through the ground holes 403 disposed adjacent to the transistors, which helps to dissipate heat from the transistors. By distributing ground holes 403 between adjacent transistors, the distance between the transistors disposed on both sides of the ground holes 403 is larger, which can prevent thermal coupling between different transistors when the transistors are disposed close together, which would increase the thermal resistance of the transistors and thus affect the performance of the RF power amplifier.
[0086] For example, such as Figure 13 As shown, the sum of the number of fifth transistors 215 and the number of sixth transistors 216 in the first amplifier circuit 110 is less than [a certain value]. Figure 11 The number of transistors 21 in the second amplifier circuit 120. By dividing the transistors in the first amplifier circuit 110 into two rows, with each row of transistors arranged along a third direction on one side of the third conductive ground via 403, the compactness of the transistor and ground via layout in the first amplifier circuit 110 can be improved, and it is convenient to arrange other circuits, such as impedance matching circuits, in the area adjacent to the area corresponding to the first amplifier circuit 110.
[0087] In some implementations, the output power of the RF power amplifier is greater than or equal to 0.5 watts, and / or the RF power amplifier is used to amplify RF signals in satellite communication bands or drone communication bands.
[0088] The RF power amplifier increases the overall output power of the amplifier by connecting multiple transistors 21 in parallel. These transistors 21 can share the current and power load. For example, the output power of the RF power amplifier is greater than or equal to 1 watt. For example, the RF power amplifier can be used to amplify RF signals in one or more of the following frequency bands: 433MHz, 900MHz, 2.4GHz, 5.8GHz, 840.5-845MHz, 1430-1444MHz, L-band (1.0GHz-2.0GHz), S-band (2.0GHz-4.0GHz), C-band (4.0GHz-8.0GHz), X-band (8.0GHz-12.0GHz), and Ku-band (12GHz to 18GHz); however, it is not limited to these.
[0089] In some embodiments, the RF power amplifier is used to amplify RF signals in the WiFi band, and / or the RF power amplifier is used to amplify RF signals after high-order quadrature amplitude modulation. Due to the signal modulation methods in the WiFi band (such as quadrature frequency division multiplexing, quadrature phase shift keying, 16-quadrature amplitude modulation, 64-quadrature amplitude modulation), the linearity of RF power amplifiers operating in the WiFi band or used to amplify RF signals after high-order quadrature amplitude modulation is easily affected by temperature; that is, RF power amplifiers operating in the WiFi band and / or used to amplify RF signals after high-order quadrature amplitude modulation are relatively sensitive to temperature. The RF power amplifier in this embodiment, by arranging transistors 21 and ground vias 40 alternately in the first direction, and by using ground vias 40 adjacent to transistors 21 to more efficiently conduct away the heat generated by transistors 21, can prevent excessive temperature from reducing the linearity of the RF power amplifier.
[0090] In some embodiments, the operating frequency band of the RF power amplifier includes frequencies greater than or equal to 1 GHz. For example, by arranging the ground via 40 and the plurality of transistors 21 in a first direction and positioning the output port 50 in a second direction of the plurality of transistors 21, the parasitic capacitance between the output port 50 and the ground via 40 can be reduced, and the effect of the parasitic capacitance between the ground via 40 and the output port 50 on the impedance of high-frequency signals can be reduced or prevented, thereby improving the performance of the RF power amplifier when processing higher-frequency RF signals.
[0091] The radio frequency power amplifier provided in this application includes a substrate 10, a device layer 20, and a first metal layer 31. The substrate 10 includes a first surface 11 and a second surface 12 opposite to each other. The second surface 12 is provided with a grounding metal film 102 for grounding. The device layer 20 includes a plurality of transistors 21 formed on the first surface 11, and the plurality of transistors 21 are arranged along a first direction. The first metal layer 31 is formed on the side of the device layer 20 away from the substrate 10. The first metal layer 31 is provided with metal electrodes 201 corresponding to each end of the transistors 21. The first metal layer 31 also includes at least one first metallization region 311. The first metallization region 311 is connected to the grounding metal film 102 through a ground via 40 penetrating the device layer 20 and the substrate 10. A ground via 40 is provided between at least two adjacent transistors 21. And / or, the number of ground vias 40 is at least two, and at least two ground vias 40 are arranged along the first direction. At least one transistor 21 is disposed between the two ground vias 40 arranged along the first direction. By arranging transistors 21 and ground holes 40 alternately in the first direction, the heat generated by transistors 21 can be conducted away more efficiently through the ground holes 40 adjacent to transistors 21, which helps to dissipate heat from transistors 21. By setting ground holes 40 between adjacent transistors 21, the distance between transistors 21 on both sides of the ground holes 40 is larger, which can prevent thermal coupling between different transistors 21 when they are placed close together, which would increase the thermal resistance of transistors 21 and thus affect the performance of the RF power amplifier.
[0092] Please refer to the foregoing embodiments. Figure 14 ,like Figure 14 The diagram shown is a schematic block diagram of a radio frequency front-end module provided in an embodiment of this application; the radio frequency front-end module includes the aforementioned radio frequency power amplifier.
[0093] In some implementations, the RF front-end module may also include at least one RF switch, low-noise amplifier, filter, etc., which can be integrated into a single module to improve integration and performance and reduce size.
[0094] In some implementations, such as Figure 15 As shown, the radio frequency front-end module includes a substrate and radio frequency front-end circuits arranged on the substrate 200. The radio frequency front-end circuits may include switching circuits, filters, low-noise amplifiers and radio frequency power amplifiers between the radio frequency receiving port RX, the radio frequency transmitting port TX and the antenna port, and form a radio frequency signal transmission path through the above radio frequency devices.
[0095] The RF front-end circuit can choose to send RF signals to the antenna port or receive RF signals from the antenna port to perform amplification, filtering and other processing of RF analog signals.
[0096] In one implementation, the RF front-end module may include multiple chips, at least one of which is an RF power amplifier chip integrating the aforementioned RF power amplifier. Furthermore, the RF front-end module may also include at least one other chip such as a low-noise amplifier chip, a control chip, a switching chip, or a filter chip.
[0097] For example, different chips can be manufactured using different processes. For instance, low-noise amplifier chips and control chips can be manufactured using at least one of silicon-on-insulator (SOI) technology, high-electron-mobility transistor (HEMT) technology, and pseudomorphic HEMT (PHEMT) technology. Radio frequency power amplifier chips can be manufactured using HBT (heterojunction bipolar transistor) technology, also known as HBT chips, and control chips can be manufactured using CMOS technology, also known as CMOS chips.
[0098] For example, the RF front-end module may also include a filter chip, which may integrate one or more filters to form a single filter, duplexer or multiplexer for filtering RF signals.
[0099] The specific principle and implementation of the RF front-end module provided in this application embodiment are similar to those of the RF power amplifier in the aforementioned embodiment, and will not be repeated here.
[0100] Please refer to the foregoing embodiments. Figure 16 ,like Figure 16 The diagram shown is a schematic block diagram of an electronic device according to another embodiment of this application. The electronic device includes the aforementioned radio frequency power amplifier; or includes the aforementioned radio frequency front-end module.
[0101] The electronic device can be a mobile phone, tablet computer, vehicle terminal, or other communication device. Of course, it can also be other communication devices with communication functions. The embodiments of this application do not limit the specific types of electronic devices.
[0102] The specific principles and implementation methods of the electronic devices provided in this application are similar to those of the radio frequency power amplifiers or radio frequency front-end modules in the foregoing embodiments, and will not be repeated here.
[0103] It should be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application.
[0104] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion.
[0105] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.
[0106] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0107] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A radio frequency power amplifier, characterized in that, The radio frequency power amplifier includes: The substrate includes opposing first and second surfaces, wherein a grounding metal thin film for grounding is disposed on the second surface; A device layer, the device layer including a plurality of transistors formed on the first surface, wherein the plurality of transistors are arranged along a first direction; A first metal layer is formed on the side of the device layer away from the substrate. The first metal layer has metal electrodes corresponding to each end of the transistor. The first metal layer also includes at least one first metallization region, which is connected to the ground metal film through a ground hole penetrating the device layer and the substrate. Wherein, at least two adjacent transistors are provided with ground vias; and / or, the number of ground vias is at least two, and at least two ground vias are arranged along the first direction, and at least one transistor is disposed between two ground vias arranged along the first direction.
2. The radio frequency power amplifier according to claim 1, characterized in that, The plurality of transistors and the plurality of ground vias are arranged along the first direction, wherein a transistor is disposed between at least two adjacent ground vias, and / or a plurality of transistors are disposed between at least two adjacent ground vias.
3. The radio frequency power amplifier according to claim 1, characterized in that, The radio frequency power amplifier further includes a second metal layer disposed at a distance from the first metal layer; A second metallization region is formed on the second metal layer. The first ends of the plurality of transistors are respectively connected to the second metallization region through corresponding metal electrodes and first vias. Each first metallization region is connected to the second metallization region through a corresponding second via.
4. The radio frequency power amplifier according to claim 1, characterized in that, The radio frequency power amplifier further includes a second metal layer, and the first metal layer and the second metal layer are formed with a first metal trace for transmitting radio frequency signals and a second metal trace for transmitting bias signals. The first metal trace and the second metal trace are both disposed on the same side of the plurality of transistors disposed along the first direction; the third terminals of the plurality of transistors disposed along the first direction are connected to the first metal trace and the second metal trace; Wherein, the first metal trace is formed on the first metal layer, and the second metal trace is formed at least on the second metal layer; or, the first metal trace is formed on the second metal layer, and the second metal trace is formed at least on the first metal layer.
5. The radio frequency power amplifier according to claim 1, characterized in that, The radio frequency power amplifier also includes: An output port is connected to the second end of the transistor and is disposed in a second direction of the plurality of transistors, the second direction intersecting the first direction.
6. The radio frequency power amplifier according to claim 5, characterized in that, The two outermost transistors among the plurality of transistors arranged along the first direction are equidistant from the output port.
7. The radio frequency power amplifier according to claim 6, characterized in that, The projections of the plurality of transistors arranged along the first direction onto the plane where the output port is located are symmetrical about a first virtual line, the first virtual line being the line where the center of the projection and the center of the output port are located.
8. The radio frequency power amplifier according to claim 5, characterized in that, The plurality of transistors arranged along the first direction are all equidistant from the output port.
9. The radio frequency power amplifier according to claim 8, characterized in that, The projections of the plurality of transistors arranged along the first direction onto the second virtual straight line are located within the projection area of the output port onto the second virtual straight line, which is parallel to the first direction.
10. The radio frequency power amplifier according to claim 5, characterized in that, The plurality of transistors includes a plurality of first transistors and a plurality of second transistors, the plurality of first transistors being arranged along the first direction on a first side of the output port, and the plurality of second transistors being arranged along the first direction on a second side of the output port, the first side and the second side being opposite sides; The ground hole includes a first ground hole and a second ground hole, wherein the first ground hole is disposed between two adjacent first transistors and the second ground hole is disposed between two adjacent second transistors.
11. The radio frequency power amplifier according to claim 10, characterized in that, The output port includes a first output port, a plurality of first transistors arranged along the first direction on a first side of the first output port, and a plurality of second transistors arranged along the first direction on a second side of the first output port; The first output port, the first transistor, the first ground hole, the second transistor, and the second ground hole are disposed in a first region of the substrate; The output port further includes a second output port, and the plurality of transistors further includes a plurality of third transistors and a plurality of fourth transistors. The plurality of third transistors are arranged along the first direction on a first side of the second output port, and the plurality of fourth transistors are arranged along the first direction on a second side of the second output port. The ground via further includes a third ground via and a fourth ground via. The third ground via is disposed between adjacent third transistors, and the fourth ground via is disposed between adjacent fourth transistors. The second output port, the third transistors, the third ground via, the fourth transistors, and the fourth ground via are disposed in a second region of the substrate.
12. The radio frequency power amplifier according to claim 11, characterized in that, The second terminals of the plurality of first transistors and the second terminals of the plurality of second transistors are all connected to the first output port; the second terminals of the plurality of third transistors and the second terminals of the plurality of fourth transistors are all connected to the second output port; The metal traces in the radio frequency power amplifier include a first trace, a second trace, a third trace, and a fourth trace. The first trace is disposed along the first direction on the side of the first transistor away from the first output port. The second trace is disposed along the first direction on the side of the second transistor away from the first output port. The third trace is disposed along the first direction on the side of the third transistor away from the second output port. The fourth trace is disposed along the first direction on the side of the fourth transistor away from the second output port. The third terminals of a plurality of first transistors are connected to the first trace, the third terminals of a plurality of second transistors are connected to the second trace, the third terminals of a plurality of third transistors are connected to the third trace, and the third terminals of a plurality of fourth transistors are connected to the fourth trace.
13. The radio frequency power amplifier according to claim 12, characterized in that, The first trace, the second trace, the third trace, and the fourth trace are first metal traces used to transmit radio frequency signals; The first trace and the second trace are connected to input a first radio frequency (RF) signal, the first output port is used to output the first RF signal processed by the first transistor and the second transistor, the third trace and the fourth trace are connected to input a second RF signal, and the second output port is used to output the second RF signal processed by the third transistor and the fourth transistor.
14. The radio frequency power amplifier according to claim 13, characterized in that, The second radio frequency signal and the first radio frequency signal are differential signals.
15. The radio frequency power amplifier according to claim 13, characterized in that, The first end of the first trace is connected to the first end of the second trace via a first connecting line, and the midpoint of the first connecting line is used to input the first radio frequency signal. The first end of the third trace is connected to the first end of the fourth trace via a second connecting line, and the midpoint of the second connecting line is used to input the second radio frequency signal.
16. The radio frequency power amplifier according to claim 12, characterized in that, The first trace, the second trace, the third trace, and the fourth trace are first metal traces used to transmit radio frequency signals; The first trace, the second trace, the third trace, and the fourth trace are connected to input a third radio frequency signal. The first output port is used to output the radio frequency signal processed by the first transistor and the second transistor. The second output port is used to output the radio frequency signal processed by the third transistor and the fourth transistor. The first output port is connected to the second output port.
17. The radio frequency power amplifier according to claim 16, characterized in that, The first end of the first trace is connected in sequence to the first end of the second trace, the first end of the third trace, and the first end of the fourth trace via a third connecting line. The midpoint of the third connecting line is used to input the third radio frequency signal.
18. The radio frequency power amplifier according to any one of claims 5-17, characterized in that, The ground via disposed between adjacent transistors is a first conductive ground via. The radio frequency power amplifier also includes a second conductive ground via connected to the ground metal film. The first metal layer also includes a third metallization region, which is connected to the ground metal film through at least one of the second conductive vias. At least one of the plurality of transistors arranged along the first direction has its first end connected to the third metallization region via a corresponding metal electrode; The second conductive ground via is disposed between the output port and the transistor connected to the third metallized region.
19. The radio frequency power amplifier according to claim 18, characterized in that, The size of the second conductive ground hole is smaller than the size of the first conductive ground hole.
20. The radio frequency power amplifier according to any one of claims 5-17, characterized in that, The radio frequency power amplifier is integrated within a chip, which is used to connect to a substrate via bonding wires, and the output port is used to connect the bonding wires.
21. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The radio frequency power amplifier includes a first amplification circuit and a second amplification circuit, wherein the second amplification circuit is used to process the radio frequency signal amplified by the first amplification circuit; the first amplification circuit and the second amplification circuit each include a plurality of transistors; At least two ground vias corresponding to the transistors in the first amplifier circuit, each having its first metallized region spaced apart; and / or At least two ground holes corresponding to the transistors in the second amplifier circuit are connected through the first metallization region.
22. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The radio frequency power amplifier includes a first amplification circuit and a second amplification circuit. The first amplification circuit and the second amplification circuit each include a plurality of transistors. The number of transistors in the first amplification circuit is less than the number of transistors in the second amplification circuit. In the first amplifier circuit, among the plurality of transistors, the transistors arranged along the first direction are disposed between the two ground holes arranged along the first direction; In the second amplifier circuit, at least two adjacent transistors are provided with a ground hole.
23. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The first metal layer further includes a fourth metallization region, which is connected to the grounded metal film through at least one third conductive ground via; The radio frequency power amplifier includes a first amplification circuit and a second amplification circuit. The second amplification circuit includes a plurality of transistors arranged along a first direction for processing the radio frequency signal amplified by the first amplification circuit. The first amplifier circuit includes a plurality of fifth transistors and a plurality of sixth transistors, wherein the plurality of fifth transistors are arranged along a third direction on one side of the third conductive ground via, and the plurality of sixth transistors are arranged along the third direction on the other side of the third conductive ground via; Wherein, the third direction is parallel to the first direction or parallel to the second direction, the first end of the fifth transistor and the first end of the sixth transistor are respectively connected to the fourth metallization region through corresponding metal electrodes, the second direction intersects the first direction, and the output port of the RF power amplifier is arranged in the second direction of the plurality of transistors; The sum of the number of the fifth transistor and the number of the sixth transistor is less than the number of transistors in the second amplifier circuit.
24. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The output power of the radio frequency power amplifier is greater than or equal to 0.5 watts, and / or the radio frequency power amplifier is used to amplify radio frequency signals in the satellite communication band or the drone communication band.
25. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The radio frequency power amplifier is used to amplify radio frequency signals in the WiFi band, and / or the radio frequency power amplifier is used to amplify radio frequency signals after high-order quadrature amplitude modulation.
26. The radio frequency power amplifier according to any one of claims 1-17, characterized in that, The operating frequency band of the radio frequency power amplifier includes frequencies greater than or equal to 1 GHz.
27. A radio frequency front-end module, characterized in that, The radio frequency front-end module includes a radio frequency power amplifier as described in any one of claims 1 to 26.
28. An electronic device, characterized in that, The electronic device includes a radio frequency power amplifier as described in any one of claims 1 to 26, or includes a radio frequency front-end module as described in claim 27.