Method and system for simulating internal noise of slave clock in master-slave synchronous network

Abstract

The invention relates to a method and a system for simulating internal noise of a slave clock in a master-slave synchronization network in the technical field of clock synchronization. The method comprises the following steps: establishing a first equivalent model and a second equivalent model; generating a first phase-locked loop output power spectral density function based on the first equivalent model, and generating a second phase-locked loop output power spectral density function based on the second equivalent model; calculating equivalent loop bandwidth conditions of the first equivalent model and the second equivalent model; a second phase-locked loop output power spectral density function is updated by using a loop bandwidth condition, a gain coefficient and a slave clock bandwidth of a second equivalent model are calculated by using a TDEV template and an MTIE template, and the second phase-locked loop output power spectral density function is updated for the second time to obtain a noise generation time domain function; the problem that the stability of the slave clock cannot be accurately simulated due to the fact that the MTIE corresponding to the generated time domain noise exceeds the limit of the MTIE template because only the TDEV template is considered and the MTIE template is not considered in the existing method for simulating the internal noise of the slave clock is solved.

Description

Technical Field

[0001] This invention relates to the field of clock synchronization technology, and more specifically to a method and system for simulating internal noise of a slave clock in a master-slave synchronization network. Background Technology

[0002] Master-slave clock synchronization is the most widely used method in the deployment of Synchronous Digital Hierarchy (SDH) transmission networks. Master-slave synchronization networks employ a clock hierarchy: the highest level is implemented using a high-precision oscillator, typically employing an atomic frequency standard, which exhibits excellent short-term and long-term frequency stability; the reference timing signal generated by the highest-level clock is distributed downwards in a tree structure, allowing each clock in the entire synchronization network to trace back to the highest-level clock via a clock chain. In the synchronization network, the highest-level clock is called the Primary Reference Clock (PRC), such as... Figure 1 As shown, except for PRC, all clocks in the chain are slave clocks. The slave clocks achieve phase-locked output timing signals with input reference signals from higher or same levels through a phase-locked loop system.

[0003] In the synchronization technology of SDH transmission networks, two basic slave clock schemes are mainly adopted: one is the Synchronization Supply Unit (SSU), which is responsible for providing time reference signals to all devices within the network node; the other is the SDH Equipment Clock (SEC) built into each network unit. Because noise within the slave clock oscillator and changes in dielectric temperature can cause unnecessary jitter and drift in the timing signal within the SDH transmission synchronization network chain, an internal noise model of the slave clock needs to be established to calculate the accumulated jitter and drift at the end of a typical synchronization distribution chain.

[0004] The accuracy of the internal noise model of a clock depends on whether it can accurately simulate the stability of the clock. Its stability is mainly characterized by two key indicators: time deviation (TDEV) and maximum time interval error (MTIE).

[0005] Current methods for simulating internal clock noise rely solely on the TDEV template. They involve time-domain sampling of the known TDEV template, calculating the signal power spectrum using the conversion relationship between TDEV and power spectrum, and then performing interpolation, adding phase information, and inverse Fourier transform on the power spectrum to obtain the time-domain noise sequence. Because this method derives the time-domain noise sequence from a known TDEV template—a method based on known frequency domain information—it involves computationally complex operations such as sampling, interpolation, and inverse Fourier transform. Furthermore, this method only considers the TDEV template and neglects the MTIE template in the calculation. Therefore, the MTIE corresponding to the generated time-domain noise may exceed the MTIE template limit, thus affecting the stability of the slave clock. Summary of the Invention

[0006] This invention addresses the shortcomings of existing technologies by providing a method and system for simulating the internal noise of a slave clock in a master-slave synchronization network. It solves the problem that existing methods for simulating the internal noise of a slave clock only consider the TDEV template and do not consider the MTIE template, which leads to the MTIE corresponding to the generated time-domain noise exceeding the MTIE template limit, thus failing to accurately simulate the stability of the slave clock.

[0007] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0008] A method for simulating internal noise in a slave clock in a master-slave synchronization network includes the following steps:

[0009] A first equivalent model for noise introduced by the phase-locked loop and a second equivalent model for noise from the clock power spectrum are established.

[0010] The first phase-locked loop output power spectral density function is generated based on the first equivalent model, and the second phase-locked loop output power spectral density function is generated based on the second equivalent model.

[0011] Based on the output power spectral density function of the first phase-locked loop and the output power spectral density function of the second phase-locked loop, calculate the loop bandwidth conditions equivalent to the first equivalent model and the second equivalent model.

[0012] The output power spectral density function of the second phase-locked loop is updated using the loop bandwidth condition, and the gain coefficient and clock bandwidth of the second equivalent model are calculated using the TDEV template and MTIE template. The output power spectral density function of the second phase-locked loop is updated twice using the gain coefficient and clock bandwidth to obtain the noise generation time domain function.

[0013] The noise source is input into the second equivalent model, and the noise generation time-domain function is used to output the time-domain sequence of noise from inside the clock.

[0014] Optionally, generating the first phase-locked loop output power spectral density function based on the first equivalent model includes the following steps:

[0015] The first equivalent model includes a phase detector, a loop filter, and a voltage-controlled oscillator. The output of the phase detector is connected to the input of the loop filter, and the output of the loop filter is connected to the input of the voltage-controlled oscillator.

[0016] Based on the first equivalent model, the first power spectral density function corresponding to phase-locked loop one and the second power spectral density function corresponding to phase-locked loop two are generated in the first equivalent model.

[0017] The first phase-locked loop output power spectral density function includes a first power spectral density function and a second power spectral density function.

[0018] Optionally, generating the second phase-locked loop output power spectral density function based on the second equivalent model includes the following steps:

[0019] The second equivalent model includes a first Gaussian noise generator, a first gain amplifier, a filter one, a filter two, a second Gaussian noise generator, a second gain amplifier, and a filter three. The first Gaussian noise generator, the first gain amplifier, the filter one, and the filter two are connected in series. The second Gaussian noise generator, the second gain amplifier, and the filter three are connected in series. The output terminals of the filter two and the filter three have a common output.

[0020] Based on the second equivalent model, the third power spectral density function corresponding to the output of filter two is generated, and the fourth power spectral density function corresponding to the output of filter three is generated.

[0021] The second phase-locked loop output power spectral density function includes a third power spectral density function and a fourth power spectral density function.

[0022] Optionally, calculating the loop bandwidth conditions equivalent to the first and second equivalent models includes the following steps:

[0023] The first power spectral density function and the third power spectral density function are equivalently combined, and the second power spectral density function and the fourth power spectral density function are equivalently combined.

[0024] Based on the constraints of two sets of equivalent simultaneous equations to obtain the loop bandwidth, the loop bandwidth condition is obtained.

[0025] Optionally, the expression for the output power spectral density function of the first phase-locked loop is:

[0026] Where c and k are the noise amplitude constants; This represents the first power spectral density value; This represents the second power spectral density value; f represents the frequency. This represents the gain factor of the voltage-controlled oscillator. This represents the gain factor of the phase detector. Represents the transfer function of the loop filter;

[0027] The expression for the output power spectral density function of the second phase-locked loop is:

[0028] ,in, The amplitude of the noise power spectral density; This is the third power spectral density value. This represents the gain coefficient of the first gain amplifier. and These correspond to the transfer functions of filter one and filter two, respectively. This is the fourth power spectral density value. This represents the gain coefficient of the second gain amplifier. Let be the transfer function of filter 3.

[0029] Optionally, the loop bandwidth condition is: ,in, K represents the loop bandwidth; K0 represents the gain factor of the voltage-controlled oscillator; K d This represents the gain factor of the phase detector.

[0030] Optionally, the gain coefficient and clock bandwidth of the second equivalent model are calculated using the TDEV template and MTIE template, including the following steps:

[0031] Substituting the third power spectral density function and the fourth power spectral density function into the TDVE template respectively, we obtain the first time deviation function and the second time deviation function respectively. Both the first time deviation function and the second time deviation function are approximate expressions of the time deviation with respect to the integration time.

[0032] Substituting the third power spectral density function and the fourth power spectral density function into the MTIE template respectively, we obtain the first maximum time interval error function and the second maximum time interval error function respectively. The first maximum time interval error function and the second maximum time interval error function are both approximate expressions of the maximum time interval error with respect to the integration time.

[0033] Obtain the approximate value of the time deviation when it reaches its extreme value during integration, and substitute it into the first time deviation function, the second time deviation function, the first maximum time interval error function, and the second maximum time interval error function to obtain the gain coefficient and the slave clock bandwidth.

[0034] Optionally, the following steps may also be included:

[0035] The stability of the noise generation time-domain function was verified by simulation.

[0036] A system for simulating noise inside a slave clock in a master-slave synchronization network, the system performing a method for simulating noise inside a slave clock in a master-slave synchronization network as described in any of the preceding claims, comprising a model building unit, a function generation unit, a first calculation unit, a second calculation unit, and a noise generation unit;

[0037] The model building unit is used to establish a first equivalent model of noise introduced by the phase-locked loop and a second equivalent model of noise from the clock power spectrum.

[0038] The function generation unit is used to generate a first phase-locked loop output power spectral density function based on the first equivalent model, and to generate a second phase-locked loop output power spectral density function based on the second equivalent model.

[0039] The first calculation unit is used to calculate the loop bandwidth conditions equivalent to the first equivalent model and the second equivalent model based on the first phase-locked loop output power spectral density function and the second phase-locked loop output power spectral density function.

[0040] The second calculation unit is used to update the output power spectral density function of the second phase-locked loop using the loop bandwidth condition, and to calculate the gain coefficient and slave clock bandwidth of the second equivalent model using the TDEV template and the MTIE template. The second phase-locked loop output power spectral density function is updated twice using the gain coefficient and slave clock bandwidth to obtain the noise generation time domain function.

[0041] The noise generation unit is used to input a noise source into the second equivalent model and output a time-domain sequence of noise from inside the clock based on the noise generation time-domain function.

[0042] A computer storage medium storing computer program instructions, which, when executed by a processor, implement a method for simulating internal noise of a slave clock in a master-slave synchronization network as described in any of the preceding claims.

[0043] Compared with the prior art, the technical solution provided by this invention has the following advantages:

[0044] By establishing a second equivalent model that is equivalent to the first equivalent model through loop bandwidth conditions, the computationally complex method of Fourier transform is avoided when generating the time-domain sequence of noise inside the clock, thus reducing the complexity of simulating noise inside the clock on the device or software platform. On the other hand, by simultaneously introducing the TDEV template and the MTIE template to calculate the gain coefficient and the clock bandwidth of the second equivalent model, and using the gain coefficient and the clock bandwidth to update the output power spectral density function of the second phase-locked loop twice, the noise generation time-domain function is obtained, thereby ensuring that the generated time-domain noise can accurately simulate the stability of the clock. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 This is a schematic diagram of a typical existing master-slave synchronization network architecture;

[0047] Figure 2 This is a flowchart of a method for simulating internal noise of a slave clock in a master-slave synchronization network, as proposed in Embodiment 1.

[0048] Figure 3 The first equivalent model for introducing noise into the phase-locked loop established in this embodiment 1;

[0049] Figure 4 This is the second equivalent model of clock power spectrum noise established in this embodiment;

[0050] Figure 5 A schematic diagram illustrating the generation of a time-domain sequence of internal clock noise from the second equivalent model proposed in Embodiment 1.

[0051] Figure 6 This is the time-domain noise sequence generated when the slave clock is SSU, as proposed in Embodiment 1.

[0052] Figure 7 This is a comparison chart showing the stability verification when the slave clock is SSU, as proposed in Embodiment 1.

[0053] Figure 8 This is the time-domain noise sequence generated when the slave clock is SEC, as proposed in Embodiment 1.

[0054] Figure 9 This is a comparison chart showing the stability verification when the slave clock is SEC, as proposed in Embodiment 1. Detailed Implementation

[0055] The present invention will be further described in detail below with reference to the embodiments. The following embodiments are explanations of the present invention, but the present invention is not limited to the following embodiments.

[0056] Example 1

[0057] First, since the primary function of the slave clock is to synchronize its internal clock with the input synchronization signal, and this function is achieved in one way through a phase-locked loop (PLL), this invention is modeled based on this operating mode. For a PLL, if the input signal contains additional noise, the loop will remove the noise as much as possible and reproduce the original signal, thus synchronizing the output signal with the input signal. Therefore, the phase-locked loop can be viewed as a filter that functions by transmitting the signal and suppressing noise.

[0058] like Figure 2 As shown, a method for simulating internal noise of the slave clock in a master-slave synchronization network includes the following steps: First, establish as shown... Figure 3 The first equivalent model of noise introduced by the phase-locked loop shown, and as follows Figure 4 The second equivalent model of clock power spectral noise is shown. The first equivalent model includes a phase detector, a loop filter, and a voltage-controlled oscillator. The output of the phase detector is connected to the input of the loop filter, and the output of the loop filter is connected to the input of the voltage-controlled oscillator. The second equivalent model includes a first Gaussian noise generator, a first gain amplifier, filter one, filter two, a second Gaussian noise generator, a second gain amplifier, and filter three. The first Gaussian noise generator, the first gain amplifier, filter one, and filter two are connected in series. The second Gaussian noise generator, the second gain amplifier, and filter three are connected in series. The outputs of filter two and filter three are the same.

[0059] Next, the output power spectral density function of the first phase-locked loop is generated based on the first equivalent model. Specifically, this includes the following steps: Based on the first equivalent model, the first power spectral density function corresponding to phase-locked loop one and the second power spectral density function corresponding to phase-locked loop two in the first equivalent model are generated; wherein, the output power spectral density function of the first phase-locked loop includes the first power spectral density function and the second power spectral density function.

[0060] More specifically, such as Figure 3 As shown, pure flicker phase noise is generated at the output terminal A of the phase detector, and white phase noise is generated at the output terminal B of the voltage-controlled oscillator (VCO), where c and k are noise amplitude constants. and Let A and B be the output power spectral densities at points A and B of the phase-locked loop, respectively, which can be expressed by the following formula:

[0061] First power spectral density function: ;

[0062] Second power spectral density function: ;in, This represents the first power spectral density value, which is the power spectral density output at point A of the phase-locked loop as described above. This represents the second power spectral density value, which is the power spectral density output at point B of the phase-locked loop as described above; f represents the frequency. This represents the gain factor of the voltage-controlled oscillator. This represents the gain factor of the phase detector. This represents the transfer function of the loop filter.

[0063] After generating the first phase-locked loop output power spectral density function, the second phase-locked loop output power spectral density function is generated based on the second equivalent model. Specifically, the following steps are included: based on the second equivalent model, the third power spectral density function corresponding to the output of filter two is generated, and the fourth power spectral density function corresponding to the output of filter three is generated; wherein, the second phase-locked loop output power spectral density function includes the third power spectral density function and the fourth power spectral density function.

[0064] More specifically, such as Figure 4 As shown, the power spectral density of the Gaussian white noise source is set to... , Let be the amplitude of the noise power spectral density. The power spectral density (i.e., the third power spectral density function) output from the upper branch Gaussian white noise source after passing through the first gain amplifier, filter A, and filter B is:

[0065] ;

[0066] The power spectral density (i.e., the fourth power spectral density function) output from the lower branch Gaussian white noise source after passing through the second gain amplifier and filter C is:

[0067] ,in, This is the third power spectral density value. This represents the gain coefficient of the first gain amplifier. and These correspond to the transfer functions of filter one and filter two, respectively. This is the fourth power spectral density value. This represents the gain coefficient of the second gain amplifier. Let be the transfer function of filter 3.

[0068] Next, the loop bandwidth conditions equivalent to the first and second equivalent models are calculated, including the following steps: the first power spectral density function and the third power spectral density function are equivalently combined, and the second power spectral density function and the fourth power spectral density function are equivalently combined; based on the two sets of equivalent combinations, the loop bandwidth constraints are obtained, and the loop bandwidth conditions are obtained.

[0069] Specifically, based on the expressions for the third and fourth power spectral density functions, the transfer function of filter A is known to be expressed as:

[0070] ,in, All are filter-level contact numbers, where s is a complex frequency, satisfying: . The transfer function in the frequency domain. This refers to the transfer function in the Laplace transform; the two are interchangeable, both essentially describing the transfer function of a filter. (The rest of the text will discuss this further.) and This is true for all of them.

[0071] Since filter A is essentially a half-order integrator, it can be approximated as: ,in, , where are the filter coefficients; the transfer function of filter B is expressed as: The transfer function of filter C is expressed as: ,in, w is the loop bandwidth from the clock.

[0072] Therefore, based on the transfer functions of filter one, filter two, and filter three, we can further simplify to obtain:

[0073] The third power spectral density function is: ;

[0074] The fourth power spectral density function is: .

[0075] Therefore, the simplified third power spectral density function is equivalent to the first power spectral density function, and the fourth power spectral density function is equivalent to the second power spectral density function, ultimately yielding the equivalent conditions:

[0076] Therefore, it can be seen that the clock internal noise generation model (second equivalent model) of the present invention can be equivalent to the model for a specific loop bandwidth. A model for simulating specific noise generated by a first-order phase-locked loop (first equivalent model).

[0077] After determining the output power spectral density function of the second phase-locked loop in the second equivalent model, the output power spectral density function of the second phase-locked loop is updated using the loop bandwidth condition. The gain coefficient and slave clock bandwidth of the second equivalent model are calculated using the TDEV template and the MTIE template. The output power spectral density function of the second phase-locked loop is updated twice using the gain coefficient and slave clock bandwidth to obtain the noise generation time-domain function.

[0078] The calculation of the gain coefficient and slave clock bandwidth of the second equivalent model using the TDEV template and MTIE template includes the following steps: substituting the third and fourth power spectral density functions into the TDEV template to obtain the first time deviation function and the second time deviation function, respectively, where both the first and second time deviation functions are approximate expressions of the time deviation with respect to the integration time; substituting the third and fourth power spectral density functions into the MTIE template to obtain the first maximum time interval error function and the second maximum time interval error function, where both the first and second maximum time interval error functions are approximate expressions of the maximum time interval error with respect to the integration time; obtaining the approximate value corresponding to the time deviation taking an extreme value at the integration time, and substituting it into the first time deviation function, the second time deviation function, the first maximum time interval error function, and the second maximum time interval error function to obtain the gain coefficient and slave clock bandwidth.

[0079] Specifically, according to Tables 3 and 6 of the existing technology (ITU-T Recommendation G.812 (2004), Timing requirements of slave clocks suitable for use as node clocks in synchronization networks), the temperature is kept constant (temperature variation less than ±1). Under K), when the slave clock SSU is in locked operating mode, the MTIE template and TDEV template measured at the output terminal; Table 1 and Table 3 of prior art (ITU T Recommendation G.813 (1996), Timing requirements of SDH equipment slave clocks (SEC)) respectively give the temperature constant (temperature change less than ±1) Under K), when the clock SEC is in locked working mode, the MTIE template and TDEV template are measured at the output.

[0080] After obtaining the MTIE template and TDEV template, based on the MTIE template, TDEV template, and the approximate expression for the noise power spectrum:

[0081] ;

[0082] Where τ is the integration time, S out (f) is the noise power spectrum. This represents the TDEV value corresponding to the integration time τ. This represents the MTIE value at integration time τ. The simplified third power spectral density function... and the simplified fourth power spectral density function As S out (f) Substitution From the calculation formula, we can obtain approximate expressions for TDEV in the upper and lower branches respectively:

[0083] ;

[0084] In the formula, The standard deviation of Gaussian white noise. This represents the TDEV value of the upper branch when the integration time is τ. Let τ be the TDEV value of the branch when the integration time is τ.

[0085] Similarly, the simplified third power spectral density function and the simplified fourth power spectral density function Substitution The calculation formula can be used to obtain approximate expressions for MTIE in the upper and lower branches respectively.

[0086] Next, to further determine the gain coefficients and slave clock bandwidth of the two branches, it is necessary to obtain the approximate cases corresponding to the limit values ​​of the TDEV template and MTIE template when the integration time τ takes the limit value. Finally, the extreme value cases are summarized in Table 1 below. The required gain coefficients and slave clock bandwidth are calculated, and then the output power spectral density function of the second phase-locked loop is updated twice using the gain coefficients and slave clock bandwidth to obtain the noise generation time domain function.

[0087] Table 1

[0088]

[0089] After obtaining the time-domain function of noise generation, as follows: Figure 5As shown, a noise source is input into the second equivalent model, and the time-domain sequence of the internal noise from the clock is output based on the noise generation time-domain function. Specifically, firstly, two sets of Gaussian white noise sequences with a mean of 0 and a standard deviation of σ are generated based on a Gaussian white noise generator; then, according to the TDEV template and MTIE template of the clock, the gain values ​​Gain_1, Gain_2 and the clock bandwidth w are calculated with reference to Table 1; next, one set of Gaussian white noise sequences is multiplied by the gain value Gain_1 and then passed through filters A and B in sequence, and the other set of Gaussian white noise sequences is multiplied by the gain value Gain_2 and then passed through filter C; finally, the two sets of sequences are added together to obtain the corresponding time-domain sequence of the internal noise from the clock.

[0090] Finally, the stability of the noise generation time-domain function was verified by simulation. Specifically, when the clock is SSU, Tables 3 and 6 in the prior art show the results for constant temperature (temperature change less than ±1). Under K), when the clock SSU is in locked operating mode, the MTIE and TDEV templates measured at the output are calculated according to the simulation results of the above steps, yielding Gain_1 = 11000, Gain_2 = 3, w = 0.003Hz. The resulting time-domain noise sequence is as follows: Figure 6 As shown. The corresponding TDEV and MTIE values ​​are calculated using the generated time-domain noise sequence and compared with the template for verification. The results are as follows. Figure 7 As shown, by Figure 7 It can be seen that the TDEV and MTIE calculated from the SSU clock noise sequence generated by the method provided by the present invention have a good match with the TDEV and MTIE templates and do not exceed their template limitations.

[0091] When the clock is SEC, Tables 1 and 3 in the prior art 2 respectively show the temperature constant (temperature change less than ±1). Under K), when the clock SEC is in locked operating mode, the MTIE and TDEV templates measured at the output are calculated according to the simulation results of the above steps, yielding Gain_1 = 5953, Gain_2 = 5, and w = 0.003Hz. The resulting time-domain noise sequence is as follows: Figure 8 As shown. The corresponding TDEV and MTIE values ​​are calculated using the generated time-domain noise sequence and compared with the template for verification. The results are as follows. Figure 9 As shown, by Figure 9 It is known that the TDEV and MTIE generated by the method provided by the present invention have a good match with the TDEV template and MTIE template and do not exceed their template limitations.

[0092] Example 2

[0093] A system for simulating noise inside a slave clock in a master-slave synchronization network includes a model building unit, a function generation unit, a first computation unit, a second computation unit, and a noise generation unit.

[0094] The model building unit is used to establish a first equivalent model of noise introduced by the phase-locked loop and a second equivalent model of noise from the clock power spectrum.

[0095] The function generation unit is used to generate the first phase-locked loop output power spectral density function based on the first equivalent model and to generate the second phase-locked loop output power spectral density function based on the second equivalent model.

[0096] The first calculation unit is used to calculate the loop bandwidth conditions equivalent to the first equivalent model and the second equivalent model based on the output power spectral density function of the first phase-locked loop and the output power spectral density function of the second phase-locked loop.

[0097] The second calculation unit is used to update the output power spectral density function of the second phase-locked loop using the loop bandwidth condition, and to calculate the gain coefficient and clock bandwidth of the second equivalent model using the TDEV template and MTIE template. The second phase-locked loop output power spectral density function is updated twice using the gain coefficient and clock bandwidth to obtain the noise generation time domain function.

[0098] The noise generation unit is used to input a noise source into the second equivalent model and output a time-domain sequence of noise from inside the clock based on the noise generation time-domain function.

[0099] Since the system performs the method of simulating the internal noise of the slave clock in the master-slave synchronization network as described in Embodiment 1, it will not be repeated in this embodiment.

[0100] A computer storage medium storing computer program instructions, which, when executed by a processor, implement a method for simulating internal noise of a slave clock in a master-slave synchronization network as described in Embodiment 1.

[0101] More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wire segments, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0102] In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless segments, wire segments, optical cables, RF, etc., or any suitable combination thereof.

[0103] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules, units, or units is merely a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units, modules, or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0104] The units may or may not be physically separate. The components shown as units can be one or more physical units, meaning they can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0105] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0106] In particular, according to embodiments disclosed in this invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication component, and / or installed from a removable medium. When the computer program is executed by a central processing unit (CPU), it performs the functions defined in the methods of this application. It should be noted that the computer-readable medium described above in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof.

[0107] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0108] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions within the technical scope disclosed in the present invention should be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

[0109] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any form or substance. It should be noted that those skilled in the art can make various improvements and additions without departing from the method of the present invention, and these improvements and additions should also be considered within the scope of protection of the present invention. Any modifications, alterations, and equivalent changes made by those skilled in the art based on the above-disclosed technical content without departing from the spirit and scope of the present invention are equivalent embodiments of the present invention. Furthermore, any modifications, alterations, and evolutions made to the above embodiments based on the essential technology of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A method for simulating internal noise of a slave clock in a master-slave synchronization network, characterized in that, Includes the following steps: A first equivalent model for noise introduced by the phase-locked loop and a second equivalent model for noise from the clock power spectrum are established. The first phase-locked loop output power spectral density function is generated based on the first equivalent model, and the second phase-locked loop output power spectral density function is generated based on the second equivalent model. Based on the output power spectral density function of the first phase-locked loop and the output power spectral density function of the second phase-locked loop, calculate the loop bandwidth conditions equivalent to the first equivalent model and the second equivalent model. The output power spectral density function of the second phase-locked loop is updated using the loop bandwidth condition, and the gain coefficient and clock bandwidth of the second equivalent model are calculated using the TDEV template and MTIE template. The output power spectral density function of the second phase-locked loop is updated twice using the gain coefficient and clock bandwidth to obtain the noise generation time domain function. The noise source is input into the second equivalent model, and the noise generation time-domain function is used to output the time-domain sequence of noise from inside the clock.

2. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 1, characterized in that, The first phase-locked loop output power spectral density function is generated based on the first equivalent model, including the following steps: The first equivalent model includes a phase detector, a loop filter, and a voltage-controlled oscillator. The output of the phase detector is connected to the input of the loop filter, and the output of the loop filter is connected to the input of the voltage-controlled oscillator. Based on the first equivalent model, the first power spectral density function corresponding to phase-locked loop one and the second power spectral density function corresponding to phase-locked loop two are generated in the first equivalent model. The first phase-locked loop output power spectral density function includes a first power spectral density function and a second power spectral density function.

3. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 2, characterized in that, The second phase-locked loop output power spectral density function is generated based on the second equivalent model, including the following steps: The second equivalent model includes a first Gaussian noise generator, a first gain amplifier, a filter one, a filter two, a second Gaussian noise generator, a second gain amplifier, and a filter three. The first Gaussian noise generator, the first gain amplifier, the filter one, and the filter two are connected in series. The second Gaussian noise generator, the second gain amplifier, and the filter three are connected in series. The output terminals of the filter two and the filter three have a common output. Based on the second equivalent model, the third power spectral density function corresponding to the output of filter two is generated, and the fourth power spectral density function corresponding to the output of filter three is generated. The second phase-locked loop output power spectral density function includes a third power spectral density function and a fourth power spectral density function.

4. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 3, characterized in that, Calculating the equivalent loop bandwidth conditions for the first and second equivalent models includes the following steps: The first power spectral density function and the third power spectral density function are equivalently combined, and the second power spectral density function and the fourth power spectral density function are equivalently combined. Based on the constraints of two sets of equivalent simultaneous equations to obtain the loop bandwidth, the loop bandwidth condition is obtained.

5. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 4, characterized in that, The expression for the output power spectral density function of the first phase-locked loop is: Where c and k are the noise amplitude constants; This represents the first power spectral density value; This represents the second power spectral density value; f represents the frequency. This represents the gain factor of the voltage-controlled oscillator. This represents the gain factor of the phase detector. Represents the transfer function of the loop filter; The expression for the output power spectral density function of the second phase-locked loop is: ,in, The amplitude of the noise power spectral density; This is the third power spectral density value. This represents the gain coefficient of the first gain amplifier. and These correspond to the transfer functions of filter one and filter two, respectively. This is the fourth power spectral density value. This represents the gain coefficient of the second gain amplifier. Let be the transfer function of filter 3.

6. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 5, characterized in that, The loop bandwidth condition is as follows: ,in, K represents the loop bandwidth; K0 represents the gain factor of the voltage-controlled oscillator; K d This represents the gain factor of the phase detector.

7. The method for simulating internal noise of a slave clock in a master-slave synchronization network according to claim 3, characterized in that, The gain coefficients and clock bandwidth of the second equivalent model are calculated using the TDEV template and MTIE template, including the following steps: Substituting the third power spectral density function and the fourth power spectral density function into the TDVE template respectively, we obtain the first time deviation function and the second time deviation function respectively. Both the first time deviation function and the second time deviation function are approximate expressions of the time deviation with respect to the integration time. Substituting the third power spectral density function and the fourth power spectral density function into the MTIE template respectively, we obtain the first maximum time interval error function and the second maximum time interval error function respectively. The first maximum time interval error function and the second maximum time interval error function are both approximate expressions of the maximum time interval error with respect to the integration time. Obtain the approximate value of the time deviation when it reaches its extreme value during integration, and substitute it into the first time deviation function, the second time deviation function, the first maximum time interval error function, and the second maximum time interval error function to obtain the gain coefficient and the slave clock bandwidth.

8. A method for simulating internal noise of a slave clock in a master-slave synchronization network according to any one of claims 1-7, characterized in that, It also includes the following steps: The stability of the noise generation time-domain function was verified by simulation.

9. A system for simulating internal noise of a slave clock in a master-slave synchronization network, characterized in that, The system performs the method for simulating noise inside a slave clock in a master-slave synchronization network as described in any one of claims 1-8, comprising a model building unit, a function generation unit, a first calculation unit, a second calculation unit, and a noise generation unit; The model building unit is used to establish a first equivalent model of noise introduced by the phase-locked loop and a second equivalent model of noise from the clock power spectrum. The function generation unit is used to generate a first phase-locked loop output power spectral density function based on the first equivalent model, and to generate a second phase-locked loop output power spectral density function based on the second equivalent model. The first calculation unit is used to calculate the loop bandwidth conditions equivalent to the first equivalent model and the second equivalent model based on the first phase-locked loop output power spectral density function and the second phase-locked loop output power spectral density function. The second calculation unit is used to update the output power spectral density function of the second phase-locked loop using the loop bandwidth condition, and to calculate the gain coefficient and slave clock bandwidth of the second equivalent model using the TDEV template and the MTIE template. The second phase-locked loop output power spectral density function is updated twice using the gain coefficient and slave clock bandwidth to obtain the noise generation time domain function. The noise generation unit is used to input a noise source into the second equivalent model and output a time-domain sequence of noise from inside the clock based on the noise generation time-domain function.

10. A computer storage medium, characterized in that, The computer storage medium stores computer program instructions, which, when executed by a processor, implement the method for simulating internal noise of a slave clock in a master-slave synchronization network as described in any one of claims 1-8.

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