Connector without pre-attached solder balls and method of use

Abstract

An electrical connector includes at least three immediately continuous, parallel, linear array of electrical conductors, each electrical conductor further including SMT conductor tails without solder blocks, with each SMT conductor tail being proximate to another SMT conductor tail.

Description

Cross-references to previous applications

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 492,033, filed March 24, 2023; U.S. Provisional Patent Application No. 63 / 508,737, filed June 16, 2023; and U.S. Provisional Patent Application No. 63 / 547,608, filed November 7, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This embodiment generally relates to surface mount technology, wherein a specific embodiment is shown for an electrical connector that does not have pre-attached solder balls. Background Technology

[0003] Unlike dual in-line or flat packages, ball grid array (BGA) interconnects offer a greater number of interconnect conductors or contacts. A large portion of the bottom surface of the interconnect can be covered with multiple conductors or contacts, rather than just distributed around the perimeter of the interconnect or housing.

[0004] like Figures 1 to 8 As shown, in a typical surface mount technology, a ball grid array interconnect structure, such as connector 1, includes a plurality of solder balls 2 pre-attached thereto. Figure 1 As shown, the untreated connector 1 includes multiple electrical conductors 3, each conductor 3 including a pre-attached solder ball 2. Figure 2 As shown, in the processed configuration, the conductor 3 with the corresponding solder ball 2 is shown as reflow and bonded to the board or substrate 4 (e.g., PCB). Figure 3 A cross-section of the treated solder ball 2 between conductor 3 and board 4 (e.g., pad 5) is shown. Due to the use of solder balls 2 pre-attached to conductor 3, their shape / attachment / signal strength can create problems related to the structure / processing of untreated solder balls 2 attached to conductor 3 and / or treated solder balls 2 flowing back to board 4. This can lead to warped shapes, flux residue, improper wetting, incorrect flux ratios, irregular coplanarity, high scrap rates, machining counterweights required for long-term part positioning, difficulty in inspection, customer quality issues, deformed solder balls, unreliable signal integrity performance, minimal clearance, poor visual appearance, and / or machining counterweights required for long-term part positioning. For example, Figure 4 A typical untreated solder ball 2 is shown, deformed when attached to conductor 3. Furthermore, as... Figure 5 As shown, the treated solder ball 2 can provide a reduced minimum gap and / or contact therebetween, which is detrimental to signal integrity. Figure 6 This shows a poor attachment of a typical treated solder ball 2 (e.g., the solder ball does not coalesce upwards or does not bond with the anti-core coating). Figure 7The undesirable shape of the convex outer periphery is shown, in which the bond strength of a typical solder ball correspondingly decreases after treatment. Figure 8 This illustrates poor wetting of solder ball 2 and / or undesirable head-in-pillow engagement of a typical treated solder ball 2. Furthermore, Figure 9 A typical solder ball stencil 6 with an opening 7 for solder paste is shown. Through the stencil 6 / opening 7, a reduced amount of solder paste on the pad 5 is used to process the solder balls 2 pre-attached to the conductor 3 onto the board 4 (e.g., contacts, pads 5).

[0005] Furthermore, in some applications, the typical use of solder ball 2 technology has been superseded by solder crimping technology in surface mount technology (US Patent No. 7,837,522). However, with increasing conductor density per square millimeter or centimeter, the use of solder ball 2 and solder crimping technologies becomes less ideal. US Patent Nos. 7,837,522, 6,945,796, and 6,558,170, and US Publication No. 20060228912 are incorporated herein by reference in their entirety. Summary of the Invention

[0006] The technical problem to be solved is to apply, reflow, or surface mount a first article of manufacture (such as an electrical interconnect structure, electrical connector, or electrical component) onto a corresponding substrate (such as a printed circuit board) without producing any one or more of unwanted or commercially unacceptable electrical short circuits, unwanted or commercially unacceptable electrical open circuits, and unwanted or commercially unacceptable mechanically fragile solder joints. The first article of manufacture, electrical interconnect structure, electrical component, or electrical connector may include at least sixteen, at least twenty-four, at least thirty-two, or more than thirty-two surface-mountable electrical conductors arranged in an array, an open pin field array, or at least four corresponding parallel rows or columns or linear arrays.

[0007] The technical solutions described herein can be used to improve unwanted or commercially unacceptable electrical short circuits, unwanted or commercially unacceptable electrical open circuits, and unwanted or commercially unacceptable mechanically fragile solder joints between a first article (such as, but not limited to, an electrical connector) and a corresponding substrate or corresponding substrate pads.

[0008] The technical solutions described herein can also improve one or more of the signal integrity of electrical interconnect structures or electrical connectors, increase the density of electrical conductors or electrical conductor mounting ends in square millimeters or square centimeters without using solder balls, solder crimping, solder quantity, solder corners or solder blocks, increase strength / size ratio benefits, reduce labor costs, reduce material costs, reduce heat treatment (e.g., reduce to one heat treatment), improve solder / flux ratio, increase tractable coplanarity, reduce electrical open circuits, reduce solder shear failure due to thermal expansion coefficient (CTE) mismatch between any one or more of the electrical interconnect structure or the non-conductive housing of the electrical interconnect structure, reduce or prevent pincushion effect, reduce or prevent solder ball quality problems, and / or improve the visual appearance of reflowed solder joints. Attached Figure Description

[0009] In the accompanying drawings, the same reference numerals generally refer to the same parts throughout different views. Furthermore, the drawings are not necessarily drawn to scale, but rather generally emphasize the principles of the invention.

[0010] Figure 1 This is a side view of an untreated connector from the prior art, showing a conductor with multiple solder balls pre-attached to it.

[0011] Figure 2 yes Figure 1 A side view of the processed connector, showing the connector and board after solder ball reflow.

[0012] Figure 3 yes Figure 2 A cross-sectional view of the processed connector and board taken through the conductor and solder ball reflow section.

[0013] Figure 4 yes Figure 1 Another side view of the untreated connector shows the solder ball deformed when bonded to the conductor.

[0014] Figure 5 yes Figure 2 Another side view of the processed connector shows solder balls with a reduced minimum gap between adjacent reflow solder balls.

[0015] Figure 6 yes Figure 2 Another side view of the processed connector shows solder balls with poor wetting and / or poor attachment due to reflow.

[0016] Figure 7 yes Figure 2 A perspective view of the treated conductor, showing the external spherical shape and / or poor shape of the reflowed solder balls, and illustrating poor bond strength.

[0017] Figure 8 yes Figure 2 Another side view of the processed connector shows the undesirable pincushion engagement of the solder balls due to poor wetting and / or reflow of the solder balls.

[0018] Figure 9 This is a top view of a template for existing technology used in solder paste, for use in... Figure 2 Untreated connectors with solder balls are attached to the board / pad.

[0019] Figure 10 This is a perspective view of one embodiment of an untreated electrical connector, without solder balls, disassembled from one embodiment of the board and / or pads, and shows the board / pads with solder paste for reflow or treatment of the untreated conductors of the electrical connector, without solder balls.

[0020] Figure 11 yes Figure 10 A side view of an untreated connector without solder balls, showing the conductor without solder balls.

[0021] Figure 12 yes Figure 11 A side view of an untreated connector without solder balls, showing the conductors on the solder paste contact plate before reflow.

[0022] Figure 13 yes Figure 11 A side view of the processed connector, showing the connector and board after solder paste reflow without the use of solder balls.

[0023] Figure 14 yes Figure 13 The cross-sectional view of the processed connector and board through the conductor and solder paste reflow section, without solder balls.

[0024] Figure 15 No solder balls were used. Figure 13 A perspective view of the processed conductor, showing the outer periphery of the reflowed solder paste with a column or hourglass shape, and illustrating a better bond shape and / or equal to or greater than that using... Figure 7 The strength of the bond between the conductors of the solder ball.

[0025] Figure 16 It is used to place solder paste in such Figure 10 A top view of one embodiment of a template on a board / pad, shown for use in... Figure 11 Untreated connectors without solder balls are connected to the board / pad.

[0026] Figure 17 This is a top perspective view of one embodiment of a grid structure, showing one or more walls printed on a substrate.

[0027] Figure 18 This is a top perspective view of another embodiment of the grid structure, showing one or more layers printed on a substrate.

[0028] Figure 19 This is a top perspective view of another embodiment of the grid structure, showing one or more recesses in the substrate. Detailed Implementation

[0029] The embodiments can be further understood by referring to the accompanying drawings. (References) Figures 10 to 15 The embodiments provide an electrical connector 20 or a portion thereof that does not use pre-attached solder balls or has no electrical conductors with corresponding solder blocks. The absence of solder blocks may mean that at least 50 percent of the corresponding electrical conductors 22 or corresponding conductor tails 23 are free of solder, or at least 50 percent of the corresponding electrical conductors 22 or corresponding conductor tails 23 do not carry solder, before the electrical connector 22 is picked up and placed onto the substrate 60. The absence of solder blocks may also mean that when the electrical connector 20 is packaged by the manufacturer of the electrical connector 20, at least 50 percent of the corresponding electrical conductors 22 or corresponding conductor tails 23 are free of solder, or at least 50 percent of the corresponding electrical conductors 22 or corresponding conductor tails 23 do not carry solder. The absence of solder blocks may mean that at least 10%, at least 20%, at least 30%, at least 40%, at least 50%, at least 60%, at least 70%, at least 80%, or at least 90% of the corresponding conductor 22 or the corresponding conductor tail 23 carries some mass of the pre-attached solder, but there are not enough solder blocks to reflow the corresponding conductor 22 or the corresponding conductor tail 23 onto the corresponding mating substrate 60 or the corresponding substrate surface pad 62. The absence of solder blocks may mean that at least some or most of the corresponding conductor 22 or the corresponding conductor tail 23 carries some mass of the pre-attached solder, but there are not enough solder blocks to reflow the corresponding conductor 22 or the corresponding conductor 23 onto the corresponding mating substrate 60 or the corresponding substrate surface pad 62. The absence of solder slabs means that, during the thermal cycling of multiple corresponding solder joints formed between the corresponding conductor 22 or the corresponding mating tail 23 and the corresponding mating substrate 60 or the corresponding substrate surface pad 62, at least half or at least sixteen of the conductors 22 or the electrical tail 23 of the electrical component or connector 20 carry some mass of pre-attached solder, but there are not enough solder slabs to backflow the corresponding conductor 22 or the corresponding conductor 23 onto the corresponding mating substrate 60 or the corresponding substrate surface pad 62 without creating at least one of too many unwanted or commercially unacceptable electrical short circuits, too many unwanted or commercially unacceptable electrical open circuits, and too many unwanted or commercially unacceptable mechanically fragile solder joints. Commercially unacceptable may mean 0.05 ± 0.05%, including greater than 0%.

[0030] Electrical connector 20 can be a mezzanine connector, right-angle connector, or vertical connector. Electrical connector 20 can be a mezzanine array connector, right-angle array connector, or vertical array connector. Electrical connector 20 can be a mezzanine open-pin field array connector, right-angle open-pin field array connector, or vertical open-pin field array connector. Electrical connector 20 can be a plug or socket. Electrical connector 20 can be a cable connector. Electrical connector 20 can be an electrical SMT component. Electrical connector 20 can be configured to be soldered to a substrate without requiring corresponding fusible elements, solder balls, solder blocks, solder crimps, and / or solder segments to be placed on the respective conductors or contacts 22 (e.g., mounting ends) prior to reflow. Figure 10 In one embodiment shown, the electrical connector 20 may include multiple conductors 22 in three or more arrays 30 without solder balls or without solder ball / bundle treatment / reflow conductors. As shown, arrays 30, 30A may refer to electrical conductors 22 arranged in corresponding rows or columns. Arrays 30, 30A may also mean that the electrical conductors 22 are symmetrically arranged on the electrical connector 20. An array may also mean that the electrical conductors 22 carried by the electrical connector form a rectangular, square, parallelogram, or arcuate perimeter when considered as a group. For example, Figure 10The connector 20 shown includes four horizontal arrays 30, four vertical arrays 30A, or both, but may include at least three arrays 30, 30A, at least four arrays 30, 30A, at least five arrays 30, 30A, at least six arrays 30, 30A, at least seven arrays 30, 30A, or six or more arrays 30, 30A, wherein each array 30, 30A may include electrical conductors 22 arranged in a corresponding row or column. As shown in one embodiment, arrays 30, 30A may be consecutive, parallel, and / or linear. Arrays 30, 30A (e.g., at least three, four, five, six, six or more, etc.) may be consecutive to each other. Arrays 30, 30A (e.g., at least three, four, five, six, six or more, etc.) may be parallel to each other. Arrays 30, 30A (e.g., at least three, four, five, six, six or more, etc.) may be in a linear pattern with each other. Each of at least one electrical interconnect structure or connector 20 may have at least three, at least four, more than three, or more than four parallel linear arrays 30, 30A. Each linear array 30 may accommodate at least four consecutive electrical conductors 22 arranged edge-to-edge along a corresponding first line in a repeating signal-to-ground (SG) coaxial or single-ended configuration, or in a repeating signal-to-ground (SSG) or repeating SSGG differential pair signal configuration. In other words, each or at least one or at least two linear arrays 30 may accommodate differential signal pairs 22A with optional interleaved ground conductors 22C edge connections. Each linear array 30A may accommodate at least four consecutive electrical conductors 22 arranged wide-side-to-wide along a corresponding second line in a repeating signal-to-ground (SG) coaxial or single-ended configuration, or in a wide-side-to-wide configuration of signal-to-ground (SSG) or SSGG differential signal pairs. In other words, two adjacent linear arrays 30A can be combined to accommodate, form, or define at least two wide-side connected differential signal pairs 22B, with optional interleaved ground conductors 22C. The combined adjacent linear arrays 30A can define a third linear array 30B, with or without interleaved ground conductors 22C located between adjacent third linear arrays 30B. Successive third linear arrays 30B can be spaced apart by a third distance D3, which can be either a first distance D1 or a second distance D2, as described below. The aforementioned at least three, at least four, more than three, or more than four parallel linear arrays 30, 30A can each accommodate edge-connected or wide-side connected differential signal pairs 22A, 22B separated by at least one ground conductor 22C.The aforementioned at least three, at least four, more than three, or more than four parallel linear arrays 30, 30A may be spaced approximately uniformly by corresponding row pitch, column pitch, or first distance D1, such as being uniformly spaced by any one or more of approximately 2 ± 0.1 mm, approximately 1.8 ± 0.5 mm, approximately 1.27 ± 0.05 mm, approximately 1 ± 0.09 mm, approximately 0.9 ± 0.09 mm, approximately 0.8 ± 0.09 mm, approximately 0.7 ± 0.09 mm, approximately 0.6 ± 0.09 mm, approximately 0.5 ± 0.09 mm, approximately 0.4 ± 0.09 mm, approximately 0.3 ± 0.09 mm, approximately 0.2 ± 0.09 mm, and approximately 0.1 ± 0.09 mm.

[0031] Each conductor 22 in at least three, at least four, more than three, or more than four parallel linear arrays 30, 30A may include a corresponding conductor mounting end or mounting tail 23. Each mounting tail 23 may have a corresponding mounting end center 22D. The mounting end center 22D may be spaced apart from the adjacent corresponding mounting end center 22D by a conductor pitch or second distance D2. Each corresponding second distance D2 from the mounting end center 22D along the corresponding linear array 30, 30A to the adjacent mounting end center 22D may be substantially the same. Each corresponding second distance D2 from the mounting end center 22D along the corresponding linear array 30, 30A to the adjacent mounting end center 22D may be the same or different. The second distance D2 can be any one or more of the following: not greater than about 1.27 ± 0.05 mm, not greater than about 1.2 ± 0.05 mm, not greater than about 1 ± 0.05 mm, not greater than about 0.9 ± 0.09 mm, not greater than about 0.8 ± 0.09 mm, not greater than about 0.7 ± 0.09 mm, not greater than about 0.6 ± 0.09 mm, not greater than about 0.5 ± 0.09 mm, not greater than about 0.4 ± 0.09 mm, not greater than about 0.3 ± 0.09 mm, not greater than about 0.2 ± 0.09 mm, and not greater than about 0.1 ± 0.09 mm.

[0032] The width W1 of the conductor 22 can vary, such as approximately 1 ± 0.09 mm, 0.9 ± 0.9 mm, 0.8 ± 0.9 mm, 0.7 ± 0.09 mm, 0.6 ± 0.09 mm, 0.5 ± 0.09 mm, 0.4 ± 0.09 mm, 0.3 ± 0.09 mm, 0.2 ± 0.09 mm, and 0.1 ± 0.05 mm. Differential signal pairs can be spaced apart from any of the aforementioned first distance D1 or second distance D2 by another consecutive differential signal pair or at least one interleaved ground contact or ground conductor 22C positioned consecutively between differential signal pairs. The electrical connector 20 can be constructed using any of the aforementioned first distance D1 combined with any of the aforementioned second distance D2, and combined with any of the aforementioned conductor 22 width W1.

[0033] The term "high density" is used differently in the interconnect structure industry, depending on the manufacturing company. A non-limiting example of a high-density electrical connector 20 may include any of the following: (i) a linear array 30, 30A of first, second, third, and fourth consecutive parallel electrical conductors 22 spaced apart by a first distance D1 of approximately 1.27 ± 0.05 mm, adjacent to the electrical conductors 22, and a second distance D2 of approximately 1.27 ± 0.05 mm between the mounting end centers 22D and adjacent to the mounting end centers 22D, and the corresponding electrical conductor width W1 may be any of 0.6 ± 0.05 mm, 0.5 ± 0.05 mm, 0.4 ± 0.05 mm, 0.03 ± 0.05 mm, etc.; or (ii) a linear array 30, 30A of first, second, third, and fourth consecutive parallel electrical conductors 22 spaced apart by a first distance D1 of approximately 1.25 ± 0.05 mm, adjacent to the electrical conductors 22, and a second distance D2 of approximately 1.27 ± 0.05 mm between the mounting end centers 22D and adjacent to the mounting end centers 22D, and the corresponding electrical conductor width W1 may be any of 0.6 ± 0.05 mm, 0.5 ± 0.05 mm, 0.4 ± 0.05 mm, 0.03 ± 0.05 mm, etc. The center 22D is spaced apart from the adjacent mounting end center 22D by a second distance D2 of approximately 0.8 ± 0.5 mm, and the width W1 of the corresponding conductor 22 can be any one of 0.6 ± 0.05 mm, 0.5 ± 0.05 mm, 0.4 ± 0.05 mm, 0.03 ± 0.05 mm, etc.; or (iii) the linear arrays 30, 30A of the first, second, third and fourth consecutive parallel conductors 22 are spaced apart by a first distance D1 of approximately 1.8 ± 0.05 mm, adjacent to the conductors 22, the mounting end center 22D is spaced apart from the adjacent mounting end center 22D by a second distance D2 of approximately 0.8 ± 0.05 mm, and the width W1 of the corresponding conductor 22 can be any one of 0.6 ± 0.05 mm, 0.5 ± 0.05 mm, 0.4 ± 0.05 mm, 0.03 ± 0.05 mm, etc. Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be used in combination with each other. Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be used in combination with each other to produce an electrical connector 20 with 6% or less differential, asynchronous, worst-case multi-live crosstalk at a differential signal frequency of at least 5 GHz (corresponding data transmission rate of approximately 10 Gbit / sec). Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be used in combination with each other to produce an electrical connector 20 with 6% or less differential, asynchronous, worst-case multi-live crosstalk at a differential signal frequency of at least 10 GHz or a data transmission rate of approximately 20 Gbit / sec.Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be combined with each other to produce an electrical connector 20 with 6% or less differential, asynchronous, worst-case multi-live crosstalk at a differential signal frequency of at least 20 GHz or a corresponding data transmission rate of approximately 40 Gbit / sec. Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be combined with each other to produce an electrical connector 20 with 6% or less differential, asynchronous, worst-case multi-live crosstalk at a differential signal frequency of at least 30 GHz or a corresponding data transmission rate of approximately 60 Gbit / sec. Any first distance D1, any corresponding second distance D2, and any corresponding conductor 22 width W1 can be combined with each other to produce an electrical connector 20 with 6% or less differential, asynchronous, worst-case multi-live crosstalk at a differential signal frequency of at least 40 GHz or a corresponding data transmission rate of approximately 80 Gbit / sec.

[0034] High density can also be defined by electrical conductor density or differential signal pair density. For example, electrical connector 20 and / or array 30 (e.g., without solder balls) may include electrical conductor 22 densities of at least 50 electrical conductor / contact differential pairs per square centimeter, at least 100 signal electrical conductors / contacts per square centimeter, and / or at least 150 signal and ground conductors / contacts per square centimeter. Electrical conductors (e.g., signal and / or ground) can have various densities and are still within the scope of this invention. For example, at least eight conductors (e.g., four arrays / rows of two conductors per row, internal area measured from center to center of conductors) can include, but are not limited to, densities of about 1 to about 7.7 square millimeters, about 1 to about 7.8 square millimeters, about 1.4 to about 4.3 square millimeters, about 1 to about 2 square millimeters, about 1 to about 3 square millimeters, about 1 to about 4 square millimeters, about 1 to about 5 square millimeters, about 1 to about 6 square millimeters, about 1 to about 7 square millimeters, and about 1 to about 8 square millimeters; and / or densities of about 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2, 2.1, 2.2, 2.3, 2.4, 2.5, ..., 7.6, 7.7, 7.8, 7.9, and 8.0 square millimeters (e.g., in 0.1 increments). Also, for example, at least eight electrical conductors / contacts can be arranged in a configuration other than circular or elliptical (e.g., four arrays / rows of two conductors per row). The internal area defined by connecting the corresponding conductive center or the corresponding mounting end center 22D can be any area from approximately 1.3 square millimeters to approximately 4.4 square millimeters. Also, for example, electrical connectors and / or arrays (e.g., without solder balls) can include at least one pair of electrical conductor / contact differential pairs per 1.4mm × 1.4mm, at least two signal conductors / contacts per 1.4mm × 1.4mm, and / or a density of three signal and ground conductors / contacts per 1.4mm × 1.4mm. Also, for example, electrical connectors and / or arrays (e.g., without solder balls) can include at least four pairs of electrical conductor / contact differential pairs per 2.8mm × 2.8mm, at least eight signal conductors / contacts per 2.8mm × 2.8mm, and / or a density of twelve signal and ground conductors / contacts per 2.8mm × 2.8mm. For example, electrical connectors and / or arrays (e.g., without solder balls) may include at least sixteen pairs of electrical conductors / contacts differentially per 5.6mm × 5.6mm, at least 32 signal conductors / contacts per 5.6mm × 5.6mm, and / or a density of 48 signal and ground conductors / contacts per 5.6mm × 5.6mm. For example, at least eight conductors / contacts (e.g., two rows of two pairs per row, without solder balls) may include, but are not limited to, a density of from about 2.5 square millimeters to about 4.5 square millimeters.For example, electrical connectors and / or arrays (e.g., without solder balls) may include a density of at least four pairs of electrical conductors / contacts per 3.62 square millimeters, at least eight signal conductors / contacts per 3.62 square millimeters, and / or twelve signal and ground conductors / contacts per 3.62 square millimeters.

[0035] In some embodiments, the electrical connector and / or array (e.g., without solder balls) may include a density of at least four differential conductor / contact pairs per 2.772 square millimeters, at least eight signal conductors / contacts per 2.772 square millimeters, and / or ten signal and ground conductors / contacts per 2.772 square millimeters. In some embodiments, the electrical connector and / or array (e.g., without solder balls) may include a density of at least four differential conductor / tail pairs per 2.66 square millimeters, at least eight signal conductors / tails per 2.66 square millimeters, and / or ten signal and ground conductors / tails per 2.66 square millimeters.

[0036] In some embodiments, each conductor 22 may be or include a mounting end or conductor tail 23 (e.g., surface mount technology or SMT). The conductor tail 23 may be substantially linear, substantially straight, or in a single plane (e.g., planar) projecting from the housing or body 21 of the connector 20. Each respective mounting end or tail 23 may extend substantially perpendicular to the housing / board over its respective total length. Adjacent conductor tails 23 may project parallel to each other from the connector body 21. Each mounting end or tail 23 may have a material thickness parallel to its respective plane. The mounting end or tail 23 may not bend outside its respective plane, may not be a press-fit pin, and / or may not be a J-lead. As shown in one embodiment, each conductor tail 23 is adjacent to each other within the array 30. Each conductor tail 23 is not used with solder balls before or after processing. The conductor 22 or portions thereof may include a core-blocking barrier 40 at a height adjacent to the proximal end 24 and spaced apart from the free distal end 25 on the outer periphery or surface area. The anti-core barrier 40 (if used) can be configured as a barrier to the solder paste 50. While the conductor 22 can be made of various materials, such as, but not limited to, gold and silver, the anti-core barrier 40 (if used) can be made of various materials, such as, but not limited to, nickel. The conductor tail 23 or a portion thereof may include a barrier or anti-core barrier / coating 40 instead of solder balls at that height to prevent or reduce upward reflow / coalescence / core of flux beyond the bottom extent of the anti-core barrier.

[0037] In some embodiments, the electrical connector 20, array 30, and / or conductor 22 are attached to the substrate / board 60 (e.g., PCB) without solder balls. The connector 20 is configured via conductor 22 to be attached (e.g., soldered) to the substrate 60 (e.g., conductive pads) using reflowed solder paste 50 (without solder balls). The mounting end or tail 23 may not penetrate into the substrate. Figure 12 As shown, the solder paste 50, board 60, and / or conductors 22 / arrays 30 (e.g., untreated) have no solder balls before reflow. In other words, only solder paste 50 is used to attach connectors 20 (e.g., conductors, distal ends, at least three arrays) to the substrate 60 / pads 62. Solder paste / flux 50 can be applied to the PCB or substrate 60 (e.g., pads 62) in sufficient quantity to be subsequently reflowed to attach / aggregate to the connectors / conductors without the presence of solder balls before reflow. Before reflow, as Figure 10 As shown, solder paste 50 (e.g., at least three arrays) can be located on an array (e.g., at least three arrays) of conductive pads 62. This can be achieved using methods such as... Figure 16 One embodiment of the template 70 shown applies an array of solder paste 50 to an array of pads 62 or board 60. The solder paste 50 can coalesce from the distal end 25 of conductor 22 toward the proximal end 24 (e.g., tail 23). The coalescence of the solder paste 50 that may occur during reflow can fill correspondingly uniform or non-uniform gaps defined between the material thickness edges or wide-edge mounting surfaces of the respective conductor 22 or tail 23 and the corresponding corresponding pad 62. Using the solder paste 50 as described herein can compensate for coplanarity variations along the mounting surfaces of the substrate 60, along the mounting surfaces of the electrical connector 20, and can compensate for coplanarity variations between the mounting surfaces of the substrate 60 and the mounting surfaces of the electrical connector 20. During reflow, the solder paste 50 can be cored toward the proximal end 24 up to or adjacent to the anti-core-sucking barrier 40 (if used). The solder paste 50 can be cored in a direction against gravity. Figures 13 to 15 As shown, the treated attachment / bonding (without solder balls) of solder paste 50 to conductor 22 provides an outer periphery with a cylindrical, hourglass, or concave periphery. The outer periphery can be a first configuration of a reflow / post-flow solder paste having a cylindrical or hourglass shape, different from the second configuration of the reflow solder paste before reflow. (Compared to prior art...) Figure 2 , Figure 3 and Figures 5 to 8 Compared to the spherical cross-section of the treated conductor 3 using solder balls 2, the treated conductor 22 (e.g., the tail) without solder balls and the solder paste 50 exhibit a more pronounced appearance. Figures 13 to 15 The column shape shown. For example... Figure 13 Ideally, the gap or channel 28 between the processed conductor 22 and solder paste 50 can be defined as a cylindrical cross-section defined by adjacent reflow solder paste 50. Figure 15 As shown, and as Figure 7 Compared to using solder ball 2, the shape provided by the absence of solder balls (e.g., hourglass shape) offers better bond strength. Figure 13 As shown and in contrast to existing technologies Figure 5 Compared to using solder balls 2, the treated attachment / bonding provides consistent and / or minimal electrical clearance between adjacent conductors 22 (e.g., tails) / solder paste 50. During reflow using solder paste 50, the connector 20 / conductor 22 without solder balls may not travel as far downhill as the prior art connector 1 / conductor 3 with pre-attached solder balls 2. Furthermore, simulations of the treated connector 20 / board 60 without solder balls show good or better signal integrity and (e.g., achieved with less solder) equivalent strength. For example, in the simulation, without solder balls, the insertion loss of the treated conductor 22 attachment using solder paste 50 at 35 GHz did not drop below -3 dB, while... Figure 2 The existing technology shown drops below -3dB at 35GHz.

[0038] In some embodiments, solder paste 50 or a portion thereof may be one or more materials of various types, such as, but not limited to, lead-containing, lead-free, non-cleaning, water-soluble, non-water-soluble, and their composites. Solder paste materials may have various lead / alloy contents, melting temperatures, alloy particle sizes, and / or tensile strengths, and are still within the scope of this invention.

[0039] In some embodiments, the joint (e.g., solder paste) (without solder balls) between connector 22 and board 60 can be configured for a single heat treatment. Furthermore, this treatment requires less stress while providing a more predictable and / or stronger intermetallic bond. The treated joint between the connector and board can also include an optimal solder / flux ratio. A joint without solder balls comprises 52% solder, compared to 91% solder in prior art joints using solder balls. Joints without solder balls can also have increased wettability compared to prior art solder ball usage. Embodiments without solder balls can also have reduced quality issues as described herein.

[0040] In some embodiments, connector 20 and / or board 60 may include one or more templates 70. Templates 70 may be used or configured to place solder paste 50 or solder paste arrays onto board 60 (e.g., pads, pad arrays), such as... Figure 10As shown. Without using solder balls, the amount / volume of solder paste for connector 20 and / or each conductor 22 can be greater than the amount / volume of solder paste used with prior art solder balls. The stencil 70 may include a plurality of orifices or solder paste receiving holes 72. With the stencil 70 adjacent to the substrate 60 and / or pads 62, solder paste 50 is filled or positioned into the plurality of orifices 72, and the stencil is subsequently removed, leaving the previously filled solder paste 50 on the board, as shown. Figure 10 As shown. The area of ​​the orifice 72 of the stencil 70 can accommodate a sufficient volume (e.g., larger than the volume of the solder ball) to coalesce to the conductor 22 in the absence of solder balls / clumps. When solder balls are not used, the area of ​​the orifice can be increased to accommodate a large amount of solder paste received. For example, in some embodiments, this is achieved by adjusting the height of the stencil, the shape of the orifice, and / or defining the peripheral dimensions of the orifice. Figure 12 As shown, after the stencil is removed, conductor 22 or tail 23 can be located in the center of solder paste 50. The array of orifices 72 of the stencil 70 can be of various shapes, sizes, numbers, and configurations, and is still within the scope of the invention. For example, in one embodiment shown, the orifices can be rectangular. In other embodiments, the shapes can be different, such as, but not limited to, triangles. In some embodiments, the stencil footprint can be similar to that of prior art stencils.

[0041] In some embodiments, the area of ​​the solder paste receiving orifices can be configured to receive various volumes of solder paste. For example, at least 3.342961e^-5 cubic centimeters of solder paste per orifice (e.g., 0.004-inch stencil thickness and 0.00051 square inches orifice size). Also, for example, at least 3.44128344e^-5 cubic centimeters of solder paste per orifice (e.g., 0.005-inch stencil thickness and 0.00042 square inches orifice size). It should be understood that various solder paste volumes and corresponding stencils / orifices can be used within the scope of these embodiments. For example, the volume of solder paste can be, but is not limited to, about 0.0000007 to about 0.000006 cubic inches, about 0.0000007 to about 0.000005 cubic inches, about 0.0000007 to about 0.000004 cubic inches, about 0.0000007 to about 0.000003 cubic inches, about 0.0000007 to about 0.000002 cubic inches, or about 0.0000007 to about 0. 0.000001 cubic inches, about 0.0000008 to about 0.000006 cubic inches and / or about 0.0000008, 0.0000009, 0.000001, 0.000002, 0.000003, 0.000004, 0.000005, 0.000006 cubic inches. Table 1 below shows some examples of the tested solder paste volumes and corresponding stencil constructions.

[0042] In some implementations, as the density of the solder paste increases, the size of the solder paste receiving holes can be reduced, and the material / stencil thickness can be increased.

[0043] In some embodiments, the electrical connector may include an array of at least three adjacent, continuous, parallel, linearly arranged electrical conductors. In various embodiments, each electrical conductor may include an SMT conductor tail without solder pads. In some embodiments, each SMT conductor tail may be adjacent to another SMT conductor tail.

[0044] Furthermore, in some embodiments, the electrical connector may include at least four electrical conductor arrays. In various embodiments, the electrical connector may include at least five electrical conductor arrays. In some embodiments, the electrical connector may include at least six electrical conductor arrays. In various embodiments, the SMT conductor tail may include a distal end without solder balls. In some embodiments, the electrical connector may include a substrate, wherein at least three electrical conductor arrays are connected to the substrate without solder balls. In various embodiments, the electrical connector may be attached to the substrate using reflowed solder paste and without solder balls prior to reflow. In some embodiments, the reflowed solder paste may be at least 3.342961e^-5 cubic centimeters of solder paste adjacent to each SMT conductor tail.

[0045] In some embodiments, the template may include a plurality of solder paste receiving holes. In various embodiments, each of the plurality of holes may have an area configured to receive solder paste of at least 3.342961e^-5 cubic centimeters.

[0046] Furthermore, in some embodiments, each of the plurality of holes may have an area configured to receive solder paste of at least 3.44128344e^-5 cubic centimeters.

[0047] In some embodiments, the electrical connector may include at least three parallel, continuous, linearly arranged arrays of electrical conductors. In some embodiments, the electrical connector may have a conductor density of at least 50 differential pairs of electrical conductors / contacts per square centimeter, at least 100 signal electrical conductors / contacts per square centimeter, and / or at least 150 signal and ground conductors / contacts per square centimeter, wherein the connector is attached to the substrate using reflowed solder paste and has no solder balls prior to reflow.

[0048] Furthermore, in some embodiments, the electrical conductor may be an SMT conductive tail without solder balls, immediately adjacent to another SMT conductive tail without solder balls. In various embodiments, the electrical connector may include at least three adjacent, continuous, parallel, linearly arranged arrays of electrical conductors. In some embodiments, the electrical connector may be attached to the substrate using reflowed solder paste, and without solder balls prior to reflow, each conductor comprising at least 3.342961e^-5 cubic centimeters of reflowed solder paste for attachment to the substrate.

[0049] In some embodiments, a method of processing an electrical connector without solder balls may include providing an electrical connector having an array of at least three adjacent, parallel, linearly arranged electrical conductors. In various embodiments, each electrical conductor may include an SMT conductor tail. In some embodiments, each SMT conductor tail may be adjacent to another SMT conductor tail. In various embodiments, the method may include processing / soldering each SMT conductor tail without solder balls.

[0050] Furthermore, in some embodiments, the method may include filling solder paste into a plurality of solder paste receiving holes in the stencil. In various embodiments, each of the plurality of holes may have an area configured to receive at least 3.342961e^-5 cubic centimeters of solder paste. In some embodiments, each of the plurality of holes may have an area configured to receive at least 3.44128344e^-5 cubic centimeters of solder paste. In various embodiments, the method may include reflowing solder paste only to attach the substrate to each SMT conductor tail. In some embodiments, the method may include maintaining a minimum gap between the treated SMT conductor tails. In various embodiments, the method may include maintaining a solder / flux ratio of 52% solder. In some embodiments, the method may include shaping the treated SMT conductor tails into an hourglass shape. In various embodiments, the method may include maintaining an insertion loss above -3dB at 35GHz. In some embodiments, the method may include heating only when processing each SMT conductor tail without solder pads.

[0051] In some embodiments, the electrical connector may include a plurality of conductors configured to connect to a substrate without requiring the provision of respective fusible elements, solder balls, solder blocks, solder crimps, or solder segments on the respective conductors prior to reflow.

[0052] In some embodiments, the electrical connector may include a housing and an array of at least four parallel, continuous, linearly arranged electrical conductors / contacts. In various embodiments, each electrical conductor may have a corresponding mounting end with a certain material thickness. In some embodiments, the material thickness of each corresponding mounting end may be parallel to its corresponding plane. In various embodiments, each corresponding mounting end may not be bent out of its corresponding plane, each corresponding mounting end may not be a press-fit pin, and / or may not be a J-lead. In some embodiments, the electrical connector may be configured to be soldered to a substrate without requiring the provision of corresponding fusible elements, solder balls, solder blocks, solder crimps, and / or solder segments on the corresponding mounting ends prior to reflow.

[0053] In some embodiments, the electrical connector may include a housing and at least four parallel, continuous, linearly arranged arrays of electrical conductors / contacts. In various embodiments, each electrical conductor may have a corresponding mounting end. In some embodiments, each corresponding mounting end may extend substantially perpendicular to the housing over its respective total length. In various embodiments, each corresponding mounting end may not be a press-fit pin and may not be a J-lead. In some embodiments, the electrical connector may be configured to be soldered to a substrate without requiring the provision of corresponding fusible elements, solder balls, solder blocks, solder crimps, and / or solder segments on the corresponding mounting ends prior to reflow.

[0054] In some embodiments, the electrical connector may include a housing and at least four parallel, continuous, linearly arranged arrays of electrical conductors / contacts. In various embodiments, each electrical conductor may have a substantially straight mounting end that does not penetrate into the substrate. In some embodiments, each substantially straight mounting end may be without a corresponding fusible element, solder ball, solder block, solder crimp, and / or solder segment. In various embodiments, the electrical connector may be sold and / or offered for sale as an SMT connector.

[0055] In some embodiments, the electrical connector may include a housing and an array of at least four linear electrical conductors / contacts. In various embodiments, each electrical conductor may have a substantially straight mounting end that does not penetrate into the substrate. In some embodiments, each substantially straight mounting end may be without a corresponding fusible element, solder ball, solder block, solder crimp, and / or solder segment. In various embodiments, the electrical connector may be reflow soldered to the substrate.

[0056] In some embodiments, the electrical connector may include a housing and an array of at least six parallel, continuous, linearly arranged electrical conductors. In various embodiments, each electrical conductor may have a substantially straight mounting end that does not penetrate into the substrate. In some embodiments, the electrical connector may be configured to be soldered to the substrate.

[0057] In some embodiments, the electrical connector may include a housing and an array of seven or more parallel, continuous, linearly arranged electrical conductors. In various embodiments, each electrical conductor may have a substantially straight mounting end that does not penetrate into the substrate. In some embodiments, the electrical connector may be configured to be soldered to the substrate.

[0058] In some embodiments, the electrical connector may include a housing and at least eight electrical conductors / contacts arranged in a configuration other than circular or elliptical. In various embodiments, each of the eight electrical conductors / contacts may have a corresponding center. In some embodiments, the internal area defined by connecting the respective centers may be from approximately 1.3 mm² to approximately 4.4 mm². In various embodiments, each electrical conductor may have a substantially straight mounting end that does not penetrate into the substrate. In some embodiments, each substantially straight mounting end may be without a corresponding fusible element, solder ball, solder lump, solder crimp, and / or solder segment. In various embodiments, the electrical connector may be reflow soldered to the substrate.

[0059] In some embodiments, a grid or matrix structure 80 (e.g., material) or a portion thereof may be defined by a substrate 60 and / or printed / deposited on the substrate 60 or electrical connector 22 (e.g., one or more surfaces 61) or a portion thereof to define / form one or more receiving areas / volumes 90. The grid 80 (e.g., walls, layers, etc.) or a portion thereof may be printed by various methods, such as, but not limited to, 3D printing, screen printing, mask printing, or aerosol printing. The grid 80 (e.g., recesses, etc.) or a portion thereof may be defined / formed in the substrate 60. The grid 80 or a portion thereof may provide reception for one or more materials (e.g., paste 50). The grid 80 may contain one or more materials in one or more targeted or confined or receiving areas / volumes 90 (e.g., adjacent pads). The grid 80 may be built / deposited upwards from the substrate 60 or surface 61 in one or more layers / increments / hierarchies. The grid may reduce or increase the perimeter of the area 90 in a direction away from surface 61. Forming / depositing a grid or boundary / perimeter on the substrate / surface can reduce the chance of bridging, increase the effective solder stencil thickness, reduce the minimum pitch / row-to-row spacing, and / or reduce crosstalk to improve signal integrity. For example, the row-to-row dimension of the pad / container area can be reduced to approximately 0.4 mm. Also, for example, the conductor center-to-center spacing can be approximately 0.003 inches.

[0060] In some embodiments, connector 20 or grid 80, or a portion thereof, may include one or more walls 81 surrounding or defining an area / surface / volume 90 (e.g., inner periphery, outer periphery) or a portion thereof on substrate 60 or surface 61. For example, as Figure 17As shown in one embodiment, the deposited walls 81 of the grid 80 (e.g., one wall, two walls, three walls, four walls, ..., six walls, more than one wall, etc.) may surround or at least partially surround or define an area surface / volume 90 (e.g., a containment) on or adjacent to the substrate 60 or pad 62 (e.g., PCB). In some embodiments, the grid or structure 80 (e.g., 81, 82, 83) may enable solder paste 50 or material to be maintained or held in a confined area before flow. In some embodiments, the raised / deposited grid 80 (e.g., walls 81) may be screen-printed, 3D-printed, or aerosol-printed.

[0061] In some embodiments, connector 20 or grid 80 or a portion thereof may include multiple layers 82 (e.g., masks) surrounding or defining an area / surface / volume 90 or a portion thereof on substrate 60 or surface 61 to define / form one or more receiving regions / volumes 90. Mask layers 82 are deposited / printed on substrate 60 or surface 61 or surface areas, in addition to or defining receiving regions 90 in which material is held. Layers 82 may mask one or more surfaces 61 of substrate 60 or connector 20 to define areas adjacent to pads 62, such as... Figure 18 As shown in one embodiment. In some embodiments, the raised or deposited grid 80 (e.g., layer 82) may be a welding mask.

[0062] In some embodiments, the connector 20, substrate 60, and / or grid or matrix structure 80 (e.g., material) may include one or more recesses 83 to define / form one or more receiving areas / volumes 90. For example... Figure 19 As shown in one embodiment, a substrate 60 may include one or more recesses 83. Recesses 83 may hang from a substrate surface 61 (e.g., a top surface). The one or more substrate surfaces 61 may define various openings in the recesses 83. The one or more recesses 83 may be defined by or hang / protrude into the body of the substrate 60 (e.g., to a certain depth). The one or more recesses 83 may include one or more conductive pads 62 located therein. For example, pads 62 may be located in the bottom wall of the recess 83. The recesses 83 may form notches or containers or receiving areas / volumes / surfaces 90 for containing materials (e.g., pastes, etc.). For example, solder paste 50 (e.g., before flow) may be retained within the one or more recesses 83 in the substrate 60. Although the one or more recesses 83 are shown without walls 81 or layers 82 or grid structures above surface 61, it should be understood that grids (e.g., layers, walls) may be used in combination with the one or more recesses and remain within the scope of the invention.

[0063] Although the accompanying drawings show grids / walls / layers / recesses / accommodating areas, it should be understood that various shapes, sizes, quantities, and configurations can be used and are still within the scope of the invention. The grid may remain on the substrate / surface or may be removed from it. For example, solvent or physical removal may be used to remove one or more portions of the grid structure. Furthermore, for example, the area or perimeter of region 90 may be arcuate in shape rather than rectangular as shown in one embodiment. Although region 90 is shown as being surrounded by walls / layers / grids / recesses at 360 degrees, the perimeter may partially surround or surround less than 360 degrees. Accommodating areas 90 may be similar to or different from each other (e.g., in height, shape, size, volume, spacing, pattern, etc.). The grid or portion thereof, walls, or peripheral surfaces of region 90 may be angled or perpendicular to surface 61, as shown in one embodiment. The walls or peripheral surfaces of region 90 include overhangs or lateral protrusions.

[0064] In some implementations, the grid / recess / wall / layer or a portion thereof may contain one or more materials (e.g., solder paste) before reflow.

[0065] In some embodiments, the grid or portions thereof can be one or more materials of various kinds, such as, but not limited to, polymers, inks, non-aqueous, water-based, metals, ceramics, lubricants, and composites thereof. The grid material can be a lubricant or a material that contains a lubricant. The one or more materials can be removed from or retained from the substrate or surface. Walls, recesses, and / or layers can be of various thicknesses / heights / widths / patterns and still contain material therein.

[0066] In some embodiments, a grid 80 (e.g., a wall, recess, layer) may be used in combination with one or more templates 70. The template 70 (if used) may include a plurality of apertures 72. One or more apertures 72 of the template 70 may be positioned adjacent to or on top of one or more receiving regions 90 of the grid 80. The apertures may be in fluid communication with the region when adjacent to it. Adjacent apertures 72 (e.g., a first volume) of the template and receiving regions 90 (e.g., a second volume) are combined to provide a combined region / volume / thickness (e.g., a third volume) for receiving / accommodating one or more materials. In some embodiments, a single template 70 may be used with multiple grids / substrates having various thicknesses / areas / volumes to vary the overall / combined thickness / volume / area of ​​the material accommodated / defined by the combined grid regions and template apertures. The template may also have varying material thicknesses across regions / planes of the template. For example, template apertures may have different volumes / sizes / shapes in various patterns / locations across the template plane. In some implementations, using a grid or a portion thereof may eliminate the need for a step template.

[0067] In some embodiments, the material contained within the orifice 72 and / or the containing area 90 can be a variety of materials, such as, but not limited to, solder paste / flux 50.

[0068] In some implementations, the volume of solder paste can increase with the grid and stencil (if used). Furthermore, when contained within the grid and stencil (if used), the increased amount of solder paste used can be close to each other (e.g., reduced row-to-row dimensions).

[0069] In some implementations, the use of a grid or substrate or connector or a portion thereof (e.g., a wall, layer, recess) can reduce wicking of the material contained therein.

[0070] In use, grids 80 (e.g., walls 81, layers 82) can be printed on the substrate / connector surface in various patterns, shapes, sizes, quantities, and configurations. If used, the substrate 60 may have one or more recesses 83. Alternatively, in some embodiments, recesses may be used instead of the grid structure printed thereon. One or more stencils 70 (if used) may be positioned on the walls / layers / substrate / recesses / connectors. The orifices 72 or portions thereof of the stencil 70 may be aligned or positioned adjacent to the corresponding receiving areas 90 of the grid / recess / wall / layer. In some embodiments, solder paste 50 may be received or applied to the combined orifices 72 and receiving areas 90. The stencil may then be removed (if used). In some embodiments, grids (e.g., walls, layers) or portions thereof may be removed or retained on the substrate.

[0071] In some embodiments, the substrate may include a plurality of parallel, linearly arranged pad arrays. In various embodiments, the substrate may include a grid structure projecting from one or more surfaces of the substrate to form one or more receiving areas adjacent to each of the plurality of pads.

[0072] Furthermore, in some embodiments, the grid structure may include one or more walls defining one or more receiving areas. In various embodiments, the grid structure may include layers defining the one or more receiving areas. In some embodiments, the grid structure may be removed from one or more surfaces of the substrate. In various embodiments, the grid structure may remain on the one or more surfaces of the substrate. In some embodiments, the substrate may include at least a portion defining the receiving areas and / or having one or more recesses with pads positioned therein. In various embodiments, the grid structure may be printed by 3D printing, screen printing, mask printing, or aerosol printing. In some embodiments, the substrate may include solder paste contained within the one or more receiving areas. In various embodiments, the substrate may include an electrical connector having a plurality of conductors configured to connect to the substrate without requiring corresponding fusible elements, solder balls, solder lumps, solder crimps, or solder segments to be placed on the respective conductors prior to reflow. In some embodiments, the substrate may be combined with a template having a plurality of orifices, wherein the plurality of orifices are fluidly connected to the one or more receiving areas to receive one or more materials. In various embodiments, the plurality of pads may have a row-to-row dimension of about 0.4 mm to about 0.4 mm.

[0073] In some embodiments, a method of processing a solderless electrical connector may include providing an electrical connector having an array of at least three adjacent, parallel, linearly arranged electrical conductors, each conductor further including an SMT conductor tail, wherein each SMT conductor tail may be adjacent to another SMT conductor tail. In various embodiments, the method may include printing a grid structure on one or more surfaces of a substrate to form one or more receiving areas adjacent to each of a plurality of pads. In some embodiments, the method may include processing each SMT conductor tail without solder balls.

[0074] Furthermore, in some embodiments, the method may include containing solder paste within one or more receiving areas. In various embodiments, the method may include positioning a template adjacent to a grid structure. In some embodiments, the template may include a plurality of orifices, wherein these orifices are adjacent to the one or more receiving areas. In various embodiments, the grid structure may be at least one wall. In some embodiments, the grid structure may be at least one layer.

[0075] In some embodiments, the substrate may include a plurality of recesses within the surface of the substrate. In various embodiments, the substrate may include a plurality of parallel, linearly arranged pad arrays located within the plurality of recesses. In some embodiments, the plurality of recesses may define one or more receiving regions for receiving one or more materials.

[0076] Furthermore, in various embodiments, the substrate may include a connector. In some embodiments, the substrate may include a template. In various embodiments, the grid structure may include one or more walls. In some embodiments, the grid structure may include one or more layers.

[0077] In some embodiments, the electrical connector may include means for reflowing solder paste without solder lumps. In various embodiments, the means for reflowing the solder paste is located in at least three adjacent, parallel, linearly arranged arrays of electrical conductors. In some embodiments, each electrical conductor may include an SMT conductor tail without solder lumps. In various embodiments, each SMT conductor tail may be adjacent to another SMT conductor tail.

[0078] While several embodiments have been described and illustrated herein, various other means and / or structures for performing functions and / or obtaining results and / or one or more advantages described herein will readily conceive of by those skilled in the art, and each of these variations and / or modifications is considered to be within the scope of the embodiments described herein. More generally, those skilled in the art will readily understand that all parameters, dimensions, materials, and constructions described herein are intended to be exemplary, and actual parameters, dimensions, materials, and / or configurations will depend on one or more specific applications using this teaching. Those skilled in the art will recognize or be able to determine many equivalents of the specific embodiments described herein using no more than conventional experimentation. Therefore, it should be understood that the foregoing embodiments are presented by way of example only, and that embodiments may be practiced in ways different from the specific descriptions and claims within the scope of the appended claims and their equivalents. Embodiments of this disclosure relate to each individual feature, system, article of manufacture, material, and / or method described herein. Furthermore, any combination of two or more such features, systems, articles of manufacture, materials, and / or methods is included within the scope of this disclosure if there is no inconsistency between them.

[0079] All definitions defined and used herein should be understood to take precedence over dictionary definitions, definitions in documents incorporated by reference, and / or the general meaning of the defined terms.

[0080] Unless otherwise expressly stated, the indefinite articles “a” and “an” used herein in the specification and claims shall be understood to mean “at least one”.

[0081] The phrase “and / or” as used herein in the specification and claims should be understood to mean “any one or both” of the elements so combined, that is, elements that exist together in some cases and separately in others. Multiple elements listed with “and / or” should be interpreted in the same way, that is, “one or more” of the elements so combined. In addition to the elements specifically identified by the “and / or” clause, other elements may optionally be present, whether related to or unrelated to those specifically identified. Thus, as a non-limiting example, when used in conjunction with open-ended language such as “comprising,” a reference to “A and / or B” may refer only to A in one embodiment (optionally including elements other than B); only to B in another embodiment (optionally including elements other than A); both A and B in yet another embodiment (optionally including other elements); and so on.

[0082] As used herein in the specification and claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating items from the list, “or” or “and / or” should be interpreted as inclusive, i.e., including multiple elements or at least one of the items in the list, but also including more than one, and optionally, additional unlisted items. Only those terms that clearly indicate the opposite, such as “only one” or “exactly one”, or when used in the claims, “consisting of” will refer to including multiple elements or exactly one element from the list of elements. In general, the term “or” as used herein should only be interpreted as indicating an exclusive option (i.e., “one or the other but not both”) when it appears after an exclusive term (e.g., “any one,” “one of,” “only one of,” or “exact one of”). When used in the claims, “consisting substantially of” should have its ordinary meaning as used in the field of patent law.

[0083] As used herein in the specification and claims, the phrase “at least one” relating to a list of one or more elements should be understood to mean at least one element selected from any one or more elements in the list of elements, but does not necessarily include at least one of each element specifically listed in the list of elements, and does not exclude any combination of elements in the list of elements. This definition also allows for the optional presence of elements, whether related to or unrelated to those specifically identified in the list of elements referenced by the phrase “at least one”. Thus, as a non-limiting example, “at least one of A and B” (or equivalently, “at least one of A or B”, or equivalently, “at least one of A and / or B”) in one embodiment may refer to at least one, optionally including more than one A, where B is absent (and optionally including elements other than B); in another embodiment, it may refer to at least one, optionally including more than one B, where A is absent (and optionally including elements other than A); in yet another embodiment, it may refer to at least one, optionally including more than one A, and at least one, optionally including more than one B (and optionally including other elements); and so on.

[0084] It should also be understood that, unless clearly indicated to the contrary, in any method claimed herein that includes more than one step or action, the order of the steps or actions of the method is not necessarily limited to the order in which the steps or actions of the method are described.

[0085] In the claims, and in the foregoing description, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “accommodating,” “involving,” “holding,” “constituting,” etc., shall be understood as open-ended, meaning including but not limited to. Only the transitional phrases “constituting of” and “substantially consisting of” will be closed or semi-closed transitional phrases, respectively, as set forth in Section 2111.03 of the U.S. Patent Examination Procedure Manual.

[0086] It should be understood that the embodiments are not limited in their application to the details of the configuration and arrangement of the components set forth in the specification or shown in the drawings. The invention can have other embodiments and can be practiced or performed in various ways. Unless otherwise limited, the terms “connection,” “link,” “communication with,” and “installation,” and their variations, are used extensively herein and cover direct and indirect connections, links, and installations. Furthermore, the terms “connection” and “link,” and their variations, are not limited to physical or mechanical connections or links.

[0087] The disclosure and claims of a “device plus function” in the “device plus function” format are hereby expressly indicated to be interpreted pursuant to section 112(f) of Title 35 of the United States Code. By exercising his or her legal right to describe and file one or more claims in the format permitted by section 112(f) of Title 35 of the United States Code, the applicant expressly disclaims any express or implied acknowledgment. The applicant disclaims any limitation as interpreted from the “device plus function” disclosure or “device plus function” claims described in the following documents: (i) this application, (ii) any application claiming priority to this application, or (iii) any claim filed in any foreign country.

[0088] The foregoing description of several embodiments of the invention has been presented for illustrative purposes. It is not intended to be exhaustive or to limit the invention to the precise steps and / or forms disclosed, and it will be apparent that many modifications and variations can be made in accordance with the foregoing teachings.

Claims

1. An electrical connector, comprising: At least three adjacent, parallel, linearly arranged arrays of electrical conductors, each electrical conductor further comprising an SMT conductor tail without solder blocks, wherein each SMT conductor tail is adjacent to another SMT conductor tail.

2. The electrical connector according to claim 1, comprising at least four electrical conductor arrays.

3. The electrical connector according to any one of claims 1-2, comprising at least five electrical conductor arrays.

4. The electrical connector according to any one of claims 1-3, comprising at least six electrical conductor arrays.

5. The electrical connector according to any one of claims 1-4, wherein, The SMT conductor tail includes a distal end without solder pads.

6. The electrical connector according to any one of claims 1-5, further comprising a substrate, wherein, The at least three electrical conductor arrays are connected to the substrate without solder blocks.

7. The electrical connector according to any one of claims 1-5, wherein the electrical connector is attached to the substrate using reflow solder paste and has no solder balls prior to reflow.

8. The electrical connector according to claim 7, wherein, The reflow solder paste is at least 3.342961e^-5 cubic centimeters of solder paste adjacent to the tail of each SMT conductor.

9. A template, comprising: A plurality of solder paste receiving holes, wherein each of the plurality of holes has an area configured to receive solder paste of at least 3.342961e^-5 cubic centimeters.

10. The template according to claim 9, wherein, Each of the plurality of holes has an area configured to receive solder paste of at least 3.44128344e^-5 cubic centimeters.

11. An electrical connector, comprising: The electrical connector has at least three parallel, continuous, linearly arranged arrays of electrical conductors, and has a conductor density of at least 50 differential pair conductors / contacts per square centimeter, at least 100 signal conductors / contacts per square centimeter, and / or at least 150 signal and ground conductors / contacts per square centimeter, wherein the connector is attached to the substrate using reflow solder paste and has no solder balls prior to reflow.

12. The electrical connector according to claim 11, wherein, The electrical conductor is an SMT conductive tail without solder balls, and the SMT conductive tail is adjacent to another SMT conductive tail without solder balls.

13. The electrical connector according to any one of claims 11 to 12, comprising at least three adjacent, parallel, linearly arranged arrays of electrical conductors.

14. The electrical connector according to any one of claims 11-13, wherein the electrical connector is attached to the substrate using reflow solder paste and has no solder balls prior to reflow, and each conductor comprises at least 3.342961e^-5 cubic centimeters of the reflow solder paste to be attached to the substrate.

15. A method for processing an electrical connector without solder balls, comprising the following steps: An electrical connector is provided having an array of at least three adjacent, parallel, linearly arranged electrical conductors, each conductor further comprising an SMT conductor tail, wherein each SMT conductor tail is adjacent to another SMT conductor tail; and Process the tail of each SMT conductor that has no solder block.

16. The method of claim 15, further comprising filling solder paste into a plurality of solder paste receiving holes in a stencil, wherein, Each of the plurality of holes has an area configured to receive solder paste of at least 3.342961e^-5 cubic centimeters.

17. The method according to any one of claims 15-16, wherein, Each of the plurality of holes has an area configured to receive solder paste of at least 3.44128344e^-5 cubic centimeters.

18. The method of any one of claims 15 to 17, further comprising reflowing solder paste only to attach the substrate to the tail of each SMT conductor.

19. The method according to any one of claims 15-18, further comprising maintaining a minimum gap between the treated SMT conductor tails.

20. The method according to any one of claims 15 to 19, further comprising maintaining a solder / flux ratio of 52% solder.

21. The method according to any one of claims 15 to 20, further comprising forming an hourglass shape at the tail of the treated SMT conductor.

22. The method according to any one of claims 15 to 21, further comprising maintaining the insertion loss above -3dB at 35GHz.

23. The method according to any one of claims 15 to 22, further comprising heating only when processing each SMT conductor tail without solder blocks.

24. An electrical connector, comprising: Multiple conductors are configured to connect to a substrate without requiring the placement of corresponding fusible elements, solder balls, solder blocks, solder crimps, or solder segments on the respective conductors prior to reflow.

25. An electrical connector, comprising: The connector comprises a housing and an array of at least four parallel, continuous, linearly arranged electrical conductors (or contacts), each conductor having a corresponding mounting end with a material thickness parallel to its corresponding plane, each mounting end not bending outside its corresponding plane, each mounting end not being a press-fit pin and not a J-lead, and the connector being configured to be soldered to a substrate without the need for a corresponding fusible element, solder ball, solder block, solder crimp, or solder segment to be placed on the corresponding mounting end prior to reflow.

26. An electrical connector, comprising: The connector comprises a housing and an array of at least four parallel, continuous, linearly arranged electrical conductors (or contacts), each conductor having a corresponding mounting end that extends substantially perpendicular to the housing over its respective total length, each mounting end being neither a press-fit pin nor a J-lead, and the connector being configured to be soldered to a substrate without the need for a corresponding fusible element, solder ball, solder block, solder crimp, or solder segment to be placed on the corresponding mounting end prior to reflow.

27. An electrical connector, comprising: The connector comprises a housing and an array of at least four parallel, continuous, linearly arranged electrical conductors (or contacts), wherein each electrical conductor has a substantially straight mounting end that does not penetrate into the substrate, each substantially straight mounting end having no corresponding fusible element, solder ball, solder block, solder crimp, or solder segment, and the electrical connector is sold and / or provided for sale as an SMT connector.

28. An electrical connector, comprising: The connector comprises a housing and an array of at least four linear electrical conductors (or contacts), wherein each electrical conductor has a substantially straight mounting end that does not penetrate into the substrate, each substantially straight mounting end having no corresponding fusible element, solder ball, solder block, solder crimp, or solder segment, and the electrical connector is reflow soldered to the substrate.

29. An electrical connector, comprising: The housing and at least six parallel, continuous, linearly arranged arrays of electrical conductors, wherein each electrical conductor has a substantially straight mounting end that does not penetrate into the substrate, and the electrical connector is configured to be soldered to the substrate.

30. An electrical connector, comprising: The housing and an array of seven or more parallel, continuous, linearly arranged electrical conductors, wherein each electrical conductor has a substantially straight mounting end that does not penetrate into the substrate, and the electrical connector is configured to be soldered to the substrate.

31. An electrical connector, comprising: The connector comprises a housing and at least eight electrical conductors (or contacts) arranged in a configuration other than circular or elliptical, each of the eight electrical conductors (or contacts) having a corresponding center, an internal area defined by connecting the corresponding centers being approximately 1.3 square millimeters to approximately 4.4 square millimeters, each electrical conductor having a substantially straight mounting end that does not penetrate into the substrate, each substantially straight mounting end being free of a corresponding fusible element, solder ball, solder block, solder crimp, or solder segment, and the electrical connector being reflow soldered to the substrate.

32. A substrate, comprising: Multiple parallel, linearly arranged pad arrays; as well as A grid structure protruding from one or more surfaces of the substrate to form one or more receiving areas adjacent to each of the plurality of pads.

33. The substrate according to claim 32, wherein, The grid structure includes one or more walls that define the one or more accommodating areas.

34. The substrate according to any one of claims 32 to 33, wherein, The grid structure includes layers that define the one or more accommodating areas.

35. The substrate according to any one of claims 32 to 34, wherein, The grid structure can be removed from one or more surfaces of the substrate.

36. The substrate according to any one of claims 32 to 34, wherein, The grid structure is retained on one or more surfaces of the substrate.

37. The substrate according to any one of claims 32 to 36, further comprising one or more recesses defining at least a portion of the receiving region and positioning the pad therein.

38. The substrate according to any one of claims 32 to 37, wherein, The grid structure is printed by means of 3D printing, screen printing, mask printing, or aerosol printing.

39. The substrate according to any one of claims 32 to 38, further comprising solder paste contained within the one or more containing regions.

40. The substrate according to any one of claims 32 to 39, further comprising an electrical connector having a plurality of conductors configured to connect to the substrate without requiring the provision of corresponding fusible elements, solder balls, solder blocks, solder crimps or solder segments on the respective conductors prior to reflow.

41. The substrate according to any one of claims 32 to 40, wherein the substrate is combined with a template having a plurality of orifices, wherein, The plurality of orifices are fluidly connected to the one or more receiving areas to receive one or more materials.

42. The substrate according to any one of claims 32 to 41, wherein, The plurality of pads have a row-to-row size of approximately 0.4 mm to approximately 0.4 mm.

43. A method for processing a solderless electrical connector, comprising the following steps: An electrical connector is provided having at least three adjacent, continuous, parallel, linearly arranged arrays of electrical conductors, each electrical conductor further including an SMT conductor tail, wherein each SMT conductor tail is adjacent to another SMT conductor tail; A grid structure is printed on one or more surfaces of a substrate to form one or more receiving areas for each of a plurality of adjacent pads; and Process the tail of each SMT conductor that has no solder block.

44. The method of claim 43, further comprising containing solder paste within the one or more containment areas.

45. The method according to any one of claims 43-44, wherein the template is positioned adjacent to the grid structure.

46. ​​The method according to claim 45, wherein, The template includes a plurality of openings, wherein the openings are adjacent to the one or more receiving areas.

47. The method according to any one of claims 43-46, wherein, The grid structure is at least one wall.

48. The method according to any one of claims 43-47, wherein, The grid structure has at least one layer.

49. A substrate, comprising: Multiple recesses, the multiple recesses being located within the surface of the substrate; Multiple parallel, linearly arranged pad arrays are located within multiple recesses; and The plurality of recesses define one or more receiving areas for receiving one or more materials.

50. The substrate of claim 49 further includes a connector.

51. The substrate according to any one of claims 49-50, further comprising a template.

52. The substrate according to any one of claims 49-51, wherein, The grid structure includes one or more walls.

53. The substrate according to any one of claims 49-52, wherein, The grid structure includes one or more layers.

54. An electrical connector, comprising: A device for reflowing solder paste in at least three adjacent, parallel, linearly arranged arrays of electrical conductors, wherein each electrical conductor further includes an SMT conductor tail without solder lumps, wherein each SMT conductor tail is adjacent to another SMT conductor tail.

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