Load fault protection method and circuit for constant-current wireless power transmission system

Abstract

The invention relates to the technical field of wireless power transmission, and particularly discloses a load fault protection method and circuit for a constant-current wireless power transmission system. By detecting the voltage of a rectifier bridge port, when the voltage of the rectifier bridge port exceeds a threshold voltage, a 0-level signal is generated; and then, carrying out AND, OR and inverse phase logical operation on the 0-level signal and PWM (Pulse-Width Modulation) signals of four MOS (Metal Oxide Semiconductor) tubes of the rectifier bridge to generate a new driving signal to act on the four MOS tubes, thereby forcing the synchronous rectifier tube to conduct follow current at the moment when an open circuit is detected, rapidly clamping the voltage to a safe range, realizing reliable protection on the system and improving the reliability of the system. The over-voltage protection problem of the rectifier bridge under the condition of load fault is effectively solved, and meanwhile, the reliability and rapidity of protection action are ensured. The technology can be widely applied to the field of synchronous rectification, the cooperative interaction working condition between two transmitting ends in a dynamic system and other wireless electric energy transmission scenes needing high-reliability protection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of wireless power transmission, in particular to a load fault protection method and circuit of a constant-current wireless power transmission system. BACKGROUND

[0002] In a wireless power transmission system, a double LCC that realizes constant-current output is a recommended topology for national standard wireless charging. In a double LCC system, when a load suddenly fails (open circuit due to disconnection of a line or damage to an element), the constant-current characteristic of the system causes the secondary side voltage to suddenly rise to several thousand volts, which can easily damage diodes, capacitors and other devices and cause safety hazards, so protection of the double LCC system is very important.

[0003] Current protection schemes for load failure mainly include three types: voltage clamping protection, active shutdown protection and energy feedback protection. Voltage clamping protection achieves overvoltage protection by connecting a transient voltage suppressor (TVS) in parallel with the rectifier output or designing a bleeder circuit. This type of scheme has fast response speed, but has the disadvantage of high energy loss. The active shutdown protection scheme uses a voltage detection circuit in combination with a control algorithm to quickly block the rectifier tube drive signal when overvoltage is detected. When overvoltage is detected, the system keeps the lower tube of the rectifier bridge open. However, this protection action is limited by the necessary delay of current or voltage AD sampling, software output, etc., which can slow down the system protection action, so it is not suitable for sudden disconnection.

[0004] In recent years, with the increase in the power level of wireless power transmission, the energy feedback protection scheme has gradually attracted attention. This type of scheme increases a bidirectional DC-DC converter to feed the excess energy generated during the sudden change back to a battery or supercapacitor for storage, thereby achieving protection function and improving energy utilization. In large-power applications such as wireless charging of electric vehicles, this scheme has obvious advantages. However, its high system complexity and cost limit its application in small-power scenarios such as consumer electronics.

[0005] The existing protection schemes mainly have the problems of insufficient response speed (microsecond level) and incomplete energy dissipation, which can cause protection failure or cumulative damage to devices. SUMMARY

[0006] The present application provides a load fault protection method and circuit of a constant-current wireless power transmission system, which solves the technical problem that current protection schemes for load failure have insufficient response speed (microsecond level) and incomplete energy dissipation.

[0007] To solve the above technical problems, the present application provides a load fault protection method of a constant-current wireless power transmission system, wherein the receiving end of the constant-current wireless power transmission system adopts a MOS tube S 21 , S 22 , S 23 , S24 The full-bridge rectifier composed of S 21 and S 23 are the upper and lower tubes of the left half-bridge arm respectively, S 22 and S 24 are the upper and lower tubes of the right half-bridge arm respectively; the load fault protection method comprises the steps of:

[0008] detecting the rectifier bridge mouth voltage, and generating a 0-level signal when the rectifier bridge mouth voltage exceeds a threshold voltage;

[0009] performing OR operation on the 0-level signal and the PWM signal of MOS tube S 21 , and inputting the OR operation result into the R end of the R-S latch; inputting the RST trigger signal into the S end of the R-S latch;

[0010] performing AND operation on the output result of the R-S latch and the PWM signal of MOS tube S 21 , to obtain the driving signal of MOS tube S 21 ;

[0011] performing OR operation on the output result of the R-S latch after inversion and the PWM signal of MOS tube S 23 , to obtain the driving signal of MOS tube S 23 ;

[0012] the MOS tube S 22 is compared with the MOS tube S 21 , the MOS tube S 24 is compared with the MOS tube S 23 , and the driving signal of the MOS tube S 21 , S 23 is generated according to the process of generating the driving signal of the MOS tube S 22 , S 24 ;

[0013] the MOS tube S 21 , S 22 , S 23 , S 24 is driven by the driving signal of the MOS tube S 21 , S 22 , S 23 , S 24 .

[0014] Further, the threshold voltage V ref is set to be greater than 1.2 times the normal working voltage of the bridge mouth and less than the maximum voltage resistance of the MOS tube; the MOS tube needs to meet the maximum current value within 2 cycles after the fault trigger.

[0015] Further, the working logic of the R-S latch is: when R=0 and S=1, the internal operation result result is reset to 0, and the latch enters the reset state; when R=1 and S=0, result is set to 1, and the latch enters the set state; when R=0 and S=0 or R=1 and S=1, the state of the latch will not change, and the previously stored value will be kept; the current state of the latch is returned and output through the output parameter y.

[0016] Further, the constant-current wireless power transmission system comprises a transmitting end and a receiving end; the transmitting end comprises a direct-current voltage source U dc , a full-bridge inverter circuit, a primary side compensation network, and a transmitting coil L p ; the receiving end comprises a receiving coil L s , a secondary side LCC compensation network, the full-bridge rectifier, and a load.

[0017] Further, the primary side compensation network and the secondary side compensation network both adopt LCC type compensation networks.

[0018] The application further provides a load fault protection circuit of a constant-current wireless power transmission system, and the key is that the receiving end of the constant-current wireless power transmission system adopts a full-bridge rectifier composed of MOS tubes S 21 , S 22 , S 23 , and S 24 , wherein S 21 and S 23 are the upper tube and the lower tube of the left half-bridge arm respectively, and S 22 and S 24 are the upper tube and the lower tube of the right half-bridge arm respectively; the load fault protection circuit comprises a first logic unit and a second logic unit, and the two logic units adopt the same circuit structure.

[0019] The first logic unit comprises a detector, a first OR gate, an R-S latch, an inverter, an AND gate, and a second OR gate; the detector is used for detecting the rectifier bridge port voltage, and generates a 0 level signal when the rectifier bridge port voltage exceeds a threshold voltage; the first OR gate is used for performing OR operation on the 0 level signal and the PWM signal of the MOS tube S 21 , and inputting the OR operation result into the R end of the R-S latch; the R-S latch is used for obtaining an output result y according to the RST trigger signal input into the S end and the OR operation result input into the R end; the AND gate is used for performing AND operation on the output result y of the R-S latch and the PWM signal of the MOS tube S 21 , to obtain the driving signal of the MOS tube S 21 ; and the second OR gate is used for inverting the output result y of the R-S latch and then performing OR operation thereon with the PWM signal of the MOS tube S 23The PWM signal is operated or calculated to obtain the driving signal of the MOS tube S 23 .

[0020] The second logic unit is used to operate the MOS tube S 22 . 21 . 24 The driving signal of the MOS tube S 23 is generated according to the process of generating the driving signal of the MOS tube S 21 . 23 , S 22 , and the driving signal of the MOS tube S 24 .

[0021] Preferably, the threshold voltage V ref is set to be greater than 1.2 times the normal working voltage of the bridge and less than the maximum voltage resistance of the MOS tube; the MOS tube needs to meet the requirement of being able to withstand the maximum current value within 2 cycles after fault triggering.

[0022] Preferably, the working logic of the R-S latch is that when R=0 and S=1, the internal operation result result is reset to 0, and the latch enters the reset state; when R=1 and S=0, result is set to 1, and the latch enters the set state; when R=0 and S=0 or R=1 and S=1, the state of the latch will not change, and the previously stored value will be kept; the current state of the latch will be returned and output through the output parameter y.

[0023] Preferably, the constant-current wireless power transmission system comprises a transmitting end and a receiving end; the transmitting end comprises a direct-current voltage source U dc , a full-bridge inverter circuit, a primary side compensation network, and a transmitting coil L p ; the receiving end comprises a receiving coil L s , a secondary side LCC compensation network, the full-bridge rectifier, and a load.

[0024] Preferably, the primary side compensation network and the secondary side compensation network both adopt LCC type compensation networks.

[0025] The load fault protection method and circuit for a constant current wireless power transfer system provided by this invention detects the voltage at the rectifier bridge port. When the voltage exceeds a threshold voltage, a 0-level signal is generated. This 0-level signal is then subjected to AND, OR, and inversion logic operations with the PWM signals of the four MOSFETs in the rectifier bridge to generate new drive signals that act on the four MOSFETs. This forces the synchronous rectifier to conduct freewheeling at the instant an open circuit is detected, quickly clamping the voltage to a safe range and achieving reliable system protection. By real-time monitoring of the rectifier output voltage and rapid disconnection of the energy transfer path, the overvoltage protection problem of the rectifier bridge under load fault conditions is effectively solved, while ensuring the reliability and speed of the protection action. This technology can be widely applied in synchronous rectification, collaborative interaction between two transmitters in dynamic systems, and other wireless power transfer scenarios requiring high-reliability protection. Attached Figure Description

[0026] Figure 1 This is a circuit diagram of the dual LCC constant current wireless power transfer system provided in an embodiment of the present invention;

[0027] Figure 2 This is a waveform diagram of the rectifier bridge port voltage and current when the load is suddenly disconnected, provided by an embodiment of the present invention.

[0028] Figure 3 This is a waveform diagram of the rectifier bridge port voltage and current when a load fault is triggered under software protection, provided in an embodiment of the present invention.

[0029] Figure 4 This is a structural diagram of the load fault protection circuit of the constant current wireless power transmission system provided in an embodiment of the present invention;

[0030] Figure 5 This is an example diagram of the time axis of the rectifier bridge MOSFET state change provided in an embodiment of the present invention;

[0031] Figure 6 This is a timing diagram of the rectifier bridge MOSFETs before and after fault triggering in the first case provided by an embodiment of the present invention;

[0032] Figure 7 This is a diagram showing the path of the secondary current in the system after the protection circuit provided in this embodiment of the invention has been activated.

[0033] Figure 8 This is a waveform diagram of the rectifier bridge port voltage and current before and after fault triggering in the first case provided by the embodiments of the present invention;

[0034] Figure 9 This is a timing diagram of the rectifier bridge MOSFETs before and after the fault triggering in the second case provided by the embodiments of the present invention;

[0035] Figure 10This is a waveform diagram of the rectifier bridge port voltage and current before and after the fault is triggered in the second case provided by the embodiment of the present invention. Detailed Implementation

[0036] The embodiments of the present invention are described in detail below with reference to the accompanying drawings. The embodiments are given for illustrative purposes only and should not be construed as limiting the present invention. The accompanying drawings are for reference and illustration only and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0037] Taking a dual-LCC topology as an example, the circuit diagram of a wireless charging system based on a dual-LCC topology is shown below. Figure 1 As shown. Figure 1 The left side is the transmitter, including the DC voltage source U. dc Output DC current I dc S by MOSFET 11 S 12 S 13 S 14 The full-bridge inverter circuit consists of a primary-side compensation inductor L1 and a primary-side parallel compensation capacitor C. r Primary-side series compensation capacitor C p The primary-side LCC compensation network and the transmitting coil L are composed of p The right side is the receiving end, including the receiving coil L. s The secondary-side compensating inductors L2 and C p1 C r2 The secondary-side LCC compensation network is composed of MOSFET S 21 S 22 S 23 S 24 The full-bridge rectifier (S) 21 and S 23 These are the upper and lower tubes of the left half-bridge arm, S 22 and S 24 These are the upper and lower tubes of the right half-bridge arm (respectively), and the load. K1 and K2 are connected to the rightmost battery U. d Two relay switches are connected to the unit of motor power demand. In the load, the capacitor is a filter capacitor used to stabilize the voltage and reduce ripple; the resistor is actually the internal resistance of the filter capacitor, which can generate some losses; the diode acts as a reverse current protection device, preventing the current from flowing back into the circuit from the load end and ensuring the normal operation of the circuit.

[0038] If no protective measures are taken for the system, when the secondary load is suddenly disconnected, the voltage and current waveforms at the rectifier bridge ports will be as follows: Figure 2 As shown, the upper half of the graph represents the bridge inlet voltage waveform, and the lower half represents the bridge inlet current waveform. From... Figure 2It can be seen that: 0-0.01s, the system carries out the lower tube protection, the upper tube S 21 and S 22 maintain the off state, the lower tube S 23 and S 24 maintain the on state. 0.01-0.03s, the rectifier bridge works normally. At 0.03s, the load is disconnected, that is, the system is triggered to fail. After the failure is triggered, it can be seen that the voltage sharply rises to nearly 4000V within 0.03s, and the breakdown voltage of the super high power MOS tube is generally about 1200V, and 4000V is much higher than the breakdown voltage. In this case, the MOS tube of the rectifier bridge will be broken down, and great safety hazards will be caused.

[0039] If only software protection is adopted for the system, it is assumed that the time for the software to process and start to act after the system is triggered to fail is about 5ms. The rectifier bridge port voltage and current waveforms of the system when the system is triggered to fail under the software protection are as shown in Figure 3 , wherein the upper half of the figure represents the bridge port voltage waveform, and the lower half of the figure represents the bridge port current waveform. It can be seen from Figure 3 that: 0-0.01s, the system carries out the lower tube protection, the upper tube S 21 and S 22 maintain the off state, the lower tube S 23 and S 24 maintain the on state. 0.01-0.03s, the rectifier bridge works normally. At 0.03s, the load is disconnected, that is, the system is triggered to fail, and at this time, the software protection is started. It can be seen that the voltage has risen to nearly 2000V when the software protection starts to act, and the breakdown voltage of the super high power MOS tube is generally about 1200V, and 2000V is also much higher than the breakdown voltage. Therefore, when the software protection starts to act, the MOS tube of the rectifier bridge has been broken down, and the protection of the system is not complete.

[0040] Based on the above analysis, the embodiment of the application first provides a load failure protection method of a constant current wireless electric energy transmission system, which comprises the following steps:

[0041] detecting a rectifier bridge port voltage, generating a 0 level signal when the rectifier bridge port voltage exceeds a threshold voltage, and generating a 1 level signal when the wireless electric energy transmission system normally operates;

[0042] performing or operation on the 0 level signal and a PWM signal of a MOS tube S 21 , and inputting a result of the or operation into an R end of an R-S latch; inputting an RST trigger signal into an S end of the R-S latch;

[0043] performing and operation on an output result of the R-S latch and a PWM signal of a MOS tube S 21 , to obtain a driving signal of the MOS tube S 21 .

[0044] The output of the RS latch is inverted and then compared with the MOSFET S. 23 The PWM signal is ORed to obtain the MOSFET S 23 The driving signal;

[0045] For MOSFET S 22 Comparison with MOSFET S 21 For MOSFET S 24 Comparison with MOSFET S 23 According to the generation of MOS transistor S 21 S 23 The process of generating the drive signal for the MOSFET S 22 S 24 The driving signal;

[0046] With MOSFET S 21 S 22 S 23 S 24 The drive signal drives the MOSFET S 21 S 22 S 23 S 24 .

[0047] Setting the threshold voltage is crucial; the threshold voltage V ref The voltage threshold can be set to be greater than 1.2 times the normal operating voltage of the bridge port, but less than the maximum withstand voltage of the MOSFET. However, due to the oscillating characteristics of the LCC topology, the current will rise to 2-3 times the normal value when a fault is triggered, requiring the MOSFET to withstand this current threshold within two cycles. The closer the voltage threshold is to the maximum withstand voltage of the MOSFET, the larger the instantaneous current will be. Therefore, the voltage threshold can be determined based on the specific MOSFET device used in the implementation. In this embodiment, the threshold voltage is set to 410V.

[0048] The RS latch operates as follows: When R = 0 and S = 1, the internal calculation result `result` is reset to 0, meaning the latch enters a reset state. When R = 1 and S = 0, `result` is set to 1, meaning the latch enters a set state. When R = 0 and S = 0 or R = 1 and S = 1, the latch's state remains unchanged, retaining the previously stored value. The latch's current state is returned and output through the output parameter `y`.

[0049] To apply the aforementioned load fault protection method for a constant current wireless power transfer system, this embodiment designs a load fault protection circuit for a constant current wireless power transfer system, such as... Figure 4 As shown in the circuit diagram, the protection circuit includes a first logic unit and a second logic unit, both of which use the same circuit structure.

[0050] The first logic unit comprises a detector, a first OR gate, an R-S latch, an inverter, an AND gate and a second OR gate. The detector is used to detect the rectifier bridge port voltage, and generates a 0 level signal when the rectifier bridge port voltage exceeds a threshold voltage, while the detector keeps outputting 1 when the wireless power transmission system is normally operating. The output signal of the detector is denoted as FLT. The first OR gate is used to perform OR operation on the 0 level signal and the PWM signal (PWM1A) of the MOS tube S 21 , and input the OR operation result into the R end of the R-S latch. The R-S latch is used to obtain an output result y according to the RST trigger signal input from the S end and the OR operation result input from the R end. The AND gate is used to perform AND operation on the output result y of the R-S latch and the PWM signal (PWM1B) of the MOS tube S 21 , to obtain the driving signal (A1) of the MOS tube S 21 . The second OR gate is used to perform OR operation on the output result y of the R-S latch after inversion and the PWM signal of the MOS tube S 23 , to obtain the driving signal (B1) of the MOS tube S 23 .

[0051] The second logic unit is used to generate the driving signals (A2, B2) of the MOS tubes S 22 , S 21 , S 24 , S 23 , S 21 , S 23 , S 22 , S 24 , according to the process of generating the driving signals of the MOS tubes S 21 , S 22 , S 23 , S 24 .

[0052] Finally, the MOS tubes S 21 , S 22 , S 23 , S 24 are driven by the driving signals of the MOS tubes S 21 , S 22 , S 23 , S 24 , and the output voltage of the rectifier bridge will be effectively suppressed. When the system resumes normal operation, the detector keeps outputting 1, and the protection circuit outputs normal driving signals.

[0053] Because the input of PWM1A and PWM2A is operated by the same logic, and the input of PWM1B and PWM2B is also operated by the same logic, the logic operation of the input of PWM1A and the input of PWM1B is described here. In order to make the description more intuitive, the input of PWM1A and the input of PWM1B are described according to the following table:Figure 5 The time point running circuit is shown. As Figure 5 shown, the system undergoes the following stages:

[0054] 0-0.01s, the system protects the lower tube, the upper tube remains off, and the lower tube remains on;

[0055] 0.01s, the rectifier bridge starts. When the system rectifier bridge starts, the phase shift angle of the MOSFET tube is initially set to 0°, and the upper and lower bridge arms are nearly simultaneously turned on to avoid the inrush current generated during startup. As the system enters the steady-state regulation stage, the phase difference of the upper and lower bridge arm drive signals is linearly increased by the controller, and the phase shift angle gradually expands. In this process, the transformer primary voltage duty cycle decreases with the increase of the phase shift angle, and the resonant characteristics of the leakage inductance and the MOS tube parasitic capacitance are utilized to realize zero voltage switching, which not only reduces the switching loss, but also maintains the output voltage stable by adjusting the energy transmission time, until the phase shift angle reaches the target value adapted to the load demand, the system enters the normal working state.

[0056] 0.01s-0.02s, the system is in normal working state, at this time the drive signals of the four MOS tubes all follow the respective corresponding PWM waves, and the MOS tubes are in normal working state.

[0057] After 0.02s, the system continues to work normally, the drive signals of the four MOS tubes continue to follow the respective corresponding PWM waves, and the MOS tubes continue to work normally; when the load is disconnected at a certain moment, i.e. the load end is in an open circuit state, the load end voltage rises sharply, and the FLT signal output at this time becomes 0.

[0058] After the FLT signal becomes 0, there are two situations.

[0059] (1) The first situation

[0060] The first situation fault trigger MOS tube timing diagram is shown as Figure 6 : When the fault is triggered, the MOS tube S 21 is just in the off state, and the MOS tube S 23 is in the on state.

[0061] When the fault is triggered, the upper tube S 21 is just in the off state (i.e. 0 state), so the drive signal A1 input to S 21 is no longer followed by the PWM wave, but remains 0, and the upper tube S 21 remains in the off state. At the same time, the lower tube S 23 is in the on state (i.e. 1 state), so the drive signal B1 output to S 23 remains 1, and the lower tube S 23 remains in the on state.

[0062] Upper tube S 22 Working status and S 21 Conversely, therefore in S 21 When S is exactly in state 0, 22 S is in state 1. 22 The drive input signal A2 will still follow its corresponding PWM wave until the next cycle S arrives. 22 When S becomes state 0, 22 The drive input signal no longer follows the PWM wave and remains at 0.

[0063] Lower tube S 24 Working status and S 23 Conversely, therefore in S 23 When S is exactly in state 1, 24 S is in state 0. 24 The drive input signal B2 will still follow its corresponding PWM wave until the next cycle S arrives. 24 When S changes to state 1, 24 The drive input signal no longer follows the PWM wave and remains at 1.

[0064] After that, the entire rectifier bridge maintains the upper tube S 21 and S 22 In the off state, lower tube S 23 and S 24 In operation. After hardware protection is activated, the secondary current flow path is as follows: Figure 7 As shown. Due to the constant current characteristic of the dual LCC topology system, the secondary current will return to a constant current state after oscillating for a short period. Since the current does not flow through the loaded terminal at this time, the voltage across the secondary side will quickly drop to 0 (ideal state). However, due to the internal resistance of the secondary devices, the actual voltage cannot be 0, but it is close to 0. The current oscillation only lasts for two cycles, and the MOSFET has short-term overcurrent capability, so the MOSFET will not be damaged. The voltage and current waveforms at the rectifier bridge ports after fault triggering in the first case are as follows. Figure 8 As shown.

[0065] (2) Second case

[0066] The timing diagram for the fault-triggered MOSFET in the second scenario is as follows: Figure 9 As shown: When a fault is triggered, S 21 It's currently in the on state, S 23 It is in the off state.

[0067] At this time, the upper tube S 21 It is currently in the on state (i.e., state 1), and the input is given to S. 21The drive signal A1 will still follow its corresponding PWM wave until the next cycle S arrives. 21 When S becomes state 0, 21 The drive input signal no longer follows the PWM wave, but remains at 0, and the upper transistor S... 21 Keep it off. Meanwhile, lower tube S... 23 If it is in the off state (i.e., state 0), then the input to S... 23 The drive signal B1 will still follow its corresponding PWM wave until the next cycle S arrives. 23 When S changes to state 1, 23 The drive input signal no longer follows the PWM wave, but remains at 1, and the upper transistor S... 23 Keep it active.

[0068] Upper tube S 22 Working status and S 21 Conversely, therefore in S 21 When S is exactly in state 1, 22 S is in state 0. 22 The drive input signal A2 no longer follows its corresponding PWM wave and remains at 0, and the upper transistor S... 22 Keep it off.

[0069] Lower tube S 24 Working status and S 23 Conversely, therefore in S 23 When S is exactly in state 0, 24 S is in state 1. 24 The drive input signal B2 no longer follows its corresponding PWM wave and remains at 1, while the lower transistor S... 24 Keep it active.

[0070] After that, the entire rectifier bridge maintains the upper tube S 21 and S 22 In the off state, lower tube S 23 and S 24 In the ON state. The voltage and current waveforms at the rectifier bridge ports after a fault trigger in the second scenario are as follows: Figure 10 As shown.

[0071] As can be seen, this method and circuit can quickly reduce the voltage to a minimum value under any circumstances, and the current recovers to a stable state after a short oscillation of about 5ms. The instantaneous current is about twice the rated current and is maintained for 1-2 cycles. In the event of a short circuit or overcurrent fault, the MOSFET can withstand several times (e.g., 5-10 times) of the rated current for a short time. Therefore, under such protection, the MOSFET will not be damaged. This avoids device damage and safety hazards caused by sudden disconnection of the loaded terminal.

[0072] In summary, the load fault protection method and circuit of the constant-current wireless power transmission system provided by the embodiment of the application can detect the rectifier bridge port voltage, generate a 0-level signal when the rectifier bridge port voltage exceeds the threshold voltage, and then perform logical operations such as AND, OR, and inversion on the 0-level signal and PWM signals of the four MOS tubes of the rectifier bridge to generate a new driving signal acting on the four MOS tubes, so that the synchronous rectifier tube can be forced to conduct and continue to flow in the moment when an open circuit is detected, the voltage can be quickly clamped to a safe range, and reliable protection of the system can be realized. By monitoring the rectifier output voltage in real time and quickly cutting off the energy transmission path, the overvoltage protection problem of the rectifier bridge in the load fault condition is effectively solved, while the reliability and rapidity of the protection action are ensured. Simulation verifies the feasibility of the application. The technology can be widely applied to the field of synchronous rectification, the cooperative interaction condition between two transmitting ends in a dynamic system, and other wireless power transmission scenes that require high-reliability protection.

[0073] The above embodiment is a preferred embodiment of the application, but the embodiment of the application is not limited by the above embodiment, and any change, modification, replacement, combination, simplification made without departing from the spirit and principle of the application should be an equivalent replacement mode and should be included in the protection scope of the application.

Claims

1. A load fault protection method for a constant current wireless power transfer system, characterized in that: The receiver of this constant current wireless power transfer system uses a MOSFET. 21 S 22 S 23 S 24 The full-bridge rectifier is used for rectification, where S 21 and S 23 These are the upper and lower tubes of the left half-bridge arm, S 22 and S 24 These are the upper and lower tubes of the right half-bridge arm, respectively; the load fault protection method includes the following steps: The voltage at the rectifier bridge port is detected. When the voltage at the rectifier bridge port exceeds the threshold voltage, a 0-level signal is generated. Connect the 0-level signal to the MOSFET S 21 The PWM signal is ORed, and the result of the OR operation is input into the R terminal of the RS latch; the RST trigger signal is input to the S terminal of the RS latch; The output of the RS latch is compared with that of the MOSFET S 21 The PWM signal is ANDed to obtain the MOSFET S 21 The drive signal; The output of the RS latch is inverted and then compared with the MOSFET S. 23 The PWM signal is ORed to obtain the MOSFET S 23 The driving signal; For MOSFET S 22 Comparison with MOSFET S 21 For MOSFET S 24 Comparison with MOSFET S 23 According to the generation of MOS transistor S 21 S 23 The process of generating the drive signal for the MOS transistor S 22 S 24 The drive signal; With MOSFET S 21 S 22 S 23 S 24 The drive signal drives the MOSFET S 21 S 22 S 23 S 24 .

2. The load fault protection method for a constant current wireless power transfer system according to claim 1, characterized in that, Threshold voltage V ref The voltage is set to be greater than 1.2 times the normal operating voltage of the bridge port and less than the maximum withstand voltage of the MOSFET; the MOSFET must be able to withstand the maximum current within 2 cycles after a fault is triggered.

3. The load fault protection method for a constant current wireless power transfer system according to claim 2, characterized in that, The working logic of the RS latch is as follows: when R=0 and S=1, the internal calculation result result will be reset to 0, and the latch will enter the reset state; when R=1 and S=0, result will be set to 1, and the latch will enter the set state; when R=0 and S=0 or R=1 and S=1, the state of the latch will not change and will maintain the previously stored value; the current state of the latch will be returned and output through the output parameter y.

4. The load fault protection method for a constant current wireless power transfer system according to any one of claims 1 to 3, characterized in that: The constant current wireless power transmission system includes a transmitter and a receiver; the transmitter includes a DC voltage source U. dc The full-bridge inverter circuit, the primary-side compensation network, and the transmitting coil L p The receiving end includes a receiving coil L. s The secondary-side LCC compensation network, the full-bridge rectifier, and the load.

5. The load fault protection method for a constant current wireless power transfer system according to claim 4, characterized in that: Both the primary-side compensation network and the secondary-side compensation network adopt LCC-type compensation networks.

6. A load fault protection circuit for a constant current wireless power transfer system, characterized in that: The receiver of this constant current wireless power transfer system uses a MOSFET. 21 S 22 S 23 S 24 The full-bridge rectifier is used for rectification, where S 21 and S 23 These are the upper and lower tubes of the left half-bridge arm, S 22 and S 24 These are the upper and lower transistors of the right half-bridge arm, respectively; the load fault protection circuit includes a first logic unit and a second logic unit, both of which use the same circuit structure. The first logic unit includes a detector, a first OR gate, an RS latch, an inverter, an AND gate, and a second OR gate; the detector is used to detect the voltage at the rectifier bridge port, and generates a 0-level signal when the voltage at the rectifier bridge port exceeds a threshold voltage; the first OR gate is used to AND the 0-level signal with the voltage at the MOSFET S 21 The PWM signal is ORed, and the result of the OR operation is input into the R terminal of the RS latch; the RS latch is used to obtain the output result y based on the RST trigger signal input at the S terminal and the OR operation result input at the R terminal; the AND gate is used to AND the output result y of the RS latch with the MOS transistor S. 21 The PWM signal is ANDed to obtain the MOSFET S 21 The drive signal; the second OR gate is used to invert the output result y of the RS latch and then AND it with the MOS transistor S. 23 The PWM signal is ORed to obtain the MOSFET S 23 The driving signal; The second logic unit is used for the MOS transistor S 22 Comparison with MOSFET S 21 For MOSFET S 24 Comparison with MOSFET S 23 According to the generation of MOS transistor S 21 S 23 The process of generating the drive signal for the MOS transistor S 22 S 24 The driving signal.

7. The load fault protection circuit of the constant current wireless power transfer system according to claim 6, characterized in that, Threshold voltage V ref The voltage is set to be greater than 1.2 times the normal operating voltage of the bridge port and less than the maximum withstand voltage of the MOSFET; the MOSFET must be able to withstand the maximum current within 2 cycles after a fault is triggered.

8. The load fault protection circuit of the constant current wireless power transfer system according to claim 7, characterized in that: The working logic of the RS latch is as follows: when R=0 and S=1, the internal calculation result result will be reset to 0, and the latch will enter the reset state; when R=1 and S=0, result will be set to 1, and the latch will enter the set state; when R=0 and S=0 or R=1 and S=1, the state of the latch will not change and will maintain the previously stored value; the current state of the latch will be returned and output through the output parameter y.

9. The load fault protection circuit of the constant current wireless power transfer system according to any one of claims 6 to 8, characterized in that: The constant current wireless power transmission system includes a transmitter and a receiver; the transmitter includes a DC voltage source U. dc The full-bridge inverter circuit, the primary-side compensation network, and the transmitting coil L p The receiving end includes a receiving coil L. s The secondary-side LCC compensation network, the full-bridge rectifier, and the load.

10. The load fault protection circuit of the constant current wireless power transfer system according to claim 9, characterized in that: Both the primary-side compensation network and the secondary-side compensation network adopt LCC-type compensation networks.

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