Control method and system of lightning protection surge circuit suitable for PFC + LLC topology, program product and storage medium

Abstract

The invention provides a control method and system of a lightning protection surge circuit suitable for PFC + LLC topology, a program product and a storage medium, and relates to the technical field of power electronics. High-surge differential-mode voltage on a bus is monitored in real time and input into at least two stages of comparison circuits, and the change condition of the voltage is captured. And a digital overvoltage level signal is generated after the voltage is compared with a preset step-by-step increasing reference voltage, so that the specific level of voltage rise can be accurately determined. And the voltage corresponding to the overvoltage level signal is substituted into an equation formed by combining the theoretical gain model and the actual gain model to obtain the target working frequency, and then the current working frequency is controlled, so that the LLC working frequency is dynamically adjusted according to the actual condition of the surge voltage. The problems that when the voltage of the bus capacitor rises, the LLC working frequency cannot respond to changes in time, consequently, the current of a resonant cavity is increased, an MOS tube loses efficacy, and the output voltage is unstable to interfere with the work of post-stage equipment are effectively solved, and stable operation of the PFC + LLC circuit architecture under the high surge voltage is guaranteed.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronics, and particularly relates to a control method and system of a lightning surge circuit suitable for a PFC+LLC topology, a program product and a storage medium. BACKGROUND

[0002] In today's era, power electronics is experiencing rapid development, and the use of electronic devices in various industries has become increasingly widespread and demanding. As the foundation for the stable operation of electronic devices, the reliability of power supply is particularly critical, especially in many application scenarios. Even if it is impacted by high surge voltage, the electronic device is not only not damaged, but also can maintain normal working state.

[0003] For the problem of high surge voltage that may occur under the PFC+LLC circuit architecture, reference is made to Figure 1 , Figure 1 The figure is a schematic diagram of PFC+LLC circuit architecture. The AC input is connected to the input end of the surge absorption circuit, the output end of the surge absorption circuit is connected to the input end of the filter circuit, the output end of the filter circuit is connected to the input end of the PFC circuit, and the output end of the LLC circuit is a DC output. When the high differential mode voltage is transmitted to the input port, the surge absorption circuit absorbs and processes the energy carried by the surge voltage through its special circuit structure and the characteristics of the corresponding electronic components.

[0004] However, in actual situations, although the surge absorption circuit can absorb most of the energy, a part of the energy will flow to the bus capacitor through the bypass diode, causing the bus capacitor voltage to rise. When the bus capacitor voltage rises, the LLC operating frequency cannot change accordingly, which leads to an increase in the resonant cavity current, and then the LLC MOSFET exceeds its normal operating electrical parameter range and fails, and also causes the LLC output voltage to rise, thereby interfering with the stability of the work of the subsequent equipment.

[0005] Reference is made to Figure 2 , Figure 2 The figure is Figure 1 In the monitoring graph of the high surge voltage problem, the area between the two vertical lines is the time range when the high surge voltage problem occurs. The red curve (upper curve) in the figure represents the output voltage, the blue curve (middle curve) represents the bus capacitor voltage, and the light blue curve (lower curve) represents the resonant cavity current. As can be seen from the figure, when the high differential mode voltage attacks, the bus capacitor voltage rises rapidly, and at the same time, due to the failure of the LLC operating frequency to change in response in time, the resonant current increases significantly. This not only causes the MOS tube to fail due to exceeding the normal operating parameter range, but also causes the output voltage to rise, which may lead to abnormal working conditions when the output is loaded. SUMMARY

[0006] The application provides a control method, system, program product and storage medium of a lightning surge protection circuit suitable for a PFC+LLC topology, which is used to ensure stable operation of the PFC+LLC circuit architecture under high surge voltage.

[0007] In a first aspect, the application provides a control method of a lightning surge protection circuit suitable for a PFC+LLC topology, which is applied to the lightning surge protection circuit of the PFC+LLC topology and includes the following steps: monitoring a high surge differential mode voltage on a bus in real time and inputting the high surge differential mode voltage into at least two comparison circuits; the comparison circuits correspond to preset reference voltages with step-by-step increasing voltage values respectively; comparing the bus voltage with the multiple reference voltages by using the comparison circuits and generating a digitized overvoltage level signal corresponding to the voltage level increase according to the comparison result; when the overvoltage level signal is received, substituting the voltage corresponding to the overvoltage level signal into an equation of simultaneous equations of a theoretical gain model and an actual gain model to obtain a target operating frequency; and taking the target operating frequency as an instruction to control the current operating frequency.

[0008] By using the above technical solution, the high surge differential mode voltage on the bus is monitored in real time and inputted into at least two comparison circuits, and the voltage change is captured. After comparison with the preset step-by-step increasing reference voltage, a digitized overvoltage level signal is generated, and the specific level of voltage increase is accurately determined. The voltage corresponding to the overvoltage level signal is substituted into the equation of simultaneous equations of the theoretical gain model and the actual gain model to obtain the target operating frequency, and then the current operating frequency is controlled, so that the LLC operating frequency is dynamically adjusted according to the actual situation of the surge voltage. The problem that the LLC operating frequency cannot respond to the change when the bus capacitor voltage increases, resulting in the increase of the resonant cavity current, the failure of the MOS tube and the unstable output voltage to interfere with the work of the subsequent equipment is effectively solved, and the stable operation of the PFC+LLC circuit architecture under high surge voltage is ensured.

[0009] In combination with some embodiments of the first aspect, in some embodiments, the theoretical gain model is: wherein, the theoretical voltage gain is K, the Laplace operator is s, the magnetizing inductance is Lm, the equivalent AC resistance is Re, the resonant inductance is Lr, the resonant capacitance is Cr, the target operating frequency is fo, the imaginary unit is j, and The primary and secondary winding number ratio of the transformer is, The output voltage is, The output current is.

[0010] By adopting the above technical solution, the theoretical gain model comprehensively considers various circuit parameters such as magnetizing inductance and equivalent alternating current resistance, which are related to each other and jointly build the voltage gain relationship at the circuit theoretical level. In the high surge differential mode voltage scenario, the model provides a theoretical basis for calculating the target working frequency, so that the adjustment direction of the working frequency can be planned based on the inherent characteristics of the circuit, which helps to optimize the performance of the circuit when dealing with surge voltage, and theoretically guarantees the stability and reliability of the circuit.

[0011] In combination with some embodiments of the first aspect, in some embodiments; in the case of LLC being a half-bridge LLC, the actual gain model is: In the formula, The output voltage is, The input voltage is, The actual voltage gain is.

[0012] By adopting the above technical solution, when calculating the target working frequency, the model can be closely combined with the actual working state of the half-bridge LLC circuit for adjustment, so that the control strategy is more in line with the real running situation of the circuit, improving the accuracy and pertinence of the working frequency adjustment of the half-bridge LLC circuit under high surge voltage, effectively guaranteeing the stable operation of the half-bridge LLC circuit, and reducing the risk of failure caused by voltage fluctuation.

[0013] In combination with some embodiments of the first aspect, in some embodiments; in the case of LLC being a full-bridge LLC, the actual gain model is: In the formula, The output voltage is, The input voltage is, The actual voltage gain is.

[0014] By adopting the above technical solution, the model completely fits the actual working condition of the full-bridge LLC circuit, and when calculating the target working frequency, it can fully consider the characteristics of the full-bridge LLC circuit itself, so that the circuit can adjust the working frequency according to the actual voltage conversion characteristics, enhance the stability and reliability of the full-bridge LLC circuit in the high surge voltage environment, ensure its stable output, reduce the interference to the normal work of the rear equipment, and guarantee the stable operation of the entire PFC+LLC circuit system.

[0015] In combination with some embodiments of the first aspect, in some embodiments; the voltage corresponding to the overvoltage level signal is: In the formula, is the input voltage under the first overvoltage level signal, is the input voltage under the second overvoltage level signal, is the input voltage under the third overvoltage level signal, is the first reference voltage, 2 is the second reference voltage, 3 is the third reference voltage, is the front-stage resistance, is the back-stage resistance.

[0016] By adopting the technical scheme, the voltage calculation formula corresponding to the overvoltage level signal determines the input voltage under different overvoltage level signals by using the specific relationship of the reference voltage and the resistance. By accurately measuring and calculating these parameters, the input voltage can be accurately determined, and then the accurate and reliable overvoltage level signal is generated. This provides a highly accurate data basis for subsequent substitution of the voltage value into the model to calculate the target working frequency.

[0017] In some embodiments of the first aspect, in some embodiments; under the first overvoltage level signal, is regarded as under the second overvoltage level signal, is regarded as under the third overvoltage level signal, is regarded as .

[0018] By adopting the technical scheme, three target frequencies corresponding to three levels of bus overvoltage are obtained in advance. These frequency values are stored. When the comparator detects that the bus voltage exceeds a certain threshold and sends a signal, complex real-time calculation is not required, but the pre-calculated value is directly called from the storage, and the working frequency of the LLC controller is immediately updated, thereby realizing surge protection.

[0019] In some embodiments of the first aspect, in some embodiments; in the case of half-bridge LLC, the equation of the theoretical gain model and the actual gain model is: wherein, is the Laplace operator, is the magnetizing inductance, is the equivalent AC resistance, is a resonant inductance, is a resonant capacitance, is a target operating frequency, is an imaginary unit, is a turns ratio of a transformer, is an output voltage, is an output current, is an input voltage; in the case of LLC being full-bridge LLC, the equation of the theoretical gain model and the actual gain model is: wherein, is a Laplace operator, is a magnetizing inductance, is an equivalent AC resistance, is a resonant inductance, is a resonant capacitance, is a target operating frequency, is an imaginary unit, is a turns ratio of a transformer, is an output voltage, is an output current, is an input voltage.

[0020] By adopting the above technical solutions, in the case of LLC being half-bridge and full-bridge, the equation of the theoretical gain model and the actual gain model is established, and the theoretical characteristics and the actual operating state of the circuit are comprehensively considered. When the bus voltage rises to a dangerous value, the equation is based on the theoretical voltage gain relationship constructed by the magnetizing inductance, the equivalent AC resistance and other parameters in the theoretical gain model, and the real input-output voltage relationship reflected by the actual gain model, and the target operating frequency that makes the equation true can be calculated. The calculation result can effectively guide the circuit to adjust the current operating frequency, so that the circuit can maintain stable operation in the face of abnormal rise of the bus voltage, avoid problems such as increase of the resonant cavity current and failure of the MOS tube caused by mismatch of the operating frequency, and effectively guarantee the reliability and stability of the PFC+LLC circuit architecture under high surge voltage.

[0021] In a second aspect, the present application provides a control system of a lightning surge prevention circuit suitable for a PFC+LLC topology, the control system of the lightning surge prevention circuit suitable for the PFC+LLC topology comprising: one or more processors and a memory; the memory is coupled to the one or more processors, and the memory is configured to store computer program codes, the computer program codes comprising computer instructions, and the one or more processors are configured to invoke the computer instructions to cause the control system of the lightning surge prevention circuit suitable for the PFC+LLC topology to perform the method described in the first aspect and any possible implementation manner of the first aspect.

[0022] In a third aspect, the present application provides a computer program product comprising instructions which, when the computer program product is executed on a control system of a lightning surge protection circuit suitable for a PFC+LLC topology, cause the control system of the lightning surge protection circuit suitable for the PFC+LLC topology to carry out the method as described in the first aspect and any possible implementation of the first aspect.

[0023] In a fourth aspect, the present application provides a computer-readable storage medium comprising instructions which, when executed on a control system of a lightning surge protection circuit suitable for a PFC+LLC topology, cause the control system of the lightning surge protection circuit suitable for the PFC+LLC topology to carry out the method as described in the first aspect and any possible implementation of the first aspect.

[0024] The one or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages: 1. Real-time monitoring of high surge differential mode voltage on the bus and inputting to at least two level comparison circuits to capture the voltage change. After comparison with the preset step-by-step increasing reference voltage, a digitized overvoltage level signal is generated to accurately determine the specific level of voltage rise. The voltage corresponding to the overvoltage level signal is substituted into the equation of the theoretical gain model and the actual gain model to obtain the target working frequency, and then the current working frequency is controlled to dynamically adjust the LLC working frequency according to the actual situation of the surge voltage. This effectively solves the problem that the LLC working frequency cannot respond to changes in time when the bus capacitor voltage rises, leading to an increase in resonant cavity current, MOS tube failure, and unstable output voltage interference with the work of the subsequent equipment, ensuring the stable operation of the PFC+LLC circuit architecture under high surge voltage.

[0025] 2. The theoretical gain model takes into account various circuit parameters such as magnetizing inductance and equivalent AC resistance, which are interrelated and collectively build the voltage gain relationship at the theoretical level of the circuit. Under high surge differential mode voltage scenarios, this model provides a theoretical basis for calculating the target working frequency, enabling the adjustment direction of the working frequency to be planned based on the inherent characteristics of the circuit, which helps to optimize the performance of the circuit when dealing with surge voltage and ensures the stability and reliability of the circuit from a theoretical level.

[0026] 3、In the case of LLC being half-bridge and full-bridge, the equation of combining the theoretical gain model with the actual gain model comprehensively considers the theoretical characteristics and actual operating state of the circuit. When the bus voltage rises to a dangerous value, the simultaneous equation can calculate the target operating frequency that makes the equation true based on the theoretical voltage gain relationship constructed by the magnetizing inductance, equivalent AC resistance and other parameters in the theoretical gain model, and the real input and output voltage relationship reflected by the actual gain model. The calculation result can effectively guide the circuit to adjust the current operating frequency, so that the circuit can maintain stable operation in the face of abnormal rise of the bus voltage, avoid problems such as increase of resonant cavity current and MOS tube failure caused by mismatch of operating frequency, and effectively ensure the reliability and stability of the PFC+LLC circuit architecture under high surge voltage. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 is a schematic diagram of a PFC+LLC circuit architecture; Figure 2 is Figure 1 is a monitoring diagram for facing high surge voltage problem; Figure 3 is a control method of a lightning surge prevention circuit suitable for a PFC+LLC topology; Figure 4 is a voltage sampling circuit of the control method of the lightning surge prevention circuit suitable for the PFC+LLC topology in the embodiments of the present application.

[0028] Figure 5 is a schematic diagram of an exemplary hardware structure of the control system of the lightning surge prevention circuit of the PFC+LLC topology in the embodiments of the present application. DETAILED DESCRIPTION

[0029] The terms used in the following embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to be limiting on the present application. As used in the specification and the appended claims of the present application, the singular forms "a," "an" and "the" are intended to include plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "and / or" as used herein refers to and includes any or all possible combinations of one or more of the listed items.

[0030] Hereinafter, the terms "first" and "second" are only for the purpose of description and cannot be understood as implying or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0031] Please refer to Figure 3 , Figure 3 A control method suitable for a lightning surge protection circuit of a PFC+LLC topology; S301, real-time monitoring of high surge differential mode voltage on the bus, and inputting the high surge differential mode voltage into at least two comparison circuits at the same time; the comparison circuits correspond to preset reference voltages with gradually increasing voltage values respectively; It should be noted that, with reference to Figure 1 , Figure 1 The PFC+LLC circuit architecture diagram, where the bus is the line where the bus capacitor in the background technology is located.

[0032] Specifically, when the lightning surge protection circuit of the PFC+LLC topology is in a working state, the voltage on the line where the bus capacitor is located is detected uninterruptedly. Once a high surge differential mode voltage is detected, the voltage signal is immediately transmitted to at least two comparison circuits composed of the above-mentioned isolation comparators at the same time. Each comparison circuit corresponds to a preset reference voltage with gradually increasing voltage values, so as to determine the level of the bus voltage.

[0033] Please refer to Figure 4 , Figure 4 A voltage sampling circuit suitable for the control method of the lightning surge protection circuit of the PFC+LLC topology in the embodiment of the present application.

[0034] The resistors R1 and R2 are connected in series, wherein the resistor R1 is connected to the bus, the resistor R2 is grounded, and a voltage dividing node is formed between the two resistors.

[0035] Three lines are drawn from the voltage dividing node and connected to the negative input terminals of the three isolation comparators COMP1, COMP2 and COMP3 respectively.

[0036] The positive input terminals of the three isolation comparators are respectively connected to different reference voltage sources. Specifically, the positive input terminal of the isolation comparator COMP1 is connected to the reference voltage source REF1, the positive input terminal of the isolation comparator COMP2 is connected to the reference voltage source REF2, and the positive input terminal of the isolation comparator COMP3 is connected to the reference voltage source REF3, and the voltage value of the reference voltage source REF1 is greater than that of the reference voltage source REF2, and the voltage value of the reference voltage source REF2 is greater than that of the reference voltage source REF3.

[0037] The output terminals of the three isolation comparators respectively output SIG1, SIG2 and SIG3 signals, and these signals are connected to the MCU (micro control unit) to provide input signals for the MCU.

[0038] S302, comparing the bus voltage with multiple reference voltages by using comparison circuits, and generating a digitized overvoltage level signal corresponding to the voltage rise level according to the comparison results; The overvoltage level signal refers to a digitized signal generated according to the comparison results of the bus voltage and the reference voltage, and used to represent the voltage rise level.

[0039] Specifically, when the bus voltage is input to at least two level comparison circuits, each level comparison circuit compares the input bus voltage with the corresponding reference voltage. If the bus voltage is higher than the reference voltage of a certain level, it indicates that the voltage has risen to the corresponding level. According to these comparison results, the circuit generates a digitized overvoltage level signal, which can accurately reflect the specific level of the current voltage rise.

[0040] It should be noted that the MCU receives these signals independently. For example, when SIG1, SIG2, and SIG3 signals are received at the same time, it corresponds to the first overvoltage level signal; when only SIG2 and SIG3 signals are received at the same time, it corresponds to the second overvoltage level signal; and when only SIG3 signal is received, it corresponds to the third overvoltage level signal. These different combinations of signal reception can accurately identify different voltage rise levels for the MCU, and provide accurate basis for subsequent control operations.

[0041] S303, when receiving the overvoltage level signal, substituting the voltage corresponding to the overvoltage level signal into the equation of the simultaneous equation of the theoretical gain model and the actual gain model to obtain the target working frequency; The voltage corresponding to the overvoltage level signal refers to the actual voltage value corresponding to the voltage rise level represented by the overvoltage level signal; the theoretical gain model refers to a mathematical model for calculating the theoretical voltage gain according to the theoretical parameters of the circuit; the actual gain model refers to a mathematical model for calculating the actual voltage gain according to the input and output voltage relationship in the actual operation of the circuit; the target working frequency refers to the working frequency calculated by substituting the voltage corresponding to the overvoltage level signal into the equation of the simultaneous equation of the theoretical gain model and the actual gain model, and the working frequency needs to be adjusted to make the circuit stable.

[0042] Please refer to Figure 4 , Figure 4 A voltage sampling circuit for the control method of the lightning surge protection circuit suitable for PFC+LLC topology in the embodiments of the present application.

[0043] In some embodiments, the voltage corresponding to the overvoltage level signal is: wherein, V1 is the input voltage under the first overvoltage level signal, V2 is the input voltage under the second overvoltage level signal, V3 is the input voltage under the third overvoltage level signal, V1 is the first reference voltage, V2 is the second reference voltage, V3 is the third reference voltage, R1 is the front-stage resistance, R2 is the back-stage resistance.

[0044] It can be seen that the voltage calculation formula corresponding to the overvoltage level signal determines the input voltage under different overvoltage level signals by using the specific relationship of the reference voltage and the resistance. By accurately measuring and calculating these parameters, the input voltage can be accurately determined, and then the accurate and reliable overvoltage level signal can be generated. This provides a highly accurate data basis for subsequent substitution of the voltage value into the model to calculate the target working frequency.

[0045] In some embodiments, the theoretical gain model is: wherein, G is the theoretical voltage gain, L is the Laplace operator, Lm is the magnetizing inductance, Re is the equivalent AC resistance, Lr is the resonant inductance, Cr is the resonant capacitance, f is the target working frequency, j is the imaginary unit, N is the turns ratio of the transformer primary and secondary, Vo is the output voltage, Io is the output current.

[0046] It can be seen that the theoretical gain model comprehensively considers various circuit parameters such as magnetizing inductance and equivalent AC resistance. These parameters are interrelated and jointly build the voltage gain relationship at the theoretical level of the circuit. In the scenario of high surge differential mode voltage, the model provides a theoretical basis for calculating the target working frequency, so that the adjustment direction of the working frequency can be planned based on the inherent characteristics of the circuit, which helps to optimize the performance of the circuit in response to surge voltage, and theoretically guarantees the stability and reliability of the circuit.

[0047] It should be noted that there are two cases of LLC circuit: In the first case, when the LLC is a half-bridge LLC, the actual gain model is: wherein, is an output voltage, is an input voltage, is an actual voltage gain.

[0048] It can be seen that, in the calculation of the target operating frequency, the model can closely combine the actual working state of the half-bridge LLC circuit for adjustment, so that the control strategy is more in line with the real running situation of the circuit, improving the accuracy and pertinence of the operating frequency adjustment of the half-bridge LLC circuit under high surge voltage, effectively ensuring the stable operation of the half-bridge LLC circuit, and reducing the risk of failure caused by voltage fluctuation.

[0049] In the second case, when the LLC is a full-bridge LLC, the actual gain model is: wherein, is an output voltage, is an input voltage, is an actual voltage gain.

[0050] It can be seen that the model completely fits the actual working condition of the full-bridge LLC circuit, and in the calculation of the target operating frequency, the characteristics of the full-bridge LLC circuit itself can be fully considered, so that the circuit can adjust the operating frequency according to the actual voltage conversion characteristics, enhancing the stability and reliability of the full-bridge LLC circuit in a high surge voltage environment, ensuring its stable output, reducing the interference to the normal work of the rear equipment, and ensuring the stable operation of the entire PFC+LLC circuit system.

[0051] In some embodiments, under the first overvoltage level signal and when the LLC is a half-bridge LLC, the simultaneous equations are: wherein, is a Laplace operator, is a magnetizing inductance, is an equivalent AC resistance, is a resonant inductance, is a resonant capacitance, is a target operating frequency, is an imaginary unit, is a turns ratio of the primary and secondary of the transformer, is an output voltage, is an output current, is an input voltage; is the input voltage under the first overvoltage level signal, is the pre-stage resistance, is the post-stage resistance.

[0052] In some embodiments, under the second overvoltage level signal and when the LLC is a half-bridge LLC, the simultaneous equations are: wherein, is the Laplace operator, is the magnetizing inductance, is the equivalent AC resistance, is the resonant inductance, is the resonant capacitance, is the target operating frequency, is the imaginary unit, is the turns ratio of the transformer primary and secondary, is the output voltage, is the output current, is the input voltage; is the input voltage under the second overvoltage level signal, is the pre-stage resistance, is the post-stage resistance.

[0053] In some embodiments, under the third overvoltage level signal and when the LLC is a half-bridge LLC, the simultaneous equations are: wherein, is the Laplace operator, is the magnetizing inductance, is the equivalent AC resistance, is the resonant inductance, is the resonant capacitance, is the target operating frequency, is the imaginary unit, is the turns ratio of the transformer primary and secondary, is the output voltage, is the output current, is the input voltage; is the input voltage under the third overvoltage level signal, is the pre-stage resistance, Rpost

[0054] In some embodiments, under the first over-voltage level signal and when LLC is full-bridge LLC, the simultaneous equations are: wherein, Laplace operator, magnetizing inductance, equivalent AC resistance, resonant inductance, resonant capacitance, target operating frequency, imaginary unit, turns ratio of primary and secondary of transformer, output voltage, output current, input voltage; input voltage under the first over-voltage level signal, Rpre Rpost

[0055] In some embodiments, under the second over-voltage level signal and when LLC is half-bridge LLC, the simultaneous equations are: wherein, Laplace operator, magnetizing inductance, equivalent AC resistance, resonant inductance, resonant capacitance, target operating frequency, imaginary unit, turns ratio of primary and secondary of transformer, output voltage, output current, input voltage; input voltage under the second over-voltage level signal, Rpre Rpost

[0056] In some embodiments, when the third overvoltage level signal is below and the LLC is a half-bridge LLC, the simultaneous equations are: wherein, is a Laplacian operator, is a magnetizing inductance, is an equivalent AC resistance, is a resonant inductance, is a resonant capacitance, is a target operating frequency, is an imaginary unit, is a turns ratio of a transformer primary and secondary, is an output voltage, is an output current, is an input voltage; is an input voltage under the third overvoltage level signal, is a front-stage resistance, is a back-stage resistance.

[0057] S304, taking the target operating frequency as a command to control the current operating frequency.

[0058] Specifically, after obtaining the target operating frequency, it is converted into a control instruction signal in a specific format. Then the instruction signal is transmitted to the module responsible for controlling the operating frequency in the circuit. The module adjusts the current operating frequency of the circuit according to the received instruction, so that it reaches the target operating frequency, thereby guaranteeing the stable operation of the circuit.

[0059] It can be seen that the high surge differential mode voltage on the bus is monitored in real time and input into at least two comparison circuits to capture the voltage change. After comparison with the preset gradually increasing reference voltage, a digitized overvoltage level signal is generated to accurately determine the specific level of voltage rise. The voltage corresponding to the overvoltage level signal is substituted into the equation of the simultaneous equations of the theoretical gain model and the actual gain model to obtain the target operating frequency, and then the current operating frequency is controlled to achieve dynamic adjustment of the LLC operating frequency according to the actual situation of the surge voltage. The problem of LLC operating frequency not responding to changes in time when the bus capacitor voltage rises, leading to an increase in resonant cavity current, MOS tube failure, and unstable output voltage interfering with the work of the back-stage equipment is effectively solved, and the stable operation of the PFC+LLC circuit architecture under high surge voltage is guaranteed.

[0060] The control system 500 of the lightning surge protection circuit of the exemplary PFC+LLC topology provided by the embodiments of the present application is introduced below. Figure 5Fig. 5 is a schematic diagram of an exemplary hardware structure of the control system 500 of the lightning surge protection circuit of the PFC+LLC topology according to an embodiment of the present application.

[0061] In some embodiments, the control system 500 of the lightning surge protection circuit of the PFC+LLC topology is or includes a computer device. The computer device includes a processor, a memory, and a network interface connected by a system bus. The processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for running the operating system and the computer program in the non-volatile storage medium. The database of the computer device is configured to store data. The network interface of the computer device is configured to communicate with other terminals or servers outside through a network connection. In some embodiments, the network interface can be a wired network interface, and in some embodiments, the network interface can also be a wireless network interface. The computer program is executed by the processor to implement the method according to an embodiment of the present application.

[0062] Those skilled in the art can understand that, Figure 5 The structure shown in Fig. 5 is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the computer device to which the scheme of the present application is applied. Specifically, the computer device can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0063] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit the present application; even though the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

[0064] In the above-described embodiments, according to the context, the term "when" can be interpreted as meaning "if" or "after" or "in response to determining" or "in response to detecting". Similarly, according to the context, the phrase "upon determining" or "if detecting (the stated condition or event)" can be interpreted as meaning "if determining" or "in response to determining" or "upon detecting (the stated condition or event)" or "in response to detecting (the stated condition or event)".

[0065] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center through wired (such as coaxial cable, optical fiber, digital subscriber line) or wireless (such as infrared, wireless, microwave, etc.) manner. The computer readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. integrated with one or more available media. The available media can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk) and the like.

[0066] Those of ordinary skill in the art understand that all or part of the processes in the above embodiments can be implemented by a computer program to instruct the relevant hardware, which can be stored in a computer readable storage medium. The program can include the processes of the above method embodiments when executed. The aforementioned storage medium includes ROM or random access memory (RAM), magnetic disk or optical disk, and various media that can store program codes.

Claims

1. A control method for surge protection circuits suitable for PFC+LLC topologies, characterized in that, Surge protection circuits for PFC+LLC topologies include: Real-time monitoring of high surge differential voltage on the bus, and simultaneous input of the high surge differential voltage to at least two comparison circuits; the comparison circuits correspond to preset reference voltages with progressively increasing voltage values; The comparison circuit is used to compare the bus voltage with multiple reference voltages, and a digital overvoltage level signal corresponding to the voltage rise level is generated based on the comparison result. When the overvoltage level signal is received, the voltage corresponding to the overvoltage level signal is substituted into the equation combining the theoretical gain model and the actual gain model to obtain the target operating frequency. The target operating frequency is used as an instruction to control the current operating frequency.

2. The method according to claim 1, characterized in that, The theoretical gain model is as follows: in, Theoretical voltage gain, For the Laplace operator, For magnetized inductors, This is the equivalent AC resistance. It is a resonant inductor. It is a resonant capacitor. For the target operating frequency, The imaginary unit, This refers to the turns ratio of the primary and secondary sides of the transformer. For output voltage, This is the output current.

3. The method according to claim 2, characterized in that... ； When the LLC is a half-bridge LLC, the actual gain model is as follows: In the formula, For output voltage, Input voltage, This represents the actual voltage gain.

4. The method according to claim 2, characterized in that... ； When the LLC is a full-bridge LLC, the actual gain model is as follows: In the formula, For output voltage, Input voltage, This represents the actual voltage gain.

5. The method according to claim 3 or 4, characterized in that; The voltage corresponding to the overvoltage level signal is: In the formula, The input voltage under the first overvoltage level signal. The input voltage under the second overvoltage level signal. The input voltage is the signal voltage under the third overvoltage level. The first reference voltage, 2 is the second reference voltage. 3 represents the third reference voltage. For the preceding stage resistor, For the subsequent stage resistor.

6. The method according to claim 5, characterized in that; Under the first overpressure level signal Considered ; Under the second overvoltage level signal Considered ; Under the third overpressure level signal, Considered .

7. The method according to claim 3 or 4, characterized in that; When the LLC is a half-bridge LLC, the equations combining the theoretical gain model and the actual gain model are as follows: in, For the Laplace operator, For magnetized inductors, This is the equivalent AC resistance. It is a resonant inductor. It is a resonant capacitor. For the target operating frequency, The imaginary unit, This refers to the turns ratio of the primary and secondary sides of the transformer. For output voltage, For output current, Input voltage; When the LLC is a full-bridge LLC, the equations combining the theoretical gain model and the actual gain model are as follows: in, For the Laplace operator, For magnetized inductors, This is the equivalent AC resistance. It is a resonant inductor. It is a resonant capacitor. For the target operating frequency, The imaginary unit, This refers to the turns ratio of the primary and secondary sides of the transformer. For output voltage, For output current, This is the input voltage.

8. A control system for surge protection circuits suitable for PFC+LLC topologies, characterized in that, The control system for the surge protection circuit for PFC+LLC topology includes: one or more processors and a memory; the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to cause the control system for the surge protection circuit for PFC+LLC topology to perform the method as described in any one of claims 1-7.

9. A computer program product containing instructions, characterized in that, When the computer program product is run on the control system of the surge protection circuit for PFC+LLC topology, the control system of the surge protection circuit for PFC+LLC topology performs the method as described in any one of claims 1-7.

10. A computer-readable storage medium comprising instructions, characterized in that, When the instruction is executed on the control system of the surge protection circuit for PFC+LLC topology, the control system of the surge protection circuit for PFC+LLC topology performs the method as described in any one of claims 1-7.

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