Photonic integrated circuit and manufacturing method thereof

Abstract

The present invention provides a photonic integrated circuit and a method of manufacturing the same, the method comprising: providing a waveguide structure comprising a core layer having a first refractive index and a first thermal conductivity, the core layer being disposed between a first cladding layer and a second cladding layer, the first cladding layer and the second cladding layer have a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity; partially etching at least a portion of the second cladding layer such that a region of the removed cladding layer forms a cavity; injecting a rare earth element through the cavity into at least one of the core layer, the first cladding layer, and the second cladding layer; and annealing at a first temperature at least one of the rare earth doped core layer, the first cladding layer, and the second cladding layer, wherein the annealing is performed by a laser beam irradiated into the cavity. Further, a photonic integrated circuit and an alternative method for manufacturing a photonic integrated circuit are provided.

Description

TECHNICAL FIELD

[0001] The present invention relates to a photonic integrated circuit and to a method for manufacturing a corresponding photonic integrated circuit. BACKGROUND

[0002] Amplifiers and other optically active devices can be integrated into photonic integrated circuits. It is important to provide devices with low optical loss at the relevant pump and signal wavelengths, such as the O-band at about 1310 nm and the C-band at about 1540 nm and corresponding pump wavelengths. In particular, the loss in layers doped with rare earth elements as active layers is critical, as these can carry high optical power densities. Therefore, these layers require high quality components and materials. It is necessary to control the mode size of the optical signal in the waveguide to limit the power density to achieve higher output power. Furthermore, the photonic integrated circuit can have to be compatible with back-end of line structures that can only be subjected to limited temperatures during the manufacturing process.

[0003] US 9,325,140 B2 describes an integrated erbium-doped waveguide laser for silicon photonic systems. SUMMARY

[0004] Against this background, it is an object of the present invention to provide an improved active waveguide.

[0005] According to the invention, this object is solved in each case by the subject matter of the independent claims.

[0006] According to a first aspect of the present invention, a method for manufacturing a photonic integrated circuit is provided. The method for manufacturing a photonic integrated circuit comprises providing a waveguide structure, the waveguide structure comprising a core layer, the core layer having a first refractive index and a first thermal conductivity, the core layer being arranged between a first cladding layer and a second cladding layer, the first cladding layer and the second cladding layer having a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity; locally etching at least a portion of the second cladding layer such that the removed cladding layer forms a cavity; injecting a rare earth element into at least one of the core layer, the first cladding layer and the second cladding layer through the cavity; and annealing the at least one of the rare earth doped core layer, the first cladding layer and the second cladding layer at a first temperature, wherein the annealing is performed by a laser beam irradiated into the cavity.

[0007] According to a second aspect of the present application, a photonic integrated circuit is provided. The photonic integrated circuit comprises a first cladding layer, a first core layer arranged on the first cladding layer, a second cladding layer having a first thickness arranged on the first core layer, a second core layer arranged on the second cladding layer, and a third cladding layer arranged on the second core layer, wherein the first core layer and the second core layer have a first refractive index and a first thermal conductivity, wherein each of the first cladding layer, the second cladding layer, and the third cladding layer has a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity, wherein at least one of the first core layer, the second cladding layer, and the second core layer is doped with a rare earth element, wherein at least one of the first core layer and the second core layer has a predetermined width, wherein a ratio of the predetermined width to the first thickness is determined for an efficient mode coupling between the first core layer or the second core layer.

[0008] According to a third aspect of the present application, an alternative method for manufacturing a photonic integrated circuit is provided. The method for manufacturing a photonic integrated circuit comprises providing a core layer comprising a first material and having a first refractive index and a first thermal conductivity, the core layer being arranged on a first cladding layer, the first cladding layer having a second material and having a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity; implanting a rare earth element into at least one of the core layer and the first cladding layer; annealing at least one of the doped core layer and the doped first cladding layer at a temperature between about 600 °C to 1000 °C; and bonding the core layer to a second cladding layer having the second refractive index and the second thermal conductivity, wherein the bonding of the core layer to the second cladding layer is performed by a die-to-wafer bonding or a wafer-to-wafer bonding.

[0009] The basic idea of the present application is to provide a manufacturing method and a corresponding waveguide structure which comprises a local annealing step of the rare earth doped material to ensure that annealing can be performed in the later BEOL process. The BEOL process in a photonic circuit comprises materials which usually cannot withstand temperatures higher than 400 °C. These materials are usually on the upper part of the layer stack forming the photonic integrated circuit, usually above the second core layer and embedded in or on top of the second cladding layer, i.e. on top of the layer stack. By opening a cavity in the second cladding layer and by locally annealing only in this area, the BEOL materials are prevented from still being present in other parts of the photonic circuit. This thus prevents melting from causing irreversible damage.

[0010] The basic concept of the present invention is to decide to use cladding materials with a rather small thermal conductivity. In this way, heat will take a longer time to dissipate, allowing the core and the cladding surrounding the core to locally restructure, and at the same time preventing heat to cause significant temperature increase (e.g. above 400 degrees Celsius) in sensitive parts of the device. In particular, electrical components attached to the photonic integrated circuit in the back-end-of-line (i.e. during the final steps of the manufacturing) are not damaged by the local annealing step performed by shining a laser beam into the cavity of the local opening. The laser can be a nanosecond pulsed laser beam. Typically, a distance of only 50 pm is sufficient to protect these components from the heat applied by the annealing. Shorter distances below 50 pm are also possible by including trenches formed in the cladding layer region to further reduce the lateral heat transfer from the annealing region to the back-end-of-line (BEOL) region where such sensitive components are located.

[0011] Several methods for manufacturing the described photonic integrated circuits are proposed. Thus, the present invention also provides a photonic integrated device manufactured by any of the described methods.

[0012] The ratio of the predetermined width of the core layer to the first thickness of the second cladding layer as intermediate cladding layer is determined for an efficient mode coupling between the first core layer or the second core layer. This means that the ratio is chosen according to the desired location of the optical mode propagating in the waveguide structure of the first and second core layer and the first to third cladding layer. For example, a small ratio leads to a reduction of the interaction such that the mode is confined in the second unetched core layer which can have a larger or even much larger lateral extent. A large ratio, i.e. a large predetermined width of the second core layer and / or a large first thickness of the intermediate cladding layer, enhances the mode transfer from the second core layer to the first core layer such that the optical mode will mainly be located in the first core layer. Thus, the present structure enables an efficient interaction, i.e. a coupling and transfer between the first and second core layer, wherein one of the core layers provides a gain to the optical signal propagating through the photonic integrated circuit.

[0013] The optical mode partially confined in the first and second core layer also extends above the second cladding layer. Thus, in the present application such an optical mode is defined as a hybrid optical mode.

[0014] Another embodiment covered by the present invention relates to the case where rare earth elements are embedded in an intermediate (cladding) layer located between the first and second core layer. The intermediate layer has a lower refractive index condition than the core layers. Suitable hosts for the intermediate layer are similar to the cladding layers with low thermal conductivity and can be SiO2, phosphorous doped glass PSG, silicon oxynitride SiON or AI2O3 as will be further discussed below. This means that the cladding layers can also be doped with rare earth elements. For example, a waveguide with a trench configuration with doped layers can be designed such that most of the rare earth elements are embedded within the intermediate cladding layer.

[0015] It is to be understood that for the injection or doping of rare earth elements, each of the rare earth elements or a combination of rare earth elements can be applied. This includes, for example, Erbium, Ytterbium, Thulium, Neodymium, Terbium, Yttrium, Cerium, Scandium, Holmium, Dysprosium, Lanthanum, Gadolinium, Lutetium, Samarium, Praseodymium. In a photonic integrated circuit, an optical pump mode can be absorbed inside a rare earth doped core layer to amplify a signal photon according to one of the specific decay methods of the dispersed rare earth element.

[0016] Advantageous embodiments and improvements of the present application are found in the dependent claims.

[0017] According to some further aspects of the present application, the etching comprises etching the second cladding layer locally such that the removed area of the cladding layer forms a cavity in which the core layer is exposed. In this way, the doping of the core layer can be easily performed. In a further embodiment, the etching comprises etching at least a portion of the core layer to form a doped waveguide core of a predetermined width. By laser annealing of the doped core layer, the doping is performed only at the locations where it is needed, only where it is needed. This includes the doped core layer, but can also include the surrounding first and second cladding layers, which can also be partially doped in a subsequent doping step. The application of the laser beam to the doped core layer enables a lower temperature to be applied to the doped core layer. Thus, an excessive loss of mode transfer to different layers can be reduced or avoided. Furthermore, since the laser annealing provides heat only in a local area and the cladding material has a low thermal conductivity, the heat dissipation into the cladding layers can be limited, such that the method is particularly suitable for back-end structures.

[0018] According to some further aspects of the present application, the annealing comprises the step of adding an absorber layer comprising an absorber material to the cavity, irradiating the absorber layer by a laser beam of an absorptive wavelength in the absorber layer to obtain a first temperature. By this method of using the heat conduction from the absorber layer to the core layer or the first and second cladding layers, the absorption of the laser can be enhanced, and the wavelength of the laser and the laser itself can be chosen independently of, for example, the material of the core layer.

[0019] According to some further aspects of the application, the absorber material of the absorber layer has a significant absorption in the ultraviolet spectral region, wherein the laser beam is a pulsed laser beam with a wavelength of less than 300 nm, in particular of about 193 nm or of about 248 nm. Such lasers enable an efficient annealing process, typically using nanosecond (ns) pulses. However, lasers emitting a beam in the visible, near-infrared or even far-infrared spectral range can also be used. The laser wavelength used for the laser annealing is chosen according to the absorption properties of the RE-doped layer, which can be the core layer or an intermediate cladding layer. Such excimer laser wavelengths have a high absorption in the case of a thin silicon layer as absorber layer. The absorbed energy is then released in the material in the form of heat and will result in a rearrangement of the different elements and the bonds between the present elements. Thereby, the rare earth elements and the material of the layer will be rearranged in a way that removes dangling bonds and / or any detrimental molecular bonds created during the implantation phase of the process, or at least repairs a substantial part of the related optical material.

[0020] According to some further aspects of the application, the absorber material comprises one of silicon and a metal. These materials provide a high absorption in the ultraviolet, visible spectral range and near-infrared spectral range, making them particularly suitable for this application.

[0021] According to some further aspects of the application, the diameter of the laser spot is between 0.1 mm and 5 mm, preferably 2 mm to 3 mm. These values represent typical laser spot sizes leading to an efficient and uniform heating of the core layer.

[0022] According to some further aspects of the application, the core material of the core layer is silicon nitride. The choice of silicon nitride SiN or Si3N4 as core material of the waveguide structure is due to its refractive index contrast with respect to common cladding materials such as oxides, in particular silicon oxide SiO2, and its low absorption in the visible and infrared parts of the spectrum. Direct implantation of Er into Si3N4 thus makes rare-earth doped amplifiers possible in photonic integrated circuits. The deposited silicon nitride is typically an amorphous material. Upon annealing with a first temperature, it can partially transform into an alpha phase hexagonal Si3N4 or a beta phase hexagonal Si3N4 mixed phase, with both alpha and beta phases being present. Although SiN is the preferred core material for each core layer due to its low propagation losses, different materials can also be used as core material, for example Al2O3, silicon oxynitride SiON, doped quartz glass, lithium niobate LNOI, Ta2O5 tantalum pentoxide, etc. Upon implantation, the Si3N4 microstructure is altered, leaving lattice defects that increase the propagation losses and the absorption. The annealing step allows reorganizing the Si3N4 lattice and restoring the baseline of the propagation losses of the core material prior to the implantation step.

[0023] According to some other aspects of the present application, the cladding material of the first and second cladding layers is an oxide. In particular, the oxide is silicon oxide Si02. The low thermal conductivity of the oxide, in particular Si02, is related to the laser annealing process. In this way, the heat generated during annealing is confined in the core layer that is needed. Thus, this helps to inject defects such as rare earth dopant elements into the core layer. Although Si02 is the preferred material due to its low propagation loss, the cladding layer material can also be one of SiOxCy or SiOxNy or their hydrogenated counterparts SiOxCy:H or SiOxNy:H, AI2O3, Y2O3, Y3Al50I2, doped silicon dioxide (e.g. phosphorous doped Si02, boron doped Si02 and variants thereof) or soda-lime silicate glass.

[0024] According to some other aspects of the present application, the first temperature is between about 600 °C to 1250 °C, preferably about 1000 °C.

[0025] According to some other aspects of the present application, the method further comprises the step of providing a second cladding layer on the doped core layer within the cavity. In this way, the second cladding layer is returned onto the doped core layer, forming a low-loss waveguide structure. Preferably, this step is performed by applying die-to-wafer bonding, which represents a particularly easy manufacturing step, effectively using the substrate carrying the doped region of the core layer. Moreover, this effect or advantage relates to the die bonding process. Since the doped material is needed within the cavity, it occupies a smaller area than the entire photonic integrated circuit. Using die bonding allows for a batch of substrates to be injected with rare earth elements, annealed and separated into small dies. The small dies can then be die bonded within the cavities formed on separate substrates as part of a photonic integrated circuit. In this way, one doped substrate can serve several photonic integrated circuit substrates, effectively utilizing the doped material. This provides an economic advantage due to the high cost of rare earth injection.

[0026] According to some further aspects of the present application, the method further comprises the steps of providing a second core layer having a first refractive index and a first thermal conductivity on the second cladding layer, and providing a third cladding layer having a second refractive index and a second thermal conductivity on the second core layer. In this way, an additional core layer is provided next to the (first) core layer, enabling a mode interaction between the two core layers. In this way, the optical mode of the signal beam propagating in the waveguide can be arbitrarily amplified and its intensity can be reduced by design, thereby reducing the likelihood of damaging the photonic integrated circuit during operation.

[0027] According to some further aspects of the application, at least one of the first core layer, the first cladding layer and the second cladding layer is doped with a rare earth element. The second core layer has a predetermined width. Further, a second core thickness of the second core layer is greater than a first core thickness of the first core layer. Also in this embodiment, the first core layer which is not doped is defined by an etching process such that the propagation mode can achieve a designed interaction with the second core layer. In a particular embodiment, the core thickness of the first non-etched core is 200 nm and the core thickness of the second etched core layer is 350 nm. These thicknesses of the core layers are typical values for signal wavelengths in the optical O-band (around 1310 nm wavelength) and the optical C-band (around 1540 nm wavelength). However, different thickness values can be used for different wavelength ranges. In a preferred embodiment, the core layer thicknesses can be between 50 nm to 800 nm. In a further embodiment, the second core layer is doped with a rare earth element and wherein the second core layer has a predetermined width and a second core thickness of the second core layer is greater than a first core thickness of the first core layer.

[0028] According to some further aspects of the application, the predetermined width is between 0.5 pm to 2 pm and wherein an effective cross-sectional area which is the product of the second core thickness and the predetermined width is between 0.3 pm 2 to 5 pm 2 These values represent typical values for the predetermined width, the effective cross-sectional area and the resulting first thickness.

[0029] According to some further aspects of the application, the first core has a first predetermined width and the second core has a second predetermined width which is smaller than the first predetermined width, wherein the first core layer is arranged above the second core layer. This is to be understood that the first core layer is arranged above the second core layer such that the second core layer is surrounded by the first core layer in a projection on a vertical direction perpendicular to a surface of the photonic integrated circuit and a direction of the waveguide. In some embodiments, the second predetermined width is greater than the first predetermined width. By this arrangement of two core layers with different dimensions, a misalignment tolerant design is achieved to avoid a polarization rotation. In case the first predetermined width and the second predetermined width are the same, such a polarization rotation would be induced and a misalignment between the first core layer and the second core layer would be misaligned in a lateral direction perpendicular to the vertical direction and the direction of the waveguide.

[0030] According to some further aspects of the application, the method further comprises providing a second core layer having a first refractive index and a first thermal conductivity on the second cladding layer, and providing a third cladding layer having a second refractive index and a second thermal conductivity on the second core layer, locally etching the third cladding layer such that the removed areas of the cladding layer form a cavity in which the second core layer is exposed, and etching at least a portion of the core layer to form a waveguide core of a predetermined width. In this embodiment, the width of the second undoped core layer is defined by the etching process such that the propagation mode can achieve the designed interaction with the (first) core layer. By varying the predetermined width of the second core layer, it can be determined whether the propagation mode is mainly confined in the first core layer or in the second core layer. The third cladding layer can then be deposited again into the open core layer.

[0031] According to some further aspects of the application, further comprising providing a second core layer having a first refractive index and a first thermal conductivity and having a predetermined width arranged on the second cladding layer, and providing a third cladding layer having a second refractive index and a second thermal conductivity arranged on the second core layer. In this embodiment, the bonding of the core layer to the second cladding layer can be performed by wafer-to-wafer bonding. Wafer-to-wafer bonding is the most simplified process and involves less steps than the die-to-wafer bonding steps described above, as it does not involve local etching or local opening LOCA. In order to obtain the second core layer having a predetermined width, the third cladding layer can be opened by local etching or LOCA to etch a portion of the second core layer to form an undoped core waveguide as described above.

[0032] The above described embodiments and further improvements can be combined with each other as desired, if appropriate. In particular, all features of the photonic integrated circuit can be transferred to the method for manufacturing a photonic integrated circuit and to the alternative method, and vice versa. Further possible aspects, further improvements and embodiments of the application also include combinations of features of the application described above or below with respect to embodiments not explicitly mentioned. In particular, the skilled person will also add individual aspects as improvements or additions to the individual basic form of the application.

[0033] Advantageous embodiments and further improvements emerge from the description with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0034] The application is explained more fully below based on exemplary embodiments indicated in the schematic drawings, in which:

[0035] Figure 1 A flowchart of a method for manufacturing a photonic integrated circuit according to an embodiment of the application is shown;

[0036] Figure 2 A flowchart of a method for manufacturing a photonic integrated circuit according to another embodiment of the application is shown;

[0037] Figures 3a to 3c A series of cross-sections of a photonic integrated circuit during fabrication by a fabrication method according to an embodiment of the application is shown;

[0038] Figures 4a to 4f A series of cross-sections of a photonic integrated circuit during fabrication by a fabrication method according to another embodiment of the application is shown;

[0039] Figure 5 A flowchart of an alternative method for fabricating a photonic integrated circuit according to an embodiment of the application is shown;

[0040] Figure 6 A cross-section of a photonic integrated circuit according to an embodiment of the application is shown;

[0041] Figure 7 A cross-section of a photonic integrated circuit according to another embodiment of the application is shown;

[0042] Figure 8 A cross-section of a photonic integrated circuit according to another embodiment of the application is shown;

[0043] Figure 9 A cross-section of a photonic integrated circuit according to another embodiment of the application is shown;

[0044] Figure 10 A cross-section of a photonic integrated circuit according to another embodiment of the application is shown; and

[0045] Figure 11 A cross-section of a photonic integrated circuit according to another embodiment of the application is shown.

[0046] The accompanying drawings are intended to convey a further understanding of embodiments of the application. They illustrate embodiments and, together with the description, explain the principles and concepts of the application. Other embodiments and many of the cited advantages will occur to those skilled in the art from the drawings, the disclosure and the detailed description. The elements of the drawings are not necessarily to scale relative to each other. Directional orientation terms, such as, for example, "on top of", "on the bottom of", "on the left of", "on the right of", "above", "below", "horizontally", "vertically", "in front of", "behind", are used for explanation purposes only and do not serve to impose general limitations to the specific configuration shown in the drawings.

[0047] In the drawings, like elements, features and components, having the same function and having the same effect, are provided with the same reference signs, unless stated otherwise. DETAILED DESCRIPTION

[0048] Figure 1 A flowchart of a method for fabricating a photonic integrated circuit according to an embodiment of the application is shown.

[0049] The method M1 for manufacturing the photonic integrated circuit 1 comprises four basic steps. In a first step, providing M11 a waveguide structure comprising a core layer 2 having a first refractive index and a first thermal conductivity. The core layer 2 is arranged between a first cladding layer 3 and a second cladding layer 4. The first and second cladding layers 4 have a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity.

[0050] In a second step, etching M12 at least a portion of the second cladding layer 4 such that the removed area of the cladding layer forms a cavity 11.

[0051] In some embodiments, the etching M12 comprises etching M12 at least a portion of the core layer 2 to form a doped waveguide core of a predetermined width 14. Preferably, in these embodiments, the annealing M14 of the rare earth doped core layer is performed by a laser beam 13.

[0052] In a third step, injecting M13 a rare earth element 12 into the core layer 2 to provide at least one of a doped core layer 2, a doped first cladding layer 3 and a doped second cladding layer 4. The doping is performed by deposition through the cavity 11.

[0053] In a fourth step, annealing M14 at least one of the rare earth doped core layer 2, the first cladding layer 3 and the doped second cladding layer 4 with a first temperature. The annealing M14 is performed by a laser beam 13 irradiated into the cavity 11. In some embodiments, the first temperature is between about 600°C and 1250°C. In a preferred embodiment, the first temperature is preferably about 1000°C. Typically, the annealing is performed for e.g. 60 minutes. In the annealing step, damages in and near the core layer structure that can have been caused by the injection of the rare earth element can be repaired. In another embodiment, the rare earth element is injected into the second cladding layer 4. In a further embodiment, the doped second cladding layer 4 is annealed.

[0054] Figure 2 A flow chart of a method for manufacturing a photonic integrated circuit 1 according to another embodiment of the application is shown.

[0055] Figure 2 The shown embodiment of the method M1 is based on Figure 1 The shown embodiment of the method M1, wherein the fourth step is performed in two different steps M14a and M14b, wherein step M14a is optional.

[0056] In this embodiment, the step of annealing M14 of the rare earth doped core layer is performed as follows. First, an absorber layer 8 comprising an absorber material is added M14a to the core layer 2. Then, the absorber layer 8 is irradiated M14 with a laser beam 13 having a wavelength that is absorbable in the absorber layer 8 to obtain a first temperature required for annealing. The laser is selected to have a wavelength that is absorbable in the absorber layer. In some embodiments, the absorber material comprises silicon. In another embodiment, the absorber material of the absorber layer is a metal, such as copper, iron, aluminum or an alloy. In one embodiment, the absorber material of the absorber layer has a significant absorption in the ultraviolet spectral region. In one embodiment, the laser beam 13 is a pulsed laser beam having a wavelength of less than 300 nm, in particular about 193 nm or about 248 nm. In a further embodiment, the laser has a wavelength in the visible spectral range, i.e. between 400 nm and about 700 nm. In a further embodiment, the laser beam has a wavelength in the near infrared spectral range, for example between 850 nm and 1100 nm, and is formed by nanosecond pulses.

[0057] In a further embodiment, step M14a is omitted and the laser is selected to have a wavelength that is absorbable in the material of the core layer.

[0058] Although not shown in Figure 1 and Figure 2 , in some embodiments, the method M1 can be extended to comprise further steps. In some embodiments, after annealing the doped core layer 2, a second cladding layer 4 is provided again on the doped core layer 2 within the cavity 11. This can be performed, for example, by applying a die-to-wafer bonding for depositing this layer and further layers. Then, a second core layer 5 having a first refractive index and a first thermal conductivity is provided on the second cladding layer 4, for example by deposition. Finally, a third cladding layer 6 having a second refractive index and a second thermal conductivity is provided on the second core layer 5.

[0059] As mentioned above, in some embodiments, during etching M12 of the first cladding layer, at least a portion of the core layer 2 is etched M12 to form a doped waveguide core of a predetermined width 14. In case of a second core layer 5 and a third cladding layer 6, depending on the predetermined width 14 of the core layer 2 and the thickness 4a of the second cladding layer 4, the optical mode 16 propagating through the waveguide core formed by the (first) core layer 2 also interacts with the second core layer 5, as will be further described below. In such embodiments, the second cladding layer 4 arranged between the (first) core layer 2 and the second core layer 5 forms an intermediate layer. In some embodiments, the cladding layers are formed with an oxide as a material. In these embodiments, one of the first cladding layer 3 and the third cladding layer 6 forms a top oxide layer TOP, the other one of the first cladding layer 3 and the third cladding layer 6 forms a bottom oxide layer BOX, and the second cladding layer 4 forms an interlayer oxide ILO. In preferred embodiments, the first cladding layer 3 forms the TOP, and the third cladding layer 6 forms the BOX, formed on a substrate such as a Si wafer (not shown). The TOP and BOX layers are typically relatively thick compared to the second cladding layer 4 (i.e. ILO) and the core layers 2, 5.

[0060] Figures 3a to 3c A series of cross-sections of the photonic integrated circuit 1 during manufacturing by the manufacturing method according to embodiments of the application is shown.

[0061] Figures 3a to 3c The shown series of cross-sections illustrates embodiments of a method of manufacturing a photonic integrated circuit 1, which method is based on and compatible with the method M1 described with reference to Figure 1 and Figure 2 The method M1 described with reference to

[0062] In Figure 3a , a waveguide structure is shown comprising a first core layer 2 having a first refractive index and a first thermal conductivity. The core layer 2 is arranged between a first cladding layer 3 and a second cladding layer 4. The first cladding layer 3 and the second cladding layer 4 have a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity.

[0063] In a preferred embodiment, the core material of core layer 2 is silicon nitride. Silicon nitride (SiN) or Si3N4 is chosen as the core material for the waveguide structure due to the contrast between its refractive index and that of common cladding materials such as oxides, particularly silicon oxide (SiO2). The deposited SiN is typically amorphous. During annealing at a first temperature, as described above, Si3N4 can be transformed into α-phase hexagonal Si3N4, β-phase hexagonal Si3N4, or γ-phase cubic Si3N4. Although SiN is the preferred core material for each core layer due to its low propagation loss, different materials are possible as core materials in other embodiments, such as Al2O3, silicon oxynitride (SiON), doped quartz glass, lithium niobate (LNOI), tantalum pentoxide (Ta2O5), etc.

[0064] In some embodiments, the coating material of the first coating layer 3 and the second coating layer 4 is an oxide. In a preferred embodiment, the coating material of the first coating layer 3 and the second coating layer 4 is silicon oxide (SiO2). Although SiO2 is a preferred material due to its low propagation loss, the coating material may also be one of SiOxCy or SiOxNy or their hydrogenated counterparts SiOxCy:H or SiOxNy:H, Al2O3, Y2O3, Y3Al5O12, doped silicon dioxide (e.g., phosphorus-doped SiO2, boron-doped SiO2 and its variants), or soda-lime silicate glass.

[0065] exist Figure 3b In this process, the first cladding layer 3 has been partially etched, such that the area of ​​the removed cladding layer forms a cavity 11, in which the core layer 2 is exposed. In this step, at least a portion of the core layer 2 has been etched to such an extent that a doped waveguide core of a predetermined width 14 is formed within a common cladding layer 7, which is formed by the first cladding layer 3 and the second cladding layer 4, thereby surrounding the core layer 2 except for the exposed area.

[0066] Furthermore, rare earth element 12 has been implanted into core layer 2, thereby forming a rare earth-doped core layer 2 suitable for optical amplifiers or even lasers. Depending on the application, the implanted rare earth element may include, for example, Erbium (Er), Ybium (Yb), Thulium (Tm), Neodymium (Nd), Terbium (Tb), Yttrium (Y), Cerium (Ce), Scandium (Sc), Holmium (Ho), Dysprosium (Dy), Lanthanum (La), Gadolinium (Gd), Lutetium (Lu), Samarium (Sm), Praseodymium (Pr), or combinations thereof in co-doped forms. Known techniques have been used to dope core layers with rare earth elements.

[0067] Figure 3cAn additional absorber layer 8 is shown deposited on the doped core layer 2. In some embodiments, the absorber layer 8 is deposited into the cavity 11 at low temperature by known PVD techniques. The absorber layer 8 comprises an absorber material. The absorber layer 8 is irradiated by a laser beam 13 having a wavelength that is absorbable in the absorber layer 8 to obtain a first temperature. This means that the absorber material of the absorber layer has a significant absorption at the wavelength of the laser beam. In some embodiments, the absorber material has an absorption in the ultraviolet spectral region. In some of these embodiments, the laser beam 13 is a pulsed laser beam with a wavelength of less than 300 nm, in particular of about 193 nm or of about 248 nm, preferably emitted by an excimer laser based on ArF at 193 nm and KrF at 248 nm. In some of these and further embodiments, the absorber material comprises silicon, so that the absorber layer is formed by depositing silicon on the doped core layer 2. In further embodiments, the absorber layer 8 is formed by a metal.

[0068] By irradiating the absorber material, heat is generated in the absorber material. This heat is transferred to the core layer 2, which has a higher thermal conductivity than the surrounding common cladding layer 7. However, heat is also dissipated into the common cladding layer 7 for at least annealing the part of the common cladding layer 7 adjacent to the core layer 2. Thus, an excessive loss of mode transfer to different layers can be reduced or avoided. Furthermore, since the laser annealing provides heat only in a local area and the cladding material has a low thermal conductivity, the heat dissipation into the common cladding layer 7 can be controlled not to affect the parts of the photonic integrated circuit 1 related to the back-end-of-line.

[0069] In some embodiments, the first temperature is between about 600 °C to 1250 °C. In preferred embodiments, the first temperature is about 1000 °C. Using a nanosecond pulsed laser, the heat is dissipated to a much smaller volume. Since the heat generated by the laser annealing is dissipated essentially within a distance of a few micrometers, the area can be limited to the locations on the photonic integrated circuit 1 where the temperature is higher than 600 °C. This allows having a back-end-of-line in areas outside the cavity 11. Thus, the application of the method for manufacturing the photonic integrated circuit 1 can be used for the back-end-of-line, thereby enabling the manufacturing of the photonic integrated circuit.

[0070] In some embodiments, the laser spot has a diameter between 0.1 mm to 5 mm on the absorber layer 8 for performing the annealing with the laser. In preferred embodiments, the diameter of the laser spot is between 2 mm to 3 mm. The profile of the laser spot can be Gaussian, flat-topped circular or even rectangular or any other suitable shape and intensity distribution.

[0071] Since heat is generated very rapidly on top of the additional absorber layer or directly in the RE-implanted Si3N4 during the annealing process, such as with a laser emitting nanosecond pulses, heat dissipation to the outside of the Si3N4 is challenging, requiring a longer thermal relaxation time. SiO2 is beneficial for the annealing itself, for repairing implant damage in the Si3N4 waveguide and other parts of the device more generally in its vicinity. Therefore, it is beneficial to implant defects into the core layer 2 if the heat generated by the annealing relaxes into the Si3N4 more slowly.

[0072] Figures 4a to 4f A series of cross-sections of the photonic integrated circuit 1 during manufacturing by a manufacturing method according to another embodiment of the application is shown.

[0073] The manufacturing process shown is based on the process shown in the previous series of cross-sections in Figures 3a to 3c However, instead of a strip waveguide, in this embodiment a RIB configuration is applied, in which the core layer 2 comprises an upper core layer 21 and a shallow core layer 22, the shallow core layer 22 having a thickness smaller than the thickness of the upper core layer 21.

[0074] In Figure 4a the core layer 2 comprises an upper core layer 21 and a shallow core layer 22, the upper core layer 21 and the shallow core layer 22 being surrounded by a first cladding layer 3 and a second cladding layer 4, both having a lower refractive index and a lower thermal conductivity than the core layer 21, as described above. In Figure 4b In Figure 4c the core layer 2 after doping with a rare earth element 12 is shown. Within the upper core layer 21 and the shallow core layer 22, regions of the doped upper part 211 of the core layer forming the upper core layer 21 and the doped shallow core part 221 of the shallow layer 22 are formed. These regions are mostly below the exposed part of the core layer 2. The penetration depth of the doping can be controlled using well-known techniques.

[0075] In Figure 4d the absorber layer 8 is deposited on the exposed doped core layer 2 and the exposed part of the cladding layer 3. As described above, this step is generally optional and facilitates the absorption of a subsequent laser irradiation, as described before. In Figure 4e In

[0076] In Figure 4fIn some embodiments, the second layer 4 is removed by etching. In some embodiments, the second layer 4 is removed by etching to fill the cavity 8, such that the doped core 2, including the doped upper portion 21 1 and the doped shallow portion 221, forms a waveguide in the photonic integrated circuit together with the first cladding layer 3 and the second cladding layer 4. In such a waveguide, the size of the optical mode can be controlled by design by the dimensions of the upper core layer 21 and the shallow core layer 22.

[0077] Figure 5 A flow chart of an alternative method for manufacturing a photonic integrated circuit 1 according to an embodiment of the present application is shown.

[0078] The alternative method M2 for manufacturing a photonic integrated circuit 1 comprises at least six steps M21 to M26, wherein the last two steps M25 and M26 are optional.

[0079] First, a core layer 2 is provided having a first refractive index and a first thermal conductivity. The core layer 2 is arranged on a first cladding layer 3 and has a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity.

[0080] In a further step, a rare earth element 12 is implanted M22 into at least one of the core layer 2 and the first cladding layer.

[0081] Then, the at least one doped core layer 2 and the doped first cladding layer 3 are annealed M23 at a temperature between about 600 °C and 1250 °C, preferably at a temperature of about 1000 °C. In a further step, the core layer 2 is bonded M24 to a second cladding layer 4 having a second refractive index and a second thermal conductivity. The bonding of the core layer 2 to the second cladding layer 4 can be performed by die-to-wafer bonding or wafer-to-wafer bonding.

[0082] In some of these embodiments, the bonding of the core layer 2 to the second cladding layer 4 is performed by wafer-to-wafer bonding. Wafer-to-wafer bonding is the most simplified process and involves fewer steps than the die-to-wafer bonding steps described above, as it does not involve local etching or local opening LOCA.

[0083] In some embodiments, the method further comprises the following steps. A second core layer 5 is provided M25 on the second cladding layer 4, having a first refractive index and a first thermal conductivity and having a predetermined width 14. Further, a third cladding layer 6 is provided on the second core layer 5, the third cladding layer 6 having a second refractive index and a second thermal conductivity.

[0084] In an alternative embodiment of the last steps M25 and M26 of the method M2, a second core layer 4 having a first refractive index and a first thermal conductivity and having a predetermined width 14 is provided on the second cladding layer 4. To obtain a second core layer having a predetermined width 14, the third cladding layer can be opened by local etching or LOCA to etch a portion of the second core layer to form an undoped core waveguide as described above. Then, M26 a third cladding layer 6 is provided deposited on the second core layer 4. The third cladding layer 6 has a second refractive index and a second thermal conductivity.

[0085] Figures 6 to 11 A cross-section of a photonic integrated circuit 1 according to some example embodiments of the present application is shown. It is to be understood that other configurations of the photonic integrated circuit 1 can also be implemented using the techniques described above with reference to Figures 1 to 4f .

[0086] Figures 6 to 11 The shown photonic integrated circuit 1 can be manufactured by the method M1 described above with reference to Figure 1 and Figure 2 or by the method M2 described above with reference to Figure 5 .

[0087] Figure 6 The shown photonic integrated circuit 1 comprises a first cladding layer 3 and a first core layer 2 arranged on the first cladding layer 3. The first core layer 2 has a first core thickness 2a. A second cladding layer 4 is arranged on the first core layer 2 having a first thickness 4a. Further, a second core layer 5 is arranged on the second cladding layer 4. Finally, a third cladding layer 6 is arranged on the second core layer 5. The core layers 2 to cladding layers 6 are stacked in a vertical direction Z, which is perpendicular to the surface la of the photonic integrated circuit 1 and the waveguide structure. It is to be understood that the direction of the waveguide in which the signal light propagates is substantially perpendicular to the drawing plane of the figure.

[0088] The first core layer 2 and the second core layer 5 have a first refractive index and a first thermal conductivity. As described above with reference to Figures 3a to 3c , in a preferred embodiment, the core material of the core layer 2 is silicon nitride. Silicon nitride, SiN or Si3N4, is chosen as core material of the waveguide structure due to its refractive index which forms a contrast with respect to the refractive index of common cladding layer materials such as oxides, in particular silicon oxide Si02. Deposited SiN is typically an amorphous material. Upon annealing with a first temperature, Si3N4 can be transformed into alpha-phase hexagonal Si3N4 or beta-phase hexagonal Si3N4 or gamma-phase cubic Si3N4 as described above. Although SiN is the preferred core material for each core layer due to its low propagation loss, different materials as core material are also possible in further embodiments, such as AI2O3, silicon oxynitride SiON, doped quartz glass, lithium niobate LNOI, Ta205 tantalum pentoxide, etc.

[0089] Furthermore, the first cladding layer 3, the second cladding layer 4 and the third cladding layer 6 have a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity. As mentioned above with reference to Figures 3a to 3c In some embodiments, the cladding material of the first cladding layer 3 and the second cladding layer 4 is an oxide. In preferred embodiments, the cladding material of the first cladding layer 3 and the second cladding layer 4 is silicon oxide Si02. Although Si02 is a preferred material due to its low propagation loss, the cladding layer material can also be one of SiOxCy or SiOxNy or their hydrogenated counterparts SiOxCy:H or SiOxNy:H, AI2O3, Y2O3, Y3Al50I2, doped silica (e.g. phosphorous doped Si02, boron doped Si02 and variants thereof) or soda-lime silicate glass.

[0090] In such embodiments, one of the first cladding layer 3 and the third cladding layer 6 forms a top oxide layer TOP, the other of the first cladding layer 3 and the third cladding layer 6 forms a bottom oxide layer BOX, and the second cladding layer 4 forms an interlayer oxide ILO. In preferred embodiments, the first cladding layer 3 forms the TOP and the third cladding layer 6 forms the BOX, formed on a substrate such as a Si wafer (not shown). The TOP and BOX layers are typically relatively thick compared to the second cladding layer 4 (i.e. the ILO) and the core layers 2, 5.

[0091] The layer thickness of the first cladding layer 3 and the third cladding layer 6 is thick compared to the first core layer 2 and the second core layer 5 and the second cladding layer 4, which forms an intermediate layer or in preferred embodiments the ILO between the core layers 2, 5. In this embodiment, the first core thickness of the first core layer 2 is smaller than the second core thickness of the second core layer 5. In preferred embodiments, the first core thickness 2a is about 200 nm and the second core thickness 5a is about 350 nm. These core thicknesses can be adjusted by the RIB process. Depending on the application, the first thickness 4a of the intermediate second cladding layer 4 is typically of the same order of magnitude as the first core thickness 2a and the second core thickness 5a. Thus, in preferred embodiments, the first core thickness 2a is about 200 nm and the second core thickness 5a is about 350 nm. In some embodiments, the predetermined width 14 is between 0.5 pm and 2 pm. The effective cross-sectional area 15, which is the product of the second core thickness 5a and the predetermined width 14, is between 0.3 pm 2 and 5 pm 2 .

[0092] In such embodiments of the photonic integrated circuit 1 as shown in Figures 6 to 8 , at least one of the first core layer 2 and the second core layer 5 is doped with a rare earth element 12 to function as an integrated amplifier or laser. In the present embodiment, the first core layer 2 is doped with a rare earth element 12.

[0093] In such an embodiment of the photonic integrated circuit 1, at least one of the first core layer 2 and the second core layer 5 has a predetermined width 14. The ratio of the predetermined width 14 to the first thickness 4a of the second cladding layer 4 is determined for an efficient mode coupling between the first core layer 2 or the second core layer 5. This means that the ratio is chosen according to the required position of the optical mode 16 propagating in the waveguide structure of the first and second core layer 2, 5 and the first to third cladding layer 3, 4, 6. In the present embodiment, due to the relatively small predetermined width 14, a small ratio is achieved, which leads to a reduction of the interaction, so that the mode is confined in the first unetched core layer 2 with a very large lateral extension.

[0094] In the present embodiment, the second core layer 5 has a relatively small predetermined width 14, wherein the second core thickness 5a of the second core layer 5 is smaller than the first core thickness 2a of the first core layer 2.

[0095] Figure 7 A cross section of a photonic integrated circuit 1 according to another embodiment of the present application is shown.

[0096] In Figure 7 The embodiment of the photonic integrated circuit 1 shown, the second core layer 5 has been locally etched, so that the predetermined width 14 of the second core layer 5 is larger, so that the ratio is also larger than the ratio in Figure 6 Due to the enlarged predetermined width 14, the optical mode 16 is mainly located in the second core layer 5, instead of being located in the first core layer 2 as Figure 6 shown. In this way, by designing an appropriate predetermined width 14, it is possible to control the propagation of the optical mode 16 in an integrated amplifier or integrated laser. Furthermore, compared to Figures 4a to 4f the optical mode 16 is enlarged, so that it is possible to reduce the power density or intensity of the optical mode, thereby enabling a larger output power of the integrated amplifier or laser.

[0097] Figure 8 A cross section of a photonic integrated circuit 1 according to another embodiment of the present application is shown.

[0098] Compared to the embodiment of the photonic integrated circuit 1 shown in Figure 7 In this embodiment, the second core layer 2 is doped with the rare earth element 12. Although in the above described methods M1, M2, the first core layer 2 has been doped with the rare earth element 12, it is to be understood that the above described methods M1 and M2 can also be applied to the structure of the photonic integrated circuit 1, e.g. by interchanging the first core layer 2 and the second core layer 5.

[0099] Figure 9 A cross section of a photonic integrated circuit 1 according to another embodiment of the present application is shown.

[0100] Figures 6 to 8The previous embodiments of the present application present a core layer 2 and a core layer 5 in a "slot waveguide configuration" in which the rare earth element 12 is injected in a dedicated host core layer. In Figures 9 to 11 In the embodiment shown, an improved "slot configuration" is achieved, since the host for the doping is an intermediate second cladding layer 4 made of phosphosilicate glass. In further embodiments, the intermediate second cladding layer 4 comprises and can be made of SiO2, Al2O3 or SiON. In these embodiments, the rare earth element 12 is erbium Er.

[0101] With this configuration, the overlap of the optical mode 16 with the Er ions at the center of the waveguide structure is maximized. Moreover, the first core layer 2 has a first predetermined width 17 similar to the (second) predetermined width 14 of the second core layer 5. Figure 9 Embodiments of the present application include a manufacturability challenge to precisely align the first core layer 2 and the second core layer 5 in the vertical direction.

[0102] Figure 10 A cross section of a photonic integrated circuit according to another embodiment of the present application is shown.

[0103] Figure 10 A lateral misalignment 18 between the first predetermined width 14 and the second predetermined width 17 on the optical mode 16 is shown. In case of such existing misalignment 18, the optical mode 16 exhibits a polarization rotation in case of such misalignment 18, which can be detrimental for the performance of the photonic integrated circuit 1 configured as an amplifier. Therefore, such misalignment should be avoided.

[0104] Figure 11 A cross section of a photonic integrated circuit according to another embodiment of the present application is shown.

[0105] Figure 11 A misalignment tolerant design is shown, in which one of the first predetermined width 17 and the second predetermined width 14 of the two core layers 2, 5 is extended. In the present embodiment, the first core layer 2 has a first predetermined width 17, and the second predetermined width 14 of the second core layer 5 is smaller than the first predetermined width 17. Thus, the first predetermined width 17 of the first core layer 2 is larger than the second predetermined width 14 of the second core layer 5. In the present embodiment, the first core layer 2 is arranged above the second core layer 5, such that the second core layer 5 is surrounded by the first core layer 2 on a projection of the second core layer 5 in the vertical direction Z perpendicular to the direction of the waveguide, i.e. the surface of the photonic integrated circuit. This ensures a good confinement of the optical mode 16 propagating along the waveguide and prevents a polarization rotation of the optical mode 16 due to a possible misalignment 18, as discussed with reference to the Figure 10 embodiments of the present application.

[0106] In the above detailed description, various features have been combined in one or more examples for improved illustration. However, it should be clear to the skilled person that the above description is merely illustrative and not restrictive in any way. It serves to cover all alternatives, modifications and equivalents of the various features and exemplary embodiments. Many other examples will be immediately apparent to the skilled person based on the above description in view of the knowledge in the art.

[0107] The exemplary embodiments have been chosen and described in order to best present the principles of the application and its application. As such, the skilled person can best modify and utilize the application and its various exemplary embodiments for the intended purposes in view of the above description. In the claims and the specification, the terms "comprise" and "have" are used as the neutral language equivalents of the corresponding terms "include" and "contain". Furthermore, the use of the terms "one", "any" and "an" should not in principle exclude a plurality of features and components described in this way.

[0108] While at least one exemplary embodiment of the present application has been disclosed herein, it should be understood that modifications, substitutions and alternatives can become apparent to those skilled in the art and can be made without departing from the scope of the disclosure. The disclosure is intended to cover any adaptations or variations of the exemplary embodiments. Furthermore, in the disclosure, the terms "comprise" or "contain" do not exclude other elements or steps, the terms "a" or "an" do not exclude a plurality, and the term "or" means either one or both. Furthermore, features or steps which have been described can also be used in combination with other features or steps and in any order, unless the disclosure or context clearly indicates otherwise. The disclosure hereby incorporates by reference the complete disclosure of any patent or application from which it claims the benefit or priority.

[0109] List of used reference signs

[0110] 1 photonic integrated circuit

[0111] 1a surface of the photonic integrated circuit

[0112] 2 (first) core layer

[0113] 2a first core thickness

[0114] 3 first cladding layer

[0115] 4 intermediate second cladding layer

[0116] 4 second cladding layer

[0117] 4a first thickness

[0118] 5 second core layer

[0119] 5a second core thickness

[0120] 6 third cladding layer

[0121] 7 common cladding layer

[0122] 8 absorber layer

[0123] 11 cavity

[0124] 12 rare earth element

[0125] 13 laser beam

[0126] 14 (second) predetermined width

[0127] 15 effective cross-sectional area

[0128] 16 optical mode

[0129] 17 first predetermined width

[0130] 18 misalignment

[0131] 21 upper part of the core layer

[0132] 211 doped (and annealed) upper part of the core layer

[0133] 22 shallow part of the core layer

[0134] 221 doped (and annealed) shallow part of the core layer

[0135] M1, M2 method

[0136] M11 - M14b method steps

[0137] M21 - M26 method steps

Claims

1. A method (Ml) for manufacturing a photonic integrated circuit (1), the method comprising: providing (Ml l) a waveguide structure comprising a core layer (2) having a first refractive index and a first thermal conductivity, the core layer (2) being arranged between a first cladding layer (3) and a second cladding layer (4), the first cladding layer (3) and the second cladding layer (4) having a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity; locally etching (M12) at least a portion of the second cladding layer (4) such that the removed cladding layer area forms a cavity (11), injecting (M13) a rare earth element (12) into at least one of the core layer (2), the first cladding layer (1) and the second cladding layer (4) through the cavity (11), and annealing (M14) at least one of the rare earth doped core layer (2), the first cladding layer (3) and the second cladding layer (4) with a first temperature, wherein the annealing (M14) is performed by a laser beam (13) irradiated into the cavity (11).

2. The method of claim 1, wherein, The locally etching (M12) of the second cladding layer (4) comprises locally etching (M12) the second cladding layer (4) such that the removed cladding layer area forms a cavity (11) in which the core layer (2) is exposed, wherein the etching (M12) in particular comprises etching (M12) at least a portion of the core layer (2) to form a doped waveguide core of a predetermined width (14).

3. The method of claim 1 or 2, wherein, The annealing (M14) comprises: adding (M14a) an absorber layer (8) comprising an absorber material into the cavity (11), irradiating (M14b) the absorber layer (8) by the laser beam (13) of a wavelength that is absorbable in the absorber layer (8) to obtain the first temperature.

4. The method of claim 3, wherein, The absorber material of the absorber layer has a significant absorption in the ultraviolet spectral region, the laser beam (13) being a pulsed laser beam of a wavelength of less than 300 nm, in particular of about 193 nm or about 248 nm.

5. The method of any one of claims 2 to 4, wherein, The absorber material comprises one of silicon and a metal.

6. The method according to any one of the preceding claims, wherein, The core material of the core layer (2) is silicon nitride.

7. The method according to any of the preceding claims, wherein, The cladding material of the first cladding layer and the second cladding layer (4) is an oxide, in particular silicon oxide.

8. The method of any of the preceding claims, wherein, The first temperature is between about 600 °C and 1250 °C, preferably about 1000 °C.

9. The method according to any of the preceding claims, further comprising: providing the second cladding layer (4) on the doped core layer (2) within the cavity (11), preferably by applying a die-to-wafer bonding, providing a second core layer (5) having the first refractive index and the first thermal conductivity on the second cladding layer (4), and providing a third cladding layer (6) having the second refractive index and the second thermal conductivity on the second core layer (5).

10. A photonic integrated circuit (1), in particular manufactured by the method according to any one of claims 1 to 9, the photonic integrated circuit (1) comprising: a first cladding layer (3), a first core layer (2) arranged on the first cladding layer (3), a second cladding layer (4) with a first thickness (4a) arranged on the first core layer (2), a second core layer (5) arranged on the second cladding layer (4), and a third cladding layer (6) arranged on the second core layer (5), wherein the first core layer (2) and the second core layer (5) have a first refractive index and a first thermal conductivity, wherein each of the first cladding layer (3), the second cladding layer (4), and the third cladding layer (6) has a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity, wherein at least one of the first core layer (2), the second cladding layer (4), and the second core layer (5) is doped with a rare earth element (12), wherein at least one of the first core layer (2) and the second core layer (5) has a predetermined width (14), wherein a ratio of the predetermined width (14) to the first thickness (4a) is determined for an effective mode coupling between the first core layer (2) or the second core layer (5).

11. The photonic integrated circuit of claim 10, wherein, the first core layer (5) is doped with the rare earth element (12), and wherein the second core layer (2) has the predetermined width (14), wherein a second core thickness (5a) of the second core layer (5) is greater than a first core thickness (2a) of the first core layer (2).

12. The photonic integrated circuit of claim 11, wherein, said predetermined width (14) is between 0.5 pm and 2 pm, and wherein an effective cross-sectional area (15) being the product of said first thickness (4a) and said predetermined width (14) is between 0.25 pm 2 to 1.5 pm 2 between.

13. The photonic integrated circuit of claim 11, wherein, the first core layer (2) has a first predetermined width (17), and the second core layer (5) has a second predetermined width (18) smaller than the first predetermined width (17), wherein the first core layer (2) is arranged above the second core layer (5).

14. A method (M2) for manufacturing a photonic integrated circuit (1), the method comprising: providing (M21) a core layer (2) having a first refractive index and a first thermal conductivity, the core layer (2) being arranged on a first cladding layer (3) having a second refractive index lower than the first refractive index and a second thermal conductivity lower than the first thermal conductivity, injecting (M22) a rare earth element (12) into at least one of the core layer (2) and the first cladding layer (3), annealing (M23) at least one of the doped core layer (2) and the doped first cladding layer (3) at a temperature between about 600 °C to 1000 °C, and bonding (M24) the core layer (2) to a second cladding layer (4) having the second refractive index and the second thermal conductivity, wherein the bonding of the core layer (2) to the second cladding layer (4) is performed by a die-to-wafer bonding or a wafer-to-wafer bonding.

15. The method according to claim 14, further comprising: providing (M25) a second core layer (5) having the first refractive index and the first thermal conductivity and having a predetermined width (14) arranged on the second cladding layer (4), and providing (M26) a third cladding layer (6) having the second refractive index and the second thermal conductivity arranged on the second core layer (5).

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