Expansion module, CPU module, system and communication method

Abstract

The invention relates to an extension module, a CPU module, a system and a communication method. The extension module is connected to a plurality of row buses, and is provided with: an interface for inputting and outputting an external signal; and a communication circuit communicating via the first serial bus and the second serial bus, the communication circuit has a first slave communication function for performing communication via the first serial bus, a second slave communication function for performing communication via the second serial bus, and a master communication function for performing communication via the second serial bus so as to be able to switch between active and inactive. The performance of a system provided with a plurality of modules communicably connected via a bus can be improved.

Description

[0001] This application is a divisional application of the patent application with the application date of June 25, 2021 and the application number of 202110709373.6, the patent application is entitled "Extension module, CPU module, system and communication method". TECHNICAL FIELD

[0002] The present application relates to an extension module, a CPU module, a system and a communication method. BACKGROUND

[0003] In the past, a system provided with a plurality of modules communicably connected via a bus, such as a PLC (Programable Logic Controller), is known. For example, Patent Literature 1 discloses a PLC constituted by a PLC module and a selection module, and transmitting data of the selection module to a control device by communication of a fixed cycle.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2003-202907 SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] In a system provided with a plurality of modules communicably connected via a bus, it is desirable to improve performance such as improvement of expandability of I / O with an external device such as a field device.

[0009] The present disclosure is completed in view of this situation, and aims to improve the performance of a system provided with a plurality of modules communicably connected via a bus.

[0010] MEANS FOR SOLVING THE PROBLEMS

[0011] Some embodiments relate to an extension module that is an extension module connected to a plurality of serial buses, and has: an interface that performs input and output of an external signal; and a communication circuit that performs communication via a first serial bus and a second serial bus, the communication circuit having a first slave communication function that performs communication via the first serial bus, a second slave communication function that performs communication via the second serial bus, a third slave communication function that performs communication by integrating the first serial bus and the second serial bus, and a master communication function that performs communication via the second serial bus, in a manner that enables switching between active and inactive for each, the first slave communication function and the third slave communication function each including a function of returning a response to a command sent to the own station received from a CPU module, and relaying a command sent to another station received from the CPU module, and relaying a response received from another station, the second slave communication function including a function of returning a response to a command sent to the own station received from the CPU module or another station, and relaying a command sent to another station received from the CPU module or another station, and relaying a response received from another station, and the master communication function including a function of sending a command to another station and receiving a response from the other station. According to the extension module of some embodiments, in a system using the extension module, performance is improved in terms of an increase in the expandability of I / O between the own station and an external device.

[0012] In one embodiment, the extension module can further have a separation circuit that separates the second serial bus. Thus, when the second serial bus is separated, data flowing in one of the buses that is separated does not enter the other bus, so that the waiting time when communication competes can be reduced, and the input and output response can be speeded up.

[0013] In one embodiment, the communication circuit can also deactivate the other two functions when any one of the second slave communication function, the third slave communication function, and the master communication function is activated. Thus, among the plurality of functions using the second serial bus, if one function is activated, the other functions are deactivated, so that the possibility of an adverse event, such as an inability to perform communication via the second serial bus due to an error setting, is reduced.

[0014] In one embodiment, the extension module can further have an arithmetic circuit that executes a program, and when the master communication function is active, the arithmetic circuit performs an arithmetic process on a response received from another station as a destination of a command and determines an output value. Thus, by providing the extension module with the arithmetic circuit, the input and output response and the like can be processed without the CPU module.

[0015] In one embodiment, the communication circuitry can transmit the output value to the other station via the second serial bus when the main communication function is active. Thus, the communication circuitry transmits the output value to the other station, and it is possible to output an output signal including the output value to an external device via the interface of the other station, and to improve the expandability of I / O with the external device.

[0016] Some embodiments relate to a CPU module connected to a plurality of serial buses, and having communication circuitry that communicates via a first serial bus and a second serial bus, the communication circuitry having a first main communication function that communicates via the first serial bus, a second main communication function that communicates via the second serial bus, and a third main communication function that integrates the first serial bus and the second serial bus to communicate, in a manner that enables switching between active and inactive for each, the first, second, and third main communication functions each including a function of transmitting a command to another station and receiving a response from the other station. According to some embodiments, the CPU module enables easy change in the usage of a plurality of serial buses by switching the configuration of the communication circuitry, and thus improves the performance of a system using the CPU module.

[0017] Some embodiments relate to a system having a first serial bus, a second serial bus, a CPU module, and a plurality of expansion modules, in which the CPU module and the plurality of expansion modules are connected to the first serial bus and the second serial bus. According to some embodiments, the system enables the use of a plurality of serial buses, and thus improves the performance of the system compared to a configuration that enables the use of only a single serial bus.

[0018] In one embodiment, a communication method performed by the above system can include a step in which one of the expansion modules separates the second serial bus into two, a step in which the CPU module communicates with the plurality of expansion modules via the first serial bus, a step in which the CPU module communicates with an expansion module connected to one of the separated second serial buses via the one second serial bus, and a step in which two or more expansion modules connected to the other of the separated second serial buses communicate with each other via the other second serial bus. Thus, if the second serial bus is separated, data flowing in one of the separated buses does not enter the other bus, and thus it is possible to reduce the waiting time when communication competes, and to speed up the response to input and output.

[0019] In one embodiment, the communication method performed by the above system can also include: a step of integrating the first serial bus and the second serial bus by the CPU module and the plurality of extension modules; and a step of communicating by the CPU module and the plurality of extension modules via the integrated first serial bus and second serial bus. As a result, since communication is performed via the integrated plurality of serial buses, the communication speed is improved compared to a structure in which communication is performed via a single serial bus, for example.

[0020] Effects of Invention

[0021] According to the present disclosure, it is possible to improve the performance of a system having a plurality of modules communicably connected via a bus. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a block diagram showing a first example of a PLC related to a comparative example.

[0023] Figure 2 is a block diagram showing a second example of a PLC related to a comparative example.

[0024] Figure 3 is a block diagram showing a third example of a PLC related to a comparative example.

[0025] Figure 4 is a diagram showing an example of communication scheduling of a PLC related to a comparative example.

[0026] Figure 5 is a block diagram showing a structural example of a system related to one embodiment of the present disclosure.

[0027] Figure 6 is a diagram showing an example of configuration of an inter-extension module communication mode of a system related to one embodiment of the present disclosure.

[0028] Figure 7 is a flowchart showing an example of operation of a system related to one embodiment of the present disclosure being set to an inter-extension module communication mode and starting communication.

[0029] Figure 8 is a flowchart showing an example of operation of inter-extension module communication of a system related to one embodiment of the present disclosure.

[0030] Figure 9 is a flowchart showing an example of operation of normal communication or high-speed communication in a system related to one embodiment of the present disclosure.

[0031] Figure 10 is a diagram showing an example of configuration of a high-speed communication mode of a system related to one embodiment of the present disclosure.

[0032] Figure 11 is a flowchart showing an example of an operation in which a system according to an embodiment of the present disclosure sets a high-speed communication mode and starts communication.

[0033] Figure 12 is a diagram showing another example of a configuration of an I / O communication mode of a system according to an embodiment of the present disclosure.

[0034] Figure 13 is a diagram showing a modification example of a configuration of a system according to an embodiment of the present disclosure.

[0035] Explanation of Reference Numerals

[0036] A System

[0037] 1, 2 Serial bus

[0038] 1a, 2a Downstream

[0039] 1b, 2b Upstream

[0040] 10 CPU module

[0041] 11 Arithmetic circuit

[0042] 12 Master communication circuit

[0043] 13 Master communication function [0]

[0044] 14 Master communication function [1]

[0045] 15 Master communication function [0, 1]

[0046] 20 to 60 Expansion module

[0047] 21 to 61 External interface

[0048] 22 to 62 Arithmetic circuit

[0049] 23 to 63 Master / slave communication circuit

[0050] 24 to 64 Slave communication function [0]

[0051] 25 to 65 Slave communication function [1]

[0052] 26 to 66 Slave communication function [0, 1]

[0053] 27 to 67 Master communication function [1]

[0054] 28 to 68 Separation circuit DETAILED DESCRIPTION

[0055] (Comparative Example)

[0056] First, the PLC involved in the comparative example is described, and the problem points thereof are discussed.

[0057] The bus of the PLC is roughly classified into two types. Specifically, the parallel bus type as shown in Figure 1 and the serial bus type as shown in Figure 2 are known. Furthermore, as an extension module of the PLC, in addition to the general module, a special extension module having a dedicated external interface and a dedicated arithmetic circuit is used, as shown in Figure 3 for example. The special extension module can be used in both the parallel bus type and the serial bus type.

[0058] Parallel bus type

[0059] As shown in Figure 1 , in the parallel bus type, a CPU module and an extension module are generally mounted on a base module. The modules are connected by a parallel bus wired on the base module. The CPU module becomes a communication master, and performs read / write access to the extension module via the parallel bus. The parallel bus is a bus capable of bidirectional communication.

[0060] Serial bus type

[0061] As shown in Figure 2 , in the serial bus type, a base module is generally not needed, and adjacent modules are connected to each other by a serial bus. The CPU module becomes a communication master, and transmits a command to the extension module. The extension module that receives the command addressed to the station thereof returns a response to the CPU module. The serial bus is a unidirectional bus, and the command and the response are transmitted in a prescribed direction. When each extension module receives the command and the response addressed to the other station, it transmits them to the next extension module. Thus, the command and the response are transmitted out.

[0062] Special extension module

[0063] Generally, the processing of the input / output response is performed in such a manner that the CPU module reads an input value from the input module, and writes an output value to the output module after processing by the CPU module. On the other hand, in a specific high-speed application, for example, in the conventional method using the general extension module, the requirement for the response time cannot be satisfied in some cases. In this case, as shown in Figure 3 , the special extension module having the dedicated external interface and the dedicated arithmetic circuit is used, and the processing of the input / output response is performed in the special extension module without passing through the CPU module, thereby achieving high-speed of the response time.

[0064] (Problem points of the comparative example)

[0065] Parallel bus type

[0066] A parallel bus is a circuit topology of a multi-drop type. Therefore, the entire bus is occupied during an access, and the next access cannot be started until the one access ends. In addition, when the number of modules connected to the parallel bus increases, signal waveforms easily become disturbed, and thus it is difficult to increase the transfer speed.

[0067] Serial bus type

[0068] A serial bus is a circuit topology of a point-to-point type. Therefore, a stable signal waveform can be obtained regardless of the number of modules connected to the serial bus, and thus it is easy to increase the transfer speed. In addition, the number of signals to be transferred is also small compared to the parallel bus. For these reasons, in recent years, there is a tendency to adopt a serial bus. In addition, the serial bus does not have a case where the entire bus is occupied during an access as in the parallel bus. Therefore, by performing transmission and reception of a plurality of commands and responses on the serial bus at a time, the efficiency of use of the bus can be improved compared to the parallel bus.

[0069] However, even if the efficiency of use of the bus is improved, for example, in a case where a high-priority communication and a low-priority communication are mixed, it is sometimes not possible to meet the time requirement of the high-priority communication. In this regard, for example, as shown in Figure 4 , a method of dividing a time period by scheduling communications for each priority (i.e., time division) can be used, but there are disadvantages such as the scheduling management in the CPU module becoming complex.

[0070] Special extension module

[0071] The I / O that can be used for the processing of the input and output response within the special extension module is only the I / O connected to the dedicated external interface possessed by the special extension module itself. Therefore, in a case where it is desired to increase the number of I / Os, it is necessary to newly develop a dedicated special extension module, and there is a lack of expandability of the I / Os with external devices.

[0072] (System of the present disclosure)

[0073] The present disclosure aims to improve the expandability of the I / Os with external devices in a system having a plurality of modules communicably connected via a bus in view of the above-described problems. Hereinafter, a system related to an embodiment of the present disclosure will be described with reference to the drawings.

[0074] As shown in Figure 5As shown, the system A is provided with a plurality of serial buses 1 and 2, a CPU module 10, and a plurality of extension modules 20, 30, 40, 50, and 60. The number of serial buses provided in the system A is two or more. In addition, the number of extension modules provided in the system A is one or more. The CPU module 10 and the plurality of extension modules 20 to 60 are connected to the first serial bus 1 and the second serial bus 2. The system A functions as, for example, a PLC or a data logger.

[0075] The serial bus 1 includes a downstream la and an upstream lb.

[0076] The serial bus 2 includes a downstream 2a and an upstream 2b.

[0077] The CPU module 10 has an arithmetic circuit 11 and a main communication circuit 12.

[0078] The arithmetic circuit 11 can include a processor that executes an arbitrary control program and a memory that the processor can access. The processor is, for example, an MCU (Micro Controller Unit) or an MPU (Micro Processor Unit), but is not limited to these. Alternatively, the arithmetic circuit 11 can include a logic circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field-Programmable Gate Array).

[0079] The main communication circuit 12 includes a communication circuit that communicates via the serial buses 1 and 2. Specifically, the main communication circuit 12 includes a communication circuit that reads and writes the extension modules 20 to 60 via the serial buses 1 and 2. In the present embodiment, the main communication circuit 12 has a main communication function [0] 13, a main communication function [1] 14, and a main communication function [0, 1] 15 in a manner that can be switched to active / inactive, respectively.

[0080] The main communication function [0] 13 is a function of reading and writing the extension modules 20 to 60 in a channel using the serial bus 1.

[0081] Specifically, the main communication function [0] 13 includes a function of communicating via a channel using the serial bus 1, a function of transmitting a command to another station, and a function of receiving a response from another station.

[0082] The main communication function [1] 14 is a function of communicating via a channel using the serial bus 2.

[0083] Specifically, the master communication function [1] 14 includes a function of communicating via a channel using the serial bus 2, a function of transmitting a command to another station, and a function of receiving a response from another station.

[0084] The master communication function [0, 1] 15 is a function of reading and writing to the extension modules 20 to 60 in a channel in which the serial buses 1 and 2 are integrated.

[0085] Specifically, the master communication function [0, 1] 15 includes a function of communicating via a channel in which the serial buses 1 and 2 are integrated, a function of transmitting a command to another station, and a function of receiving a response from another station.

[0086] The extension module 20 is, for example, a basic digital input module, a digital output module, an analog input module, an analog output module, or a high-function module (for example, a sub CPU module, a communication module, or a positioning module, etc.) generally used in a PLC (Programable Logic Controller), but is not limited to these. The extension module 20 has an external interface 21, an arithmetic circuit 22, a master / slave communication circuit 23, and a separation circuit 28.

[0087] The external interface 21 includes, for example, an interface of inputting and outputting to an external device such as a field device. Via the external interface 21, a signal of external communication can be input and output in addition to a simple input and output signal.

[0088] The arithmetic circuit 22 can also include a processor that performs an operation within the extension module 20 by executing an arbitrary program, and a memory that the processor can access. The processor is, for example, an MCU or an MPU, but is not limited to these. Alternatively, the arithmetic circuit 22 can also include a logic circuit such as an ASIC or an FPGA.

[0089] The master / slave communication circuit 23 includes a communication circuit that communicates with the CPU module or other extension modules 30 to 60. The master / slave communication circuit 23 has a slave communication function [0] 24, a slave communication function [1] 25, a slave communication function [0, 1] 26, and a master communication function [1] 27 in a manner that can be switched between active and inactive respectively.

[0090] The slave communication function [0] 24 is a function of transmitting a command to another station and a response to the next module in response to a read and write from the CPU module 10 to the station in a channel using the serial bus 1.

[0091] Specifically, the slave communication function [0] 24 includes a function of communicating via a channel using the serial bus 1, a function of returning a response to a command addressed to the station itself received from the CPU module 10, a function of relaying a command addressed to another station received from the CPU module 10, and a function of relaying a response received from another station.

[0092] The slave communication function [1] 25 is a function of transmitting a command and a response addressed to another station to the next module in response to a read or write addressed to the station itself from the CPU module 10 or another extension module 30 to 60 in a channel using the serial bus 2.

[0093] Specifically, the slave communication function [1] 25 includes a function of communicating via a channel using the serial bus 2, a function of returning a response to a command addressed to the station itself received from the CPU module 10 or another station, a function of relaying a command addressed to another station received from the CPU module 10 or another station, and a function of relaying a response received from another station.

[0094] The slave communication function [0, 1] 26 is a function of transmitting a command and a response addressed to another station to the next module in response to a read or write addressed to the station itself from the CPU module 10 in a channel integrating the serial buses 1 and 2.

[0095] Specifically, the slave communication function [0, 1] 26 includes a function of communicating via a channel integrating the serial buses 1 and 2, a function of returning a response to a command addressed to the station itself received from the CPU module 10, a function of relaying a command addressed to another station received from the CPU module 10, and a function of relaying a response received from another station.

[0096] The master communication function [1] 27 is a function of performing a read or write to another extension module 30 to 60 in a channel using the serial bus 2.

[0097] Specifically, the master communication function [1] 27 includes a function of communicating via a channel using the serial bus 2, a function of transmitting a command to another station, and a function of receiving a response from another station.

[0098] Further, the master / slave communication circuit 23 controls a plurality of functions common to the serial bus used in communication in a manner that the functions are not simultaneously effective. For example, the master / slave communication circuit 23 deactivates other functions when any one of the slave communication function [0] 24 and the slave communication function [0, 1] 26 using the serial bus 1 in communication is activated. For another example, the master / slave communication circuit 23 deactivates other functions when any one of the slave communication function [1] 25, the slave communication function [0, 1] 26, and the master communication function [1] 27 using the serial bus 2 in communication is activated.

[0099] Alternatively, the master / slave communication circuit 23 can also disable other functions when the slave communication function [0] 24 and the slave communication function [1] 25 are enabled. Further, the master / slave communication circuit 23 can also disable other functions when the slave communication function [0, 1] 26 is enabled.

[0100] The separation circuit 28 includes a circuit that logically separates the serial bus 2 between an adjacent module. In the present embodiment, if the separation circuit 28 is on, the serial bus 2 is logically separated on the uplink side (left side in the figure) of the expansion module 20, that is, the CPU module 10 side. In this state, communication via the serial bus 2 is not performed between the expansion module 20 and the other module (the CPU module 10 in the figure) adjacent to the CPU module 10 side. On the other hand, if the separation circuit 28 is off, the serial bus 2 is logically connected on the uplink side of the expansion module 20. In addition, by the separation circuit 28, an embodiment in which the serial bus is logically separated / connected on the downlink side (right side in the figure), that is, the side opposite to the CPU module 10, instead of on the uplink side of the expansion module 20, can also be realized. Figure 5 Figure 5 Figure 5

[0101] The expansion modules 30 to 60 each have the same structure and functions as the expansion module 20. For the same structure and functions, the same names as the structure and functions of the expansion module 20 are given, and the reference numerals are changed to be marked. For example, the "external interface" possessed by the expansion modules 30, 40, 50, and 60 is marked as external interfaces 31, 41, 51, and 61, respectively.

[0102] Next, the operation of the system A according to the embodiment of the present disclosure will be described. The system A according to the embodiment of the present disclosure can operate in a plurality of modes including an inter-expansion module communication mode and a high-speed communication mode. Hereinafter, each mode will be described.

[0103] (inter-expansion module communication mode)

[0104] First, the inter-expansion module communication mode will be described. In the inter-expansion module communication mode, the serial bus 1 is used for normal communication, one of the serial buses 2 separated into two is used for normal communication, and the other is used for inter-expansion module communication. In the normal communication, the CPU module 10 is a master, and the other modules are slaves. In the inter-expansion module communication, a specific expansion module is a master, and the other expansion modules are slaves.

[0105] ​​​Reference is made to Figure 6 An example of the configuration for causing the system A to act in the inter- expansion module communication mode will be described. In this example, the expansion module 50 is the master and the expansion modules 40 and 60 are the slaves in the inter-expansion module communication. The input signal from the external device is inputted in the expansion module 40. The output signal is outputted to the external device by the expansion module 60.

[0106] Configuration of the master communication circuit of the CPU module

[0107] The master communication circuit 12 of the CPU module 10 activates the master communication function [0] 13 and the master communication function [1] 14 and deactivates the other functions (the master communication function [0, 1] 15). In Figure 6 In the drawing, the illustration of the functions which are deactivated is omitted for simplicity of the description.

[0108] Configuration of the master / slave communication circuit of the expansion module

[0109] The master / slave communication circuit 53 of the expansion module 50 activates the slave communication function [0] 54 and the master communication function [1] 57 and deactivates the other functions (the slave communication function [1] 55 and the slave communication function [0, 1] 56). Further, the master / slave communication circuits 23, 33, 43 and 63 of the other expansion modules 20, 30, 40 and 60 activate the slave communication functions [0] 24, 34, 44 and 64 and the slave communication functions [1] 25, 35, 45 and 65, respectively, and deactivate the other functions (the slave communication functions [0, 1] 26, 36, 46 and 66 and the master communication functions [1] 27, 37, 47 and 67). In Figure 6 In the drawing, the illustration of the functions which are deactivated is omitted for simplicity of the description.

[0110] Configuration of the separation circuit of the expansion module

[0111] The separation circuit 48 of the expansion module 40 sets the operation state to ON and logically separates the serial bus 2 between the expansion modules 30 and 40. Further, the separation circuits 28, 38, 58 and 68 of the other expansion modules 20, 30, 50 and 60 set the operation state to OFF and are connected to the serial bus 2, respectively. In Figure 6 In the drawing, the illustration of the separation circuits 28, 38, 58 and 68 whose operation state is OFF is omitted for simplicity of the description.

[0112] By the above configuration, a channel for general communication is formed using the serial bus 1. The channel for general communication using the serial bus 1 can be used independently of the serial bus 2. Further, a channel for general communication is formed using one of the separated serial buses 2 (here, the portion from the CPU module 10 to the expansion module 30). The channel for general communication using the one of the separated serial buses 2 can be used independently of the serial bus 1. Further, a channel for inter-expansion module communication is formed using the other of the separated serial buses 2 (here, the portion from the expansion modules 40 to 60). The channel for inter-expansion module communication using the other of the separated serial buses 2 can be used independently of the channel for general communication.

[0113] Referring to Figure 7 An example of an operation in which the system A is set to the inter-expansion module communication mode and communication is started will be described.

[0114] Step S100: The main communication circuit 12 of the CPU module 10 is configured. Specifically, in the example shown in Fig. 2, the main communication circuit 12 activates the main communication function [0] 13 and the main communication function [1] 14, and deactivates the other functions (the main communication function [0, 1] 15). Figure 6

[0115] Step S101: The master / slave communication circuits 23 to 63 of the expansion modules 20 to 60 are respectively configured. Specifically, in the example shown in Fig. 3, the master / slave communication circuit 53 of the expansion module 50 activates the slave communication function [0] 54 and the main communication function [1] 57, and deactivates the other functions (the slave communication function [1] 55 and the slave communication function [0, 1] 56). Further, the master / slave communication circuits 23, 33, 43, and 63 of the other expansion modules 20, 30, 40, and 60 respectively activate the slave communication functions [0] 24, 34, 44, and 64 and the slave communication functions [1] 25, 35, 45, and 65, and deactivate the other functions (the slave communication functions [0, 1] 26, 36, 46, and 66 and the main communication functions [1] 27, 37, 47, and 67). Figure 6 Step S102: The separation circuits 28 to 68 of the expansion modules 20 to 60 are respectively configured. Specifically, in the example shown in Fig. 4, the separation circuit 48 of the expansion module 40 sets the operation state to ON and logically separates the serial bus 2 between the expansion modules 30 and 40. Further, the separation circuits 28, 38, 58, and 68 of the other expansion modules 20, 30, 50, and 60 respectively set the operation state to OFF and connect to the serial bus 2.

[0116] Figure 6

[0117] ​​​Step S103: The system A starts the normal communication using the serial bus 1, the normal communication using one of the separated serial buses 2 (here, the part from the CPU module 10 to the expansion module 30), and the inter-expansion module communication using the other of the separated serial buses 2 (here, the part from the expansion modules 40 to 60).

[0118] Referring to Figure 8 , an example of the operation of the inter-expansion module communication of the system A in the inter-expansion module communication mode will be described.

[0119] Step S200: In Figure 6 the example shown, the expansion module 40 acquires an input value from an input signal 49 input via the external interface 41.

[0120] Step S201: The expansion module 50 reads the input value from the expansion module 40. Specifically, in Figure 6 the example shown, the master / slave communication circuit 53 of the expansion module 50 transmits a command 74 read via the uplink 2b of the serial bus 2 to the expansion module 40 by the master communication function [1] 57. The master / slave communication circuit 43 of the expansion module 40 returns a response 75 via the downlink 2a of the serial bus 2 by the slave communication function [1] 45.

[0121] Step S202: The expansion module 50 performs an input / output response processing operation by the arithmetic circuit 52 and decides an output value.

[0122] Step S203: The expansion module 50 writes the output value to the expansion module 60. Specifically, in Figure 6 the example shown, the master / slave communication circuit 53 of the expansion module 50 transmits a command 76 written via the downlink 2a of the serial bus 2 to the expansion module 60 by the master communication function [1] 57. The master / slave communication circuit 63 of the expansion module 60 returns a response 77 via the uplink 2b of the serial bus 2 by the slave communication function [1] 65.

[0123] Step S204: The expansion module 60 outputs an output signal 69 containing the output value via the external interface 61 (see Figure 6 ).

[0124] Referring to Figure 9 , an example of the operation of the normal communication of the system A in the inter-expansion module communication mode will be described.

[0125] Step S300: The CPU module 10 transmits a command to the expansion module. Specifically, in Figure 6In the example shown, the main communication circuit 12 of the CPU module 10 transmits the command 70 to the extension module 40 via the downlink la of the serial bus 1 through the main communication function [0] 13. Further, the main communication circuit 12 transmits the command 72 to the extension module 30 via the downlink 2a of the serial bus 2 through the main communication function [1] 14.

[0126] Step S301: The extension module that received the command returns a response. Specifically, the extension module 40 returns the response 71 via the uplink lb of the serial bus 1 through the slave communication function [0] 44. Further, the extension module 30 returns the response 73 via the uplink 2b of the serial bus 2 through the slave communication function [1] 35. Figure 6 In the example shown, the main communication circuit 12 of the CPU module 10 transmits the command 70 to the extension module 40 via the downlink la of the serial bus 1 through the main communication function [0] 13. Further, the main communication circuit 12 transmits the command 72 to the extension module 30 via the downlink 2a of the serial bus 2 through the main communication function [1] 14.

[0127] (High-speed communication mode)

[0128] Next, the high-speed communication mode is described. In the high-speed communication mode, high-speed communication is performed via a channel that integrates the serial buses 1 and 2. Specifically, as the downlink of the channel that integrates the serial buses 1 and 2, the downlink la of the serial bus 1 and the downlink 2a of the serial bus 2 are used. As the uplink of the channel that integrates the serial buses 1 and 2, the uplink lb of the serial bus 1 and the uplink 2b of the serial bus 2 are used. Thus, in the high-speed communication, the bit width of each of the downlink and the uplink becomes twice as compared with the above-described normal communication. In the high-speed communication, the CPU module 10 becomes the master, and the other modules become the slaves.

[0129] Reference is made to Figure 10 An example of the configuration for causing the system A to operate in the high-speed communication mode is described. In this example, the CPU module 10 becomes the master, and the extension modules 20 to 60 become the slaves.

[0130] Configuration of the main communication circuit of the CPU module

[0131] The main communication circuit 12 of the CPU module 10 activates the main communication function [0, 1] 15, and deactivates the other functions (the main communication function [0] 13 and the main communication function [1] 14). In Figure 10 In the drawing, the illustration of the functions that are deactivated is omitted for simplicity of description.

[0132] Configuration of the main / slave communication circuit of the extension module

[0133] The master / slave communication circuits 23 to 63 of the extension modules 20 to 60 make the slave communication functions [0, 1] 26 to 66 effective, respectively, and make the other functions (the slave communication functions [0] 24 to 64, the slave communication functions [1] 25 to 65, and the master communication functions [1] 27 to 67) ineffective, respectively. In Figure 10 In the following description, the illustration of the functions made ineffective is omitted for simplicity.

[0134] Configuration of the separation circuits of the extension modules

[0135] The separation circuits 28 to 68 of the extension modules 20 to 60 set the operation state to off and are connected to the serial bus 2, respectively. In Figure 10 In the following description, the illustration of the separation circuits 28 to 68 whose operation state is off is omitted for simplicity.

[0136] By the above configuration, the serial buses 1 and 2 are integrated to form a channel for high-speed communication.

[0137] Referring to Figure 11 , an example of an operation of starting communication with the system A set to the high-speed communication mode will be described.

[0138] Step S400: The master communication circuit 12 of the CPU module 10 is configured. Specifically, in the example shown in Figure 10 , the master communication circuit 12 makes the master communication functions [0, 1] 15 effective and makes the other functions (the master communication functions [0] 13 and the master communication functions [1] 14) ineffective.

[0139] Step S401: The master / slave communication circuits 23 to 63 of the extension modules 20 to 60 are configured, respectively. Specifically, in the example shown in Figure 10 , the master / slave communication circuits 23 to 63 make the slave communication functions [0, 1] 26 to 66 effective, respectively, and make the other functions (the slave communication functions [0] 24 to 64, the slave communication functions [1] 25 to 65, and the master communication functions [1] 27 to 67) ineffective, respectively.

[0140] The above steps S400 and S401, in other words, are operations of the CPU module 10 and the extension modules 20 to 60 to integrate the serial buses 1 and 2 to form a channel for high-speed communication.

[0141] Step S402: The separation circuits 28 to 68 of the extension modules 20 to 60 are configured, respectively. Specifically, in the example shown in Figure 10 , the separation circuits 28 to 68 of the extension modules 20 to 60 set the operation state to off and are connected to the serial bus 2, respectively.

[0142] Step S403: System A begins high-speed communication via a channel that integrates serial buses 1 and 2.

[0143] Next, we will explain an example of high-speed communication operation in System A under high-speed communication mode. In high-speed communication, the configuration details and the channel used differ from those in normal communication, but the operational flow remains the same. Therefore, the example of high-speed communication operation will also refer to the above. Figure 9 Please provide an explanation.

[0144] Step S300: CPU module 10 sends a command to the expansion module. Specifically, in Figure 10 In the example shown, the main communication circuit 12 of the CPU module 10 sends command 80 to the expansion module 40 via the main communication function [0,1] 15 and the downlinks 1a and 2a of serial buses 1 and 2. Furthermore, the main communication circuit 12 sends command 82 to the expansion module 60 via the main communication function [0,1] 15 and the downlinks 1a and 2a of serial buses 1 and 2.

[0145] Step S301: The extended module that received the command returns a response. Specifically, in Figure 10 In the example shown, the master / slave communication circuit 43 of the expansion module 40 returns a response 81 via uplink 1b and 2b of serial buses 1 and 2 through the slave communication function [0,1] 46. Furthermore, the master / slave communication circuit 63 of the expansion module 60 returns a response 83 via uplink 1b and 2b of serial buses 1 and 2 through the slave communication function [0,1] 66.

[0146] The effect of extending inter-module communication mode

[0147] exist Figure 6 In the example, expansion module 50, which functions as the master in inter-module communication, can directly read and write to expansion modules 40 and 60, which also function as expansion modules. Therefore, expansion module 50 can perform high-speed and intelligent input / output response processing using the arithmetic circuit 52 without the CPU module 10. Furthermore, since any external interface of the expansion module can be used depending on the configuration, it is compatible with, for example, expansion modules using… Figure 3 Compared to the structure of the special expansion module shown, it can make up for the lack of I / O units.

[0148] Furthermore, by using a separation circuit to separate the serial bus 2, a dedicated channel for communication between expansion modules can be ensured.

[0149] For example, with Figure 6 Compared to the implementation shown, Figure 12The difference in the example shown is that the decoupling circuit 48 is off (i.e., serial bus 2 is not decoupled). In this comparative example, command 90 is a broadcast command sent from CPU module 10 to all expansion modules 20-60. This broadcast communication can be considered part of normal communication. In this case, when the timing of the broadcast communication and the communication between expansion modules overlaps, a race condition occurs, and the input / output response time becomes longer. Furthermore, command 91 is an erroneous communication command sent from expansion module 50. Erroneous command communication can occur, for example, during device development. In this case, the erroneous command enters the channel on the non-decoupled side (upstream side), resulting in unnecessary error handling.

[0150] In this regard, such as Figure 6 As illustrated in the example, in this embodiment, commands other than those for inter-module communication will not enter the channel on the separated side (downlink side), thus reducing the waiting time when communication contention occurs. This enables faster input / output response. Furthermore, even in the channel on the non-separated side (uplink side), unwanted commands or responses from the separated side's channel can be prevented from entering.

[0151] The effect of high-speed communication mode

[0152] exist Figure 10 In the example shown, by integrating serial buses 1 and 2 into a single high-speed communication channel, communication can be performed at twice the speed of normal communication. Therefore, this high-speed communication mode is effective in applications such as high-speed data collection, when the data volume is large, or when the requested forwarding time is short.

[0153] Configuration effect

[0154] like Figure 6 as well as Figure 10 As shown in the example, according to this embodiment, the usage mode of the serial bus can be changed simply by configuring the main communication circuit 12 of the CPU module 10 and the main / slave communication circuits 23 to 63 and the separation circuits 28 to 68 of the expansion modules 20 to 60.

[0155] It should be noted that although this disclosure has been described based on the accompanying drawings and embodiments, those skilled in the art can make various modifications and variations based on this disclosure. Therefore, it should be noted that these modifications and variations are included within the scope of this disclosure. For example, the functions contained in various structures or steps can be logically reorganized without conflict, and multiple structures or steps can be combined into one or separated.

[0156] (Applications / Variations of Serial Buses)

[0157] For example, the number of bits of the signals of the downlink and the uplink of the serial buses is not limited to one bit, but can be two or more bits. In addition, the number of the serial buses is not limited to two, but can be three or more. Furthermore, the roles of the serial buses 1 and 2 can be interchanged.

[0158] (Application / Modification of the Communication Mode between the Expansion Modules)

[0159] The number of the expansion modules is one or more. In addition, the number of the expansion modules that become the master in the communication between the expansion modules can be two or more. Furthermore, the serial buses can be separated at a plurality of points by the separation circuits 28 to 68. In addition, the number of the serial buses that can be separated can be two or more.

[0160] (Application / Modification of the High-Speed Communication Mode)

[0161] The number of the expansion modules is one or more. In addition, the number of the serial buses that are integrated can be two or more.

[0162] (Application / Modification of the Expansion Modules)

[0163] A part of the expansion modules of the system A can not have the external interface. In addition, a part of the expansion modules can not have the arithmetic circuit. Furthermore, a part of the expansion modules can not have the separation circuit. In addition, a part of the expansion modules can not have the master communication function [1].

[0164] (Application / Modification of the Configuration)

[0165] Figure 13 The configuration and the operation example in the case where the communication between the expansion modules is not performed are shown as a modification example of the system A. Figure 6

[0166] Configuration of the Master Communication Circuit of the CPU Module

[0167] The master communication circuit 12 of the CPU module 10 activates the master communication function [0] 13 and the master communication function [1] 14, and deactivates the other functions (the master communication function [0, 1] 15). In the drawing, the illustration of the functions that are deactivated is omitted for the sake of simplification of the explanation. Figure 13

[0168] Configuration of the Master / Slave Communication Circuit of the Expansion Module

[0169] ​​The master / slave communication circuits 23 to 63 of the extension modules 20 to 60 make the slave communication functions [0] 24 to 64 and the slave communication functions [1] 25 to 65 effective, respectively, and make the other functions (the slave communication functions [0, 1] 26 to 66 and the master communication function [1] 27 to 67) ineffective. In Figure 13 In the following description, the illustration of the functions made ineffective is omitted for simplicity.

[0170] Configuration of the separation circuits of the extension modules

[0171] The separation circuits 28 to 68 of the extension modules 20 to 60 set the operation state to off, respectively, and are connected to the serial bus 2. In Figure 13 In the following description, the illustration of the separation circuits 28 to 68 with the operation state set to off is omitted for simplicity.

[0172] Operation in the modified example

[0173] With the above configuration, all the communications become only normal communications. In this case, the CPU module 10 becomes the master, and all the extension modules 20 to 60 become the slaves. The CPU module 10 sends a command to the destination extension module, and the extension module that received the command returns a response to the CPU module 10. The channel for the normal communication using the serial bus 1 and the channel for the normal communication using the serial bus 2 can be used independently of each other.

[0174] Example of normal communication using the serial bus 1

[0175] In the example shown in Figure 13 , the master communication circuit 12 of the CPU module 10 sends a command 70 to the extension module 40 via the downlink la of the serial bus 1 through the master communication function [0] 13. The master / slave communication circuit 43 of the extension module 40 returns a response 71 via the uplink lb of the serial bus 1 through the slave communication function [0] 44.

[0176] Example of normal communication using the serial bus 2

[0177] In the example shown in Figure 13 , the master communication circuit 12 of the CPU module 10 sends a command 78 to the extension module 60 via the downlink 2a of the serial bus 2 through the master communication function [1] 14. The master / slave communication circuit 63 of the extension module 60 returns a response 79 via the uplink 2b of the serial bus 2 through the slave communication function [1] 65.

[0178] Effect of the modified example

[0179] In a modification, the channel for general communication using the serial bus 1 and the channel for general communication using the serial bus 2 can be used independently of each other. This structure is effective, for example, in a case where it is desired to control an external device while collecting data, and the like. For example, by allocating the serial bus 1 for control and the serial bus 2 for data collection, it is possible to simultaneously implement control of the external device and data collection without affecting the control cycle.

Claims

1. An extension module which is an extension module connected to a plurality of serial buses, comprising: an interface which performs input and output of an external signal; and a communication circuit which performs communication via a first serial bus and a second serial bus, the communication circuit having a first slave communication function which performs communication via the first serial bus, a second slave communication function which performs communication via the second serial bus, and a master communication function which performs communication via the second serial bus, in a manner that each of the functions is capable of switching between active and inactive, the first slave communication function including a function of returning a response to a command addressed to the own station received from a CPU module, and relaying a command addressed to another station received from the CPU module, and relaying a response received from another station, the second slave communication function including a function of returning a response to a command addressed to the own station received from the CPU module or another station, and relaying a command addressed to another station received from the CPU module or another station, and relaying a response received from another station, the master communication function including a function of transmitting a command to another station and receiving a response from the other station.

2. The extension module according to claim 1, wherein the extension module further comprises a separation circuit which separates the second serial bus.

3. The extension module according to claim 1 or 2, wherein the communication circuit inactivates one of the second slave communication function and the master communication function when the other function is activated.

4. The extension module according to any one of claims 1 to 3, wherein the extension module further comprises an arithmetic circuit which executes a program, the arithmetic circuit executing an arithmetic process and determining an output value with respect to a response received from another station via the second serial bus as a destination of a command transmission when the master communication function is active.

5. The extension module according to claim 4, wherein the communication circuit transmits the output value to another station via the second serial bus when the master communication function is active.

6. A CPU module which is a CPU module connected to a plurality of serial buses, wherein the CPU module comprises a communication circuit which performs communication via a first serial bus and a second serial bus, the communication circuit having a first master communication function which performs communication via the first serial bus, and a second master communication function which performs communication via the second serial bus, in a manner that each of the functions is capable of switching between active and inactive, the first master communication function and the second master communication function each including a function of transmitting a command to another station, and receiving a response from the other station.

7. A system comprising a first serial bus, a second serial bus, a CPU module, and a plurality of extension modules, wherein the CPU module and the plurality of extension modules are connected to the first serial bus and the second serial bus, respectively. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ each of the plurality of expansion modules has a first slave communication function of communicating via the first serial bus, a second slave communication function of communicating via the second serial bus, and a master communication function of communicating via the second serial bus, in a manner that enables active / inactive switching respectively, the first slave communication function and the second slave communication function each include a function of relaying a command received from the CPU module to another station, the master communication function includes a function of transmitting a command to another station.

8. The system according to claim 7, wherein the first slave communication function includes a function of returning a response to a command received from the CPU module to the station, and relaying a command received from the CPU module to another station, and relaying a response received from another station, the second slave communication function includes a function of returning a response to a command received from the CPU module or another station to the station, and relaying a command received from the CPU module or another station to another station, and relaying a response received from another station, the master communication function includes a function of transmitting a command to another station and receiving a response from the other station.

9. A communication method of the system according to claim 7, comprising: a step of separating the second serial bus into two by one of the expansion modules; a step of the CPU module communicating with the plurality of expansion modules via the first serial bus; a step of the CPU module communicating with an expansion module connected to one of the separated second serial buses via the one of the second serial buses; and a step of two or more expansion modules connected to the other of the separated second serial buses communicating with each other via the other of the second serial buses.

10. A communication method of the system according to claim 7, comprising: a step of the CPU module and the plurality of expansion modules integrating the first serial bus and the second serial bus; and a step of the CPU module and the plurality of expansion modules communicating via the integrated first serial bus and second serial bus. ​

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