Memory application method and device, electronic equipment and storage medium

By dynamically adjusting memory binding relationships and patterns in a coroutine-thread hybrid architecture, the problems of low memory allocation efficiency and uneven resource utilization are solved, achieving efficient memory resource management and flexible memory allocation strategies.

CN120909780APending Publication Date: 2025-11-07XIAN TONGXING HENGYAO INFORMATION TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511021981.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-23
Publication Date
2025-11-07

AI Technical Summary

Technical Problem

In a hybrid architecture of coroutines and threads, existing memory allocation strategies result in low memory allocation efficiency and uneven resource utilization, leading to severe lock contention and skewed memory allocation.

Method used

By responding to memory allocation mode adjustment signals and intercepting calls to memory allocation functions using hook functions, the memory binding relationship of threads can be dynamically modified, binding threads to different memory allocation areas and achieving flexible switching of memory allocation modes.

Benefits of technology

It improves memory allocation efficiency, reduces lock contention, achieves balanced utilization of memory resources, and enhances system flexibility and maintainability.

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Abstract

The embodiment of the invention provides a memory application method and device, electronic equipment and a storage medium, the memory application method comprises the following steps: responding to a memory allocation mode adjustment signal, setting that a memory binding relationship of a current thread needs to be modified, the memory allocation mode adjustment signal being used for notifying to adjust a current memory allocation mode to a target memory allocation mode; calling of the current thread to the memory application function is intercepted through the hook function, a memory binding relation modification interface is called to modify a current memory allocation area bound with the current thread into a target memory allocation area, and the current memory allocation area is the memory allocation area bound with the current thread in the current memory allocation mode; the target memory allocation area is a memory allocation area bound with the current thread in the target memory allocation mode; and continuing to call the memory application function so as to apply to allocate the memory for the current thread in the target memory allocation area. The thread can dynamically adapt to switching of the memory allocation modes, and the memory allocation efficiency and the overall resource utilization rate can be improved.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of computer technology, and particularly relate to a memory application method and device, electronic equipment and storage medium. BACKGROUND

[0002] In the current computer system, the coroutine thread hybrid architecture has been widely adopted. Under this architecture, multiple coroutines share the memory and resources of the thread to which they belong, and the coroutines are scheduled relying on the thread. By taking advantage of the strong isolation of the thread and the efficient scheduling characteristics of the coroutine, a large number of coroutines are carried by a small number of threads, and efficient task parallel processing and resource utilization are achieved. In the process of implementing the present application, the inventors have found that there is currently no effective memory allocation strategy for the coroutine thread hybrid architecture. Under the coroutine thread hybrid architecture, if the fixed polling memory allocation strategy under the pure thread architecture (i.e. without coroutines) is used, the following problems may exist:

[0003] (1) Low memory allocation efficiency. In a high-concurrency transaction processing scenario, the concurrency collision probability of the threads carrying coroutines to apply for memory is significantly improved, resulting in serious lock competition during memory allocation, which makes the waiting time for the threads to acquire the lock longer and the memory allocation efficiency lower.

[0004] (2) Memory allocation bias. Under the coroutine thread hybrid architecture, in addition to the threads carrying coroutines (i.e. coroutine scheduling threads), there are also system service threads. The memory and resources of the coroutine scheduling threads are shared by the coroutines they carry, and the demand for memory allocation is usually high. Some memory allocation regions are allocated to a large number of coroutine scheduling threads, and some memory allocation regions are allocated to a small number of coroutine scheduling threads. The concurrent pressure of the memory allocation region allocated to a small number of coroutine scheduling threads is relatively low, and the concurrent pressure of the memory allocation region allocated to a large number of coroutine scheduling threads is relatively high, forming a hot spot and causing memory allocation bias, which cannot effectively utilize the memory resources. SUMMARY

[0005] Embodiments of the present application provide a memory application method and device, electronic equipment and storage medium, which can improve the memory allocation efficiency and improve the overall utilization rate of memory resources.

[0006] In a first aspect, the memory application method provided by the embodiments of the present application comprises:

[0007] In response to a memory allocation mode adjustment signal, set that the memory binding relationship of the current thread needs to be modified, and the memory allocation mode adjustment signal is used to notify that the current memory allocation mode is adjusted to a target memory allocation mode;

[0008] The hook function is used to intercept a call of a memory application function by a current thread, and a memory binding relationship modification interface is called to modify a current memory allocation area bound by the current thread to a target memory allocation area, the current memory allocation area being a memory allocation area bound by the current thread in a current memory allocation mode, and the target memory allocation area being a memory allocation area bound by the current thread in a target memory allocation mode.

[0009] The memory application function is continuously called to apply for allocating memory for the current thread in the target memory allocation area.

[0010] In the second aspect, the memory application device provided by the embodiments of the present application comprises:

[0011] The setting module is configured to set that the memory binding relationship of the current thread needs to be modified in response to a memory allocation mode adjustment signal, the memory allocation mode adjustment signal being used to notify that the current memory allocation mode is adjusted to the target memory allocation mode.

[0012] The modification module is configured to use the hook function to intercept a call of a memory application function by a current thread, and call a memory binding relationship modification interface to modify a current memory allocation area bound by the current thread to a target memory allocation area, the current memory allocation area being a memory allocation area bound by the current thread in a current memory allocation mode, and the target memory allocation area being a memory allocation area bound by the current thread in a target memory allocation mode.

[0013] The application module is configured to continuously call the memory application function to apply for allocating memory for the current thread in the target memory allocation area.

[0014] In the third aspect, the electronic device provided by the embodiments of the present application comprises a memory, a processor, and a computer program stored in the memory and capable of running on the processor, and the processor implements the memory application method of any of the embodiments of the present application when executing the program.

[0015] In the fourth aspect, the computer readable storage medium provided by the embodiments of the present application has a computer program stored thereon, and the program is executed by the processor to implement the memory application method of any of the embodiments of the present application.

[0016] In the embodiment of the present application, the memory allocation mode can be adjusted in real time according to actual conditions, the thread can respond to the memory allocation mode adjustment signal, dynamically modify the memory binding relationship, be bound to different memory allocation areas in different modes, reduce the lock competition during memory allocation, make the memory allocation operation more balanced, reduce the memory allocation waiting time, and improve the memory allocation efficiency; the hook function is used to intercept the call of the thread to the memory application function, so that the thread has the opportunity to modify its own memory binding relationship before memory allocation, this mechanism enables the thread to flexibly switch between different memory allocation modes without modifying the business logic code of the application program, improving the flexibility and maintainability of the system; the memory allocation mode is flexibly switched according to actual needs, the thread dynamically adapts to the switching of the memory allocation mode, the thread binds different memory allocation areas in different memory allocation modes, and the memory usage needs of different types of threads in different scenarios can be met, an effective solution is provided for the memory allocation under the mixed architecture of the coroutine thread, the situation that some memory allocation areas become hot spots and other memory allocation areas have insufficient utilization can be avoided, and the overall utilization rate of memory resources is improved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 is a flowchart of the memory application method provided by the embodiment of the present application;

[0019] Figure 2 is another flowchart of the memory application method provided by the embodiment of the present application;

[0020] Figure 3 is an example diagram of the current memory allocation in a polling mode;

[0021] Figure 4a is an example diagram of the memory allocation mode provided by the embodiment of the present application;

[0022] Figure 4b is another example diagram of the memory allocation mode provided by the embodiment of the present application;

[0023] Figure 4c is still another example diagram of the memory allocation mode provided by the embodiment of the present application;

[0024] Figure 5 is a structural diagram of the memory application device provided by the embodiment of the present application;

[0025] Figure 6 Figure 1 is a structural schematic diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme in the embodiment of the present application will be described clearly and completely below in combination with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, not all. Based on the embodiment in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the scope of protection of the present application.

[0027] It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0028] Before introducing the method of the present application, the following terms related to the embodiment of the present application are introduced:

[0029] Thread is the smallest unit of operation scheduling by the operating system. It is directly managed by the kernel, and an application program can have one or more threads, each thread has independent stack space, program counter and other resources, and can independently execute code. When an application program is installed and run on an electronic device, the operating system will start the corresponding thread to execute the code of the application program, so as to complete various tasks. The creation and destruction of threads involve system calls, and the overhead is relatively large.

[0030] Coroutines are a kind of user-mode lightweight threads. The creation of coroutines does not require kernel intervention, and can be completed by allocating a small amount of resources in the user mode, so the overhead of creation and destruction is very small, and a large number of coroutines can be quickly created. Multiple coroutines can time-share a thread's time slice, and the switching between coroutines is usually completed in the user mode, with much smaller overhead than thread switching. Coroutines can be used to process business requests and compute-intensive tasks.

[0031] Coroutine scheduling thread is a thread used to schedule the execution of coroutines. It carries a large number of coroutines and is responsible for quickly switching between these coroutines, enabling efficient time-sharing of computing and storage resources, and thus achieving efficient parallel processing of business logic.

[0032] System service thread is a thread in the system used to perform various system service tasks, such as performing resource recycling, signal monitoring, timer management, log writing, and other low-frequency or transactional work. These tasks are usually independent of business logic and belong to background support work, so the system service thread can also be called a background thread.

[0033] Thread Local Storage (TLS) is a technology used to manage thread-specific data, allowing each thread to have its own copy of variables. These copies exist independently in each thread and do not interfere with each other. Variables with thread-local constraints can be declared using the __thread keyword. For example, static __thread int global_tls_value = 0 declares a static global integer variable global_tls_value with an initial value of 0. This variable can be accessed by all threads in the program, but each thread has its own independent copy. Changes to the value of this variable by different threads will only be visible to the current thread.

[0034] Function hook is a technology that intercepts, replaces, or extends the execution flow of target functions to monitor or modify the behavior of target functions. Through function hook technology, developers can achieve fine-grained control over program behavior.

[0035] Signals are an important inter-process communication mechanism used to notify processes of specific events. Signals can be generated by hardware exceptions, user operations (such as key combinations), system events, or other processes. Signals allow the system or one process to send asynchronous notifications to another process, informing it of certain events. Signals can interrupt a process at any time during its execution, causing it to handle the event represented by the signal. Through signals, various control operations on processes can be achieved, such as termination, suspension, and resumption of execution. Typical signals include the termination signal SIGINT and the segment error signal SIGSEGV. Users can trigger a SIGINT signal and send it to the foreground process running to request the process to terminate. The segment error signal indicates that the program is trying to access an unallocated memory region or is trying to access a legal memory region in an incorrect manner.

[0036] Figure 1is a flowchart of a memory application method provided by an embodiment of the present application. The memory application method provided by the embodiment of the present application can be applied to a computer system with a coroutine thread hybrid architecture. The memory application method can be executed by a memory application device provided by an embodiment of the present application. The device can be implemented in software and / or hardware. In a specific embodiment, the device can be integrated in an electronic device, which can be a computer, a server, etc. The following embodiments are described by taking the example of integrating the memory application device in an electronic device. Referring to Figure 1 The embodiment is described from the perspective of a thread. The memory application method of the embodiment can include the following steps:

[0037] In step 101, in response to a memory allocation mode adjustment signal, it is set that the memory binding relationship of the current thread needs to be modified. The memory allocation mode adjustment signal is used to notify that the current memory allocation mode is adjusted to a target memory allocation mode.

[0038] The memory allocation mode adjustment signal is used to notify that the current memory allocation mode needs to be changed. It can be generated when the system load changes, the user requests or a specific event occurs. The purpose is to enable the memory allocation strategy to adapt to the new running condition.

[0039] In practical applications, the memory allocation mode adjustment signal can be initiated manually. For example, when the user perceives that the system performance fluctuates, or based on the prediction of the business load, it is considered that the current memory allocation mode no longer adapts to the system running demand, the signal can be sent manually. For example, before the business peak arrives, the user sends a signal in advance, indicating that the memory allocation mode is adjusted to cope with the high concurrent access to be arrived.

[0040] In practical applications, the memory allocation mode adjustment signal can also be initiated in response to the automatic detection result based on the business volume. Automatic detection is that the system evaluates the business volume in real time or periodically according to the preset rules and monitoring mechanism. The business volume can be measured by various indicators, such as Transaction Per Second (TPS), the number of online users, request response time, etc. When these indicators exceed or fall below the set threshold, the system automatically triggers the memory allocation mode adjustment signal. For example, when the TPS continuously rises for a period of time and reaches the trigger threshold of a certain memory allocation mode, the system automatically switches to the mode; conversely, when the business volume falls back to the normal range and meets the conditions for switching back, the system will also adjust the memory allocation mode accordingly to realize the rational use of resources.

[0041] The memory allocation mode adjustment signal can be an interrupt signal. If the thread is executing a service, upon receiving the memory allocation mode adjustment signal, the execution of the current service can be interrupted and the context information of the current service can be saved. After processing the related logic of the memory allocation mode adjustment signal, the current service can be continued based on the saved context information.

[0042] The context information of the current service can include program counter, register state, stack pointer, etc., which describe the execution state of the thread when it is paused. After processing the related logic of the memory allocation mode adjustment signal, the thread can resume execution using the saved context information. This ensures the continuity of service execution, and even in the process of handling memory adjustment signals, the progress or data will not be lost. This mechanism allows the system to dynamically adjust the memory allocation strategy as needed at runtime, while ensuring the integrity and stability of thread execution.

[0043] The current thread can be a coroutine scheduling thread or a system service thread. The memory binding relationship is the association between the thread and a specific memory allocation area. It determines which memory allocation area the thread should obtain memory resources from when performing memory allocation.

[0044] Whether the memory binding relationship of the current thread needs to be modified can be set in the local constraint variable in the local storage of the current thread. For example, the local constraint variable can be set to true or 1 to indicate that the memory binding relationship of the current thread needs to be modified, and the local constraint variable can be set to false or 0 to indicate that the memory binding relationship of the current thread does not need to be modified. By setting the memory binding relationship in the local constraint variable in the local storage of the current thread, each time the memory is applied or allocated, only the local constraint variable of the thread itself needs to be queried, without the need to interact with the outside or other threads, which can reduce the interaction overhead and improve the efficiency of memory application or allocation. Of course, in actual applications, the memory binding relationship of the current thread can also be set by interacting with the outside or other threads, such as using the task scheduler of the operating system, setting through a specific interface or function call, etc., which is not limited here.

[0045] The memory allocation mode refers to the strategy adopted by the system when allocating memory resources. Different modes are suitable for different scenarios and needs. In this embodiment, the memory allocation mode can include a performance extreme mode and a non-performance extreme mode, and the non-performance extreme mode can include a memory performance balance mode and a memory saving mode. The current memory allocation mode is the memory allocation mode currently used by the system or application program. The current memory allocation mode can be the performance extreme mode, the memory performance balance mode, or the memory saving mode. The target memory allocation mode is the new memory allocation mode that the system or application program hopes to switch to. The target memory allocation mode can be the performance extreme mode, the memory performance balance mode, or the memory saving mode. The target memory allocation mode is different from the current memory allocation mode.

[0046] The performance extreme mode can be understood as a mode in which the coroutine scheduling thread has exclusive access to the memory allocation region. In this mode, the system allocates an independent private memory allocation region for each coroutine scheduling thread. In this way, when the coroutine performs memory allocation and recycling operations in the private memory allocation region of its own scheduling thread, since the private memory allocation region only serves the thread and the coroutine it carries, access competition for the same memory allocation region between multiple threads is avoided, greatly reducing lock competition and significantly improving memory allocation efficiency. It is suitable for scenarios with busy system business and high concurrency pressure, such as transaction processing systems during e-commerce shopping festivals. In the performance extreme mode, the memory allocation efficiency is high, which can effectively handle high-concurrency transaction processing requirements and ensure that the system can still respond quickly under high load.

[0047] The non-performance extreme mode can be understood as a mode in which the coroutine scheduling thread and the system service thread share the memory allocation area. The memory performance balance mode is a mode in which a certain number of shared memory allocation areas are determined for the coroutine scheduling thread and the system service thread to commonly use. Compared with the performance extreme mode, the number of shared memory allocation areas is relatively large, so that the lock competition of memory allocation can be reduced to a certain extent, and the problem of waste of memory resources that can occur in the private memory allocation area mode can be avoided, so that a balance between performance and memory resource utilization is achieved. The memory performance balance mode improves the utilization of memory resources while ensuring a certain memory allocation efficiency, and is suitable for scenarios in which performance is required to a certain extent but resource occupation needs to be reasonably controlled, such as a business system with medium load. The memory saving mode is a mode in which the number of shared memory allocation areas is small, and multiple threads commonly use the small number of shared memory allocation areas. In this way, the occupation of memory resources can be maximally reduced, and the memory consumption of the system can be reduced. The memory saving mode is suitable for scenarios in which the business pressure is low and the memory allocation operation is not frequent, such as a business system running at night or during non-working hours. The memory saving mode and the memory performance balance mode mainly differ in the number of shared memory allocation areas. The number of shared memory allocation areas in the memory saving mode is less than the number of shared memory allocation areas in the memory performance balance mode.

[0048] In step 102, a hook function is used to intercept a call of a current thread to a memory application function, and a memory binding relationship modification interface is called to modify the current memory allocation area bound by the current thread to a target memory allocation area. The current memory allocation area is a memory allocation area bound by the current thread in a current memory allocation mode, and the target memory allocation area is a memory allocation area bound by the current thread in a target memory allocation mode.

[0049] When the call is intercepted, the custom code in the hook function is executed first. In this embodiment, the function of the custom code can be to check whether the memory binding relationship of the current thread needs to be modified, and to execute the modification logic of the memory binding relationship when the modification is needed. The memory binding relationship modification interface is an application programming interface (API) for modifying the association between the current thread and the memory allocation area. By calling this interface, the thread can be switched from one memory allocation area to another memory allocation area. The current memory allocation area refers to a memory allocation area bound by the current thread in the current memory allocation mode, in which the current thread can perform memory allocation and release operations. The target memory allocation area refers to a memory allocation area to which the current thread is to be bound in the target memory allocation mode. When the memory allocation mode changes, the thread is switched to this new memory allocation area for memory operation.

[0050] The memory application function, such as the malloc function, after intercepting the malloc function, the current thread can call the memory binding relationship modification interface to switch the memory allocation area bound by the current thread from the current memory allocation area to the target memory allocation area. The current memory allocation area here is determined based on the current memory allocation mode, and the target memory allocation area is specified according to the target memory allocation mode. This mechanism allows the program to dynamically adjust the memory allocation strategy of the thread at runtime to adapt to different performance requirements and resource management strategies. For example, in a performance requirement higher scenario, the thread can be switched to a private memory allocation area to reduce lock contention; and in a resource limited scenario, the thread can be switched to a shared memory allocation area to save memory resources.

[0051] Step 103, continue to call the memory application function to apply for allocating memory for the current thread in the target memory allocation area.

[0052] Applying for allocating memory for the current thread means that the thread requests a certain size of memory space from the operating system or memory allocator at runtime to store data and provide support for task execution. For example, the applied memory can be used to store local variables generated when the thread executes a function, such as integers, floating point numbers, pointers, etc., and can also be used to store dynamic data structures that the thread needs to create at runtime, such as linked lists, trees, hash tables, etc. When executing a task, the thread may also need to process task-related data, such as file content, network data packets, images, etc. By allocating memory for the thread, storage space can be provided for these task-related data to enable the thread to smoothly execute the task.

[0053] In this embodiment, the memory allocation mode can be adjusted in real time according to actual conditions, and the thread can respond to the memory allocation mode adjustment signal to dynamically modify the memory binding relationship. The thread can be bound to different memory allocation areas in different modes, reduce lock contention during memory allocation, make memory allocation operations more balanced, reduce memory allocation waiting time, and improve memory allocation efficiency; the hook function is used to intercept the thread's call to the memory application function, so that the thread has the opportunity to modify its own memory binding relationship before memory allocation. This mechanism allows the thread to flexibly switch between different memory allocation modes without modifying the business logic code of the application program, improving the flexibility and maintainability of the system; the memory allocation mode is flexibly switched according to actual needs, and the thread dynamically adapts to the switching of the memory allocation mode. In different memory allocation modes, the thread binds different memory allocation areas, which can meet the memory usage requirements of different types of threads in different scenarios, providing an effective solution for memory allocation under the coroutine thread hybrid architecture, which can avoid the situation that some memory allocation areas become hotspots while other memory allocation areas have insufficient utilization, and improve the overall utilization of memory resources.

[0054] The memory application method provided by the embodiment of the present application is further illustrated below. As shown in the figure, the method of the embodiment comprises the following steps: Figure 2

[0055] In step 201, a hook function is used to intercept the call of the memory application function by the current thread.

[0056] The current thread can call the memory application function in the program startup stage. For example, when the program starts, the memory application function can be called to allocate memory space for global variables and static variables. The current thread can also call the memory application function in the program running stage, such as processing user input, file operation, etc. For example, when reading the text line input by the user, a fixed-size buffer may not meet the requirements, and the memory application function can be called to dynamically allocate a larger buffer to store the user input data. Or when reading the file content, the file needs to be loaded into the memory for processing, and if the file is large, the memory application function will be called to dynamically allocate memory space.

[0057] The hook function is used to intercept the call of the memory application function by the current thread, which can be achieved by inserting a custom function into the execution flow of the program through a specific technical means, so that when the thread in the program calls the memory application or release function (such as malloc, free, etc.), the defined hook function can be executed first, instead of directly executing the system default memory application function. In this way, some additional logic can be added in the hook function, such as detecting the local constraint variable. By intercepting the memory application function, the memory allocation behavior can be flexibly adjusted and monitored without modifying the original program logic, thereby improving the performance and stability of the program.

[0058] In step 202, the local constraint variable in the local storage of the current thread is detected to determine whether the memory binding relationship of the current thread needs to be modified. If it needs to be modified, step 204 is executed, and if it does not need to be modified, step 203 is executed.

[0059] ​In the embodiment, when the memory allocation mode needs to be adjusted, the system queries a thread identity (Identity document, ID) table, the thread identity table stores thread IDs of various threads, an iterator can be defined, the iterator is used to traverse thread IDs of all threads in the thread identity, and a memory allocation mode adjustment signal is sent to various threads according to the thread IDs of the various threads. When the thread receives the signal, a signal processing function previously set for the signal is executed. In the embodiment, the signal processing function previously set is used to set a local constraint variable in local storage of the current thread, that is, the local constraint variable is set to true or 1, indicating that the memory binding relationship of the current thread needs to be modified. The default setting of the local constraint variable can indicate that the memory binding relationship of the current thread does not need to be modified, that is, the default setting can be false or 0. That is, when the memory allocation mode needs to be adjusted, the thread receives the memory allocation mode adjustment signal, and the signal processing function is executed to set the local constraint variable to indicate that the memory binding relationship of the current thread needs to be modified.

[0060] Before the current thread applies for memory, the local constraint variable in the local storage of the current thread is detected by using the hook function. If the variable value is true or 1, it indicates that the memory allocation mode needs to be adjusted, and the memory binding relationship needs to be modified; if the variable value is false or 0, it indicates that the memory allocation mode does not need to be adjusted, or the memory allocation mode has been adjusted and the local constraint variable has been reset, so the memory binding relationship does not need to be modified.

[0061] In the embodiment, the TLS is used to set whether the memory binding relationship of the current thread needs to be modified, instead of allocating a non-TLS variable to each thread to indicate whether the memory binding relationship of the current thread needs to be modified when the thread is created. Because if the non-TLS variable is used, due to the existence of cache and pipeline rearrangement technologies of the processor, in a concurrent scenario, the value of the same global variable seen on different processor cores at the same time may not be the same. The variable written on one processor core may only be written in the cache of the current processor core and has not been synchronized to the memory; at this time, the variable read on another processor core may also be read from the cache of the current core and the update in the memory has not been loaded into the cache. In addition, the pipeline rearrangement technology may also disturb the execution order of the processor instructions, resulting in that the reading is executed before the writing. Therefore, to ensure that the variable reading and writing timing does not become chaotic, a memory barrier (that is, a read barrier is added before reading and a write barrier is added after writing) needs to be used when the variable is accessed. However, when the hook function is used to intercept the call to the memory application function, it is necessary to judge whether the memory binding relationship needs to be modified every time. If the memory read barrier is added (that is, it is necessary to ensure that the modification in the memory has been synchronized to the local processor cache every time), the memory allocation efficiency will be greatly reduced.

[0062] The TLS variable does not have this problem. The variable written by the current thread is read by the current thread, and the inconsistency described above does not occur. Moreover, the initiator of the memory policy modification sends a signal to all threads, and the signal processing function is executed on the current thread, so that the memory allocation operation after the return of the signal processing function can definitely see the modification of the local constraint variable tag.

[0063] The reason for not calling the memory allocator function interface to modify the memory binding relationship in the signal processing function is that the memory allocator function interface is not a reentrant interface. When a signal is received and the signal processing function is entered, the current thread may be in the process of executing the memory allocation function operation at this time. At this time, calling the memory allocator function interface may fall into a deadlock or an infinite loop call (the current thread is interrupted by a signal and is in the process of calling the memory allocator function interface).

[0064] Step 203, continue to call the memory allocation function to allocate memory for the current thread in the current memory allocation area.

[0065] In the case where the memory binding relationship of the current thread does not need to be modified, the memory allocation function can be directly continued to be called to allocate memory.

[0066] Step 204, call the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area.

[0067] In the case where the memory binding relationship of the current thread needs to be modified, the memory binding relationship is modified first. The specific modification method is described below.

[0068] In the case where the target memory allocation mode is the performance extreme mode (i.e., the current memory allocation mode may be the memory performance balance mode or the memory saving mode), the current thread is the coroutine scheduling thread, and the memory binding relationship modification interface can be called to modify the shared memory allocation area bound by the current thread to the private memory allocation area. In the case where the target memory allocation mode is the non-performance extreme mode (i.e., the target memory allocation mode may be the memory performance balance mode or the memory saving mode, and the current memory allocation mode is the performance extreme mode), the memory binding relationship modification interface is called to modify the private memory allocation area bound by the current thread to the shared memory allocation area. The shared memory allocation area is a memory allocation area shared by the coroutine scheduling thread and the system service thread, and the private memory allocation area is a memory allocation area private to the coroutine scheduling thread, and one private memory allocation area is bound to one coroutine scheduling thread.

[0069] The current thread is a coroutine scheduling thread. In the case that the target memory allocation mode is a non-performance extreme mode, if the non-performance extreme mode is a memory performance balance mode, the number of shared memory allocation regions is determined to be a first number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the first number of shared memory allocation regions. If the non-performance extreme mode is a memory saving mode, the number of shared memory allocation regions is determined to be a second number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the second number of shared memory allocation regions. The second number is less than the first number.

[0070] Suppose there is a financial transaction system that uses coroutines to handle a large number of transaction requests. During peak transaction periods, to improve the system's processing capacity, the system administrator signals to switch the memory allocation mode to the performance extreme mode. At this time, each coroutine scheduling thread will switch its bound memory allocation region from a shared memory allocation region to a private memory allocation region. In this way, each coroutine scheduling thread uses its own private memory allocation region when performing memory allocation and recycling operations, avoiding lock contention caused by multiple threads accessing the shared memory allocation region simultaneously, thereby improving the system's performance.

[0071] Suppose there is a file management system within an enterprise that needs to handle certain file operation requests during working hours. During non-working hours, the system's business volume will significantly decrease. At this time, the system automatically detects the change in business volume and switches the memory allocation mode to the memory saving mode (a kind of non-performance extreme mode). In this case, the coroutine scheduling thread will switch its bound private memory allocation region to a shared memory allocation region. In this way, multiple threads can share the same memory allocation region, reducing the number of memory allocation regions and thus reducing the system's memory footprint.

[0072] The current thread is a system service thread. In the case that the target memory allocation mode is a performance extreme mode (i.e., the current memory allocation mode may be a memory performance balance mode or a memory saving mode), a memory binding relationship modification interface can be called to modify the first shared memory allocation region bound by the current thread to a second shared memory allocation region. In the case that the target memory allocation mode is a non-performance extreme mode (i.e., the target memory allocation mode may be a memory performance balance mode or a memory saving mode, and the current memory allocation mode is a performance extreme mode), a memory binding relationship modification interface can be called to modify the second shared memory allocation region bound by the current thread to the first shared memory allocation region. The first shared memory allocation region is a memory allocation region shared by coroutine scheduling threads and system service threads, and the second shared memory allocation region is a memory allocation region shared by system service threads, with one second shared memory allocation region bound to one or more system service threads.

[0073] If the current thread is a system service thread, and the non-performance-extreme mode is a memory performance balance mode, the number of the first shared memory allocation regions is determined as the first number, and a memory binding relationship modification interface is called to modify the second shared memory allocation region to which the current thread is bound to one of the first shared memory allocation regions in the first number of the first shared memory allocation regions; if the non-performance-extreme mode is a memory saving mode, the number of the first shared memory allocation regions is determined as the second number, and the memory binding relationship modification interface is called to modify the second shared memory allocation region to which the current thread is bound to one of the first shared memory allocation regions in the second number of the first shared memory allocation regions. The second number is less than the first number.

[0074] When switching from the non-performance-extreme mode to the performance-extreme mode, the first shared memory allocation region in the non-performance-extreme mode can be directly converted into the second shared memory allocation region in the performance-extreme mode. When switching from the performance-extreme mode to the non-performance-extreme mode, the second shared memory allocation region in the performance-extreme mode can be directly converted into the first shared memory allocation region in the non-performance-extreme mode. That is, the same shared memory allocation region can be the first shared memory allocation region in one mode and can become the second shared memory allocation region in another mode. The same batch of memory allocation regions plays different roles in different modes. When switching modes, the binding relationship is re-allocated according to the load balancing binding rule, and the memory allocation region is switched to bind another batch of threads.

[0075] In step 205, the memory binding relationship of the current thread does not need to be modified by using the local constraint variable in the local storage of the current thread.

[0076] That is, after modifying the memory binding relationship, the local constraint variable in the local storage of the current thread is reset. For example, the local constraint variable is set to 0 or false. Resetting can prevent repeated modification and reduce potential errors.

[0077] In step 206, the memory allocation function is continuously called to apply for memory allocation for the current thread in the target memory allocation region.

[0078] In the embodiment, only one setting and resetting operation is needed for the local constraint variable in the local storage of the current thread when the memory allocation mode is adjusted, which reduces the number of operations and avoids frequent global state checking or thread interaction, thereby improving efficiency. The setting of the local constraint variable is intercepted and checked every time the memory allocation function is called by the current thread, so that it can be found in time whether the memory allocation mode needs to be adjusted, the memory allocation operation is ensured to meet the requirements of the current mode, problems caused by mixing new and old strategies are prevented, and the correctness and stability of memory allocation are ensured.

[0079] The memory application method of the application is compared and illustrated by examples as follows.

[0080] Figure 3 is an example of the current memory allocation in a polling manner, which is designed for a pure thread architecture. As shown in Figure 3 , it is assumed that the system reserves 3 memory allocation areas, and when the threads are started, the memory allocation areas are bound in a polling manner. Thread 1, thread 4 and thread 7 are bound to memory allocation area 0, thread 2, thread 5 and thread 8 are bound to memory allocation area 1, and thread 3, thread 6 and thread 9 are bound to memory allocation area 2.

[0081] For a coroutine thread hybrid architecture, if this fixed polling binding mode is used for memory, once the situation that thread 2, thread 5 and thread 8 are all coroutine scheduling threads, and thread 1, thread 4 and thread 7 are all system service threads occurs, it will cause memory allocation area 1 to form a hot spot, resulting in memory allocation bias. In a high-concurrency transaction processing scenario, the lock competition of thread 2, thread 5 and thread 8 is serious, the waiting time for obtaining the lock becomes longer, and the memory allocation efficiency is low.

[0082] According to the method proposed in the present application, assuming that the current system traffic is moderate, the memory allocation mode shown in Figure 4a , i.e. the memory performance balance mode, is used, that is, there are relatively more shared memory allocation areas, and the coroutine scheduling threads and the system service threads are mixed and bound to multiple shared memory allocation areas, to balance the performance and memory occupation.

[0083] If the traffic increases thereafter, the memory allocation mode can be switched to the memory allocation mode shown in Figure 4b , i.e. the performance extreme mode. Each coroutine scheduling thread is bound to a private memory allocation area, and multiple system service threads are commonly bound to a shared memory allocation area. In this mode, the memory allocation operation of the coroutine scheduling thread is independent, avoiding access competition between multiple threads, thereby significantly improving the efficiency of memory allocation and meeting the needs of high-concurrency transaction processing.

[0084] Conversely, if the traffic decreases thereafter, the memory allocation mode can be switched to the memory allocation mode shown in Figure 4c , i.e. the memory saving mode, to reduce the number of shared memory allocation areas. In the extreme case, there is only one shared memory allocation area, and the coroutine scheduling threads and the system service threads are mixed and bound to this shared memory allocation area, to achieve the purpose of saving memory. This mode can effectively reduce the consumption of memory resources and improve the utilization of resources when the business pressure is low.

[0085] In summary, the present application realizes performance optimization and resource saving of memory allocation under different business loads by dynamically adjusting the memory allocation mode.

[0086] In this embodiment, the memory allocation mode can be adjusted in real time according to actual conditions, the thread can respond to the memory allocation mode adjustment signal, dynamically modify the memory binding relationship, be bound to different memory allocation areas in different modes, reduce lock competition during memory allocation, make the memory allocation operation more balanced, reduce memory allocation waiting time, and improve memory allocation efficiency; the hook function is used to intercept the call of the thread to the memory application function, so that the thread has an opportunity to modify the memory binding relationship of the thread before memory allocation, this mechanism enables the thread to flexibly switch between different memory allocation modes without modifying the business logic code of the application program, and improves the flexibility and maintainability of the system; the memory allocation mode is flexibly switched according to actual needs, the thread dynamically adapts to the switching of the memory allocation mode, the thread binds different memory allocation areas in different memory allocation modes, and the memory usage needs of different types of threads in different scenes can be met, an effective solution is provided for memory allocation under the mixed architecture of the coroutine thread, the situation that some memory allocation areas become hot spots and other memory allocation areas have insufficient utilization can be avoided, and the overall utilization rate of memory resources is improved.

[0087] Figure 5 is a structural schematic diagram of a memory application device provided by an embodiment of the application, and the device is applicable to executing the memory application method provided by the embodiment of the application, as shown in the figure, the device can specifically include: Figure 5

[0088] The setting module 501 is configured to set that the memory binding relationship of the current thread needs to be modified in response to the memory allocation mode adjustment signal, and the memory allocation mode adjustment signal is used to notify that the current memory allocation mode is adjusted to a target memory allocation mode.

[0089] The modification module 502 is configured to intercept the call of the current thread to the memory application function by using a hook function, modify the current memory allocation area bound by the current thread to a target memory allocation area by calling a memory binding relationship modification interface, the current memory allocation area is the memory allocation area bound by the current thread in the current memory allocation mode, and the target memory allocation area is the memory allocation area bound by the current thread in the target memory allocation mode.

[0090] The application module 503 is configured to continue to call the memory application function to apply for allocating memory for the current thread in the target memory allocation area.

[0091] In an embodiment, the setting module 501 sets that the memory binding relationship of the current thread needs to be modified, including:

[0092] The memory binding relationship of the current thread is set to need to be modified by using a local constraint variable in the local storage of the current thread.

[0093] ​In an embodiment, the modification module 502 further comprises, before the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area:

[0094] detecting a local constraint variable in the local storage of the current thread to determine whether the memory binding relationship of the current thread needs to be modified;

[0095] In the case where the memory binding relationship of the current thread needs to be modified, the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area is executed;

[0096] Correspondingly, after the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area, the modification module 502 further comprises:

[0097] setting, by using the local constraint variable in the local storage of the current thread, that the memory binding relationship of the current thread does not need to be modified.

[0098] In an embodiment, after the modification module 502 determines whether the memory binding relationship of the current thread needs to be modified, the application module 503 is further configured to:

[0099] In the case where the memory binding relationship of the current thread does not need to be modified, the memory application function is continuously called to apply for allocating memory for the current thread in the current memory allocation area.

[0100] In an embodiment, the current thread is a coroutine scheduling thread, and the modification module 502 calls the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area, comprising:

[0101] In the case where the target memory allocation mode is the performance extreme mode, the memory binding relationship modification interface is called to modify the shared memory allocation area bound by the current thread to the private memory allocation area;

[0102] In the case where the target memory allocation mode is the non-performance extreme mode, the memory binding relationship modification interface is called to modify the private memory allocation area bound by the current thread to the shared memory allocation area;

[0103] The shared memory allocation area is a memory allocation area shared by the coroutine scheduling thread and the system service thread, and the private memory allocation area is a memory allocation area private to the coroutine scheduling thread, and one private memory allocation area is bound to one coroutine scheduling thread.

[0104] In an embodiment, the non-performance extreme mode comprises a memory performance balance mode and a memory saving mode, and the modification module 502, in the case where the target memory allocation mode is the non-performance extreme mode, calls the memory binding relationship modification interface to modify the private memory allocation area bound by the current thread to the shared memory allocation area, comprising:

[0105] In a case where the non-performance-extreme mode is the memory performance balance mode, the number of shared memory allocation regions is determined as the first number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the first number of shared memory allocation regions;

[0106] In a case where the non-performance-extreme mode is the memory saving mode, the number of shared memory allocation regions is determined as the second number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the second number of shared memory allocation regions;

[0107] The second number is less than the first number.

[0108] In an embodiment, the current thread is a system service thread, and the modification module 502 calls a memory binding relationship modification interface to modify the current memory allocation region bound by the current thread to the target memory allocation region, including:

[0109] In a case where the target memory allocation mode is the performance-extreme mode, a memory binding relationship modification interface is called to modify the first shared memory allocation region bound by the current thread to the second shared memory allocation region;

[0110] In a case where the target memory allocation mode is the non-performance-extreme mode, a memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to the first shared memory allocation region;

[0111] The first shared memory allocation region is a memory allocation region shared by the coroutine scheduling thread and the system service thread, and the second shared memory allocation region is a memory allocation region shared by the system service thread.

[0112] In an embodiment, the non-performance-extreme mode includes the memory performance balance mode and the memory saving mode, and the modification module 502, in a case where the target memory allocation mode is the non-performance-extreme mode, calls a memory binding relationship modification interface to modify the second shared memory allocation region bound by the current thread to the first shared memory allocation region, including:

[0113] In a case where the non-performance-extreme mode is the memory performance balance mode, the number of first shared memory allocation regions is determined as the first number, and a memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to one of the first number of first shared memory allocation regions;

[0114] In the case that the non-performance extreme mode is the memory saving mode, the number of the first shared memory allocation areas is determined as a second number, and a memory binding relationship modification interface is called to modify the second shared memory allocation area to which the current thread is bound to one of the first shared memory allocation areas in the second number.

[0115] The second number is less than the first number.

[0116] In an embodiment, the setting module 501 responds to the memory allocation mode adjustment signal, including:

[0117] responding to a manually initiated memory allocation mode adjustment signal; or

[0118] responding to a memory allocation mode adjustment signal initiated based on an automatic detection result of a service volume.

[0119] In an embodiment, the setting module 501 responds to the memory allocation mode adjustment signal, including:

[0120] receiving a memory allocation mode adjustment signal, interrupting execution of the current service and saving context information of the current service;

[0121] after the memory binding relationship of the current thread needs to be modified, further including:

[0122] continuing to execute the current service based on the saved context information of the current service.

[0123] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. The specific working process of the above described functional modules can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0124] In this embodiment, the memory allocation mode can be adjusted in real time according to actual conditions, the thread can respond to the memory allocation mode adjustment signal, dynamically modify the memory binding relationship, be bound to different memory allocation areas in different modes, reduce lock competition during memory allocation, make the memory allocation operation more balanced, reduce the memory allocation waiting time, and improve the memory allocation efficiency; the hook function is used to intercept the call of the thread to the memory application function, so that the thread has the opportunity to modify its own memory binding relationship before memory allocation, this mechanism enables the thread to flexibly switch between different memory allocation modes without modifying the business logic code of the application program, and improves the flexibility and maintainability of the system; the memory allocation mode is flexibly switched according to actual needs, the thread dynamically adapts to the switching of the memory allocation mode, the thread binds different memory allocation areas in different memory allocation modes, and the memory usage requirements of different types of threads in different scenarios can be met, an effective solution is provided for memory allocation under the mixed architecture of coroutine threads, the situation that some memory allocation areas become hot spots while other memory allocation areas have insufficient utilization can be avoided, and the overall utilization of memory resources is improved.

[0125] The embodiment of the present application further provides an electronic device, including a memory, a processor and a computer program stored in the memory and executable on the processor, and the processor implements the memory application method provided in any of the above embodiments when executing the program.

[0126] The embodiment of the present application further provides a computer readable medium, which stores a computer program, and the program is executed by the processor to implement the memory application method provided in any of the above embodiments.

[0127] Reference is made below to Figure 6 which shows a structural schematic diagram of a computer system 600 suitable for implementing the electronic device of the embodiment of the present application. Figure 6 The electronic device shown is only an example, and should not bring any limitation to the function and use range of the embodiment of the present application.

[0128] As shown in Figure 6 , the computer system 600 includes a central processing unit (CPU) 601, which can perform various appropriate actions and processes according to programs stored in a read-only memory (ROM) 602 or programs loaded from a storage portion 608 to a random access memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the computer system 600 are also stored. The CPU 601, the ROM 602 and the RAM 603 are connected to each other through a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0129] The following components are connected to the I / O interface 605: an input part 606 including a keyboard, a mouse, etc.; an output part 607 including a display such as a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage part 608 including a hard disk, etc.; and a communication part 609 including a network interface card such as a LAN card, a modem, etc. The communication part 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the I / O interface 605 as necessary. A removable medium 611 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc. is attached to the drive 610 as necessary, so that a computer program read out therefrom is installed in the storage part 608 as necessary.

[0130] In particular, the processes described above with reference to the flowcharts can be implemented as a computer software program according to embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for executing the methods illustrated by the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network by the communication part 609, and / or installed from the removable medium 611. When the computer program is executed by the central processing unit (CPU) 601, the above-described functions defined in the system of the present disclosure are executed.

[0131] It should be noted that the computer-readable medium shown in the present application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination of the above. More specific examples of computer-readable storage media can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, device or component. In the present application, the computer-readable signal medium can include a data signal carried in a baseband or as a part of a carrier wave, which carries computer-readable program code. Such a propagated data signal can take various forms, including but not limited to an electromagnetic signal, an optical signal or any suitable combination of the above. The computer-readable signal medium can also be any computer-readable medium other than the computer-readable storage medium, which can send, propagate or transmit a program for use by or in conjunction with an instruction execution system, device or component. The program code contained on the computer-readable medium can be transmitted by any suitable medium, including but not limited to wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0132] The flowcharts and block diagrams in the drawings illustrate the possible implementation architectures, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment, or a portion of code that contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur in different orders than that shown in the figures. For example, two blocks that are shown in succession can actually be executed substantially concurrently, or they can sometimes be executed in reverse order, depending on the functionality involved. It should also be noted that each block in the block diagrams or flowcharts, and combinations of blocks in the block diagrams or flowcharts, can be implemented by a dedicated hardware-based system that performs specified functions or operations, or can be implemented by a combination of special-purpose hardware and computer instructions.

[0133] The modules and / or units described in the embodiments of the present application can be implemented by software or by hardware. The described modules and / or units can also be arranged in a processor, for example, can be described as a processor comprising a setting module, a modifying module and an applying module. In some cases, the names of the modules do not constitute a limitation on the modules themselves.

[0134] As another aspect, the present application also provides a computer readable medium, which can be included in the device described in the above embodiments, or can exist independently without being assembled into the device. The computer readable medium carries one or more programs, which, when executed by the device, cause the device to include:

[0135] In response to the memory allocation mode adjustment signal, it is set that the memory binding relationship of the current thread needs to be modified, and the memory allocation mode adjustment signal is used to notify that the current memory allocation mode is adjusted to a target memory allocation mode; the hook function is used to intercept the call of the memory application function by the current thread, the memory binding relationship modification interface is called to modify the current memory allocation area bound by the current thread to a target memory allocation area, the current memory allocation area is the memory allocation area bound by the current thread under the current memory allocation mode, and the target memory allocation area is the memory allocation area bound by the current thread under the target memory allocation mode; the memory application function is continuously called to apply and allocate memory for the current thread in the target memory allocation area.

[0136] The technical scheme of the embodiments of the present application can adjust the memory allocation mode in real time according to actual conditions, the thread can dynamically modify the memory binding relationship in response to the memory allocation mode adjustment signal, can be bound to different memory allocation areas under different modes, reduce lock competition during memory allocation, make the memory allocation operation more balanced, reduce memory allocation waiting time, and improve memory allocation efficiency; the hook function is used to intercept the call of the memory application function by the thread, so that the thread has the opportunity to modify its own memory binding relationship before memory allocation. This mechanism enables the thread to flexibly switch between different memory allocation modes without modifying the business logic code of the application program, thereby improving the flexibility and maintainability of the system; the memory allocation mode is flexibly switched according to actual needs, the thread dynamically adapts to the switching of the memory allocation mode, the thread binds different memory allocation areas under different memory allocation modes, and the memory usage requirements of different types of threads in different scenarios can be met, thereby providing an effective solution for memory allocation under a coroutine thread hybrid architecture, avoiding the situation that some memory allocation areas become hot spots while other memory allocation areas have insufficient utilization, and improving the overall utilization of memory resources.

[0137] It should be understood that the various forms of flow shown above can be used to reorder, add or delete steps. For example, the steps described in the present application can be performed in parallel, sequentially or in a different order, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0138] It should be noted that in the technical solutions of the present disclosure, the collection, collection, update, analysis, processing, use, transmission, storage and other aspects of the user's personal information involved comply with relevant laws and regulations, are used for legal purposes, and do not violate public order and good customs. Necessary measures are taken for user personal information to prevent illegal access to user personal information data, and to maintain user personal information security, network security and national security.

[0139] The above specific embodiments do not constitute a limitation on the scope of protection of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can occur depending on design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A memory request method, characterized by, The method comprises the following steps: in response to a memory allocation mode adjustment signal, setting that the memory binding relationship of the current thread needs to be modified, the memory allocation mode adjustment signal being used for notifying that the current memory allocation mode is adjusted to a target memory allocation mode; intercepting, by using a hook function, a call of a memory application function by the current thread, and calling a memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to a target memory allocation area, the current memory allocation area being a memory allocation area bound by the current thread in the current memory allocation mode, and the target memory allocation area being a memory allocation area bound by the current thread in the target memory allocation mode; continuing to call the memory application function to apply for allocating memory for the current thread in the target memory allocation area.

2. The method of claim 1, wherein, The setting that the memory binding relationship of the current thread needs to be modified comprises the following steps: setting that the memory binding relationship of the current thread needs to be modified by using a local constraint variable in the local storage of the current thread.

3. The method of claim 2, wherein, Before the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area, the method further comprises the following steps: detecting the local constraint variable in the local storage of the current thread to determine whether the memory binding relationship of the current thread needs to be modified; in the case that the memory binding relationship of the current thread needs to be modified, triggering the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area; correspondingly, after the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area, the method further comprises the following step: setting that the memory binding relationship of the current thread does not need to be modified by using the local constraint variable in the local storage of the current thread.

4. The method of claim 3, wherein, After the determination of whether the memory binding relationship of the current thread needs to be modified, the method further comprises the following step: in the case that the memory binding relationship of the current thread does not need to be modified, continuing to call the memory application function to apply for allocating memory for the current thread in the current memory allocation area.

5. The method of claim 1, wherein, The current thread is a coroutine scheduling thread, and the calling of the memory binding relationship modification interface to modify the current memory allocation area bound by the current thread to the target memory allocation area comprises the following steps: in the case that the target memory allocation mode is a performance extreme mode, calling the memory binding relationship modification interface to modify a shared memory allocation area bound by the current thread to a private memory allocation area; in the case that the target memory allocation mode is a non-performance extreme mode, calling the memory binding relationship modification interface to modify the private memory allocation area bound by the current thread to the shared memory allocation area; wherein the shared memory allocation area is a memory allocation area shared by the coroutine scheduling thread and a system service thread, the private memory allocation area is a memory allocation area private to the coroutine scheduling thread, and one private memory allocation area is bound to one coroutine scheduling thread.

6. The method of claim 5, wherein, The non-performance extreme mode comprises a memory performance balance mode and a memory saving mode, and in the case that the target memory allocation mode is the non-performance extreme mode, the calling of the memory binding relationship modification interface to modify the private memory allocation area bound by the current thread to the shared memory allocation area comprises the following steps: In the case that the non-performance-extreme mode is the memory performance balance mode, the number of shared memory allocation regions is determined as a first number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the first number of shared memory allocation regions; In the case that the non-performance-extreme mode is the memory saving mode, the number of shared memory allocation regions is determined as a second number, and a memory binding relationship modification interface is called to modify the private memory allocation region bound by the current thread to one of the second number of shared memory allocation regions; The second number is less than the first number.

7. The method of claim 1, wherein, In the case that the target memory allocation mode is the performance-extreme mode, the memory binding relationship modification interface is called to modify the first shared memory allocation region bound by the current thread to the second shared memory allocation region; In the case that the target memory allocation mode is the non-performance-extreme mode, the memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to the first shared memory allocation region; The first shared memory allocation region is a memory allocation region shared by the coroutine scheduling thread and the system service thread, and the second shared memory allocation region is a memory allocation region shared by the system service thread. The non-performance-extreme mode includes the memory performance balance mode and the memory saving mode, and in the case that the target memory allocation mode is the non-performance-extreme mode, the memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to the first shared memory allocation region, including:

8. The method of claim 7, wherein, In the case that the non-performance-extreme mode is the memory performance balance mode, the number of first shared memory allocation regions is determined as a first number, and the memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to one of the first number of first shared memory allocation regions; In the case that the non-performance-extreme mode is the memory saving mode, the number of first shared memory allocation regions is determined as a second number, and the memory binding relationship modification interface is called to modify the second shared memory allocation region bound by the current thread to one of the second number of first shared memory allocation regions; The second number is less than the first number. In response to the memory allocation mode adjustment signal, including:

9. The method of claim 1, wherein, In response to an artificially initiated memory allocation mode adjustment signal; or In response to a memory allocation mode adjustment signal initiated based on an automatic detection result. In response to the memory allocation mode adjustment signal, including:

10. The method of claim 1, wherein, Receiving the memory allocation mode adjustment signal, interrupting the execution of the current service and saving the context information of the current service; After it is determined that the memory binding relationship of the current thread needs to be modified, further including: Continuing to execute the current service based on the saved context information of the current service. Including:

11. A memory request device, comprising: A setting module is configured to respond to a memory allocation mode adjustment signal, set that the memory binding relationship of the current thread needs to be modified, and the memory allocation mode adjustment signal is used to notify that the current memory allocation mode is adjusted to a target memory allocation mode; ​ The modification module is configured to intercept, by using a hook function, a call of a memory application function by a current thread, and call a memory binding relationship modification interface to modify a current memory allocation region bound by the current thread to a target memory allocation region, the current memory allocation region being a memory allocation region bound by the current thread in a current memory allocation mode, and the target memory allocation region being a memory allocation region bound by the current thread in a target memory allocation mode. The application module is configured to continue calling the memory application function to apply for allocating memory for the current thread in the target memory allocation region.

12. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor executes the program to implement the memory application method according to any one of claims 1 to 10.

13. A computer readable storage medium having stored thereon a computer program, characterized in that The program is executed by the processor to implement the memory application method according to any one of claims 1 to 10. The program is executed by the processor to implement the memory application method according to any one of claims 1 to 10.

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