Current sampling self-checking circuit and battery management system

Abstract

The invention discloses a current sampling self-checking circuit and a battery management system, and the current sampling self-checking circuit comprises a first selection module and a second selection module, and is connected with a first differential input end of an analog-to-digital converter and a first detection end of a current detection module through the first selection module. The second selection module is connected with a second differential input end of the analog-to-digital converter and a second detection end of the current detection module, and when the difference between the first differential voltage and the second differential voltage is not equal to a preset value, it is represented that at least one of the first selection module, the second selection module, the analog-to-digital converter and the current detection module breaks down. According to the invention, two tests can be carried out based on one circuit to realize self-inspection, so that high cost and larger occupied area required by two circuits can be avoided.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, specifically to a current sampling self-test circuit and a battery management system. Background Technology

[0002] A current sampling circuit connected to a differential input analog-to-digital converter (ADC) can be used to detect the charging and discharging current of a battery. However, if it's a single current sampling circuit, the system cannot detect faults such as reference failure, ADC failure, resistor or capacitor failure in the current sampling circuit, or open circuits.

[0003] However, if two identical current sampling circuits are used for self-testing and comparison, two ADCs and two reference chips are required, and high-precision ADCs are typically more expensive. This not only leads to high costs but also requires a larger footprint. Summary of the Invention

[0004] This application provides a current sampling self-test circuit and a battery management system to alleviate the technical problems of high cost and large footprint required for the current sampling circuit to achieve self-test.

[0005] In a first aspect, this application provides a current sampling self-test circuit, which includes a first selection module and a second selection module. The first selection module is connected to a first differential input terminal of an analog-to-digital converter and a first detection terminal of a current detection module. The first selection module is configured to generate a first output voltage to the first differential input terminal based on one of a first test voltage and a second test voltage. The second selection module is connected to a second differential input terminal of the analog-to-digital converter and a second detection terminal of the current detection module. The second selection module is configured to generate a second output voltage to the second differential input terminal based on the other of the first test voltage and the second test voltage. Wherein, when... The first selection module generates a first output voltage based on a first test voltage, and the second selection module generates a second output voltage based on a second test voltage. The voltage difference between the first differential input terminal and the second differential input terminal is the first differential voltage. When the first selection module generates the first output voltage based on the second test voltage, and the second selection module generates the second output voltage based on the first test voltage, the voltage difference between the first differential input terminal and the second differential input terminal is the second differential voltage. When the difference between the first differential voltage and the second differential voltage is not equal to a preset value, it indicates that at least one of the first selection module, the second selection module, the analog-to-digital converter, and the current detection module has malfunctioned.

[0006] Optionally, the first selection module includes a first power supply unit, a second power supply unit, and a first selection unit. The first power supply unit is configured to generate a first intermediate voltage based on a first test voltage. The second power supply unit is configured to generate a second intermediate voltage based on a second test voltage. The first selection unit is connected to the first power supply unit and the second power supply unit and is configured to generate a first output voltage based on one of the first intermediate voltage and the second intermediate voltage.

[0007] Optionally, the first power supply unit includes a first operational amplifier and a first resistor. The first input terminal of the first operational amplifier is connected to a first test voltage, and the second input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier. The first terminal of the first resistor is connected to the output terminal of the first operational amplifier, and the second terminal of the first resistor is connected to the first selection unit.

[0008] Optionally, the second power supply unit includes a second operational amplifier and a second resistor. The first input terminal of the second operational amplifier is connected to a second test voltage, and the second input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier. The first terminal of the second resistor is connected to the output terminal of the second operational amplifier, and the second terminal of the second resistor is connected to the first selection unit. The resistance value of the second resistor is equal to the resistance value of the first resistor.

[0009] Optionally, the first selection unit includes a first multiplexer and a third resistor. The first input terminal of the first multiplexer is connected to the second terminal of the first resistor, and the second input terminal of the first multiplexer is connected to the second terminal of the second resistor. The first terminal of the third resistor is connected to the output terminal of the first multiplexer, and the second terminal of the third resistor is connected to the first differential input terminal and the first detection terminal.

[0010] Optionally, the second selection module includes a third power supply unit, a fourth power supply unit, and a second selection unit. The third power supply unit is configured to generate a third intermediate voltage based on a first test voltage. The fourth power supply unit is configured to generate a fourth intermediate voltage based on a second test voltage. The second selection unit is connected to the third power supply unit and the fourth power supply unit and is configured to generate a second output voltage based on one of the third intermediate voltage and the fourth intermediate voltage.

[0011] Optionally, the third power supply unit includes a third operational amplifier and a fourth resistor. The first input terminal of the third operational amplifier is connected to the first test voltage, and the second input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier. The first terminal of the fourth resistor is connected to the output terminal of the third operational amplifier, and the second terminal of the fourth resistor is connected to the second selection unit.

[0012] Optionally, the fourth power supply unit includes a fourth operational amplifier and a fifth resistor. The first input terminal of the fourth operational amplifier is connected to the second test voltage, and the second input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier. The first terminal of the fifth resistor is connected to the output terminal of the fourth operational amplifier, and the second terminal of the fifth resistor is connected to the second selection unit. The resistance value of the fifth resistor is equal to the resistance value of the fourth resistor.

[0013] Optionally, the second selection unit includes a second multiplexer and a sixth resistor. The first input terminal of the second multiplexer is connected to the second terminal of the fourth resistor, and the second input terminal of the second multiplexer is connected to the second terminal of the fifth resistor. The first terminal of the sixth resistor is connected to the output terminal of the second multiplexer, and the second terminal of the sixth resistor is connected to the second differential input terminal and the second detection terminal.

[0014] Optionally, the current detection module includes a seventh resistor, an eighth resistor, a ninth resistor, and a first capacitor. The first end of the seventh resistor is connected to the first differential input terminal; the first end of the eighth resistor is connected to the second end of the seventh resistor, and the second end of the eighth resistor is connected to the ground terminal; the first end of the ninth resistor is connected to the second end of the eighth resistor and the ground terminal, and the second end of the ninth resistor is connected to the second differential input terminal; the first end of the first capacitor is connected to the first differential input terminal, and the second end of the first capacitor is connected to the second differential input terminal; wherein, the resistance value of the seventh resistor is equal to the resistance value of the ninth resistor.

[0015] Secondly, this application provides a battery management system, which includes the aforementioned current sampling self-test circuit.

[0016] Optionally, the battery management system also includes a current sensing module and an analog front end, the analog front end including an analog-to-digital converter.

[0017] The current sampling self-test circuit and battery management system provided in this application are connected to the first differential input terminal of the analog-to-digital converter and the first detection terminal of the current detection module through a first selection module, and the second selection module is connected to the second differential input terminal of the analog-to-digital converter and the second detection terminal of the current detection module. When the first selection module generates a first output voltage based on a first test voltage, and the second selection module generates a second output voltage based on a second test voltage, the voltage difference between the first differential input terminal and the second differential input terminal is the first differential voltage; when the first selection module generates a first output voltage based on a second test voltage, and the second selection module generates a second output voltage based on the first test voltage, the voltage difference between the first differential input terminal and the second differential input terminal is the second differential voltage; when the difference between the first differential voltage and the second differential voltage is not equal to a preset value, it indicates that at least one of the first selection module, the second selection module, the analog-to-digital converter, and the current detection module has failed. Self-testing can be achieved by performing two tests based on one circuit, thereby avoiding the high cost and larger footprint required by dual circuits. Attached Figure Description

[0018] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0019] Figure 1 This is a schematic diagram of the current sampling self-test circuit provided in an embodiment of this application.

[0020] Figure 2 A schematic diagram of the first selection module provided in the embodiments of this application.

[0021] Figure 3 The circuit schematic of the first selection module provided in the embodiments of this application.

[0022] Figure 4 A schematic diagram of the second selection module provided in the embodiments of this application.

[0023] Figure 5 The circuit schematic diagram of the second selection module provided in the embodiments of this application.

[0024] Figure 6 The circuit diagram of the current detection module provided in the embodiment of this application is shown.

[0025] Figure 7 The circuit schematic diagram of the first self-test state provided in the embodiments of this application.

[0026] Figure 8 The circuit schematic diagram of the second self-test state provided in the embodiments of this application.

[0027] Figure 9The circuit diagram of the battery management system provided in the embodiments of this application is shown. Detailed Implementation

[0028] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0029] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features thus defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more unless otherwise explicitly specified.

[0030] A current sampling circuit connected to a differential input analog-to-digital converter can be used to detect the charging and discharging current of a battery. However, if it's a single current sampling circuit, the system cannot detect faults such as reference failure, ADC failure, resistor or capacitor failure in the current sampling circuit, or open circuits.

[0031] However, if two identical current sampling circuits are used for self-testing and comparison, two ADCs and two reference chips are required, and high-precision ADCs are typically more expensive. This not only leads to high costs but also requires a larger footprint.

[0032] If the current sampling fails, it can cause safety issues, potentially leading to battery overcurrent and fire. This application implements self-testing by performing two tests on a single circuit, enabling real-time self-testing with no limit on the number of tests. This solution is simple to implement, low-cost, occupies little circuit board space, and offers high reliability.

[0033] like Figure 1As shown, this embodiment provides a current sampling self-test circuit 100, which includes a first selection module 10 and a second selection module 20. The first selection module 10 is connected to the first differential input terminal SRP of the analog-to-digital converter 220 and the first detection terminal of the current detection module 210. The first selection module 10 is configured to generate a first output voltage to the first differential input terminal SRP based on one of a first test voltage VT1 and a second test voltage VT2. The second selection module 20 is connected to the second differential input terminal SRN of the analog-to-digital converter 220 and the second detection terminal of the current detection module 210. The second selection module 20 is configured to generate a second output voltage to the second differential input terminal SR based on the other of the first test voltage VT1 and the second test voltage VT2. N; wherein, when the first selection module 10 generates a first output voltage based on the first test voltage VT1, and the second selection module 20 generates a second output voltage based on the second test voltage VT2, the voltage difference between the first differential input terminal SRP and the second differential input terminal SRN is the first differential voltage; when the first selection module 10 generates a first output voltage based on the second test voltage VT2, and the second selection module 20 generates a second output voltage based on the first test voltage VT1, the voltage difference between the first differential input terminal SRP and the second differential input terminal SRN is the second differential voltage; when the difference between the first differential voltage and the second differential voltage is not equal to a preset value, it indicates that at least one of the first selection module 10, the second selection module 20, the analog-to-digital converter 220, and the current detection module 210 has malfunctioned.

[0034] It is understood that the current sampling self-test circuit 100 provided in this embodiment is connected to the first differential input terminal SRP of the analog-to-digital converter 220 and the first detection terminal of the current detection module 210 through the first selection module 10, and the second selection module 20 is connected to the second differential input terminal SRN of the analog-to-digital converter 220 and the second detection terminal of the current detection module 210. When the first selection module 10 generates a first output voltage based on the first test voltage VT1, and the second selection module 20 generates a second output voltage based on the second test voltage VT2, the voltage difference between the first differential input terminal SRP and the second differential input terminal SRN is the first differential voltage. When the first selection module 10 generates the first output voltage based on the second test voltage VT2, and the second selection module 20 generates the second output voltage based on the first test voltage VT1, the voltage difference between the first differential input terminal SRP and the second differential input terminal SRN is the second differential voltage. When the difference between the first differential voltage and the second differential voltage is not equal to the preset value, it indicates that at least one of the first selection module 10, the second selection module 20, the analog-to-digital converter 220, and the current detection module 210 has failed. Self-testing can be achieved by performing two tests based on one circuit, thereby avoiding the high cost and larger footprint required by dual circuits.

[0035] It should be noted that the first test voltage VT1 is different from the second test voltage VT2. For example, the first test voltage VT1 may be lower or higher than the second test voltage VT2. This application uses the example of the first test voltage VT1 being lower than the second test voltage VT2 for illustration. The current detection module 210 is used to detect the battery's charging and discharging current, i.e., IOUT.

[0036] In some embodiments, such as Figure 2 As shown, the first selection module 10 includes a first power supply unit 11, a second power supply unit 12, and a first selection unit 13. The first power supply unit 11 is configured to generate a first intermediate voltage based on a first test voltage VT1; the second power supply unit 12 is configured to generate a second intermediate voltage based on a second test voltage VT2; the first selection unit 13 is connected to the first power supply unit 11 and the second power supply unit 12, and the first selection unit 13 is configured to generate a first output voltage based on one of the first intermediate voltage and the second intermediate voltage.

[0037] It should be noted that the first selection unit 13 can select one of the first intermediate voltage and the second intermediate voltage to generate the first output voltage.

[0038] In some embodiments, such as Figure 3 As shown, the first power supply unit 11 includes a first operational amplifier OP1 and a first resistor RT1. The first input terminal of the first operational amplifier OP1 is connected to the first test voltage VT1, and the second input terminal of the first operational amplifier OP1 is connected to the output terminal of the first operational amplifier OP1. The first terminal of the first resistor RT1 is connected to the output terminal of the first operational amplifier OP1, and the second terminal of the first resistor RT1 is connected to the first selection unit 13.

[0039] It should be noted that the first input terminal and the second input terminal of the first operational amplifier OP1 can be the positive input terminal (+) and the inverting input terminal (-), respectively. The first operational amplifier OP1 constitutes a voltage follower (unity-gain buffer) to eliminate the influence of the voltage divider circuit impedance and provide low output impedance drive. The first resistor RT1 acts as a current-limiting protection resistor (e.g., with a resistance value of 10Ω~100Ω) to prevent damage to the op-amp in the event of a short circuit in the subsequent stage. This embodiment, through the synergistic design of the voltage follower and the current-limiting resistor, achieves high resistance to load fluctuations (no shutdown during switching / short circuit) while maintaining voltage accuracy, ensuring the self-test accuracy of the difference between the first differential voltage and the second differential voltage, which is beneficial to improving the accuracy of the self-test results and can provide a reliable reference voltage source with nanosecond-level transient response.

[0040] In other embodiments, the first resistor RT1 may be omitted. In other embodiments, the first power supply unit 11 may also include a transient suppression (TVS) diode (not shown), which is connected between the output of the first operational amplifier OP1 and the ground terminal GND to improve the electrostatic discharge (ESD) protection capability.

[0041] In some embodiments, such as Figure 3 As shown, the second power supply unit 12 includes a second operational amplifier OP2 and a second resistor RT2. The first input terminal of the second operational amplifier OP2 is connected to the second test voltage VT2, and the second input terminal of the second operational amplifier OP2 is connected to the output terminal of the second operational amplifier OP2. The first terminal of the second resistor RT2 is connected to the output terminal of the second operational amplifier OP2, and the second terminal of the second resistor RT2 is connected to the first selection unit 13. The resistance value of the second resistor RT2 is equal to the resistance value of the first resistor RT1.

[0042] It should be noted that the first and second input terminals of the second operational amplifier OP2 can be the positive input (+) and the negative input (-), respectively. The second operational amplifier OP2 forms a voltage follower (unity-gain buffer) to eliminate the impedance effect of the voltage divider circuit and provide low output impedance drive. The second resistor RT2 acts as a current-limiting protection resistor (e.g., a resistance of 10Ω~100Ω) to prevent damage to the op-amp in the event of a short circuit in the subsequent stage. This embodiment, through the synergistic design of the voltage follower and the current-limiting resistor, achieves high resistance to load fluctuations (no shutdown during switching / short circuit) while maintaining voltage accuracy, ensuring the self-test accuracy of the difference between the first and second differential voltages, which helps improve the accuracy of the self-test results and provides a reliable reference voltage source with nanosecond-level transient response.

[0043] In other embodiments, the second resistor RT2 may be omitted. In other embodiments, the second power supply unit 12 may also include a transient suppression (TVS) diode (not shown), which is connected between the output of the second operational amplifier OP2 and the ground terminal GND to improve the electrostatic discharge (ESD) protection capability.

[0044] In some embodiments, such as Figure 3 As shown, the first selection unit 13 includes a first multiplexer MUX1 and a third resistor R1. The first input terminal (IN1) of the first multiplexer MUX1 is connected to the second terminal of the first resistor RT1, and the second input terminal (IN4) of the first multiplexer MUX1 is connected to the second terminal of the second resistor RT2. The first terminal of the third resistor R1 is connected to the output terminal of the first multiplexer MUX1, and the second terminal of the third resistor R1 is connected to the first differential input terminal SRP and the first detection terminal.

[0045] It should be noted that the first multiplexer MUX1 can be a multiplexer chip connected to the power supply terminal VDD and the ground terminal GND, with the voltage of the power supply terminal VDD being 5V for example. The first multiplexer MUX1 may also include floating input terminals IN2 and IN3, so that multiple selection switches A0, A1, A2, and A3 can be formed between each input terminal and the output terminal. These selection switches can be selected according to the selection signals S0, S1, and S2 through the first logic (Logic1).

[0046] In other embodiments, the first selection unit 13 may also include a capacitor (not shown) connected in parallel with the third resistor R1 to filter out high-frequency noise interference and improve voltage stability.

[0047] In some embodiments, such as Figure 4 As shown, the second selection module 20 includes a third power supply unit 21, a fourth power supply unit 22, and a second selection unit 23. The third power supply unit 21 is configured to generate a third intermediate voltage based on a first test voltage VT1; the fourth power supply unit 22 is configured to generate a fourth intermediate voltage based on a second test voltage VT2; the second selection unit 23 is connected to the third power supply unit 21 and the fourth power supply unit 22, and the second selection unit 23 is configured to generate a second output voltage based on one of the third intermediate voltage and the fourth intermediate voltage.

[0048] It should be noted that the second selection unit 23 can select one of the third intermediate voltage and the fourth intermediate voltage to generate the second output voltage.

[0049] In some embodiments, such as Figure 5 As shown, the third power supply unit 21 includes a third operational amplifier OP3 and a fourth resistor RTS1. The first input terminal of the third operational amplifier OP3 is connected to the first test voltage VT1, and the second input terminal of the third operational amplifier OP3 is connected to the output terminal of the third operational amplifier OP3. The first terminal of the fourth resistor RTS1 is connected to the output terminal of the third operational amplifier OP3, and the second terminal of the fourth resistor RTS1 is connected to the second selection unit 23.

[0050] It should be noted that the first and second input terminals of the third operational amplifier OP3 can be positive (+) and negative (-), respectively. The third operational amplifier OP3 forms a voltage follower (unity-gain buffer) to eliminate the impedance effect of the voltage divider circuit and provide low output impedance drive. The fourth resistor RTS1 acts as a current-limiting protection resistor (e.g., 10Ω~100Ω) to prevent damage to the op-amp in the event of a short circuit in the subsequent stage. This embodiment, through the coordinated design of the voltage follower and the current-limiting resistor, achieves high resistance to load fluctuations (no shutdown during switching / short circuit) while maintaining voltage accuracy, ensuring the self-test accuracy of the difference between the first and second differential voltages, which helps improve the accuracy of the self-test results and provides a reliable reference voltage source with nanosecond-level transient response.

[0051] In other embodiments, the fourth resistor RTS1 may be omitted. In other embodiments, the third power supply unit 21 may also include a transient suppression (TVS) diode (not shown), which is connected between the output of the third operational amplifier OP3 and the ground terminal GND to improve the electrostatic discharge (ESD) protection capability.

[0052] In some embodiments, such as Figure 5 As shown, the fourth power supply unit 22 includes a fourth operational amplifier OP4 and a fifth resistor RTS2. The first input terminal of the fourth operational amplifier OP4 is connected to the second test voltage VT2, and the second input terminal of the fourth operational amplifier OP4 is connected to the output terminal of the fourth operational amplifier OP4. The first terminal of the fifth resistor RTS2 is connected to the output terminal of the fourth operational amplifier OP4, and the second terminal of the fifth resistor RTS2 is connected to the second selection unit 23. The resistance value of the fifth resistor RTS2 is equal to the resistance value of the fourth resistor RTS1.

[0053] It should be noted that the first and second input terminals of the fourth operational amplifier OP4 can be positive (+) and negative (-), respectively. The fourth operational amplifier OP4 forms a voltage follower (unity-gain buffer) to eliminate the impedance effect of the voltage divider circuit and provide low output impedance drive. The fifth resistor RTS2 acts as a current-limiting protection resistor (e.g., 10Ω~100Ω) to prevent damage to the op-amp in the event of a short circuit in the subsequent stage. This embodiment, through the coordinated design of the voltage follower and the current-limiting resistor, achieves high resistance to load fluctuations (no shutdown during switching / short circuit) while maintaining voltage accuracy, ensuring the self-test accuracy of the difference between the first and second differential voltages, which helps improve the accuracy of the self-test results and provides a reliable reference voltage source with nanosecond-level transient response.

[0054] In other embodiments, the fifth resistor RTS2 may be omitted. In other embodiments, the fourth power supply unit 22 may also include a transient suppression (TVS) diode (not shown), which is connected between the output of the fourth operational amplifier OP4 and the ground terminal GND to improve the electrostatic discharge (ESD) protection capability.

[0055] In some embodiments, such as Figure 5 As shown, the second selection unit 23 includes a second multiplexer MUX2 and a sixth resistor R2. The first input terminal of the second multiplexer MUX2 is connected to the second terminal of the fourth resistor RTS1, and the second input terminal of the second multiplexer MUX2 is connected to the second terminal of the fifth resistor RTS2. The first terminal of the sixth resistor R2 is connected to the output terminal of the second multiplexer MUX2, and the second terminal of the sixth resistor R2 is connected to the second differential input terminal SRN and the second detection terminal.

[0056] It should be noted that the second multiplexer MUX2 can be a multiplexer chip connected to the power supply terminal VDD and the ground terminal GND, with the voltage of the power supply terminal VDD being 5V for example. The second multiplexer MUX2 may also include floating input terminals IN2 and IN3, so that multiple selection switches A0, A1, A2, and A3 can be formed between each input terminal and the output terminal. These selection switches can be selected according to the selection signals S0, S1, and S2 through the second logic (Logic2).

[0057] In other embodiments, the second selection unit 23 may also include a capacitor (not shown) connected in parallel with the sixth resistor R2 to filter out high-frequency noise interference and improve voltage stability.

[0058] In some embodiments, such as Figure 6 As shown, the current detection module 210 includes a seventh resistor RD1, an eighth resistor RS, a ninth resistor RD2, and a first capacitor CD. The first end of the seventh resistor RD1 is connected to the first differential input terminal SRP; the first end of the eighth resistor RS is connected to the second end of the seventh resistor RD1, and the second end of the eighth resistor RS is connected to the ground terminal GND; the first end of the ninth resistor RD2 is connected to the second end of the eighth resistor RS and the ground terminal GND, and the second end of the ninth resistor RD2 is connected to the second differential input terminal SRN; the first end of the first capacitor CD is connected to the first differential input terminal SRP, and the second end of the first capacitor CD is connected to the second differential input terminal SRN; wherein, the resistance value of the seventh resistor RD1 is equal to the resistance value of the ninth resistor RD2.

[0059] It should be noted that the first capacitor CD is used to filter out differential noise and provide an electrostatic discharge path. The current flowing through the eighth resistor RS is the charging and discharging current (IOUT). The seventh resistor RD1 and the ninth resistor RD2 are used to establish the proportional coefficients of this charging and discharging current.

[0060] The non-self-test state is when all selector switches of the first multiplexer MUX1, or selector switches A0 and A3 of the first multiplexer MUX1, are open, and all switches of the second multiplexer MUX2, or selector switches A0 and A3 of the second multiplexer MUX2, are open. Alternatively, at least one of selector switches A1 and A2 of the first multiplexer MUX1, and at least one of selector switches A1 and A2 of the second multiplexer MUX2, can be selected.

[0061] The first multiplexer MUX1 and the second multiplexer MUX2 act as analog switches. In the non-self-test state, the leakage current of the analog switches is in the nA range, the equivalent impedance of the sampling port of the analog-to-digital converter 220 is in the KΩ range, and the resulting offset voltage error is in the μV range. The parasitic capacitance of the analog switches is in the pF range and will not affect the system bandwidth and common-mode rejection ratio.

[0062] The resistance of the eighth resistor RS is in the range of mΩ, while the resistances of the first resistor RT1, the second resistor RT2, and the analog switch are all in the range of Ω.

[0063] Figure 7 The diagram shows the first self-test state of the current sampling self-test circuit 100. Both the selection switch A3 of the first multiplexer MUX1 and the selection switch A0 of the second multiplexer MUX2 are turned on, providing excitation voltage to the first differential input terminal SRP and the second differential input terminal SRN. The voltage at the first differential input terminal SRP, i.e., VSRP1, is calculated using equation 1-1 as follows: VSRP1=RD÷(RD+R1)×VT2+R1÷(RD+R1)×VSNS(1-1) Where R1 represents the resistance value of the third resistor R1, RD represents the resistance value of the seventh resistor RD1 or the ninth resistor RD2, VT2 represents the second test voltage VT2, and VSNS represents the voltage across the eighth resistor RS.

[0064] The voltage at the second differential input terminal SRN, i.e., VSRN1, is calculated using the following formula (1-2): VSRN1=RD÷(RD+R2)×VT1(1-2) Where R2 represents the resistance value of the sixth resistor R2, and VT1 represents the first test voltage VT1.

[0065] Let R1=R2=R, then the calculation formula 1-3 for the first differential voltage VSRPN1 acquired by the analog-to-digital converter 220 is as follows: VSRPN1=VSRP1-VSRN1 =RD÷(RD+R)×(VT2-VT1)+R1÷(RD+R1)×VSNS(1-3) Figure 8 The diagram shows the second self-test state of the current sampling self-test circuit 100. Both the selection switch A0 of the first multiplexer MUX1 and the selection switch A3 of the second multiplexer MUX2 are turned on, providing excitation voltage to the first differential input terminal SRP and the second differential input terminal SRN. The voltage at the first differential input terminal SRP, i.e., VSRP2, is calculated using equation 2-1 as follows: VSRP2=RD÷(RD+R1)×VT2+R1÷(RD+R1)×VSNS(2-1) The voltage at the second differential input terminal SRN, i.e., VSRN2, is calculated using the following formula 2-2: VSRN2=RD÷(RD+R2)×VT1(2-2) Let R1=R2=R, then the calculation formula 2-3 for the second differential voltage VSRPN2 acquired by the analog-to-digital converter 220 is as follows: VSRPN2=VSRP2-VSRN2 =RD÷(RD+R)×(VT1-VT2)+R1÷(RD+R1)×VSNS(2-3) The difference between the first differential voltage and the second differential voltage is VSRPN1-VSRPN2. The calculation formula 3-1 is as follows: VSRPN1-VSRPN2=2RD÷(RD+R)×(VT2-VT1)(3-1) According to calculation formula 3-1, VSRPN1-VSRPN2 are independent of the sampling voltage.

[0066] In this test, the first test voltage VT1 can be 0.1V, the second test voltage VT2 can be 0.3V, and the resistance values ​​of the third resistor R1, the sixth resistor R2, the seventh resistor RD1, and the ninth resistor RD2 are all known. Therefore, VSRPN1-VSRPN2 are also known. VSRPN1 can be approximately 0.181V, and VSRPN2 can be approximately -0.181V.

[0067] If the difference between the two acquired differential voltages, i.e., VSRPN1-VSRPN2 or VSRPN2-VSRPN1, is not equal to the preset value (known quantity), it indicates a problem with the sampling circuit. This could be due to issues with Vt1, Vt2, or RD, or it could be a problem with the analog-to-digital converter 220 (sampling chip). Therefore, this provides the self-test result of the sampling chip.

[0068] In summary, the current sampling self-test circuit 100 provided in this application can perform self-tests in real time without requiring the system to stop working. That is, the value of VSNS does not affect the self-test result. Other circuits, however, require VSNS to be 0 to perform a self-test.

[0069] The self-test will affect the sampling results, but the operating voltage will not affect the self-test. Therefore, the self-test can be performed without shutting down the system. During the self-test, the sampling results are not used as actual data.

[0070] In some embodiments, such as Figure 9 As shown, this embodiment provides a battery management system 200, which includes the current sampling self-test circuit 100 described above.

[0071] It is understood that, since the battery management system 200 provided in this embodiment includes the aforementioned current sampling self-test circuit 100, it can also be connected to the first differential input terminal SRP of the analog-to-digital converter 220 and the first detection terminal of the current detection module 210 through the first selection module 10, and the second selection module 20 is connected to the second differential input terminal SRN of the analog-to-digital converter 220 and the second detection terminal of the current detection module 210. When the first selection module 10 generates a first output voltage based on the first test voltage VT1, and the second selection module 20 generates a second output voltage based on the second test voltage VT2, the first differential input terminal SRP and the second differential input terminal SRN are connected... The voltage difference is the first differential voltage; when the first selection module 10 generates the first output voltage based on the second test voltage VT2, and the second selection module 20 generates the second output voltage based on the first test voltage VT1, the voltage difference between the first differential input terminal SRP and the second differential input terminal SRN is the second differential voltage; when the difference between the first differential voltage and the second differential voltage is not equal to the preset value, it indicates that at least one of the first selection module 10, the second selection module 20, the analog-to-digital converter 220 and the current detection module 210 has failed. Self-testing can be achieved by performing two tests based on one circuit, thereby avoiding the high cost and larger footprint required by dual circuits.

[0072] In some embodiments, such as Figure 9 As shown, the battery management system 200 also includes a current detection module 210 and an analog front-end 230, the analog front-end 230 including an analog-to-digital converter 220.

[0073] It should be noted that the analog-to-digital converter 220 in this application can be a discrete ADC chip or an ADC chip in the battery management system 200. It can be, but is not limited to, a Σ-Δ type ADC or other differential input type ADCs.

[0074] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0075] The current sampling self-test circuit 100 and battery management system 200 provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A current sampling self-test circuit, characterized in that, The current sampling self-test circuit includes: The first selection module, connected to the first differential input terminal of the analog-to-digital converter and the first detection terminal of the current detection module, is configured to generate a first output voltage to the first differential input terminal based on one of a first test voltage and a second test voltage. The second selection module, connected to the second differential input terminal of the analog-to-digital converter and the second detection terminal of the current detection module, is configured to generate a second output voltage to the second differential input terminal based on another of the first test voltage and the second test voltage. Wherein, when the first selection module generates the first output voltage based on the first test voltage, and the second selection module generates the second output voltage based on the second test voltage, the voltage difference between the first differential input terminal and the second differential input terminal is the first differential voltage; when the first selection module generates the first output voltage based on the second test voltage, and the second selection module generates the second output voltage based on the first test voltage, the voltage difference between the first differential input terminal and the second differential input terminal is the second differential voltage; when the difference between the first differential voltage and the second differential voltage is not equal to a preset value, it indicates that at least one of the first selection module, the second selection module, the analog-to-digital converter, and the current detection module has malfunctioned.

2. The current sampling self-test circuit according to claim 1, characterized in that, The first selection module includes: The first power supply unit is configured to generate a first intermediate voltage based on the first test voltage; The second power supply unit is configured to generate a second intermediate voltage based on the second test voltage; A first selection unit, connected to the first power supply unit and the second power supply unit, is configured to generate the first output voltage based on one of the first intermediate voltage and the second intermediate voltage.

3. The current sampling self-test circuit according to claim 2, characterized in that, The first power supply unit includes: A first operational amplifier, wherein the first input terminal of the first operational amplifier is connected to the first test voltage, and the second input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier; A first resistor, the first end of which is connected to the output terminal of the first operational amplifier, and the second end of which is connected to the first selection unit.

4. The current sampling self-test circuit according to claim 3, characterized in that, The second power supply unit includes: A second operational amplifier, wherein the first input terminal of the second operational amplifier is connected to the second test voltage, and the second input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier; The second resistor has a first end connected to the output terminal of the second operational amplifier and a second end connected to the first selection unit. The resistance value of the second resistor is equal to the resistance value of the first resistor.

5. The current sampling self-test circuit according to claim 4, characterized in that, The first selection unit includes: A first multiplexer, wherein the first input terminal of the first multiplexer is connected to the second terminal of the first resistor, and the second input terminal of the first multiplexer is connected to the second terminal of the second resistor; The third resistor has its first end connected to the output of the first multiplexer, and its second end connected to the first differential input and the first detection.

6. The current sampling self-test circuit according to claim 5, characterized in that, The second selection module includes: The third power supply unit is configured to generate a third intermediate voltage based on the first test voltage; The fourth power supply unit is configured to generate a fourth intermediate voltage based on the second test voltage; The second selection unit, connected to the third power supply unit and the fourth power supply unit, is configured to generate the second output voltage based on one of the third intermediate voltage and the fourth intermediate voltage.

7. The current sampling self-test circuit according to claim 6, characterized in that, The third power supply unit includes: A third operational amplifier, wherein the first input terminal of the third operational amplifier is connected to the first test voltage, and the second input terminal of the third operational amplifier is connected to the output terminal of the third operational amplifier; The fourth resistor has its first end connected to the output terminal of the third operational amplifier and its second end connected to the second selection unit.

8. The current sampling self-test circuit according to claim 7, characterized in that, The fourth power supply unit includes: A fourth operational amplifier, wherein the first input terminal of the fourth operational amplifier is connected to the second test voltage, and the second input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier; The fifth resistor has its first end connected to the output terminal of the fourth operational amplifier and its second end connected to the second selection unit. The resistance value of the fifth resistor is equal to the resistance value of the fourth resistor.

9. The current sampling self-test circuit according to claim 8, characterized in that, The second selection unit includes: A second multiplexer, the first input terminal of which is connected to the second terminal of the fourth resistor, and the second input terminal of which is connected to the second terminal of the fifth resistor; The sixth resistor has its first end connected to the output of the second multiplexer, and its second end connected to the second differential input and the second detection.

10. The current sampling self-test circuit according to any one of claims 1-9, characterized in that, The current detection module includes: The seventh resistor, the first end of which is connected to the first differential input terminal; The eighth resistor has its first end connected to the second end of the seventh resistor, and its second end connected to the ground terminal. The ninth resistor has its first end connected to the second end of the eighth resistor and the ground terminal, and its second end connected to the second differential input terminal. A first capacitor, wherein a first terminal of the first capacitor is connected to the first differential input terminal, and a second terminal of the first capacitor is connected to the second differential input terminal; The resistance value of the seventh resistor is equal to the resistance value of the ninth resistor.

11. A battery management system, characterized in that, The battery management system includes a current sampling self-test circuit as described in any one of claims 1-10.

12. The battery management system according to claim 11, characterized in that, The battery management system also includes the current detection module and an analog front end, the analog front end including the analog-to-digital converter.

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