Hard disk backboard, power consumption reading control method, electronic equipment and storage medium

Abstract

The invention provides a hard disk backplane, a control method, electronic equipment and a storage medium, and relates to the technical field of storage, compatibility of the hard disk backplane can be improved by identifying a target hard disk type through a control module and generating a control instruction based on a type matching preset power supply demand, power supply specifications of different hard disks are different, and the compatibility of the hard disk backplane is improved. The control module enables the same backboard to adapt to various hard disks, and a special backboard does not need to be independently designed for a specific hard disk; the power supply conversion module responds to the power supply control signal and converts the input voltage into the target voltage required by the target hard disk, so that the power utilization requirements of different hard disks can be met, the hardware safety of the hard disks can be ensured, and the influence on the service life of the hard disks due to different damages caused by output of fixed voltage is avoided; the detection module collects electrical parameters of the hard disk in real time and transmits the electrical parameters to the control module, the control module calculates real-time power consumption, and potential fault risks of the hard disk can be found in advance through real-time collection and calculation.

Description

Technical Field

[0001] This disclosure relates to the field of storage technology, and in particular to a hard disk backplane and a power consumption read control method, an electronic device, and a storage medium. Background Technology

[0002] Hard drive backplanes, as critical connection and management components in server storage systems, are widely used in data centers, cloud computing platforms, and high-performance computing devices. Their core function is to ensure stable communication and power supply between hard disk drives (HDDs), solid-state drives (SSDs), and the motherboard. With the evolution of storage technology, the demand for hybrid storage architectures in servers is increasing. However, existing hard drive backplane designs lack independent acquisition and real-time feedback of power consumption data for each hard drive, resulting in information gaps in energy management, load balancing, and fault warning. Therefore, the inadequacy of traditional backplanes in power consumption monitoring capabilities limits their application expansion in high-density, high-energy-efficiency server systems, necessitating systemic improvements. Summary of the Invention

[0003] This application provides a hard disk backplane and a power consumption reading control method, an electronic device, and a storage medium to at least solve the problem in related technologies that it is impossible to independently collect and provide real-time feedback of power consumption data for each hard disk.

[0004] This application provides a hard disk backplane, including: a control module, multiple detection modules, and a communication interface; the control module is connected to each of the multiple detection modules. The detection module is configured to collect the electrical parameters of the connected target hard drive and send them to the control module; The control module is configured to perform power calculations based on the electrical parameters to obtain the power consumption data of the target hard disk; and to communicate with the server baseboard management controller through the communication interface to report the power consumption data of at least one target hard disk.

[0005] This application also provides a method for controlling a hard disk backplane, including: Acquire electrical parameters of at least one target hard drive connected to the hard drive backplane; Power calculations are performed based on the electrical parameters to obtain the power consumption data of the at least one target hard disk. The power consumption data of the at least one target hard disk is reported to the server baseboard management controller.

[0006] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described hard disk backplane control methods.

[0007] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described hard disk backplane control methods.

[0008] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described hard disk backplane control methods.

[0009] This application provides a hard drive backplane and control method, as well as an electronic device. A detection module collects the electrical parameters of the hard drive in real time and transmits them to a control module. The control module calculates the real-time power consumption. Through real-time data collection and calculation, potential hard drive failure risks can be detected in advance, avoiding data loss or service interruption caused by sudden failures. The control module transmits hard drive type and power consumption data to the server's baseboard management controller via a communication interface, enabling the reading of hard drive power consumption data. Based on this power consumption data, a comprehensive analysis of the hard drive's status can be achieved, providing maintenance personnel with more comprehensive hard drive status information and facilitating maintenance.

[0010] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0011] The accompanying drawings are provided to better understand this solution and do not constitute a limitation of this disclosure. Wherein: Figure 1 A schematic diagram of the frame of a hard disk backplane provided in an embodiment of this application; Figure 2 A schematic diagram of the frame of another hard disk backplane provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a control module provided in an embodiment of this application; Figure 4 A circuit diagram of an asymmetric half-bridge converter provided in an embodiment of this application; Figure 5 This is a flowchart illustrating a control method for a hard disk backplane provided in an embodiment of this application. Detailed Implementation

[0012] The exemplary embodiments of this disclosure are described below with reference to the accompanying drawings, including various details of the embodiments to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this disclosure. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0013] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0014] In conjunction with the specific application environment architecture or specific hardware architecture on which the hardware backplane depends, this section describes the specific application environment architecture or specific hardware architecture.

[0015] Embodiments of this application provide a hard disk backplane. Figure 1 This is a schematic diagram of a hard disk backplane frame provided in an embodiment of this application. Figure 1 As shown, the hard disk backplane includes the following components: a control module 11, multiple detection modules 12, and a communication interface 13; the control module 11 is connected to the multiple detection modules 12 respectively.

[0016] The detection module 12 is configured to collect the electrical parameters of the target hard disk and send them to the transmission control module 11.

[0017] In this embodiment, the detection module 12 in the hard drive backplane is a hardware-based single-disk electrical parameter acquisition unit, with each detection module independently configured for the power supply line of a unique hard drive. Each detection module 12 detects the electrical parameters of the hard drive and can be composed of a shunt resistor, a differential amplifier circuit, and a signal transmission interface, all integrated into the backplane PCB circuit and connected in series between the power supply circuit of the target hard drive and the output of the power conversion module, realizing dedicated acquisition of the electrical parameters of a single hard drive. The shunt resistor is a high-precision, low-temperature-coefficient resistor, with its resistance value preset according to the typical operating current range of the hard drive. When the target hard drive is running, the power supply current flowing through the shunt resistor will generate a small voltage difference proportional to the current across its terminals. The differential amplifier circuit then performs signal conditioning on this small voltage difference, forming a fixed-gain amplification link through a built-in operational amplifier and an external set resistor. The gain value is calibrated to ensure that the signal is amplified to an amplitude suitable for subsequent processing, while suppressing common-mode noise interference and ensuring the accuracy of parameter acquisition. After the data acquisition is completed, the detection module transmits the conditioned voltage difference signal directly to the corresponding signal interface of the control module through the analog signal path formed by hardware wiring, providing the control module with real and reliable raw electrical parameter input for power consumption calculation.

[0018] The detection module 12 enables accurate acquisition of electrical parameters, solving the signal distortion problem caused by traditional extensive acquisition. The independent configuration of each panel ensures the independence and traceability of parameters, providing an accurate data foundation for subsequent single-panel power consumption calculation and status monitoring.

[0019] The control module 11 is configured to perform power calculations based on electrical parameters to obtain power consumption data of the target hard disk; and to communicate with the server baseboard management controller through the communication interface 13 to report power consumption data of at least one target hard disk.

[0020] In this embodiment, the communication interface 13 is designed based on the PMBus 1.2 protocol of the I2C physical layer. The control module establishes a hardware communication link with the server baseboard management controller (BMC) through this interface, encapsulates the identified hard disk type and calculated power consumption data according to the protocol predefined format, and reports it to the BMC in real time based on the protocol instruction set (such as the reserved D1h-D3h instruction range).

[0021] By enabling precise generation of power consumption data through hardware-based computational logic, the problem of missing power consumption data in traditional technologies is solved; the reporting mechanism based on standardized protocols ensures the reliability of data transmission, provides data support for BMC to carry out energy consumption management, load balancing and fault early warning, and improves system operation and maintenance efficiency.

[0022] This application provides a hard drive backplane. A control module identifies the target hard drive type and generates control commands based on the type and preset power supply requirements, improving the backplane's compatibility. Different hard drives have different power supply specifications; the control module allows the same backplane to be adapted to multiple types of hard drives, eliminating the need for a dedicated backplane design for specific drives. A power conversion module responds to power control signals, converting the input voltage to the target voltage required by the hard drive, adapting to the power needs of different drives and ensuring hard drive hardware safety. This prevents damage caused by fixed output voltages, thus extending the hard drive's lifespan. A detection module collects the hard drive's electrical parameters in real time and transmits them to the control module. The control module calculates real-time power consumption. Through real-time collection and calculation, potential hard drive failure risks can be detected in advance, preventing data loss or service interruption due to sudden failures. The control module transmits hard drive type and power consumption data to the server's baseboard management controller via a communication interface, enabling the reading of hard drive power consumption data. Based on this data, a comprehensive analysis of the hard drive's status can be performed, providing maintenance personnel with more comprehensive hard drive status information for easier maintenance.

[0023] Furthermore, in the embodiments of this application, such as Figure 2 As shown, the control module 11 is configured to identify the hard drive type of the connected target hard drive and generate a power control signal based on the hard drive type. In this embodiment, the control module 11 in the hard disk backplane can be implemented using hardware units with signal processing and logic judgment capabilities, such as programmable microprocessors, field-programmable logic devices, or complex programmable logic devices, as the core implementation carrier. These hardware units integrate necessary communication interfaces, signal analysis circuits, and logic operation modules, enabling signal interaction with the target hard disk and the generation of control commands. The control module 11 establishes a connection with the target hard disk through a preset interface. This preset interface is compatible with industry-standard hard disk power status feedback, allowing it to obtain the power requirements of the target hard disk. Different types of hard disks have significantly different power requirements due to differences in hardware structure and working principles. For example, some hard disks require multiple voltage levels to maintain mechanical operation and circuitry, while others only require a single voltage for data storage and read / write operations. The control module 11 performs hardware-level signal analysis and feature recognition on the acquired power requirements information, accurately distinguishing the type of the connected target hard disk based on preset type determination logic. After completing the hard drive type identification, the control module 11 generates a power control signal containing instruction information such as power supply mode and voltage output specifications based on the preset type-power supply matching rules. This signal is transmitted to the corresponding power conversion module through hardware lines, providing a clear control basis for subsequent targeted power supply.

[0024] Through hardware-based signal parsing and type recognition mechanisms, the target hard drive type is accurately determined, breaking through the limitations of traditional backplanes that rely on fixed interface adaptation. The type-based adaptive power control signal provides a basis for differentiated power supply for different hard drives, effectively improving the hardware compatibility of the hard drive backplane and reducing the risk of power supply failures caused by type mismatch.

[0025] Furthermore, in the embodiments of this application, such as Figure 3 As shown, the control module 11 includes: a microcontroller; the microcontroller receives power demand information of the target hard drive based on a preset interface, and identifies the hard drive type of the connected target hard drive based on the power demand information, the hard drive type including a first hard drive type and a second hard drive type; if the power demand information includes a first voltage demand and a second voltage demand, then the target hard drive is determined to be the first hard drive type and a corresponding power control signal is generated; if the power demand information includes a first voltage demand, then the target hard drive is determined to be the second hard drive type and a corresponding power control signal is generated.

[0026] Specifically, the microcontroller of the control module 11 can be a device with hardware signal resolution capabilities, such as a system-on-a-chip (PSoC), a field-programmable gate array (FPGA), or a complex programmable logic device (CPLD). It integrates a signal receiving interface, a logic judgment unit, and a control signal generation circuit, providing hardware support for hard drive type identification and command output. The preset interface is specifically the PWDIS (Power Disable) interface, a power status feedback interface common to both SATA and SAS devices. It can directly establish a hardware connection with the corresponding pins of the target hard drive, enabling reliable transmission of power demand information—after the target hard drive is powered on, it will feed back its inherent power demand characteristics to the microcontroller through the PWDIS interface. The microcontroller parses the information transmitted through the PWDIS interface using its internal signal conditioning circuitry, extracting the voltage requirement parameters. When the parsed parameters contain both a first voltage requirement (e.g., 12V) and a second voltage requirement (e.g., 5V), the logic judgment unit determines the target hard drive as the first type (corresponding to a mechanical hard drive, HDD, which requires dual voltages to support mechanical operation and circuitry). When the parsed parameters only contain the first voltage requirement, it is determined to be the second type (corresponding to a solid-state drive, SSD, which only requires a single voltage to operate). After completing the type determination, the microcontroller's control signal generation circuit immediately generates an appropriate power control signal based on the determination result. This signal contains a clear voltage output combination instruction and is transmitted to the corresponding power conversion module via hardware wiring.

[0027] The power demand identification mechanism based on the PWDIS standard interface breaks through the limitations of traditional identification relying on data interface protocols, and achieves accurate determination of hard drive type; the direct association logic between type and control signals ensures that the power supply strategy matches the hard drive requirements, improves backplane compatibility, and reduces the risk of power supply adaptation errors.

[0028] Furthermore, in the embodiments of this application, such as Figure 3 As shown, the control module 11 also includes: multiple analog-to-digital converters; the analog-to-digital converters convert electrical parameters into digital signals and send the digital signals to the microcontroller; the microcontroller performs power calculations on the target hard disk based on the digital signals to obtain power consumption data.

[0029] Specifically, in the control module 11 of the hard drive backplane, multiple analog-to-digital converters (ADCs) are hardware devices with high-precision signal conversion capabilities. Their number corresponds one-to-one with the number of detection modules 12 and hard drives. Each ADC is dedicated to the parameter transmission link of a single hard drive, using analog-to-digital converters that support at least 12-bit resolution to meet the recognition requirements of minute changes in hard drive electrical parameters. The core achieves signal conversion through three hardware steps: sampling, quantization, and encoding. The sampling stage presets the sampling frequency based on the Nyquist theorem to ensure coverage of the dynamic range of electrical parameter changes during hard drive operation. The quantization stage divides the continuous analog signal into discrete numerical levels to reduce quantization errors. The encoding stage converts the quantization result into a binary digital signal, adapting it to the microcontroller's signal processing format. The signal connector is a standardized hardware interface component integrated into the control module's PCB circuit. One end connects one-to-one to the output of each ADC via dedicated wiring, and the other end adapts to the microcontroller's signal input interface. Internally, it includes signal isolation and impedance matching circuits to suppress electromagnetic interference during transmission and ensure the integrity of the digital signal.

[0030] When the electrical parameters (voltage difference signal after differential amplification) collected by the detection module 12 are transmitted to the control module 11, the dedicated ADC of the corresponding hard drive first receives the analog signal, starts the hardware conversion process and outputs a digital signal; the signal connector then receives the digital signal output by the ADC and transmits it stably to the microcontroller through impedance matching wiring; the microcontroller, based on the preset hardware operation logic, calls the voltage difference data contained in the digital signal, combines the known shunt resistor value, differential amplifier circuit gain and corresponding power supply voltage value, and performs power calculation to generate single disk power consumption data.

[0031] By adopting an independent configuration and high-precision conversion design with "one ADC per disk", the problems of distortion in traditional analog signal transmission and data aliasing between multiple disks are solved. The hardware adaptation and anti-interference design of the signal connector ensures the reliability of digital signal transmission, provides high-quality input for the microcontroller to accurately calculate power consumption data, and improves the accuracy and independence of single-disk power consumption monitoring.

[0032] Furthermore, in the embodiments of this application, the detection module 12 includes: a shunt resistor and a differential amplifier circuit; the shunt resistor is connected in series in the power supply line of the target hard disk, and the differential amplifier circuit collects the voltage difference across the shunt resistor; the differential amplifier circuit sends the voltage difference to the corresponding analog-to-digital converter.

[0033] Specifically, the detection module 12 is a hardware-based single-disk electrical parameter acquisition unit. Each detection module is configured independently for a unique target hard drive. The core is composed of multiple shunt resistors and multiple differential amplifier circuits, which are matched one by one. The whole module is integrated into the backplane PCB circuit and connected in series between the output of the power conversion module 14 and the power supply interface of the target hard drive, so as to realize the exclusive acquisition of electrical parameters of a single hard drive and avoid data mixing of multiple disks. The shunt resistor is a high-precision, low-temperature-coefficient metal film resistor. Its resistance value is preset according to the typical operating current range of the hard drive (such as the peak current of HDD startup and the normal operating current of SSD), ensuring that a detectable small voltage difference can be generated in all working states of the hard drive, while keeping its own power consumption at an extremely low level to avoid affecting the stability of the power supply. The differential amplifier circuit consists of an operational amplifier, an external setting resistor and a filter capacitor forming a fixed-gain amplification link. The gain value is kept constant after factory calibration. It can amplify the small voltage difference at the millivolt level across the shunt resistor to a signal amplitude that is compatible with the analog-to-digital converter. At the same time, it suppresses common-mode noise in the power supply line (such as power ripple and electromagnetic interference) by virtue of the differential input characteristics, ensuring the signal-to-noise ratio of the acquired signal.

[0034] When the target hard drive is running, the power supply current flows through the shunt resistor of the corresponding detection module, forming a voltage difference that is proportional to the current across its two ends. The differential amplifier circuit collects this voltage difference in real time, and after gain amplification and noise suppression, it transmits it to the corresponding analog-to-digital converter in the control module 11 through dedicated hardware wiring, providing accurate and reliable analog signal input for the subsequent digital conversion of electrical parameters.

[0035] Furthermore, in the embodiments of this application, such as Figure 2 As shown, this embodiment also includes multiple power conversion modules. The power conversion module 14 is configured to output a target voltage corresponding to the hard disk type to the target hard disk in response to a power control signal sent by the control module 11.

[0036] In this embodiment, the power conversion module 14 in the hard drive backplane is an isolated power conversion hardware unit with multi-voltage adaptability. Its core architecture includes a power switching component, an electromagnetic induction conversion device, a filtering and voltage regulation component, and a drive circuit. It can achieve precise output of different voltage levels according to the control signal, adapting to the different power supply requirements of mechanical hard drives (HDDs) and solid-state drives (SSDs). Among them, the power switching component integrates a bypass switch module and a buck converter module. The bypass switch module is constructed using low-loss switching devices to achieve direct output of high voltage. The buck converter module is designed based on the principle of electromagnetic induction, which can convert the input high voltage to low voltage and output it stably. When the control module 11 sends a power control signal, the drive circuit of the power conversion module 14 parses the hard disk type identifier in the signal and activates the corresponding voltage output path: if the signal points to a hard disk type requiring dual voltage supply (such as HDD), the drive circuit simultaneously triggers the bypass switch module and the buck converter module to work. The bypass switch module directly outputs the first voltage (such as 12V), and the buck converter module converts the input voltage to the second voltage (such as 5V), with both working together to form a dual voltage supply; if the signal points to a hard disk type requiring only a single voltage supply (such as SSD), the drive circuit only triggers the bypass switch module to conduct, outputting a single first voltage, while the buck converter module remains in standby mode. The entire response process relies on an isolated design to ensure power supply safety, and uses filtering and voltage regulation components to ensure that the output voltage ripple and stability meet hard disk operating standards.

[0037] Through modular voltage output path design, targeted power supply for different types of hard drives is achieved, breaking through the limitations of traditional single voltage output of backplanes; the isolated architecture and precise signal response mechanism not only improve the hardware compatibility of hard drive backplanes with HDDs and SSDs, but also ensure the stability and safety of power supply, reducing the risk of hard drive damage caused by improper voltage adaptation.

[0038] Furthermore, in an embodiment of this application, the power conversion module 14 includes: an asymmetric half-bridge converter and a bypass switch module; the bypass switch module, in response to a power control signal corresponding to the first hard disk type, outputs a first voltage to a target hard disk of the first hard disk type; the asymmetric half-bridge converter, in response to a power control signal corresponding to the first hard disk type, outputs a second voltage to the target hard disk of the first hard disk type; the asymmetric half-bridge converter, in response to power control signals corresponding to the first hard disk type and the second hard disk type, outputs a third voltage to a microcontroller; and the bypass switch module, in response to a power control signal corresponding to the second hard disk type, outputs a first voltage to the target hard disk of the second hard disk type.

[0039] Specifically, the power conversion module 14 in the hard drive backplane is an integrated multi-path voltage supply hardware unit. Each module is configured independently for a single hard drive. The core consists of a converter and a bypass switch module. Both are connected to the signal output terminal of the control module 11 through hardware wiring, and the output terminal is directly connected to the power supply interface of the target hard drive. The whole adopts an isolated circuit design to ensure power supply safety. Among them, the bypass switch module is constructed with low on-resistance power MOSFET devices, which, together with the drive circuit, form a high-voltage direct supply path, enabling lossless direct output of the first voltage (such as 12V). The converter is a multi-set output isolated power conversion device, integrating a buck topology, synchronous rectification circuit and filtering unit, which has the ability to convert the input high voltage into different low voltages and can stably output a second voltage (such as 5V) and a third voltage (such as 3.3V). The third voltage is specifically adapted to the working requirements of the control module 11.

[0040] When the control module 11 sends a power control signal corresponding to the first hard drive type (e.g., HDD, requiring dual voltage supply), the signal is parsed by the drive circuit and simultaneously triggers the bypass switch module and the converter to operate: the MOSFET device of the bypass switch module turns on, directly outputting the first voltage to the target hard drive; the converter starts the buck conversion process, converting the input voltage into a second voltage through its internal topology and outputting it to the target hard drive, while continuously outputting a third voltage to the microcontroller. When receiving a power control signal corresponding to the second hard drive type (e.g., SSD, requiring only a single voltage supply), the drive circuit only triggers the bypass switch module to turn on, outputting the first voltage to the target hard drive, while the converter only maintains the third voltage output to the microcontroller, and the second voltage output path remains off to reduce power consumption.

[0041] Through a modular design of "bypass switch direct supply + converter step-down", differentiated voltage supply for different hard drive types is achieved, breaking through the limitations of the traditional single conversion architecture. For different types of precise signal response mechanisms, it not only improves the compatibility of the backplane with HDD and SSD, but also reduces redundant power consumption by starting the conversion path on demand, ensuring power supply stability and energy efficiency.

[0042] Furthermore, in the embodiments of this application, such as Figure 4 As shown, the asymmetric half-bridge converter includes: a first buck converter submodule and a second buck converter submodule, the first buck converter submodule and the second buck converter submodule corresponding to different duty cycles; the first buck converter submodule responds to the power control signal corresponding to the first hard disk type and outputs a second voltage to the target hard disk of the first hard disk type; the second buck converter submodule responds to the power control signals corresponding to the first hard disk type and the second hard disk type and outputs a third voltage to the microcontroller.

[0043] Specifically, the power conversion module uses a 1000W multi-output isolated asymmetrical half-bridge converter. Its core hardware architecture consists of power MOSFETs (Q1, Q2), DC blocking capacitors (C1, Cbulk, etc.), a center-tapped transformer (TR), synchronous rectifier power transistors (Q4, Q5, Q6), and filter components (C4, C5, L2). Energy transfer is achieved through asymmetrical conduction timing on the primary side of the transformer, while synchronous rectification technology on the secondary side reduces conversion losses. The overall design features high-efficiency isolation and multi-voltage output capability. For example, Figure 3 As shown, the first step-down conversion submodule consists of the corresponding winding of the transformer secondary side, power transistors Q4 and Q6, filter capacitor C4, and inductor L2. The second step-down conversion submodule consists of the other winding of the transformer secondary side, power transistors Q5 and Q6, and filter capacitor C5. The two submodules achieve differentiated voltage output by preset different power switch duty cycles. The duty cycle is calibrated based on the voltage conversion characteristics of the asymmetric half-bridge topology. The duty cycle of the first submodule is adapted to the second voltage (e.g., 5V) output requirement, and the duty cycle of the second submodule is adapted to the third voltage (e.g., 3.3V) output requirement.

[0044] When the control module sends the power control signal corresponding to the first hard drive type (requiring a second voltage), the converter's drive circuit analyzes the signal and triggers Q4 of the first buck converter submodule to conduct. In conjunction with Q6 for synchronous rectification, the energy on the transformer's secondary side is rectified by Q4 and Q6 and filtered by C4 and L2, outputting a stable second voltage to the target hard drive. Simultaneously, Q5 of the second buck converter submodule remains on, outputting a third voltage to the microcontroller in conjunction with Q6. When receiving the power control signal corresponding to the second hard drive type (not requiring a second voltage), the drive circuit only maintains the operation of the second buck converter submodule. Q5 and Q6 continuously output the third voltage, while Q4 of the first buck converter submodule is off, stopping the second voltage output. The entire process relies on transformer isolation for safety, and the different duty cycle design ensures that the voltage outputs of the two submodules are independent and interference-free.

[0045] By adopting an asymmetric half-bridge topology and a sub-module design with differentiated duty cycles, a single converter integrates dual low-voltage output functions, breaking through the size and cost limitations of traditional discrete multi-converter designs. The logic of independent response and continuous power supply of sub-modules not only adapts to the voltage requirements of different hard drive types, but also ensures the power supply stability of the microcontroller, improving the integration, efficiency and reliability of power conversion.

[0046] Furthermore, in the embodiments of this application, the communication interface 13 sends the hard disk type and power consumption data of the target hard disk to the board management microcontroller based on a predefined instruction set in a preset transmission protocol.

[0047] Specifically, communication interface 13 is a hardware communication unit designed based on a standardized bus protocol. Its core hardware consists of an I2C bus microcontroller, a differential signal transmission circuit, impedance matching resistors, and protection diodes, all integrated into the backplane PCB circuit. One end connects to the signal output terminal of the control module 11 through internal wiring, and the other end establishes a physical link with the baseboard management microcontroller (BMC) of the server motherboard through standard interface pins, enabling bidirectional stable communication. The preset transmission protocol is specifically the PMBus 1.2 protocol, which is built on top of the I2C physical layer and has standardized power management device communication specifications, including complete instruction frame formats, timing rules, and data encoding methods. It can be directly adapted to the general communication interface of the BMC without the need for additional adapter circuit development.

[0048] The predefined instruction set is designed based on the reserved expansion range of the PMBus 1.2 protocol—the D1h-D3h instruction segment in the protocol is a reserved area for functional expansion. This application selects specific instructions (such as D3h) within this range for customized definition: First, this instruction is configured as a hard disk type identification instruction, and the hard disk type is distinguished by different values ​​of the instruction data bits (such as 001 corresponding to the first hard disk type, and 011 corresponding to the second hard disk type); Second, for power consumption data, the basic instructions related to power monitoring in the protocol are reused or exclusive instructions are defined within the reserved range, and the power consumption value calculated by the control module is encapsulated in the binary encoding format specified by the protocol. After the control module 11 generates hard disk type information and power consumption data, it encapsulates the information in hardware according to the frame structure of the PMBus 1.2 protocol (including start bit, device address, instruction code, data segment, and stop bit), and converts the signal into a differential signal conforming to the protocol timing through the I2C bus microcontroller of the communication interface, and sends it to the BMC through the transmission circuit. The BMC can extract the target information by parsing the instruction frame according to the protocol standard.

[0049] Furthermore, in the embodiments of this application, the preset values ​​in the predefined instruction set are configured as a first hard disk type and a second hard disk type.

[0050] Specifically, the predefined instruction set upon which the communication interface 13 relies is configured based on the reserved expansion range of the PMBus 1.2 protocol. Specifically, D3h in the reserved instruction segment of D1h-D3h in the protocol is selected as the dedicated instruction for hard disk type identification (defined as the HDD_TYPE instruction). The accurate mapping between the first hard disk type and the second hard disk type is achieved through hardware configuration of the data bits of this instruction. From the perspective of hardware configuration logic, the microcontroller (such as HDD Board Control MCU, FPGA, or CPLD) of the control module 11 solidifies the correspondence between instruction values ​​and hard disk types through programmable logic: the 2:0 bits of the D3h instruction are defined as the HDD_TYPE field, where the preset value "001" is configured as the first hard disk type (corresponding to mechanical hard disk HDD, requiring both +12V and +5V dual voltage supply), the preset value "011" is configured as the second hard disk type (corresponding to solid-state hard disk SSD, requiring only a single +12V voltage supply), and the 7:3 bits of the instruction are set to the reserved value "00000" to adapt to the subsequent expansion requirements of the protocol. Once the control module identifies the target hard drive type, it directly calls the preset values ​​to fill the corresponding fields of the D3h instruction. It then encapsulates the instruction according to the frame structure specified in the PMBus 1.2 protocol (including device address, instruction code, data segment, and parity bit), and transmits it to the server board management microcontroller (BMC) via the I2C bus of the communication interface. The BMC parses the 2:0 bit values ​​of the D3h instruction according to the protocol specification, thus quickly identifying the hard drive type without requiring additional parsing logic.

[0051] Embodiments of this application provide a method for controlling a hard disk backplane. Figure 5 This is a flowchart illustrating a control method for a hard disk backplane provided in an embodiment of this application.

[0052] like Figure 5 As shown, the method includes the following steps: Step 201: Collect electrical parameters of at least one target hard drive connected to the hard drive backplane.

[0053] In this embodiment, electrical parameters of at least one target hard drive connected to the hard drive backplane are acquired by independently configuring an acquisition submodule at each hard drive interface on the hard drive backplane. Each acquisition submodule adopts the same hardware architecture and is electrically isolated from each other to avoid signal interference when acquiring parameters from multiple drives. The core of each acquisition submodule consists of a series current sampling element, a voltage detection probe, and a signal isolation circuit: the current sampling element uses a milliohm-level high-precision shunt resistor, which is connected in series in the power supply circuit between the power conversion module and the target hard drive. When the target hard drive is working, the current flows through the resistor, generating a small voltage signal proportional to the current; the voltage detection probe is connected to the hard drive power supply interface through a high input impedance voltage divider network to acquire the input voltage signal of the target hard drive in real time. The impedance matching design of the voltage divider network ensures that the detection process does not affect the normal power supply of the hard drive.

[0054] The signal isolation circuit employs magnetic or optical coupling isolation devices to electrically isolate the current sampling voltage signal from the voltage detection signal, eliminating common-mode interference between different hard drive power supply circuits and ensuring safe isolation between the acquisition circuit and the control module. The isolated current and voltage signals are then filtered by their respective independent low-pass filter circuits to remove high-frequency noise, and then sequentially transmitted to the shared signal amplification link via a multiplexer switch according to a preset timing sequence (e.g., a polling period of 10ms). The amplification link uses a programmable gain operational amplifier, which can automatically adjust the gain according to the electrical parameter range of different hard drive types (e.g., increasing the gain to 200 times for high-current hard drives and decreasing it to 50 times for low-current hard drives), ensuring that the signal amplitude matches the subsequent processing requirements.

[0055] Finally, the amplified and conditioned electrical parameter signals (including current and voltage characteristics) are transmitted to the signal processing unit of the control module through dedicated wiring, providing raw data input for subsequent hard drive type identification and power consumption calculation. The entire acquisition process is driven by hardware circuitry according to a fixed timing sequence, requiring no software intervention, ensuring the real-time and synchronous acquisition of parameters from multiple drives.

[0056] The multi-channel independent isolation design solves the signal crosstalk problem of traditional shared acquisition circuits, enabling precise parallel acquisition of electrical parameters from multiple target hard drives. Programmable gain and isolation processing enhance the dynamic range and anti-interference capabilities of the acquisition system, adapting to the differences in electrical characteristics of different types of hard drives and providing high-quality raw signals for subsequent data processing.

[0057] Step 202: Perform power calculation based on the electrical parameters to obtain the power consumption data of the at least one target hard disk.

[0058] In this embodiment, power calculation is performed based on the collected electrical parameters to obtain the power consumption data of the target hard disk. This is achieved through a hardware-based computing unit integrated within the control module. This unit consists of a multiplier, an accumulator, and a calibration circuit, and is directly connected to the signal output terminal of the acquisition submodule. It can process the electrical parameters of multiple target hard disks in parallel.

[0059] The operation process follows hardware logic: First, the arithmetic unit receives the conditioned analog current and voltage signals and synchronously converts them into digital quantities (resolution no less than 12 bits, sampling rate matching the output frequency of the acquisition submodule) through a built-in dual-channel analog-to-digital converter. For hard drives powered by a single voltage (such as the second type of hard drive), the multiplier directly performs real-time multiplication of the digital current and digital voltage to obtain the instantaneous power value; for hard drives powered by dual voltages (such as the first type of hard drive), the arithmetic unit starts dual-channel parallel operation to calculate the power of the first voltage and corresponding current, and the power of the second voltage and corresponding current, respectively. Then, the accumulator adds the two power values ​​to obtain the total instantaneous power.

[0060] To eliminate hardware component errors (such as shunt resistor accuracy deviation and amplifier gain drift), the calibration circuit automatically loads preset calibration coefficients (obtained through standard load calibration before leaving the factory) to correct the calculation results. Simultaneously, the arithmetic unit incorporates a sliding window filter circuit to smooth the instantaneous power values ​​over multiple consecutive cycles, filtering out transient fluctuations and ultimately outputting stable average power consumption data. This data is temporarily stored in the control module's register according to a preset format, awaiting subsequent reporting.

[0061] The entire power calculation process is driven by hardware logic circuits, with single-disk calculation latency controlled at the microsecond level, and supports parallel operation of multiple disks to ensure the real-time performance and accuracy of power consumption data.

[0062] Hardware-based multiplication and accumulation operations solve the latency problem of software calculations and adapt to the rapid changes in hard drive dynamic power consumption; calibration and filtering mechanisms improve the accuracy and stability of power consumption data, providing a reliable measurement basis for server energy consumption management, while parallel processing capabilities meet the needs of monitoring multiple disks simultaneously.

[0063] Step 203: Report the power consumption data of the at least one target hard disk to the server baseboard management controller.

[0064] In this embodiment, power consumption data of at least one target hard drive is reported to the server baseboard management controller (BMC), relying on the standardized communication interface and protocol-based data transmission logic of the hard drive backplane. The communication interface is an integrated hardware unit, the core of which consists of an I2C bus controller, signal conditioning circuit, and physical interface. One end is directly connected to the register of the control module through PCB routing, which can read the temporarily stored power consumption data of multiple drives. The other end establishes a stable physical link with the BMC's communication interface through standard pins. The whole system operates based on industry-standard transmission protocols such as PMBus 1.2. This protocol has mature device addressing, command interaction, and data verification mechanisms, and is compatible with mainstream server BMC architectures without additional adaptation. Before data reporting, the control module performs hardware encapsulation of the power consumption data of multiple drives according to the protocol specifications: assigning a unique device address identifier to each target hard drive, converting the power consumption data into a binary encoding format that conforms to the protocol, and combining it with the corresponding device address and predefined power consumption command code (such as exclusive commands within the protocol reserved range) in a frame structure of "start bit-device address-command code-data segment-check bit-stop bit". The check bit is calculated and generated in real time by the hardware circuit to ensure data integrity. After encapsulation, the I2C bus controller of the communication interface converts the instruction frame into a differential signal that meets the timing requirements. The impedance matching resistor and filter capacitor in the signal conditioning circuit suppress electromagnetic interference and signal attenuation during transmission, ensuring stable signal transmission in the complex electromagnetic environment of the backplane.

[0065] For multi-disk power consumption data, the communication interface employs a polling reporting mechanism. Command frames encapsulated for each disk are sent to the BMC in a preset order (e.g., hard drive interface number). After each frame is transmitted, the system waits for a response signal from the BMC. Only after confirming that there are no errors is the next frame sent, thus avoiding data transmission conflicts between multiple disks. Upon receiving the signal, the BMC parses the command frame according to the same protocol, extracting the hard drive identifier and power consumption value corresponding to the device address, thereby achieving accurate identification and acquisition of multi-disk power consumption data.

[0066] The reporting mechanism based on standardized protocols and hardware encapsulation solves the adaptation problem of private communication formats and improves compatibility with BMC. The polling transmission and verification design ensures the accuracy and orderliness of multi-disk data reporting, providing real-time and reliable data support for BMC to carry out system-level energy consumption monitoring, load balancing and fault diagnosis.

[0067] This application provides a control method for a hard drive backplane. The control module identifies the target hard drive type and generates control commands based on the type and preset power supply requirements, improving the compatibility of the hard drive backplane. Different hard drives have different power supply specifications; the control module allows the same backplane to be adapted to multiple types of hard drives, eliminating the need for a dedicated backplane design for specific hard drives. The power conversion module responds to the power control signal, converting the input voltage to the target voltage required by the hard drive, adapting to the power needs of different hard drives and ensuring hard drive hardware safety, avoiding different damage caused by fixed output voltages and affecting the hard drive's lifespan. The detection module collects the hard drive's electrical parameters in real time and transmits them to the control module. The control module calculates the real-time power consumption. Through real-time collection and calculation, potential hard drive failure risks can be detected in advance, avoiding data loss or business interruption due to sudden failures. The control module transmits hard drive type and power consumption data to the server's baseboard management microcontroller via a communication interface, enabling the reading of hard drive power consumption data. Based on the power consumption data, a comprehensive analysis of the hard drive status can be achieved, providing maintenance personnel with more comprehensive hard drive status information and facilitating maintenance.

[0068] Furthermore, in addition to the aforementioned methods, the embodiments of this application also include various implementation methods. For clarity, some exemplary implementation methods are described in detail below: identifying the hard disk type of the at least one target hard disk, generating a power control signal based on the hard disk type, and controlling the output of a target voltage corresponding to the hard disk type.

[0069] Specifically, the operation of identifying the hard drive type of at least one target hard drive and controlling the corresponding target voltage output is implemented through a hardware-based closed-loop logic of "type identification - signal generation - voltage regulation". The control module establishes a hardware connection with the target hard drive through a preset interface (such as the PWDIS pin in the SATA / SAS specification) to obtain key signals characterizing the hard drive's electrical characteristics. During the hard drive's power-on initialization phase, this interface outputs a level signal containing power requirement characteristics: if the signal detects both 12V and 5V voltage requirement indicators (such as a specific combination of high and low level timings), it is determined to be the first hard drive type (such as a mechanical hard drive, which requires dual voltage drive); if only a 12V voltage requirement indicator is detected, it is determined to be the second hard drive type (such as some solid-state drives, which can operate with a single voltage). The identification process is completed by a dedicated comparator and logic judgment circuit within the control module. Type determination is achieved through hardware threshold comparison, and the determination result is temporarily stored in binary code form (such as "10" representing the first type and "01" representing the second type).

[0070] Based on the type identification result, the control module activates its built-in signal encoding circuit to generate corresponding power control signals: for the first hard drive type, a differential signal containing dual voltage enable commands is generated, where the combination of a "high-level pulse + a specific frequency carrier" indicates 12V voltage output enable, and the combination of a "low-level pulse + another frequency carrier" indicates 5V voltage output enable; for the second hard drive type, only a differential signal with a 12V voltage enable command is generated. After the control signal is enhanced by an isolation drive circuit, it is transmitted to the control interface of the power conversion module via dedicated wiring. Twisted-pair differential transmission is used during signal transmission to resist electromagnetic interference. Hardware-based type identification and signal control enable rapid adaptation to hard drive types, avoiding software configuration delays; differential signal transmission and closed-loop feedback design ensure the stability and anti-interference capability of the voltage output, making the hard drive backplane compatible with the power supply requirements of different hard drive types and improving system scalability.

[0071] In this application embodiment, the specific implementation of the operation of "identifying the hard disk type of the at least one target hard disk" is varied. For clarity, some exemplary implementation methods are described below: obtain the power requirement information of the target hard disk based on a preset interface; if the power requirement information includes a first voltage requirement and a second voltage requirement, then the target hard disk is determined to be a first hard disk type; if the power requirement information only includes the first voltage requirement, then the target hard disk is determined to be a second hard disk type.

[0072] Furthermore, power demand information is transmitted through a preset interface and read by the control module via the I2C bus.

[0073] Specifically, hard drive type identification relies on hardware-based signal interaction and logical judgment. The core of the control module uses a programmable microprocessor, FPGA, or CPLD with I2C bus communication capabilities. It integrates an I2C microcontroller, signal conditioning unit, and type determination logic circuit, providing hardware support for interface signal reception, data reading, and type identification. The preset interface is specifically a PWDIS (Power Disable) interface conforming to the SATA-IO organization standard. This interface is a power status feedback interface common to both SATA and SAS hard drives. It can directly establish a physical connection with the corresponding pins of the target hard drive through PCB wiring. Its signal transmission characteristics are adapted to the power demand information output specifications after the hard drive is powered on. After the target hard drive is initially powered on, it will output its inherent power demand signal through the PWDIS interface based on its own hardware structure (such as whether it contains mechanical drive components). The signal contains level characteristics or encoded information representing the voltage demand type.

[0074] Furthermore, the transmission and reading of power demand information are completed via the I2C bus: the I2C microcontroller of the control module sends read commands to the PWDIS interface according to a preset timing sequence. The PWDIS interface converts the hard drive's power demand information into a serial data signal conforming to the I2C bus protocol. After level matching and noise filtering by the signal conditioning unit, this signal is received and parsed by the I2C microcontroller into identifiable voltage demand parameters. The type determination logic circuit of the control module performs hardware-based judgment based on the parsing result: if the parameter is found to contain both the first voltage demand (e.g., 12V) and the second voltage demand (e.g., 5V) characteristics, the logic outputs a judgment signal to determine that the target hard drive is of the first hard drive type; if only the first voltage demand characteristic is detected, it is determined to be of the second hard drive type. The entire judgment process is directly driven by the hardware logic circuit without the need for software algorithm intervention.

[0075] In this application embodiment, there are various specific implementation methods for the operation of "reporting hard disk type and power consumption data to the server baseboard management microcontroller using a communication interface". For clarity, some exemplary implementation methods are described below: sending hard disk type and power consumption data using a predefined instruction set in a preset transmission protocol.

[0076] Furthermore, in this embodiment, the D3h instruction in the instruction set is used to identify the hard disk type, and its data field is configured to represent a first hard disk type or a second hard disk type.

[0077] Specifically, the communication interface is an integrated hardware unit, with the core consisting of an I2C bus microcontroller, differential signal transmission circuit, impedance matching resistor, and protection diode. One end is directly connected to the signal output terminal of the control module through PCB routing, and the other end establishes a physical link with the BMC through standard pins. The whole system operates based on the preset PMBus 1.2 transmission protocol—this protocol is built on the I2C physical layer and has standardized power management device communication specifications, including clear frame structure, timing rules, and verification mechanisms. It is compatible with the communication interfaces of mainstream server BMCs without additional adaptation.

[0078] Data transmission using a predefined instruction set from the preset transmission protocol is achieved through hardware instruction encapsulation. The predefined instruction set is designed based on the reserved expansion range of the PMBus 1.2 protocol (such as the D1h-D3h instruction segment), and the programmable logic circuit inside the control module solidifies the mapping rules between instructions and data. Specifically, the D3h instruction in the instruction set is configured as a dedicated instruction for hard disk type identification. Its data field (usually the lower 3 bits) is configured according to preset rules: the binary value "001" is solidified as the identification code for the first hard disk type, "011" is solidified as the identification code for the second hard disk type, and the higher 5 bits are set as protocol-reserved values ​​to accommodate subsequent expansions. For power consumption data, basic power monitoring instructions from the protocol can be reused, or dedicated instructions can be defined within the reserved range to encode the power consumption value calculated by the control module into the instruction data field according to the binary format specified in the protocol.

[0079] During data reporting, the control module first extracts the hard drive type identifier and power consumption data, and completes hardware encapsulation according to the PMBus 1.2 protocol frame structure (including start bit, device address byte, instruction code byte, data segment, and stop bit). The encapsulation process is driven by the logic circuitry embedded within the control module, ensuring that the format conforms to the protocol timing. The encapsulated instruction frame is transmitted to the communication interface, converted into a differential signal by the I2C bus microcontroller, and then the signal conditioning circuit suppresses electromagnetic interference and signal attenuation. Finally, it is sent to the BMC in real time via the physical link. The BMC parses the instruction frame according to the same protocol specification, reads the D3h instruction data field value to identify the hard drive type, and parses the power consumption data to obtain the corresponding instruction power consumption value, achieving precise interaction between the two.

[0080] It should be noted that the embodiments of this disclosure may include multiple steps. For ease of description, these steps are numbered, but these numbers are not a limitation on the execution time slots or execution order between the steps; these steps can be implemented in any order, and the embodiments of this disclosure do not limit this.

[0081] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the hard disk backplane control method.

[0082] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above embodiments of the hard disk backplane control method when running.

[0083] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0084] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above embodiments of the hard disk backplane control method.

[0085] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above embodiments of the hard disk backplane control method.

[0086] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0087] The above provides a detailed description of a hard disk backplane, a power consumption read control method, an electronic device, and a storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A hard drive backplane, characterized in that, include: Control module, multiple detection modules, communication interface; The control module is connected to the plurality of detection modules respectively; The detection module is configured to collect the electrical parameters of the connected target hard drive and send them to the control module; The control module is configured to perform power calculations based on the electrical parameters to obtain the power consumption data of the target hard disk; It also communicates with the server baseboard management controller through the communication interface and reports the power consumption data of at least one target hard disk.

2. The hard disk backplane according to claim 1, characterized in that, The control module is configured to identify the hard drive type of the connected target hard drive and generate a power control signal based on the hard drive type.

3. The hard disk backplane according to claim 2, characterized in that, The control module includes: a microcontroller; The microcontroller receives power demand information from the target hard drive based on a preset interface, and identifies the type of the connected target hard drive based on the power demand information. The hard drive type includes a first hard drive type and a second hard drive type. If the power demand information includes a first voltage demand and a second voltage demand, then the target hard drive is determined to be a first hard drive type and a corresponding power control signal is generated; If the power demand information includes a first voltage demand, then the target hard drive is determined to be a second hard drive type and a corresponding power control signal is generated.

4. The hard disk backplane according to claim 3, characterized in that, The control module also includes: multiple analog-to-digital converters; The analog-to-digital converter converts the electrical parameters sent by the detection module into digital signals, and sends the digital signals to the microcontroller; The microcontroller performs power calculations on the target hard disk based on the digital signal to obtain the power consumption data.

5. The hard disk backplane according to claim 4, characterized in that, The detection module includes: a shunt resistor and a differential amplifier circuit; The shunt resistor is connected in series in the power supply line of the target hard disk, and the differential amplifier circuit collects the voltage difference across the shunt resistor; The differential amplifier circuit sends the voltage difference to the connected analog-to-digital converter.

6. The hard disk backplane according to claim 3, characterized in that, Also includes: Multiple power conversion modules; The power conversion module is configured to output a target voltage corresponding to the hard disk type to the target hard disk in response to a power control signal sent by the control module.

7. The hard disk backplane according to claim 6, characterized in that, The power conversion module includes: an asymmetric half-bridge converter and a bypass switch module; The bypass switch module responds to the power control signal corresponding to the first hard disk type and outputs a first voltage to the target hard disk of the first hard disk type. The asymmetric half-bridge converter responds to the power control signal corresponding to the first hard disk type and outputs a second voltage to the target hard disk of the first hard disk type. The asymmetric half-bridge converter responds to the power control signals corresponding to the first hard disk type and the second hard disk type, and outputs a third voltage to the microcontroller. The bypass switch module responds to the power control signal corresponding to the second hard disk type and outputs a first voltage to the target hard disk of the second hard disk type.

8. The hard disk backplane according to claim 7, characterized in that, The asymmetric half-bridge converter includes: a first buck converter submodule and a second buck converter submodule, wherein the first buck converter submodule and the second buck converter submodule correspond to different duty cycles; The first buck converter submodule responds to the power control signal corresponding to the first hard disk type and outputs a second voltage to the target hard disk of the first hard disk type; The second buck converter submodule responds to the power control signals corresponding to the first hard disk type and the second hard disk type, and outputs a third voltage to the microcontroller.

9. The hard disk backplane according to any one of claims 1-8, characterized in that, The communication interface sends the hard drive type and power consumption data of the target hard drive to the baseboard management controller based on a predefined instruction set in a preset transmission protocol.

10. The hard disk backplane according to claim 9, characterized in that, Configure the preset values ​​in the predefined instruction set as the first hard disk type and the second hard disk type.

11. A control method for a hard disk backplane, characterized in that, include: Acquire electrical parameters of at least one target hard drive connected to the hard drive backplane; Power calculations are performed based on the electrical parameters to obtain the power consumption data of the at least one target hard disk. The power consumption data of the at least one target hard disk is reported to the server baseboard management controller.

12. The control method for the hard disk backplane according to claim 11, characterized in that, The method further includes: Identify the hard drive type of the at least one target hard drive, and generate a power control signal based on the hard drive type to control the output of a target voltage corresponding to the hard drive type.

13. The control method for the hard disk backplane according to claim 12, characterized in that, The identification of the hard drive type of the at least one target hard drive includes: The power requirement information of the target hard drive is obtained based on a preset interface; If the power demand information includes a first voltage demand and a second voltage demand, then the target hard drive is determined to be of the first hard drive type; If the power demand information only includes the first voltage demand, then the target hard drive is determined to be a second type of hard drive.

14. The control method for the hard disk backplane according to claim 13, characterized in that, The method further includes: The hard disk type and power consumption data are sent using a predefined instruction set in a preset transmission protocol. The preset instructions in the predefined instruction set are used to identify the hard disk type, and their data fields are configured to represent a first hard disk type or a second hard disk type.

15. An electronic device, characterized in that, include: At least one processor; as well as A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the control method for the hard disk backplane according to any one of claims 11-14.

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