Trench etching method
By adjusting the gas ratio and voltage duty cycle through pulsed plasma etching, the problems of sidewall damage and hard mask layer damage in deep trench etching were solved, ensuring high etching rate and sidewall protection, and improving device performance and yield.
Patent Information
- Application Number
- CN202510969209.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-14
- Publication Date
- 2025-11-11
AI Technical Summary
Existing deep trench etching methods suffer from problems such as double slope, sidewall damage, and hard mask layer damage, which lead to insufficient subsequent trench filling, device leakage, performance degradation, and yield loss.
By employing pulsed plasma etching technology, the ratio of O2 to SF6 and the duty cycle of bias voltage are adjusted. The ratio of O2 to SF6 is gradually increased while the duty cycle of bias voltage is gradually decreased. This approach resolves the conflict between etching rate and trench morphology in stages, preventing damage to sidewalls and hard mask layers.
It achieves a balance between high etching rate and sidewall protection, avoiding device leakage and performance degradation, and improving device yield.
Smart Images
Figure CN120933155A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor manufacturing technology, and more specifically to a trench etching method. Background Technology
[0002] Benefiting from the rapid development of strategic emerging industries such as rail transit, smart grids, and new energy vehicles in recent years, the demand for technological iteration in the field of power device applications of deep trenches has become increasingly urgent. With the continuous improvement of integration and device performance requirements, deep trenches are developing towards higher aspect ratios. However, problems such as double slope defects, sidewall damage, and hard mask layer damage in deep trenches are hindering technological and product iteration.
[0003] Currently, the single-step steady-state etching method (SSP etching) for deep trenches has the advantages of high process stability and the ability to maintain a high etching rate, and is widely used in the dry etching of silicon deep trenches.
[0004] However, SSP etching still introduces problems such as double slope, sidewall damage, and hard mask layer damage. Specifically,
[0005] (1) The characteristics of SSP etching process determine that the etching action is carried out throughout the entire process and there is a lack of polymer deposition. Therefore, the trench sidewalls cannot form effective protection and are easily damaged when exposed to high-energy plasma.
[0006] (2) Although SSP etching (dry etching) has high anisotropy, the plasma collisions during the reaction process still limit its directionality. Therefore, as the etching process deepens, it becomes difficult for the plasma to enter the bottom of the deep trench, making it difficult to maintain the etching process, thus resulting in a double slope.
[0007] (3) The damage to the hard mask layer is similar to that of the sidewall damage, and the root cause is the damage caused by insufficient protection during the etching process. In addition, in order to prevent the occurrence of double slope, it is often necessary to improve the plasma directionality. The improvement of directionality often leads to the improvement of physical bombardment, thereby sacrificing the etching selectivity and aggravating the damage to the hard mask layer.
[0008] The above problems can easily lead to insufficient subsequent trench filling, device leakage causing device performance degradation, decreased electron mobility, and loss of device yield. Summary of the Invention
[0009] This application provides a trench etching method that can solve the problems of double slope, sidewall damage, and hard mask layer damage in traditional deep trench etching methods, which lead to insufficient trench filling, device leakage causing device performance degradation, decreased electron mobility, and device yield loss.
[0010] This application provides a trench etching method, including:
[0011] First step: Provide a substrate on which a hard mask layer is formed;
[0012] The second step is to etch the hard mask layer to form an opening in the hard mask layer.
[0013] Third step: According to the opening, a portion of the substrate thickness is etched using a pulsed plasma etching process to form a deep trench in the substrate, wherein the gases involved in the etching include at least O2 and SF6, the ratio of O2 and SF6 increases linearly with the etching time during the etching process, and in the pulsed plasma etching process of the third step, the duty cycle of the bias voltage decreases with the etching cycle.
[0014] Optionally, in the etching method for the trench, the ratio of O2 to SF6 at the end of the etching process decreases by at least 20%, based on the ratio of O2 to SF6 at the beginning of the etching process.
[0015] Optionally, in the etching method for the trench, the value of the bias voltage at the end of the etching process is increased by at least 30% based on the value of the bias voltage at the initial moment of the etching process.
[0016] Optionally, in the etching method for the trench, in the pulsed plasma etching process of the third step, the flow rate of O2 is 200 sccm to 300 sccm; and the flow rate of SF6 is 400 sccm to 500 sccm.
[0017] Optionally, in the etching method of the trench, the hard mask layer is made of silicon nitride or silicon dioxide.
[0018] Optionally, in the etching method of the trench, the aspect ratio of the deep trench is (10:1) to (25:1).
[0019] The technical solution of this application has at least the following advantages:
[0020] This application provides a trench etching method that uses pulsed plasma etching to etch a portion of a substrate to form deep trenches. The etching gases include at least O2 and SF6, with the ratio of O2 to SF6 increasing linearly with etching time. Furthermore, in the third step of the pulsed plasma etching process, the duty cycle of the bias voltage decreases with the etching cycle. By gradually increasing the ratio of O2 and SF6 and gradually decreasing the duty cycle of the bias voltage during the etching process, this application achieves a gradual reduction in the etching rate, thus resolving the conflict between etching rate and trench morphology in stages. A high etching rate is maintained in the early stages to achieve rapid etching progress, while in the later stages, the focus is on strengthening trench sidewall passivation and reducing physical bombardment to improve trench sidewall protection, preventing damage to the trench sidewalls in the later stages of etching and avoiding damage to the hard mask layer. This avoids device performance degradation and decreased electron mobility caused by device leakage, thereby improving device yield.
[0021] Furthermore, this application employs pulsed plasma etching to etch the substrate. By intermittently applying bias voltage, the continuous physical bombardment during the etching process is avoided. In addition, by gradually reducing the duty cycle of the bias voltage, the physical bombardment effect in the later stages of etching is gradually weakened, thereby fundamentally preventing damage to the trench sidewalls in the later stages of etching. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0023] Figure 1 This is a flowchart of the trench etching method according to an embodiment of this application;
[0024] Figure 2 This is a schematic diagram of the semiconductor structure after the deep trench is formed according to an embodiment of this application;
[0025] Figure 3 This is a schematic diagram showing the relationship between the duty cycle of the bias voltage and the etching time in each cycle of an embodiment of this application.
[0026] Figure 4 This is a schematic diagram showing the relationship between the ratio of O2 and SF6, the bias voltage, and the etching time in an embodiment of this application;
[0027] The reference numerals in the attached figures are explained as follows:
[0028] 10 - Substrate, 20 - Hard mask layer, 30 - Trench. Detailed Implementation
[0029] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0030] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0031] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0032] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0033] This application provides a trench etching method, referring to... Figure 1 , Figure 1 This is a flowchart of a trench etching method according to an embodiment of this application. The trench etching method includes:
[0034] First, perform the first step S1: (Refer to...) Figure 2 , Figure 2 This is a schematic diagram of a semiconductor structure after deep trench formation according to an embodiment of this application. A substrate 10 is provided, on which a hard mask layer 20 is formed.
[0035] Preferably, the hard mask layer 20 is made of silicon nitride or silicon dioxide.
[0036] Then, continue to refer to Figure 2 Then, perform the second step S2: First, coat a photoresist layer on the surface of the hard mask layer 20, then define a trench pattern on the photoresist layer using a photolithography process, and then use the patterned photoresist layer as a mask to etch the hard mask layer 20 to form an opening in the hard mask layer 20.
[0037] Finally, proceed to step S3: Continue to refer to... Figure 2 According to the opening, a portion of the thickness of the substrate 10 is etched using a pulsed plasma etching process to form a deep trench 30 in the substrate 10. The gases involved in the etching include at least O2 and SF6. The ratio of O2 to SF6 increases linearly with the etching time during the etching process. In the pulsed plasma etching process of the third step, the duty cycle of the bias voltage decreases with the etching cycle.
[0038] The depth-to-width ratio of the deep trench 30 is (10:1) to (25:1).
[0039] Preferably, based on the ratio of O2 to SF6 at the beginning of the etching process, the ratio of O2 to SF6 at the end of the etching process decreases by at least 20%.
[0040] Furthermore, in the pulsed plasma etching process of the third step, the flow rate of O2 is 200 sccm to 300 sccm; the flow rate of SF6 is 400 sccm to 500 sccm.
[0041] Furthermore, based on the value of the bias voltage at the initial moment of the etching process, the value of the bias voltage at the end moment of the etching process is increased by at least 30%.
[0042] refer to Figure 3 , Figure 3 This diagram illustrates the relationship between the duty cycle of the bias voltage and the etching time in each cycle of this application embodiment. The substrate 10 is etched using a pulsed plasma etching process, with the bias voltage applied intermittently. The proportion of the bias voltage's operating time Ton to the total time of each cycle T (the duty cycle of the bias voltage) gradually decreases. This application employs pulsed plasma etching technology to prevent continuous physical bombardment during the etching process by intermittently applying the bias voltage. Based on pulsed plasma etching technology, this application uses a method of gradually reducing the duty cycle Ton of the bias voltage to mitigate sidewall damage in the later stages of etching. This not only helps avoid continuous physical bombardment of deep trenches during long-term etching but also promotes the accumulation of etching products and the formation of an effective surface passivation layer through chemical etching.
[0043] In this embodiment, reference Figure 4 , Figure 4This diagram illustrates the relationship between the ratio of O2 and SF6, the bias voltage, and the etching time in an embodiment of this application. Based on the ratio of O2 and SF6 at the beginning of the etching process, the ratio of O2 and SF6 decreases by 20% at the end of the etching process. Based on the value of the bias voltage at the beginning of the etching process, the value of the bias voltage at the end of the etching process increases by 30%. Therefore, assuming the etching time is X, the bias voltage is set to A at the beginning of the etching process, and the ratio of O2 and SF6 is set to B at the beginning of the etching process, then during the etching process, the increasing slope of the bias voltage per unit time should be 30% * A / X; the decreasing slope of the ratio of O2 and SF6 per unit time should be -20% * B / X.
[0044] Lateral over-etching often occurs in the later stages of the etching process. The impact of different etching stages on lateral etching varies. The progressive etching process employed in this application aims to resolve the conflict between etching rate and trench morphology in stages. By gradually increasing the proportions of O2 and SF6 and gradually decreasing the duty cycle of the bias voltage, a high etching rate is maintained in the early stages of the etching process, while the etching rate gradually decreases in the later stages. This maintains a high etching rate in the early stages to achieve rapid etching progress, while in the later stages, the focus is on strengthening trench sidewall passivation and reducing physical bombardment to improve sidewall protection. Figure 4 As shown, a relatively fast etching rate is ensured by slightly passivating the trench sidewalls in the early stage of etching. In the later stage of etching, the etching rate is reduced and the sidewall passivation is strengthened to prevent damage to the trench sidewalls. This also avoids damage to the hard mask layer, thereby avoiding the problem of device performance degradation and decreased electron mobility caused by device leakage, and improving device yield.
[0045] Furthermore, this application enhances the passivation of the trench sidewalls in the later stages of etching by gradually increasing the ratio of O2 and SF6 through linear increase, thereby preventing damage to the trench sidewalls in the later stages of etching and preventing problems such as double slope caused by abrupt changes in etching parameters during the etching process.
[0046] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.
Claims
1. A method for etching trenches, characterized in that, include: First step: Provide a substrate on which a hard mask layer is formed; The second step is to etch the hard mask layer to form an opening in the hard mask layer. Third step: According to the opening, a portion of the substrate thickness is etched using a pulsed plasma etching process to form a deep trench in the substrate, wherein the gases involved in the etching include at least O2 and SF6, the ratio of O2 and SF6 increases linearly with the etching time during the etching process, and in the pulsed plasma etching process of the third step, the duty cycle of the bias voltage decreases with the etching cycle.
2. The trench etching method according to claim 1, characterized in that, Based on the ratio of O2 to SF6 at the beginning of the etching process, the ratio of O2 to SF6 at the end of the etching process should decrease by at least 20%.
3. The trench etching method according to claim 1, characterized in that, Based on the value of the bias voltage at the initial moment of the etching process, the value of the bias voltage at the end moment of the etching process is increased by at least 30%.
4. The trench etching method according to claim 1, characterized in that, In the pulsed plasma etching process of the third step, the flow rate of O2 is 200 sccm to 300 sccm; the flow rate of SF6 is 400 sccm to 500 sccm.
5. The trench etching method according to claim 1, characterized in that, The hard mask layer is made of silicon nitride or silicon dioxide.
6. The trench etching method according to claim 1, characterized in that, The depth-to-width ratio of the deep trench is (10:1) to (25:1).