Semiconductor substrate corrosion equipment and corrosion method

Abstract

The invention provides semiconductor substrate corrosion equipment and a corrosion method, and the equipment comprises a wafer carrier which is provided with a first clamping groove structure, and the first clamping groove structure is used for clamping a wafer; the etching groove at least comprises two etching cavities, a second clamping groove structure used for clamping the wafer carrier is arranged between every two adjacent etching cavities, and when the wafer carrier is clamped by the second clamping groove structures, a passage between the two etching cavities is isolated by the wafer carrier and the wafer clamped by the wafer carrier; the electric cathode and the electric anode are respectively arranged in the two corrosion chambers; and the signal control module is used for providing a driving signal for the semiconductor substrate corrosion equipment. According to the method, the corrosion process time can be greatly shortened, the corrosion process efficiency can be greatly improved, meanwhile, the chemical corrosion liquid can be recycled, and the process cost is reduced.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit manufacturing, and in particular relates to a semiconductor substrate etching device and etching method. Background Technology

[0002] Etched semiconductor substrate materials have a wide range of applications. For example, porous silicon materials are widely used in the field of optoelectronic device technology. The size of silicon nanoparticles in porous silicon materials can reach below 10 nm, causing significant quantum effects, such as increased surface energy of nanocrystals, broadening of nanocrystal bands, and changes in the electron-phonon coupling mechanism within the nanocrystals. In the preparation of porous silicon materials, the porosity, nanocrystal size, and the consistency and stability of the nanocrystal structure of the porous silicon film are crucial for subsequent device fabrication processes.

[0003] There are various methods for chemically etching semiconductor substrates, among which electrochemical etching is the most widely used. In electrochemical etching, a positive potential is applied to the semiconductor substrate, increasing the hole concentration and causing them to react with F- ions in the etching solution, thus forming electrochemical corrosion. Furthermore, irradiating the surface of the semiconductor substrate can assist in generating holes in the area to be etched, accelerating the electrochemical etching process and improving its uniformity.

[0004] However, most existing electrochemical etching techniques are based on small samples and wafers smaller than 4 inches, making it difficult to fabricate 8-12 inch wafer-level porous silicon substrates for application in CMOS and MEMS production lines. The fabrication of wafer-level porous silicon substrates faces the following main challenges:

[0005] 1) High process cost: In the electrochemical etching process, at least one side of the semiconductor substrate needs to be in contact with the etching solution, and an inert metal cathode also needs to be placed in the etching solution. Therefore, the etching tank is large and a large amount of etching solution is required. However, the etching solution used in the existing electrochemical etching process is often disposable. Due to the limitations of the electrochemical etching equipment, the etching solution after the reaction is often discharged, which significantly increases the cost of the electrochemical etching process.

[0006] 2) Slow production speed: In the electrochemical etching process, the front and back sides of the sample need to be isolated from each other in the chemical environment. The installation and sampling are cumbersome, often requiring manual placement and sampling. The sample preparation time far exceeds the sample processing time, which seriously limits the mass etching of semiconductor substrates.

[0007] 3) For wafer-level electrochemical etching applications in production lines, the production line processes place higher demands on process quality: the etching degree of the wafer needs to maintain high intra-wafer and inter-wafer uniformity and stability. This requires a relatively uniform electric field distribution, uniform ion concentration distribution, small ion concentration fluctuations, small process temperature fluctuations, and uniform light field distribution within the etching tank. Existing electrochemical etching processes struggle to precisely control these etching process parameters, failing to meet the application requirements of high-quality electrochemical etching in production lines.

[0008] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0009] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a semiconductor substrate etching device and etching method to solve the problems of low process efficiency and high process cost of semiconductor substrates in the prior art.

[0010] To achieve the above and other related objectives, the present invention provides a semiconductor substrate etching apparatus, comprising: a wafer carrier having a first slot structure for holding a wafer; an etching tank comprising at least two etching chambers, wherein a second slot structure for holding the wafer carrier is provided between two adjacent etching chambers, wherein when the second slot structure holds the wafer carrier, the passage between the two etching chambers is isolated by the wafer carrier and the wafer held therein; an electrode cathode and an electrode anode, respectively disposed in the two etching chambers, for providing low and high potentials respectively during the etching process; and a signal control module for providing drive signals to the semiconductor substrate etching apparatus.

[0011] Optionally, the semiconductor substrate etching equipment further includes an electromagnetic control module, which contains at least one electric field bias electrode and / or at least one inductor coil. The electromagnetic control module is used to adjust the electric field structure, magnetic field structure and / or current distribution in the etching solution inside and near the wafer to assist in adjusting the electrochemical etching state at a specific location on the wafer. The signal control module provides a driving signal to the electromagnetic control module.

[0012] Optionally, the electromagnetic control module is configured as an annular structure with a hollow groove, and the electromagnetic control module is disposed on both sides of the second slot structure. The axis of the hollow groove tends to coincide with the vertical line perpendicular to the wafer and passing through the center of the wafer.

[0013] Optionally, the semiconductor substrate etching equipment further includes an auxiliary light source module, which is used to apply parallel light or scattered light to the surface of the wafer to be etched, and the signal control module provides a driving signal to the auxiliary light source module.

[0014] Optionally, the auxiliary light source module is an array light source, which is located inside or outside the etching tank and can illuminate the wafer surface. The array light source includes multiple sub-light sources, and the light intensity, light wavelength and / or light emission direction of each sub-light source can be adjusted independently.

[0015] Optionally, the electrode structure of the cathode includes a light-transmitting structure formed by multiple inert metal filaments, so that the light emitted by the auxiliary light source module outside the cathode is diffracted when passing through the inert metal filaments, thereby ensuring the uniformity of illumination on the wafer surface.

[0016] Optionally, the cathode and anode are arrayed electrodes, respectively disposed on both sides of the wafer. The arrayed electrodes include multiple sub-electrodes, and the driving signal of each sub-electrode can be individually controlled to assist in controlling the electrochemical corrosion state at a specific location on the wafer. The signal control module provides the driving signal for the arrayed electrode module.

[0017] Optionally, the array electrodes can be arranged in one of two ways: a nested arrangement of multiple concentric rings or a lattice arrangement.

[0018] Optionally, the semiconductor substrate etching equipment further includes a temperature control module disposed inside the etching tank. The temperature control module is used to monitor the temperature inside the etching tank in real time and to heat or cool the contents of the etching tank as needed.

[0019] Optionally, the semiconductor substrate etching equipment further includes an etching solution composition control module, which includes at least an etching solution concentration sensor and an etching solution replenishment system, a monitoring device for real-time monitoring of the concentration of various ions and molecules in the etching tank, and quantitative replenishment of the etching solution with specific solvents as needed.

[0020] Optionally, the semiconductor substrate etching equipment further includes a built-in cleaning tank and a drying system, wherein the cleaning tank is arranged adjacent to the etching tank and the drying system is arranged adjacent to the cleaning tank.

[0021] Optionally, the driving signal provided by the signal control module includes one or more of the following: constant current source driving signal, constant voltage source driving signal, pulse current driving signal, and pulse voltage driving signal.

[0022] Optionally, the semiconductor substrate etching equipment further includes a robotic arm system, which is used for wafer mounting on the wafer carrier, insertion and mounting of the wafer carrier into the second slot in the etching tank, removal and cleaning of the wafer carrier and wafer, and removal and feeding of the cleaned wafer from the wafer carrier.

[0023] Optionally, the wafer carrier includes at least two clamping structures that can be opened and closed. The two clamping structures include stepped limiting slots that match the shape of the wafer. When the clamping structure is open, the wafer can be fed into the limiting slots of the clamping structure. When the clamping structure is closed, the edge of the wafer is embedded in the limiting slots. The two clamping structures clamp the wafer and achieve a seal on the edge region of the wafer.

[0024] Optionally, the limiting slots of the two clamping structures are further provided with paired embedded grooves, and rubber sealing rings are provided in the embedded grooves. When the clamping structure is closed, the sealing rings can contact the wafer to form a sealing structure.

[0025] Optionally, the wafer carrier further includes an electrically driven auxiliary mechanism for controlling the opening and closing of the two clamping structures.

[0026] Optionally, the two clamping structures further include a cooperating engagement structure disposed outside the limiting slot. When the two clamping structures are closed, the engagement structure defines the relative position of the two clamping structures, so that they are precisely aligned and closed.

[0027] The present invention also provides a method for etching a semiconductor substrate, wherein a wafer is etched using a semiconductor substrate etching apparatus as described in any of the above embodiments.

[0028] Optionally, the etching method includes the steps of: clamping the wafer in a wafer carrier through a first slot structure; placing the wafer carrier and the wafer it holds into an etching tank, and clamping it in a second slot structure to isolate the passage between the two etching chambers; injecting etching solution into the two etching chambers respectively, or injecting etching solution into the etching tank before placing the wafer carrier; and applying voltage to the cathode and anode to chemically etch the wafer.

[0029] Optionally, the etching method further includes the step of: adjusting the electric field structure, magnetic field structure and / or current distribution in the etching solution inside and near the wafer in a transient or quasi-static manner through an electromagnetic control module, thereby affecting the movement mode of the etching ions in the etching solution and the etching ability and etching rate of the etching ions on a specific location of the wafer at a certain moment.

[0030] As described above, the semiconductor substrate etching apparatus and etching method of the present invention have the following beneficial effects:

[0031] This invention employs a quick-release wafer carrier, separating the wafer carrier from the etching tank into two independent parts, which can significantly reduce wafer handling time. Especially for high-throughput semiconductor substrate etching equipment, it can greatly shorten the etching process time and improve the etching process efficiency. At the same time, this invention can realize the recycling of chemical etching solution, reducing process costs.

[0032] The etching equipment of the present invention also has the ability to configure the electrochemical etching environment with high precision. By controlling the distribution of electromagnetic field in the etching tank, the light field distribution on the wafer surface, the temperature in the etching tank, the solute concentration of the etching solution, etc., the etching effect of semiconductor substrate can be adjusted within a large process range to meet the device process requirements in the production line. Attached Figure Description

[0033] The accompanying drawings, which form part of this specification, are used to provide a further understanding of the embodiments of this application and to illustrate the implementation of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application.

[0034] Figure 1 The diagram shown is a schematic representation of the semiconductor substrate etching apparatus according to an embodiment of the present invention.

[0035] Figures 2-3 The diagram shown is a structural schematic of the electromagnetic control module of a semiconductor substrate etching apparatus according to an embodiment of the present invention.

[0036] Figures 4-8 The diagram shown is a structural schematic of the clamping structure of the semiconductor substrate etching apparatus according to an embodiment of the present invention.

[0037] Figures 9-10 The diagram shown is a schematic diagram of the electrode array of a semiconductor substrate etching apparatus according to an embodiment of the present invention.

[0038] Component designation explanation

[0039] 10 Corrosion tank

[0040] 101 First Corrosion Chamber

[0041] 102 Second Corrosion Chamber

[0042] 11. Wafer carrier

[0043] 111 First clamping structure

[0044] 1111 Limiting slot

[0045] 1112 Embedded groove

[0046] 1113 Rubber sealing ring

[0047] 1114 Groove

[0048] 1115 Protrusion

[0049] 112 Second clamping structure

[0050] 12 wafers

[0051] 13. Electric anode

[0052] 14. Cathode

[0053] 15. Signal Control Module

[0054] 16 Electromagnetic Control Module

[0055] 161 Electric field bias electrode

[0056] 162 Inductor Coil

[0057] 163 Hollow Trough

[0058] 17 Auxiliary Light Source Module

[0059] 18 Rising bollards Detailed Implementation

[0060] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0061] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.

[0062] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.

[0063] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0064] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0065] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0066] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0067] like Figure 1 As shown, this embodiment provides a semiconductor substrate etching apparatus, which includes: a wafer carrier 11, the wafer carrier 11 being provided with a first slot structure for holding a wafer 12; an etching tank 10, the etching tank 10 including at least two etching chambers (a first etching chamber 101 and a second etching chamber 102), a second slot structure for holding the wafer carrier 11 being provided between two adjacent etching chambers, and when the second slot structure holds the wafer carrier 11, the passage between the two etching chambers is isolated by the wafer carrier 11 and the wafer 12 held therein; an electrode cathode 14 and an electrode anode 13, respectively disposed in the two etching chambers, for providing low potential and high potential respectively in the etching process; and a signal control module 15 for providing a drive signal for the semiconductor substrate etching apparatus.

[0068] like Figures 1-5 As shown, the wafer carrier 11 is a pull-out wafer carrier, used to hold the wafer 12 into the etching tank 10 before processing and to hold the wafer 12 out of the etching tank 10 after processing. It should be noted that, as... Figure 5 The process of loading the wafer 12 onto the wafer carrier 11 for clamping can also be completed outside the etching tank 10. The wafer carrier 11 is a fixed wafer carrier fixed inside the etching tank 10. Before processing, the robotic arm transfers the wafer 12 to the fixed wafer carrier for clamping, and after processing, it removes the wafer 12 from the fixed wafer carrier.

[0069] like Figures 1-3 As shown, in one embodiment, the semiconductor substrate etching apparatus further includes an electromagnetic control module 16. The electromagnetic control module 16 contains at least one electric field bias electrode 161 and at least one inductor coil 162. The electromagnetic control module 16 is used to adjust the electric field structure, magnetic field structure and / or current distribution state in the etching solution inside and near the wafer 12 to assist in adjusting the electrochemical etching state at a specific location on the wafer 12. The signal control module 15 provides a driving signal to the electromagnetic control module 16.

[0070] like Figures 2-3 As shown, in one embodiment, the electromagnetic control module 16 is configured as an annular structure with a hollow groove 163. The electromagnetic control module 16 is disposed on both sides of the second slot structure. The axis of the hollow groove 163 is completely or approximately coincident with the vertical line perpendicular to the wafer 12 and passing through the center of the wafer 12.

[0071] The electromagnetic control module can freely alter the intensity and morphology of the electric and magnetic fields inside and near wafer 12, and adjust them transiently or quasi-statically. This influences the movement of ions in the etching solution (since the ion mobility in the solution is limited, electromagnetic field adjustment is feasible), and affects the etching ability and rate of etching ions at a specific location on wafer 12 at a given moment. In a preferred embodiment, the electromagnetic control module is encased in a passivated insulating material to protect it from the etching solution, thus improving its stability and lifespan.

[0072] Figure 3 The positional relationship between the electromagnetic control module and the wafer 12 to be etched is shown. The electromagnetic control module is a ring-shaped structure with a hollow tank 163. One or more electric field biasing electrodes 161 and one or more inductor coils 162 are arranged around the hollow tank 163. During the electrochemical etching process, the etching solution flows within the hollow tank 163 and completes the etching of the wafer 12 surface. Because the ion mobility in the etching solution is relatively slow, its movement can be effectively regulated by the electromagnetic field. The electric field distribution inside the wafer 12 can also be adjusted by the electromagnetic control module, thereby achieving precise control of the electrochemical etching process.

[0073] like Figure 1As shown, in one embodiment, the semiconductor substrate etching apparatus further includes an auxiliary light source module 17. The auxiliary light source module 17 is used to apply parallel or scattered light illumination to the surface of the wafer 12 to be etched. The signal control module 15 provides a driving signal to the auxiliary light source module 17. The auxiliary light source module 17 is an array-type light source, disposed within or outside the etching tank 10 and capable of illuminating the surface of the wafer 12. The array-type light source includes multiple sub-light sources, and the light intensity, wavelength, and / or emission direction of each sub-light source can be independently adjusted. The auxiliary light source module 17 is connected to the signal control module 15, and the signal control module 15 controls the light intensity, wavelength, and / or emission direction of each sub-light source in the auxiliary light source module 17.

[0074] The auxiliary light source module 17 can be placed inside the etching tank 10 on the side of the cathode 14. In this case, the surface of the cathode 14 can be covered with a corrosion-resistant and transparent protective material. Alternatively, the auxiliary light source module 17 can be placed outside the etching tank 10 on the side of the cathode 14. In this case, the walls of the etching tank 10 along the light path can be made of a transparent and corrosion-resistant material. The relative positions of the auxiliary light source module 17 and the arrayed electrodes in the etching tank 10 can be flexibly adjusted to facilitate the control of the light field and electric field distribution.

[0075] like Figure 1 As shown, in one embodiment, the auxiliary light source module 17 can be placed inside the etching tank 10 on the side of the cathode 14 and located outside the cathode 14. The electrode structure of the cathode 14 includes a light-transmitting structure formed by multiple inert metal filaments, so that the light emitted by the auxiliary light source module 17 outside the cathode 14 diffracts when passing through the inert metal filaments, thereby ensuring the uniformity of illumination on the surface of the wafer 12. The material of the cathode 14 can be, for example, Pt, and it is selected as a metal filament with a relatively thin diameter.

[0076] In one embodiment, the cathode 14 and anode 13 are array electrodes, respectively disposed on both sides of the wafer 12. The array electrode includes multiple sub-electrodes, and the driving signal of each sub-electrode can be individually controlled to assist in controlling the electrochemical corrosion state at a specific location on the wafer 12. The signal control module 15 provides a driving signal to the array electrode module.

[0077] For example, such as Figure 9 and Figure 10 As shown, the array of electrodes is arranged in a nested arrangement of multiple concentric rings (e.g., Figure 9 (as shown) and dot matrix arrangement (as shown) Figure 10One of the array electrodes shown. Each independent concentric ring (or lattice) on the array electrode represents an independently controllable small electrode, whose voltage and current states can be consistent with or different from those of the adjacent electrodes, thereby affecting the electric field distribution near wafer 12, affecting the corrosion current intensity on the surface of wafer 12, and achieving the purpose of adjusting the corrosion process.

[0078] In one embodiment, the semiconductor substrate etching equipment further includes a temperature control module (not shown), which is disposed in the etching tank 10. The temperature control module is used to monitor the temperature in the etching tank 10 in real time and to heat or cool the contents of the etching tank 10 as needed.

[0079] In one embodiment, the semiconductor substrate etching equipment further includes an etching solution composition control module (not shown). This module includes at least an etching solution concentration sensor and an etching solution replenishment system, a monitoring device for real-time monitoring of the concentrations of various ions and molecules within the etching tank 10, and the ability to quantitatively replenish the etching solution with specific solvents (solutes or solvents) as needed. By monitoring and replenishing the etching solution within the etching tank 10, the etching solution can be recycled, significantly improving production efficiency and reducing production costs.

[0080] In one embodiment, the semiconductor substrate etching equipment further includes a built-in cleaning tank and a drying system (not shown). The cleaning tank is disposed adjacent to the etching tank 10, and the drying system is disposed adjacent to the cleaning tank. By transferring the wafer 12, which has completed the etching process, into the cleaning tank, residual chemical etching agents on the wafer 12 can be removed, and the wafer 12 can be further dried by the drying system, so that the wafer 12 meets the requirements of the next process.

[0081] In one embodiment, the driving signal provided by the signal control module 15 includes one or more of the following: constant current source driving signal, constant voltage source driving signal, pulse current driving signal, and pulse voltage driving signal. The signal control module 15 can synchronously drive the cathode 14, anode 13, auxiliary light source module 17, electromagnetic control module 16, etc., to form a specific electrochemical corrosion environment in the etching tank 10 and on the surface of the wafer 12, thereby controlling the corrosion effect of the wafer 12.

[0082] In one embodiment, the semiconductor substrate etching equipment further includes a robotic arm system (not shown), which is used for mounting the wafer 12 on the wafer carrier 11, inserting the wafer carrier 11 into the second slot in the etching tank 10, removing and cleaning the wafer carrier 11 and the wafer 12, and removing and feeding the cleaned wafer 12 from the wafer carrier 11.

[0083] In one embodiment, such as Figures 4-8 As shown, the wafer carrier 11 includes at least two clamping structures that can be opened and closed (a first clamping structure 111 and a second clamping structure 112), and the two clamping structures include stepped limiting slots 1111 that conform to the shape of the wafer 12 (e.g., Figure 4 As shown, when the clamping structure is open, the wafer 12 can be fed into the clamping structure limiting slot 1111. When the clamping structure is closed, the edge of the wafer 12 is embedded in the limiting slot 1111. The two clamping structures clamp the wafer 12 and achieve sealing of the edge area of ​​the wafer 12.

[0084] like Figure 5 As shown, one of the clamping structures (first clamping structure 111) is fixed to the transfer table (not shown) when clamping the wafer 12, via a necessary lifting column 18 mechanism (such as... Figure 5 (As shown) The loading of wafer 12 is completed, and wafer 12 is placed as shown. Figure 4 The clamping structure shown has a limiting slot 1111 whose size is consistent with that of the wafer 12 to define the precise position of the wafer 12 within the clamping structure. Then, another clamping structure (second clamping structure 112) is placed over the wafer 12, and the two clamping structures complete the clamping of the wafer 12, forming a wafer carrier 11 containing the wafer 12. Figure 6 As shown. After the wafer 12 is clamped, the wafer carrier 11 can be removed by the robotic arm.

[0085] In one embodiment, such as Figure 7 As shown, the limiting slots 1111 of the two clamping structures are also provided with paired embedded grooves 1112. The embedded grooves 1112 are provided with rubber sealing rings 1113. When the clamping structure is closed, the sealing rings can contact the wafer 12 to form a sealing structure. Figure 7 The sealing structure (partial view) on the wafer carrier 11 is shown. When the clamping structure is closed, the wafer 12 is well clamped by clamping the sealing ring. Under the action of electrical signals (such as electromagnet adsorption, electrostatic adsorption, mechanical structure locking, inflatable rubber sealing ring locking, etc.), the clamping structure achieves a tight closure, preventing the edge of the clamped wafer 12 from being wetted by chemical etching solution and causing corrosion, thus keeping the edge area of ​​the wafer 12 dry.

[0086] In one embodiment, the wafer carrier 11 further includes an electrically driven auxiliary mechanism for controlling the opening and closing of the two clamping structures.

[0087] In one embodiment, such as Figure 8As shown, the two clamping structures also include mutually engaging structures disposed outside the limiting slot 1111. These engaging structures can be mutually aligned protrusions 1115 and grooves 1114. When the two clamping structures are closed, the engaging structures define the relative positions of the two clamping structures, ensuring precise alignment and closure. This engaging structure assists the two clamping structures in automatically aligning when closed, preventing clamping failure of the wafer 12.

[0088] This embodiment also provides a method for etching a semiconductor substrate, wherein the wafer 12 is etched using the semiconductor substrate etching equipment described in the above embodiment.

[0089] In one embodiment, the etching method includes the steps of: clamping the wafer 12 in the wafer carrier 11 through a first slot structure; placing the wafer carrier 11 and the wafer 12 it holds into the etching tank 10, and clamping it in a second slot structure to isolate the passage between the two etching chambers; injecting etching solution into the two etching chambers respectively, or, alternatively, injecting etching solution into the etching tank before placing the wafer carrier, and then separating the etching solution in the etching tank through the wafer carrier 11; and applying voltage to the cathode 14 and the anode 13 to chemically etch the wafer 12.

[0090] In one embodiment, after a etching process is completed, the etching solution can be retained in the etching tank, and the composition of the etching solution can be detected by the etching solution composition control module. After appropriate replenishment as needed, the etching solution can be recycled. It should be noted that the detection can be performed before or after the wafer carrier 11 is placed in. The etching solution in the entire etching tank can be replenished at the same time before the wafer carrier 11 is placed in, or the different etching chambers can be replenished separately after the wafer carrier 11 is placed in.

[0091] In one embodiment, the etching method further includes the step of: adjusting the electric field structure, magnetic field structure and / or current distribution state in the etching solution inside and near the wafer 12 in a transient or quasi-static manner through an electromagnetic control module, thereby affecting the movement mode of the etching ions in the etching solution and affecting the etching ability and etching rate of the etching ions on a specific location of the wafer 12 at a certain moment.

[0092] In a specific example, performing a semiconductor substrate etching process may include the following steps:

[0093] 1) Loading of wafer 12: First, the robotic arm extracts the silicon wafer 12 to be etched from the wafer cassette, and then... Figure 5As shown, the wafer 12 is transferred to the wafer carrier 11. The carrier is fixed to the transfer table when receiving the wafer 12, with the clamping structure in an open state. After the wafer 12 is placed on the clamping structure and fixed in position, the two clamping structures close, as shown. Figure 6 As shown, a wafer carrier 11 containing wafer 12 is formed.

[0094] When the clamping structure is closed, it forms a ring seal on the edge region of wafer 12, keeping the edge region of wafer 12 dry, such as... Figure 7 As shown. The closing and opening of the clamping structure can be electrically driven.

[0095] The robotic arm moves the wafer carrier 11 and inserts it into the etching tank 10, such as... Figure 1 As shown, the second slot structure of the etching tank 10 clamps the wafer carrier 11. This second slot structure can be configured to be substantially the same as the second slot structure. The closing and opening of this clamping structure is electrically driven. After the wafer carrier 11 is clamped, Figure 1 The liquid and ion pathways between the two corrosion chambers shown are shut off.

[0096] 2) Control of the electrochemical corrosion environment: Before the electrochemical corrosion begins, the temperature control module of the equipment adjusts and stabilizes the temperature of the liquid in the tank; the corrosion solution composition control module of the equipment detects the composition of the corrosion solution and replenishes the solution as needed; the array light source of the equipment applies a specific light field to the surface of the wafer 12; the array cathode 14 and anode 13 of the equipment apply a certain electric field to the corrosion tank 10; the electromagnetic control module of the equipment further adjusts the electric field distribution and magnetic field distribution in the corrosion tank 10.

[0097] 3) Electrochemical corrosion process: The signal control module 15 applies an electrochemical corrosion excitation signal. Pulsed current, pulse voltage, constant current, and constant voltage signals are generated on the cathode 14 and anode 13. At the same time, the electromagnetic control module and the array light source module can also cooperate to generate pulsed excitation or constant excitation to adjust the electric field, magnetic field, and light field distribution inside and near the wafer 12 to be etched in real time.

[0098] 4) Removal of Wafer 12: After the electrochemical etching process is completed, the excitation signal inside the etching equipment stops, the clamping structure of the etching tank 10 opens, the robotic arm removes the wafer carrier 11, and moves it to the cleaning tank (not shown in the figure) to clean the residual chemical agents and dry the wafer 12 (e.g., by spinning, hot air drying, vacuum drying, etc.). Finally, the robotic arm places the wafer 12 in the wafer ejection box and sends it out of the equipment.

[0099] The advantages of this invention are:

[0100] First, production efficiency is significantly improved: an equipment solution that meets the requirements of high-throughput semiconductor substrate manufacturing has been designed, which simplifies and automates the process of loading and unloading wafers 12, significantly reducing the time occupied by loading and unloading wafers 12, and can meet the requirements of mass wafer 12 substrate preparation.

[0101] Second, the process cost is significantly reduced: the chemical etching solution can be recycled, and there is no need to discharge the chemical solution when loading and unloading wafer 12. The cost of a single substrate is significantly reduced.

[0102] Third, it enables precise control of the electrochemical corrosion environment: The semiconductor substrate etching equipment of the present invention can precisely control the temperature, light field distribution, electromagnetic field distribution and solution composition in the electrochemical corrosion process, thereby ensuring the uniformity of the etching process within and between wafers, and is suitable for batch wafer fabrication in production lines.

[0103] As described above, the semiconductor substrate etching apparatus and etching method of the present invention have the following beneficial effects:

[0104] This invention employs a quick-release wafer 12 carrier, separating the wafer 12 carrier from the etching tank 10 into two independent parts, which can significantly reduce the wafer 12 pick-up and drop time. Especially for high-throughput semiconductor substrate etching equipment, it can greatly shorten the etching process time and improve the etching process efficiency. At the same time, this invention can realize the recycling of chemical etching solution and reduce process costs.

[0105] The etching equipment of the present invention also has the ability to configure the electrochemical etching environment with high precision. By controlling the distribution of the electromagnetic field in the etching tank 10, the light field distribution on the surface of the wafer 12, the temperature in the etching tank 10, the solute concentration of the etching solution, etc., the etching effect of the semiconductor substrate can be adjusted within a large process range to meet the device process requirements in the production line.

[0106] Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0107] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A semiconductor substrate etching apparatus, characterized in that, The semiconductor substrate etching equipment includes: A wafer carrier, wherein the wafer carrier is provided with a first slot structure for holding a wafer; The etching tank includes at least two etching chambers, and a second slot structure for clamping the wafer carrier is provided between two adjacent etching chambers. When the second slot structure clamps the wafer carrier, the passage between the two etching chambers is isolated by the wafer carrier and the wafer it clamps. The cathode and anode are respectively disposed in the two corrosion chambers, and are used to provide low potential and high potential respectively in the corrosion process; A signal control module is used to provide drive signals for the semiconductor substrate etching equipment.

2. The semiconductor substrate etching equipment according to claim 1, characterized in that: The semiconductor substrate etching equipment further includes an electromagnetic control module, which contains at least one electric field bias electrode and / or at least one inductor coil. The electromagnetic control module is used to adjust the electric field structure, magnetic field structure and / or current distribution in the etching solution inside and near the wafer to assist in adjusting the electrochemical etching state at a specific location on the wafer. The signal control module provides a driving signal to the electromagnetic control module.

3. The semiconductor substrate etching equipment according to claim 2, characterized in that: The electromagnetic control module is configured as a ring structure with a hollow groove. The electromagnetic control module is located on both sides of the second slot structure. The axis of the hollow groove is approximately coincident with the vertical line perpendicular to the wafer and passing through the center of the wafer.

4. The semiconductor substrate etching equipment according to claim 1, characterized in that: The semiconductor substrate etching equipment also includes an auxiliary light source module, which is used to apply parallel light or scattered light to the surface of the wafer to be etched, and the signal control module provides a driving signal to the auxiliary light source module.

5. The semiconductor substrate etching apparatus according to claim 4, characterized in that: The auxiliary light source module is an array-type light source, which is set inside or outside the etching tank and can illuminate the wafer surface. The array-type light source includes multiple sub-light sources, and the light intensity, light wavelength and / or light emission direction of each sub-light source can be adjusted independently.

6. The semiconductor substrate etching apparatus according to claim 5, characterized in that: The electrode structure of the cathode includes a light-transmitting structure formed by multiple inert metal filaments, so that the light emitted by the auxiliary light source module outside the cathode is diffracted when passing through the inert metal filaments, thereby ensuring the uniformity of illumination on the wafer surface.

7. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The cathode and anode are arrayed electrodes, respectively disposed on both sides of the wafer. The arrayed electrodes include multiple sub-electrodes, and the driving signal of each sub-electrode can be individually controlled to assist in controlling the electrochemical corrosion state at a specific location on the wafer. The signal control module provides the driving signal to the arrayed electrode module.

8. The semiconductor substrate etching apparatus according to claim 7, characterized in that: The array electrodes are arranged in one of two ways: nested arrangement of multiple concentric rings or lattice arrangement.

9. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The semiconductor substrate etching equipment also includes a temperature control module, which is installed inside the etching tank. The temperature control module is used to monitor the temperature inside the etching tank in real time and to heat or cool the contents of the etching tank as needed.

10. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The semiconductor substrate etching equipment also includes an etching solution composition control module, which includes at least an etching solution concentration sensor and an etching solution replenishment system, a monitoring device for real-time monitoring of the concentration of various ions and molecules in the etching tank, and quantitative replenishment of the etching solution with specific solvents as needed.

11. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The semiconductor substrate etching equipment also includes a built-in cleaning tank and a drying system. The cleaning tank is arranged adjacent to the etching tank, and the drying system is arranged adjacent to the cleaning tank.

12. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The driving signals provided by the signal control module include one or more of the following: constant current source driving signal, constant voltage source driving signal, pulse current driving signal, and pulse voltage driving signal.

13. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The semiconductor substrate etching equipment also includes a robotic arm system, which is used for wafer mounting on the wafer carrier, insertion and installation of the wafer carrier into the second slot in the etching tank, removal and cleaning of the wafer carrier and wafer, and removal and feeding of the cleaned wafer from the wafer carrier.

14. The semiconductor substrate etching apparatus according to claim 1, characterized in that: The wafer carrier includes at least two clamping structures that can be opened and closed. The two clamping structures include stepped limiting slots that match the shape of the wafer. When the clamping structure is opened, the wafer can be fed into the limiting slots of the clamping structure. When the clamping structure is closed, the edge of the wafer is embedded in the limiting slots. The two clamping structures clamp the wafer and achieve a seal on the edge area of ​​the wafer.

15. The semiconductor substrate etching apparatus according to claim 14, characterized in that: The two clamping structures are further provided with paired embedded grooves in the limiting slots. The embedded grooves are provided with rubber sealing rings. When the clamping structure is closed, the sealing rings can contact the wafer to form a sealing structure.

16. The semiconductor substrate etching apparatus according to claim 14, characterized in that: The wafer carrier also includes an electrically driven auxiliary mechanism for controlling the opening and closing of the two clamping structures.

17. The semiconductor substrate etching apparatus according to claim 14, characterized in that: The two clamping structures also include a meshing structure disposed outside the limiting slot. When the two clamping structures are closed, the meshing structure limits the relative position of the two clamping structures so that they are precisely aligned and closed.

18. A method for etching a semiconductor substrate, characterized in that, The wafer is etched using the semiconductor substrate etching apparatus as described in any one of claims 1 to 17.

19. The etching method for a semiconductor substrate according to claim 18, characterized in that, The corrosion method includes the following steps: The wafer is held in the wafer carrier by the first slot structure; The wafer carrier and the wafer it holds are placed into the etching tank and clamped in the second slot structure, so that the passage between the two etching chambers is isolated from each other. Etching solution is injected into the two etching chambers respectively, or into the etching tank before placing the wafer carrier; Voltage is applied to the cathode and anode to chemically etch the wafer.

20. The etching method for a semiconductor substrate according to claim 19, characterized in that, The corrosion method further includes the following steps: The electromagnetic control module adjusts the electric field structure, magnetic field structure, and / or current distribution in the etching solution inside and near the wafer in a transient or quasi-static manner, thereby affecting the movement of corrosion ions in the etching solution and the corrosion ability and corrosion rate of corrosion ions on a specific location of the wafer at a certain moment.

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