Switching power supply and integrated control circuit and control method thereof

Abstract

The invention discloses a switching power supply and an integrated control circuit and a control method thereof. The switching power supply supplies power to at least one electronic device, and comprises a first switching converter for providing a first output voltage; a second switching converter providing a second output voltage; a first integrated control circuit configured to generate a first control signal to control a first switch of the first switching converter, having a first transmission terminal receiving an enable signal, and determining whether to enter a first power supply mode based on a logic state of the enable signal; the second integrated control circuit is provided with a second transmission terminal for receiving the enable signal, whether a first power supply mode is entered or not is judged based on the logic state of the enable signal, and the second transmission terminal is further connected to the first transmission terminal of the first integrated control circuit; and when the first power supply mode is entered, a second control signal is generated based on the logic state at the first transmission terminal so as to control the second switch to switch on and off.

Description

Technical Field

[0001] This invention relates to electronic circuits, and more particularly to switching power supplies and their integrated control circuits and methods. Background Technology

[0002] In multi-output power delivery (PD) adapter applications, one or more power delivery controllers are often coupled to each USB output port to detect the load on the USB output port and feed this load information back to the power switching converter to meet different power demands. However, communication between the power controller coupled to the USB output port and the switching converter often requires an integrated circuit with a built-in serial communication port, such as SPI or I2C. This results in too many pins on the integrated circuit, an increased PCB area, and a higher overall cost. Furthermore, introducing a dedicated communication interface requires additional built-in memory, which not only consumes internal chip resources but also complicates the design and impacts product development cycles. Summary of the Invention

[0003] In view of one or more problems existing in the prior art, the purpose of the present invention is to provide a switching power supply with at least two switching converters for use in a power transmission adapter, which can meet different output power requirements.

[0004] According to an embodiment of the present invention, a switching power supply is provided for powering at least one electronic device, comprising: a first switching converter providing a first output voltage to a first output terminal and a second output terminal; a second switching converter providing a second output voltage to a third output terminal and a fourth output terminal, wherein the second output terminal is coupled to the fourth output terminal; a first integrated control circuit configured to generate a first control signal to control a first switch of the first switching converter, having a first transmission terminal for receiving an enable signal, and determining whether to enter a first power supply mode based on the logic state of the enable signal; and a second integrated control circuit having a second transmission terminal for receiving an enable signal, determining whether to enter the first power supply mode based on the logic state of the enable signal, the second transmission terminal being further connected to the first transmission terminal of the first integrated control circuit, and generating a second control signal based on the logic state at the first transmission terminal to control the second switch to switch on and off when entering the first power supply mode.

[0005] An integrated control circuit for a switching power supply according to an embodiment of the present invention, wherein the switching power supply includes a first switching converter and a second switching converter to provide a first output voltage and a second output voltage, respectively, the integrated control circuit includes: a transmission terminal for receiving an enable signal, and determining whether to enter a first power supply mode based on the logic state of the enable signal; wherein when entering the first power supply mode and being configured as a master control circuit, a control signal is generated based on a compensation signal, and a time indication signal is sent from the transmission terminal to the transmission terminal configured as a slave control circuit; when entering the first power supply mode and being configured as a slave control circuit, the time indication signal is received from the transmission terminal configured as a master control circuit via the transmission terminal, and a control signal is generated based on the logic state of the time indication signal.

[0006] A control method for a switching power supply according to an embodiment of the present invention includes: using a first integrated control circuit to control a first switching converter to provide a first output voltage to a first output terminal and a second output terminal; using a second integrated control circuit to control a second switching converter to provide a second output voltage to a third output terminal and a fourth output terminal; receiving an enable signal via a transmission terminal; determining whether to enter a first power supply mode based on the logic state of the enable signal; configuring one of the first and second integrated circuits as a master control circuit via the transmission terminal, and configuring the other of the first and second integrated control circuits as a slave control circuit; when entering the first power supply mode and being configured as a master control circuit, generating a control signal based on a feedback signal related to the corresponding output voltage, and sending a time indication signal to the transmission terminal configured as a slave control circuit via the transmission terminal; and when entering the first power supply mode and being configured as a slave control circuit, receiving the time indication signal from the transmission terminal configured as a master control circuit via the transmission terminal, and generating a control signal based on the logic state of the time indication signal.

[0007] In the embodiments of this invention, the circuitry is simple, easily achieving three-way communication between the power transmission controller and two integrated circuit control circuits. Compared to traditional serial communication interfaces, it saves I / O port resources, requires fewer pin resources or clock signals, reduces hardware costs, and ensures the ability to provide output power under different load conditions. Attached Figure Description

[0008] Figure 1 This is a circuit block diagram of a switching power supply 100 according to an embodiment of the present invention;

[0009] Figure 2 According to an embodiment of the present invention Figure 1 The waveform diagram of the signal I / O is shown below;

[0010] Figure 3 The circuit schematic diagram is shown for a switching power supply 100A according to another embodiment of the present invention;

[0011] Figure 4 This is a flowchart of a control method 300 for a switching power supply according to an embodiment of the present invention.

[0012] Figure 5 The diagram shows the operating waveform of the switching power supply 100A in the first power supply mode according to an embodiment of the present invention. Detailed Implementation

[0013] Specific embodiments of the present invention will now be described in detail. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the invention.

[0014] Throughout this specification, references to “an embodiment,” “an embodiment,” “an example,” or “an example” mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the invention. Therefore, the phrases “in an embodiment,” “in an embodiment,” “an example,” or “an example” appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. Moreover, those skilled in the art will understand that the accompanying drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It should be understood that when an element is referred to as “connected to” or “coupled” to another element, it can be a direct connection or coupling to the other element or there may be intermediate elements. Conversely, when an element is referred to as “directly connected to” or “directly coupled to” another element, there are no intermediate elements. The same reference numerals indicate the same elements. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.

[0015] Figure 1 This is a circuit block diagram of a switching power supply 100 according to an embodiment of the present invention. For simplicity, the switching power supply 100 is illustrated as having only two USB port outputs (USBC1 and USBC2). In other embodiments, the switching power supply 100 includes additional outputs and / or outputs other than USB ports.

[0016] exist Figure 1In the illustrated embodiment, the switching power supply 100 includes a first switching converter 101, a second switching converter 102, a first integrated control circuit 103, a second integrated control circuit 104, a power transfer (PD) controller 105, a load switch 106, a first port USBC1, and a second port USBC2.

[0017] like Figure 1 As shown, a first switching converter 101 has a first output terminal OUT1 and a second output terminal OUT2. The first switching converter 101 is configured to provide a first output voltage Vo1 to the first output terminal OUT1 and the second output terminal OUT2. A second switching converter 102 has a third output terminal OUT3 and a fourth output terminal OUT4. The second switching converter 102 is configured to provide a second output voltage Vo2 to the third output terminal OUT3 and the fourth output terminal OUT4. The second output terminal OUT2 and the fourth output terminal OUT4 are coupled together and grounded.

[0018] To filter out ripple and stabilize the output voltage, output capacitors are coupled to both output terminals of the first switching converter 101 and the second switching converter 102. For example... Figure 1 As shown, output capacitor Co1 has a first terminal and a second terminal, wherein the first terminal is coupled to the first output terminal OUT1 and the second terminal is coupled to the second output terminal OUT2. Output capacitor Co1 receives the first output voltage Vo1. Output capacitor Co2 is coupled between the third output terminal OUT3 and the fourth output terminal OUT4 of the second switching converter 102 to receive the second output voltage Vo2. Considering factors such as capacitance, price, and size, output capacitors Co1 and Co2 are typically electrolytic capacitors, such as aluminum electrolytic capacitors.

[0019] The first port, USBC1, has a bus terminal (BUS1) and a ground terminal (RTN1), where BUS1 receives a first voltage V1 and RTN1 is coupled to ground. The second port, USBC2, has a bus terminal (BUS2) and a ground terminal (RTN2), where BUS2 receives a second voltage V2 and RTN2 is coupled to ground. In some cases, at least one port is not connected to an external electronic device. For example, only the first port, USBC1, is coupled to a first electronic device, and the connection between the second port, USBC2, and the second electronic device is disconnected. Therefore, as... Figure 1 As shown, the connection between the second port USBC2 and the second electronic device is illustrated by a dashed line. In one embodiment, both the first port USBC1 and the second port USBC2 are Type-C ports.

[0020] The power transfer controller 105 is configured to control switching switches Q1 and Q2 and load switch 106 to detect the power requirements of each USBC1 and USBC2 port, and customize the power output on each USBC1 and USBC2 port to meet the diverse power requirements of different numbers of loads. Switch Q1 is coupled between the first output terminal OUT1 and the bus terminal BUS1, and switch Q2 is coupled between the third output terminal OUT3 and the bus terminal BUS2.

[0021] Power transfer controller 105 is coupled to the first port USBC1 and the second port USBC2 via lines 11 and 12 to determine a first power supply mode or a second power supply mode, and provides an enable signal IO to the first integrated control circuit 103 and the second integrated control circuit 104 at the transmission terminals. When only the first port USBC1 is coupled to the first electronic device, and the second port USBC2 is not coupled to the second electronic device, and the output power provided by the first switching converter is insufficient to meet the needs of the first electronic device, power transfer controller 105 enables the first power supply mode, for example, by pulling the enable signal IO low for a first time threshold. When the first port USBC1 is coupled to the first electronic device, and the second port USBC2 is coupled to the second electronic device, power transfer controller 105 enables the second power supply mode, for example, by pulling the enable signal IO low for a second time threshold and then keeping the enable signal at a logic high level. In one embodiment, the second time threshold is greater than the first time threshold.

[0022] In the first power supply mode, the load switch 106 coupled between the first output terminal OUT1 and the third output terminal OUT3 is turned on, and the switching switch Q1 coupled between the first output terminal OUT1 and the bus terminal BUS1 is turned on. In this case, both the first output terminal OUT1 and the third output terminal OUT3 are coupled to the bus terminal BUS1 of the first port USBC1. The first switching converter 101 and the second switching converter 102 together provide the first voltage V1 to the bus terminal BUS1, providing the first electronic device with a load capacity of double the current.

[0023] In one embodiment, the first switching converter 101 and the second switching converter 102 employ the same topology. In another embodiment, both the first switching converter 101 and the second switching converter 102 are flyback converters. In other embodiments, the first switching converter 101 and the second switching converter 102 may employ different topologies, such as forward topologies, symmetrical or asymmetrical half-bridge flyback topologies, etc.

[0024] exist Figure 1In the illustrated embodiment, the first switching converter 101 and the second switching converter 102 are controlled by the first integrated control circuit 103 and the second integrated control circuit 104, respectively. In one embodiment, the first integrated control circuit 103 receives a first feedback signal VFB1 related to the first output voltage Vo1 at the feedback terminal FB, and provides a first control signal CTRL1 based on the first feedback signal VFB1 to control the first switch of the first switching converter 101.

[0025] The second integrated control circuit 104 provides a second control signal CTRL2 to control the second switch of the second switch converter 102. In one embodiment, the first integrated control circuit 103 is integrated with the first switch on the same chip. In another embodiment, the first switch is a power switch of the first switch converter 101. In yet another embodiment, the first switch is a secondary switch located on the secondary side of the first switch converter 101. Similarly, in one embodiment, the second integrated control circuit 104 and the second switch are integrated on the same chip. In another embodiment, the second switch is a power switch of the second switch converter 102. In yet another embodiment, the second switch is a secondary switch located on the secondary side of the second switch converter 102.

[0026] exist Figure 1 In the illustrated embodiment, the first integrated control circuit 103 has a transmission terminal IOA. Transmission terminal IOA is coupled to a transmission terminal of the power transmission controller 105 to receive an enable signal IOA. The first integrated control circuit 103 is configured to determine whether to enter a first power supply mode based on the logic state of the enable signal IOA. The second integrated control circuit 104 has a transmission terminal IOB. Transmission terminal IOB is also connected to a transmission terminal of the power transmission controller 105 to receive the enable signal IOA. Furthermore, the transmission terminal IOB of the second integrated control circuit 104 is also coupled to the transmission terminal IOA of the first integrated control circuit 103. When entering the first power supply mode, it generates a second control signal CTRL2 based on the logic state at transmission terminal IOA to control the on / off switching of the second switch. When not entering or exiting the first power supply mode, the second integrated control circuit 104 receives a second feedback signal VFB2 related to the second output voltage Vo2 at the feedback terminal FB, and generates the second control signal CTRL2 based on the second feedback signal VFB2.

[0027] In the second power supply mode, the load switch 106 coupled between the first output terminal OUT1 and the third output terminal OUT3 is turned off, the switch Q1 coupled between the first output terminal OUT1 and the bus terminal BUS1 remains on, and the switch Q2 coupled between the third output terminal OUT3 and the bus terminal BUS2 is on. In this case, the third output terminal OUT3 is decoupled from the bus terminal BUS1 and the first output terminal OUT1, and is instead coupled to the bus terminal BUS2 of the second port USBC2. The first integrated control circuit 103 controls the first switching converter 101 to provide the first output voltage Vo1 based on the first feedback signal VFB1, which serves as the first voltage V1 provided to the first port USBC1 to power the first electronic device. At the same time, the second integrated control circuit 104 controls the second switching converter 102 to provide the second output voltage Vo2 based on the second feedback signal VFB2, which serves as the second voltage V2 provided to the second port USBC2 to power the second electronic device.

[0028] Figure 2 According to an embodiment of the present invention Figure 1 The waveform of the signal I / O is shown below. It should be noted that outside the communication window, the signal I / O is called the enable signal, while during the communication window, the signal I / O is called the time indication signal.

[0029] like Figure 2 As shown, before time t1, no transmission occurs between transmission terminals IOA and IOB, and signal IO acts as an enable signal, in the second power supply state. After time t1, Figure 1 The power transmission controller 105 shown determines the first power supply mode by providing an enable signal IO at the transmission terminal and outputting a logic low level, marking the start of the first power supply mode. Figure 2 In the illustrated embodiment, during the time period t1 to t2, when the duration of the enable signal IO being at a logic low level is greater than the first time threshold TS1, the first integrated control circuit 103 and the second integrated control circuit 104 enter the first power supply mode. In one embodiment, the first time threshold TS1 is not less than 50µs and not more than 500ms.

[0030] Furthermore, upon receiving the signal indicating the start of the first power supply mode, both the first integrated control circuit 103 and the second integrated control circuit 104 respond. Specifically, timing begins on the first transition edge after the enable signal IO enters the first power supply mode (time t2), and after timing for a second duration TR1, at time t3, the first integrated control circuit 103 sends a first pulse signal at the transmission terminal IOA as a response to the power transmission controller 105, thereby configuring the first integrated control circuit 103 as the main control circuit.

[0031] The second integrated control circuit 104 starts timing on the first transition edge after the enable signal IO enters the first power supply mode (time t2). After timing for a first timing duration TR2, at time t4, the second integrated control circuit 104 sends a second pulse signal at the transmission terminal IOB as a response to the power transmission controller 105 to configure the second integrated control circuit 104 as a slave control circuit.

[0032] After time t4, in the first power supply mode, the first integrated control circuit 103 and the second integrated control circuit 104 enter a communication window. Specifically, during this communication window, the first integrated control circuit 103 sends a signal related to the first control signal CTRL1 from the transmission terminal IOA to the transmission terminal IOB of the second integrated control circuit 104; this signal is referred to here as the time indication signal IO. The time indication signal IO has a first level and a second level. The second integrated control circuit 104 generates a second control signal CTRL2 for the second switch based on the logic state of the time indication signal IO at the transmission terminal IOA, to control the second switch to switch on and off.

[0033] After time t5, Figure 1 The power transmission controller 105 shown determines whether to exit the first power supply mode based on the status of the first port USBC1 and the second port USBC2. It provides an enable signal IO at the transmission terminal and outputs a logic low level that determines the exit of the first power supply mode. When the communication window ends, the first integrated control circuit 103 and the second integrated control circuit 104 are configured to exit the first power supply mode when the duration of the logic low level of the enable signal IO is greater than a second time threshold TS2, wherein the second time threshold TS2 is greater than the first time threshold TS1.

[0034] After time t6, the first integrated control circuit 103 and the second integrated control circuit 104 are reconfigured to the second power supply mode. Communication between the first integrated control circuit 103 and the second integrated control circuit 104 ceases, and the signal IO is in an idle state. The second integrated control circuit 104 generates the second control signal CTRL2 based on the second feedback signal VFB2.

[0035] Figure 2 An embodiment of configuring a switching power supply 100 into a first power supply mode and configuring the main control circuit and slave control circuit is provided. In the prior art, the main control circuit and slave control circuit of the switching power supply can be configured by other methods, for example, the configuration terminal of the first integrated control circuit as the main control circuit is connected to ground, while the configuration terminal of the second integrated control circuit as the slave control circuit is floating. Compared with the prior art, the present invention not only saves configuration terminals, but also takes into account the functions of configuration, communication with the power transmission controller, and communication between the main control circuit and the slave control circuit, which is a significant improvement.

[0036] Figure 3 This is a circuit schematic diagram of a 100A switching power supply according to another embodiment of the present invention. Figure 3 In the illustrated embodiment, both the first switching converter 101A and the second switching converter 102A are flyback circuits. The first switching converter 101A includes a primary switch SP1, a transformer T1, and a secondary switch SR1, while the second switching converter 102A includes a primary switch SP2, a transformer T2, and a secondary switch SR2.

[0037] like Figure 3 As shown, the first switching converter 101A has a first output capacitor Co1, and the second switching converter 102A has a second output capacitor Co2, which respectively convert the input voltage Vin into the first output voltage Vo1 and the second output voltage Vo2.

[0038] exist Figure 3 In the illustrated embodiment, the first integrated control circuit 103A includes a secondary control circuit 1031, an isolation circuit 1032, a primary control circuit 1033, and multiple terminals, including a feedback terminal FB, a transmission terminal IOA, a secondary drive terminal DRV1, a compensation terminal COMP, a primary drive terminal DRV2, and secondary reference ground SGND and primary reference ground PGND. The second integrated control circuit 104A includes a secondary control circuit 1041, an isolation circuit 1042, a primary control circuit 1043, and multiple terminals, including a feedback terminal FB, a transmission terminal IOB, a secondary drive terminal DRV1, a compensation terminal COMP, a primary drive terminal DRV2, and secondary reference ground SGND and primary reference ground PGND.

[0039] exist Figure 3 In the illustrated embodiment, the feedback terminal FB of the first integrated control circuit 103A is coupled to an external resistor divider circuit. This resistor divider circuit is coupled between the first output terminal OUT1 and the second output terminal OUT2. The feedback terminal FB receives a feedback signal related to the output voltage Vo1 via the resistor divider circuit. The compensation terminal COMP is coupled to an external compensation resistor RC and a compensation capacitor Cc. Based on the difference between the feedback signal and the reference voltage, the error between the feedback signal and the reference voltage is amplified, and a compensation signal VCOMP is provided at the compensation terminal COMP. The transmission terminal IOA receives an enable signal IO and determines whether to enter the first power supply mode based on the logic state of the enable signal IO. Specifically, the first power supply mode is entered when the duration of the enable signal IO being at a logic low level is greater than a first time threshold. The first power supply mode is exited when the duration of the enable signal IO being at a logic low level is greater than a second time threshold. The second time threshold is greater than the first time threshold.

[0040] In one embodiment, upon receiving an enable signal IO indicating entry into the first power supply mode, the first integrated control circuit 103A is configured as either a master control circuit or a slave control circuit. In one embodiment, configuring the first integrated control circuit 103A as a master control circuit includes starting timing on the first transition edge after the enable signal IO enters the first power supply mode, timing for a first duration, and then sending a pulse signal at the transmission terminal IOA. Configuring the first integrated control circuit 103A as a slave control circuit includes starting timing on the first transition edge after the enable signal IO enters the first power supply mode, timing for a second duration, and then sending a pulse signal at the transmission terminal IOA, wherein the first duration is not equal to the second duration.

[0041] In the first power supply mode, when the first integrated control circuit 103A is configured as the master control circuit, the second integrated control circuit 104A is configured as the slave control circuit; when the second integrated control circuit 104A is configured as the master control circuit, the first integrated control circuit 103A is configured as the slave control circuit.

[0042] When entering the first power supply mode and the first integrated control circuit 103A is configured as the master control circuit, the secondary control circuit 1031 generates a control signal CTRLS1 based on the compensation signal VCOMP, and sends a time indication signal IO to the transmission terminal IOB configured as the slave control circuit (second integrated control circuit 104A). Figure 3 In the illustrated embodiment, the control signal CTRLS1 is coupled to the secondary drive terminal DRV1 and configured to control the secondary switch SR1. The secondary control circuit 1031 also provides a primary turn-on enable signal PRON1 based on the control signal CTRLS1. The isolation circuit 1032 has an input and an output, wherein the input receives the primary turn-on enable signal PRON1, and the output provides a synchronization signal SYNC1 that is electrically isolated from the primary turn-on enable signal PRON1. The primary control circuit 1033 is coupled to the output of the isolation circuit 1032 to receive the synchronization signal SYNC1, and provides a primary control signal CTRLP1 to the primary drive terminal DRV2 based on the synchronization signal SYNC1 to control the primary switch SP1 located on the primary side of the first switching converter 101A.

[0043] When entering the first power supply mode and the second integrated control circuit 104A is configured as a slave control circuit, it receives a time indication signal IO from the transmission terminal IOA configured as the master control circuit via the transmission terminal IOB. The secondary control circuit 1041 generates a control signal CTRLS2 based on the logic state of the time indication signal IO. The control signal CTRLS2 is coupled to the terminal DRV1 and configured to control the secondary switch SR2. The isolation circuit 1042 has an input and an output, wherein the input receives a primary turn-on enable signal PRON2, and the output provides a synchronization signal SYNC2 that is electrically isolated from the primary turn-on enable signal PRON2. The primary control circuit 1043 is coupled to the output of the isolation circuit 1042 to receive the synchronization signal SYNC2, and provides a primary control signal CTRLP2 to the primary drive terminal DRV2 based on the synchronization signal SYNC2 to control the primary switch SP2 located on the primary side in the second switching converter 102A.

[0044] Figure 4 This is a flowchart of a control method 300 for a switching power supply according to an embodiment of the present invention. The control method 300 includes steps 301 to 312.

[0045] In step 301, the first integrated control circuit is used to control the first switching converter to provide a first output voltage to the first output terminal and the second output terminal.

[0046] In step 302, the second integrated control circuit is used to control the second switching converter to provide a second output voltage to the third and fourth output terminals.

[0047] In step 303, an enable signal is received via the transmission terminal, and the logic state of the enable signal is used to determine whether to enter the first power supply mode.

[0048] In step 304, the logic state of the enable signal indicates entry into the first power supply mode. In this first embodiment, the first power supply mode is entered when the duration of the enable signal being at a logic low level exceeds a first time threshold.

[0049] In step 305, in response to entering the first power supply mode, an integrated control circuit is configured as the main control circuit. In one embodiment, configuring the integrated control circuit as the main control circuit includes starting timing on the first transition edge after the enable signal enters the first power supply mode, timing for a first timing duration, and then sending a pulse signal at the transmission terminal.

[0050] In step 306, a control signal is generated based on a feedback signal related to the corresponding output voltage. In one embodiment, the control signal is configured to control a secondary switch on the secondary side of the switching converter. In another embodiment, the control signal is configured to control other power switches of the switching converter.

[0051] In step 307, when entering the first power supply mode and being configured as the master control circuit, the integrated control circuit sends a time indication signal to the transmission terminal configured as the slave control circuit.

[0052] In one embodiment, the timing indication signal has a low-level width and a period length. The low-level width represents the time difference from a first starting point when the voltage across the secondary switch on the secondary side of the first switching converter reaches a plateau voltage to a first ending point when the current flowing through the secondary switch crosses zero. The period length represents the time difference between two consecutive first starting points.

[0053] In step 308, in response to entering the first power supply mode, another integrated control circuit is configured as a slave control circuit. In one embodiment, configuring the integrated control circuit as a slave control circuit includes starting a timer on the first transition edge after the enable signal enters the first power supply mode, timing for a second duration, and then sending a pulse signal at the transmission terminal. The first duration is not equal to the second duration.

[0054] In step 309, a time indication signal from the transmission terminal of the main control circuit is received via the transmission terminal.

[0055] In step 310, the control signal is generated based on the logic state of the time indication signal. The time indication signal has a first level and a second level.

[0056] In one embodiment, the first power supply mode is exited when the duration of the enable signal being at a logic low level exceeds a second time threshold. The second time threshold is greater than the first time threshold. Proceed to step 311.

[0057] In step 311, the enable signal is held at a logic high level. In step 312, the integrated control circuit generates the control signal based on its respective feedback signal related to the output voltage.

[0058] In one embodiment, in the first power supply mode, both the first output terminal and the third output terminal are coupled to the first bus terminal receiving the first voltage, and the first switching converter and the second switching converter together provide the first voltage to the first bus terminal; in the second power supply mode, the third output terminal is decoupled from the first bus terminal and the first output terminal, and is instead coupled to the second bus terminal receiving the second voltage, the first switching converter provides the first output voltage as the first voltage, and the second switching converter provides the second output voltage as the second voltage.

[0059] In embodiments of the present invention, when only the first port is coupled to the first electronic device, the first and second switching converters are automatically configured to operate with a single output, entering a first power supply mode, providing double the load capacity to the first electronic device, thereby meeting the power supply requirements of high-power loads; when the second port is further coupled to the second electronic device, the first and second switching converters are reconfigured to have independent outputs, providing their respective output voltages to the first and second electronic devices, thereby meeting the power supply requirements of multiple loads. In the first power supply mode, the first switching converter 101A and the second switching converter 101B do not need to operate alternately. The following is a description of... Figure 3 The waveform diagram shown is of the switching power supply 100A operating in the first power supply mode, which describes in detail the non-interleaved operation of the switching power supply 100A in the first power supply mode.

[0060] Figure 5 This is a waveform diagram of the switching power supply 100A operating in a first power supply mode according to an embodiment of the present invention. Figure 5 As shown, from top to bottom, the voltages V across the secondary switch SR1 are... Sec_DS1 The gate drive voltage V of the secondary switch SR1 SR_GS1 The time indication signal IO on the transmission terminal IOA or IOB, and the voltage V across the secondary switch SR2. Sec_DS2 The gate drive voltage V of the secondary switch SR2 SR_GS2 The first current detection signal V represents the current flowing through the primary switch SP1. CS1 And the second current detection signal V, representing the current flowing through the primary switch SP2. CS2 .

[0061] exist Figure 5 In the illustrated embodiment, within one switching cycle of the first switching converter 101A, the secondary switch SR1 is turned on twice to achieve zero-voltage turn-on of the primary switch SP1. Within one switching cycle of the second switching converter 102A, the secondary switch SR2 is turned on twice to achieve zero-voltage turn-on or near-zero-voltage turn-on of the primary switch SP2 while simultaneously meeting the power distribution requirements of the first power supply mode. Furthermore, the first switching converter 101A and the second switching converter 102A operate in a non-interleaved operation state.

[0062] For the first switching converter 101A, such as Figure 5 As shown, starting from time t1, the primary switch SP1 is turned on, and the current flowing through the primary switch SP1 begins to increase. The first current detection signal V... CS1 The voltage increases accordingly. When the primary switch SP1 is turned on at time t1, the voltage V across the secondary switch SR1... Sec_DS1 It also increases to its platform voltage (marked as VP), and the time indicator signal IO goes low.

[0063] continue Figure 5 As shown, at time t2, the first current detection signal V CS1 When the voltage is increased to the first threshold voltage VTH1, the primary switch SP1 turns off. The voltage V across the secondary switch SR1... Sec_DS1 This also decreases to a threshold voltage, and the gate drive voltage V of the secondary switch SR1 decreases accordingly. SR_GS1 As the current rises, the secondary switch SR1 is turned on for the first time. Until time t3, the current ISR1 flowing through the secondary switch SR1 gradually decreases to zero, ending the first conduction process of the secondary switch SR1, and the time indicator signal IO goes high. In critical current mode, the secondary switch SR1 is turned on again at the critical point, and the current flowing through the secondary switch SR1 is negative. At time t4, after the second conduction time T... ZVS1 Subsequently, the secondary switch SR1 is turned off for the second time. At time t5, when the primary switch SP1 is turned on again, the first start point arrives. The next switching cycle of the first switching converter 101A begins.

[0064] Figure 5 The time indication signal IO shown has a first level and a second level, where the width of the first level IO_L represents the first time difference T between the first start point (e.g., time t1) when the primary switch SP1 is turned on and the first end point (e.g., time t3) when the current flowing through the secondary switch SR1 crosses zero. PS1 The second level width IO_H represents the second time difference Δt1 between the first end point (e.g., time t3) and the subsequent first start point (e.g., time t5). The period length of the time indication signal IO is T. SW1 , represents the time difference between two consecutive first starting points, such as the time difference between time t1 and time t5.

[0065] For the second switching converter 102A, continue as follows: Figure 5 As shown, at time ta, the primary switch SP2 is turned on, and the current flowing through the primary switch SP2 begins to increase, and the second current detection signal V... CS2 The voltage increases accordingly. When the primary switch SP2 is turned on at time ta, the voltage V across the secondary switch SR2... Sec_DS2 It is also increased to its platform voltage, and the second starting point is determined. At time tb, the second current detection signal V... CS2 When the voltage is increased to the first threshold voltage VTH1, the primary switch SP2 turns off. The voltage V across the secondary switch SR2... Sec_DS2 The voltage also decreases to the threshold voltage, and the secondary switch SR2 is turned on for the first time. Until time tc, the current I flowing through the secondary switch SR2... SR2Upon zero crossing, the second endpoint is determined. In critical current mode, secondary switch SR2 is turned on again, and the current I flowing through secondary switch SR2... SR2 It is negative. At time td, after the second conduction duration T ZVS Then, the secondary switch SR2 is turned off for the second time. At time te, when the primary switch SP2 is turned on again, the next switching cycle of the second switching converter 102 begins.

[0066] The time difference between the second starting point (e.g., time ta) when the primary switch SP2 turns on and the second ending point (e.g., time tc) when the current flowing through the secondary switch SR2 crosses zero is the third time difference T. PS2 The time difference between the second end point (e.g., time tc) and the subsequent second start point (e.g., time te) is the fourth time difference Δt2. The second integrated control circuit 104A is based on the time indication signal IO at the transmission terminal IOA of the first integrated control circuit 103A and the third time difference T. PS2 And the fourth time difference Δt2, during the second conduction duration T of the current switching cycle. ZVS Based on this, adjust the second on-time T of the secondary switch SR2 in the next switching cycle. ZVS So that Δt2 / Δt1 is close to or approximately equal to T PS2 / T PS1 .

[0067] In the specification, terms such as "first" and "second" may be used merely to distinguish one entity or action from another, and do not necessarily imply any relationship or order between these entities or actions. Numerical orders such as "first," "second," and "third" refer only to different individuals among a plurality and do not imply any order or sequence unless specifically defined in the language of the claims. The order of the text in any claim does not imply that the processing steps must be performed in a provisional or logical order according to such order, unless specifically specified in the language of the claims. These processing steps may be interchanged in any order without departing from the scope of the invention, provided that such interchange does not contradict the language of the claims and does not result in logical absurdity.

[0068] The above description and embodiments are merely exemplary and are not intended to limit the scope of the invention. Variations and modifications to the disclosed embodiments are possible, and other feasible alternative embodiments and equivalent variations of elements in the embodiments can be understood by those skilled in the art. Other variations and modifications to the embodiments disclosed in this invention do not depart from the spirit and scope of protection of this invention.

Claims

1. A switching power supply for supplying power to at least one electronic device, comprising: A first switching converter provides a first output voltage to a first output terminal and a second output terminal; The second switching converter provides a second output voltage to the third and fourth output terminals, wherein the second output terminal is coupled to the fourth output terminal; The first integrated control circuit is configured to generate a first control signal to control a first switch of a first switching converter, and has a first transmission terminal for receiving an enable signal, and determines whether to enter a first power supply mode based on the logic state of the enable signal. as well as The second integrated control circuit has a second transmission terminal for receiving an enable signal. Based on the logic state of the enable signal, it determines whether to enter the first power supply mode. The second transmission terminal is also connected to the first transmission terminal of the first integrated control circuit. In the first power supply mode, a second control signal is generated based on the logic state at the first transmission terminal to control the second switch to switch between conduction and shutdown.

2. The switching power supply as claimed in claim 1, wherein the first integrated control circuit and the second integrated control circuit are further configured to enter a first power supply mode when the duration of the enable signal being at a logic low level is greater than a first time threshold.

3. The switching power supply as described in claim 2, wherein: The first integrated control circuit is configured to start timing on the first transition edge after the enable signal enters the first power supply mode, and after timing for a first timing duration, send a first pulse signal at the first transmission terminal to configure the first integrated control circuit as the main control circuit. as well as The second integrated control circuit is configured to start timing on the first transition edge, and after timing for a second duration, send a second pulse signal from the second transmission terminal to configure the second integrated control circuit as a slave control circuit, wherein the first timing duration is not equal to the second timing duration.

4. The switching power supply as claimed in claim 3, wherein in the first power supply mode, the first integrated control circuit sends a time indication signal having a first level and a second level from the first transmission terminal to the second transmission terminal, wherein the first low level width represents the time difference between a first starting point from when the voltage across the first switch reaches a plateau voltage to a first ending point when the current flowing through the first switch crosses zero, and the second level width represents the time difference between the first ending point and the subsequent first starting point.

5. The switching power supply as claimed in claim 2, wherein the first integrated control circuit and the second integrated control circuit are further configured to exit the first power supply mode when the duration of the enable signal being at a logic low level is greater than a second time threshold, wherein the second time threshold is greater than the first time threshold.

6. The switching power supply as claimed in claim 1, further comprising: The first port has a first bus terminal for receiving a first voltage and a first ground terminal coupled to the second output terminal; The second port has a second bus terminal for receiving the second voltage and a second ground terminal coupled to the fourth output terminal; as well as In the first power supply mode, both the first output terminal and the third output terminal are coupled to the first bus terminal, and the first switching converter and the second switching converter together provide the first voltage to the first bus terminal; as well as In the second power supply mode, the third output terminal is decoupled from the first bus terminal and the first output terminal, and instead coupled to the second bus terminal. The first switching converter provides the first output voltage as the first voltage, and the second switching converter provides the second output voltage as the second voltage.

7. The switching power supply as claimed in claim 6, wherein the first power supply mode includes only the first port being coupled to the first electronic device, and the second power supply mode includes the first port being coupled to the first electronic device and the second port being coupled to the second electronic device.

8. The switching power supply as claimed in claim 1, wherein the first switch includes a secondary switch located on the secondary side of the first switching converter, and the second switch includes a secondary switch located on the secondary side of the second switching converter.

9. An integrated control circuit for a switching converter, the switching converter being used to provide an output voltage to a first output terminal and a second output terminal, the integrated control circuit comprising: The transmission terminal receives the enable signal and determines whether to enter the first power supply mode based on the logic state of the enable signal. When entering the first power supply mode and being configured as the master control circuit, a control signal is generated based on a feedback signal related to the output voltage, and a time indication signal is sent to the transmission terminal configured as the slave control circuit. as well as When entering the first power supply mode and being configured as a slave control circuit, a time indication signal is received from the transmission terminal configured as the master control circuit via the transmission terminal, and a control signal is generated based on the time indication signal.

10. The integrated control circuit of claim 9, wherein the first power supply mode is entered when the duration of the enable signal being at a logic low level is greater than a first time threshold.

11. The integrated control circuit of claim 9, wherein the first power supply mode is exited when the duration of the enable signal being at a logic low level is greater than a second time threshold, wherein the second time threshold is greater than the first time threshold.

12. The integrated control circuit as described in claim 11, wherein: The configuration of the integrated control circuit as the main control circuit includes starting the timing on the first transition edge after the enable signal enters the first power supply mode, and after timing for the first timing duration, sending a pulse signal at the transmission terminal; The integrated control circuit is configured to start timing from the first transition edge after the enable signal enters the first power supply mode, and after timing for a second duration, send a pulse signal at the transmission terminal, wherein the first duration is not equal to the second duration.

13. The integrated control circuit of claim 9, wherein the control signal is configured to control a secondary switch on the secondary side of the switching converter.

14. The integrated control circuit as described in claim 13, further comprising: The secondary control circuit provides the primary turn-on enable signal based on the control signal; An isolation circuit has a first input terminal and a first output terminal, wherein the first input terminal receives a primary turn-on enable signal, and the first output terminal provides a synchronization signal that is electrically isolated from the primary turn-on enable signal; as well as The primary control circuit is coupled to the first output of the isolation circuit to receive a synchronization signal, and provides a primary control signal based on the synchronization signal to control the primary switch located on the primary side of the switching converter.

15. The integrated control circuit of claim 14, wherein the time indication signal has: The first level width represents the time difference between the first start point of the primary switch being turned on and the first end point when the current flowing through the secondary switch crosses zero; and The period length represents the time difference between two consecutive first starting points.

16. A control method for a switching power supply, comprising: Using a first integrated control circuit, the first switching converter is controlled to provide a first output voltage to the first output terminal and the second output terminal; The second integrated control circuit is used to control the second switching converter to provide the second output voltage to the third and fourth output terminals; The enable signal is received via the transmission terminal, and the logic state of the enable signal is used to determine whether to enter the first power supply mode. The transmission terminal is used to configure one of the first and second integrated circuits as a master control circuit, and the other of the first and second integrated control circuits as a slave control circuit. When entering the first power supply mode and being configured as the master control circuit, a control signal is generated based on the feedback signal related to the corresponding output voltage, and a timing indication signal is sent to the transmission terminal configured as the slave control circuit. as well as When entering the first power supply mode and being configured as a slave control circuit, a time indication signal is received from the transmission terminal configured as the master control circuit via the transmission terminal, and a control signal is generated based on the logic state of the time indication signal.

17. The control method of claim 16, further comprising: The system enters the first power supply mode when the duration of the enable signal being at a logic low level exceeds a first time threshold.

18. The control method as described in claim 17, wherein: The main control circuit is configured to start timing on the first transition edge after the enable signal enters the first power supply mode, and after timing for the first timing duration, send a pulse signal at the transmission terminal. The configuration includes starting timing from the first transition edge after the enable signal enters the first power supply mode, timing for a second duration, and then sending a pulse signal at the transmission terminal, wherein the first duration is not equal to the second duration.

19. The control method as described in claim 17, further comprising: The system exits the first power supply mode when the duration of the enable signal being at a logic low level exceeds a second time threshold, where the second time threshold is greater than the first time threshold.

20. The control method as described in claim 16, wherein: In the first power supply mode, both the first output terminal and the third output terminal are coupled to the first bus terminal that receives the first voltage, and the first switching converter and the second switching converter together provide the first voltage to the first bus terminal; as well as In the second power supply mode, the third output terminal is decoupled from the first bus terminal and the first output terminal, and instead coupled to the second bus terminal that receives the second voltage. The first switching converter provides the first output voltage as the first voltage, and the second switching converter provides the second output voltage as the second voltage.

21. The control method of claim 16, wherein the control signal is configured to control a secondary switch on the secondary side.

22. The control method of claim 21, wherein the time indication signal has: The low-level width represents the time difference between the first starting point when the voltage across the secondary switch reaches the plateau voltage and the first ending point when the current flowing through the secondary switch crosses zero; and The period length represents the time difference between two consecutive first starting points.

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