Coding method, decoding method and communication device
By introducing a second pre-frozen bit sequence set during the rate matching process of Polar codes, the problem of information bit reliability order changes is solved, thereby improving the stability of Polar codes and communication quality.
Patent Information
- Application Number
- CN202410555507.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-07
- Publication Date
- 2025-11-11
AI Technical Summary
In existing Polar codes, the reliability order of information bits may change during rate matching, leading to a decrease in communication quality.
When the rate matching method is shortened, a second pre-frozen bit sequence number set is introduced. The first pre-frozen bit sequence number set is formed by combining the first bit sequence number set and the second pre-frozen bit sequence number set, and the information bit set is determined to improve the stability and reliability of the polar code.
This improves the performance and communication quality of polar codes, ensures the selection of more reliable information bits for transmission, and enhances the stability and reliability of communication.
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Figure CN120934544A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of wireless communication technology, and in particular to an encoding method, a decoding method, and a communication device. Background Technology
[0002] Polar codes are the first coding scheme that can be rigorously proven to "achieve" the Shannon channel capacity. They have the advantages of good decoding performance and low complexity. They have been selected by the 3rd Generation Partnership Project (3GPP) as the control channel coding scheme for enhanced mobile broadband (eMBB) scenarios.
[0003] Assume the encoding length (mother code length) of the Polar code is N (where N is an integer power of 2), the code length after rate matching is E, and the number of information bits to be encoded is K, meaning the information bits to be encoded include K bits, where K is an integer greater than 1 and less than E. For Polar codes that support rate matching, when the rate matching method is shortening or puncturing, the transmitting device determines K information bits, which are used to carry the K information bits. The process of the transmitting device determining the K information bits is as follows: First, the bits corresponding to the NE bit indices indicated by the first bit sequence set are pre-frozen; then, K bits are selected from the remaining E bits as the K information bits. These K bits are the K most reliable bits among the E bits, and they are used to carry the information bits.
[0004] After determining the K information bits, the transmitting device encodes the K information bits to be encoded based on the K information bits to obtain an encoded bit sequence of length N. Then, based on the first bit sequence set, it performs rate matching on the encoded bit sequence of length N, that is, punches or shortens NE bits to obtain an encoded bit sequence of length E. Finally, it sends the encoded bit sequence of length E to the receiving device.
[0005] The problem with the above method is that the introduction of rate matching may cause changes in the reliability order of information bits. For example, before rate matching, the reliability of the selected K information bits is high, but after rate matching, the reliability of one or more of the K information bits may decrease, resulting in a decrease in the performance of the constructed Polar code and thus affecting the communication quality. Summary of the Invention
[0006] This application provides an encoding method, a decoding method, and a communication device to improve the accuracy of reliability when the rate matching method is shortened, thereby enhancing the performance of polar codes.
[0007] Firstly, embodiments of this application provide an encoding method, which can be executed by a first device. Unless otherwise specified, "first device" in this application can refer to the first device itself (e.g., a terminal device or network device), a component within the first device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the first device. The method includes: determining a rate matching method and a first bit sequence number set based on the number of information bits to be encoded, the code length after rate matching, and the encoding length of the polar code, wherein the encoding length is an integer power of 2; when the rate matching method is shortened, determining a first pre-frozen bit sequence number set based on the encoding length and the first bit sequence number set; wherein the first pre-frozen bit sequence number set is used to indicate pre-frozen bits, and the first pre-frozen bit sequence number set is composed of the first bit sequence number set and a second pre-frozen bit sequence number set, wherein at least one bit in the second pre-frozen bit sequence number set does not appear in the first bit sequence number set. The sequence of bits in a set of bit numbers; based on the reliability sequence of the polar code and the first pre-frozen bit number set, a set of information bits is determined, the set of information bits being used to carry information bits, and the reliability sequence being used to indicate the order of reliability of bits in the polar code; based on the set of information bits, polar coding is performed on the information bits to obtain a first coded bit sequence, the length of the first coded bit sequence being equal to the coding length; based on the first bit number set, rate matching is performed on the first coded bit sequence to obtain a second coded bit sequence, the length of the second coded bit sequence being equal to the code length after rate matching.
[0008] In the above scheme, when the rate matching method is shortened, a second pre-frozen bit sequence set is introduced in addition to the first bit sequence set. The first pre-frozen bit sequence set is formed by the first bit sequence set and the second pre-frozen bit sequence set, and the information bit set is determined based on the first pre-frozen bit sequence set. This method can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0009] Secondly, embodiments of this application provide a decoding method, which can be executed by a second device. Unless otherwise specified, the "second device" in this application can refer to the second device itself (e.g., a terminal device or network device), a component within the second device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the second device. The method includes: acquiring a sequence of symbols to be decoded, the first sequence of symbols to be decoded corresponding to an encoded bit sequence, the encoded bit sequence being generated based on information bits; determining a rate matching method and a first set of bit indices based on the number of information bits, the code length after rate matching, and the encoding length of the polar code, the encoding length being an integer power of 2; when the rate matching method is shortened, determining a first set of pre-frozen bit indices based on the encoding length and the first set of bit indices; wherein the first set of pre-frozen bit indices is used to indicate pre-frozen bits, and the first set of pre-frozen bit indices is formed by the first set of bit indices and a second set of pre-frozen bit indices. The first bit sequence is composed of a set of pre-frozen bit numbers, and at least one bit number in the second pre-frozen bit sequence is not present in the first bit sequence. An information bit set is determined based on the reliability sequence of the polar code and the first pre-frozen bit sequence. This information bit set carries information bits, and the reliability sequence indicates the order of reliability of the bits in the polar code. Based on the first bit sequence, the first sequence to be decoded is rate-matched to obtain a second sequence to be decoded, the length of which is the encoding length. Based on the information bit set, the second sequence to be decoded is polar-decoded to obtain the information bits.
[0010] In the above scheme, when the rate matching method is shortened, a second pre-frozen bit sequence set is introduced in addition to the first bit sequence set. The first pre-frozen bit sequence set is formed by the first bit sequence set and the second pre-frozen bit sequence set, and the information bit set is determined based on the first pre-frozen bit sequence set. This method can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0011] Based on the first or second aspect mentioned above, there are the following different implementation methods:
[0012] In one possible implementation, the second pre-frozen bit sequence number set includes one bit sequence number, which is N / 2, where N is the encoding length.
[0013] Based on this implementation method, in addition to the first bit sequence set, a simple 1-bit pre-frozen bit is also enabled, which is simple to implement and can improve the performance stability of polar codes.
[0014] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequences. The X bits are numbered as follows: Wherein, N is the encoding length.
[0015] Based on this implementation method, the stability of polar code performance can be further improved.
[0016] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequence numbers, where X is an integer greater than or equal to 1, and the size of X is related to at least one of the number of information bits, the code length after rate matching, the encoding length, or the code rate; wherein, the code rate is the ratio of the number of information bits to the code length after rate matching.
[0017] Based on this implementation method, the size of the second pre-frozen bit sequence set can be flexibly configured, which can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0018] In one possible implementation, the size of X increases with the number of information bits, increases with the increase of the code length after rate matching, increases with the increase of the encoding length, and increases with the increase of the code rate.
[0019] Based on this implementation method, the size of the second pre-frozen bit sequence set can be flexibly configured, which can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0020] In one possible implementation, when the code length after rate matching is less than a first threshold, the size of X increases as the code length after rate matching increases; when the code length after rate matching is greater than the first threshold, the size of X decreases as the code length after rate matching increases.
[0021] Based on this implementation method, the size of the second pre-frozen bit sequence set can be flexibly configured, which can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0022] In one possible implementation, the bit indices in the second pre-frozen bit index set are row-dependent with respect to the polarization coding matrix.
[0023] Based on this implementation method, the stability of polar code performance can be further improved.
[0024] In one possible implementation, the bit numbers in the second pre-frozen bit number set are the bit numbers corresponding to the X rows with the smallest row weight in the polarization coding matrix.
[0025] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequence.
[0026] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the reliability of the bits corresponding to the bit numbers in the reliability sequence other than the first bit number set.
[0027] Based on this implementation method, it is helpful to select the bit sequence number corresponding to the bit with lower reliability to form the second pre-frozen bit sequence number set, and then select the bit sequence number corresponding to the bit with higher reliability to form the information bit set, thereby improving the accuracy of polar code reliability and thus improving polar code performance and communication quality.
[0028] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the pre-stored sequence.
[0029] Based on this implementation method, the design space can be expanded and the stability of polar code performance can be further improved.
[0030] In one possible implementation, the X bit numbers are consecutive.
[0031] Based on this implementation method, the bit numbers in the second pre-frozen bit sequence number set are consecutive, thus making the implementation simple.
[0032] In one possible implementation, the N bit indices corresponding to the N bit sub-channels of the polar code are equally divided into a first sub-block and a second sub-block. The first sub-block consists of the first N / 2 bits of the N bit indices, and the second sub-block consists of the last N / 2 bits of the N bit indices. The N bits are equal to the coding length. The second pre-frozen bit indices set includes X bit indices, where X is a positive integer, and all X bit indices are located within the second sub-block.
[0033] Based on this implementation method, the implementation can be simplified and the stability of polar code performance can be further improved.
[0034] In one possible implementation, the X bit numbers are the first X bit numbers in the bit numbers of the second sub-block.
[0035] In one possible implementation, X equals M1, where M1 is the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block.
[0036] This implementation method can reduce the complexity of implementation.
[0037] In one possible implementation, X equals λ is greater than 0 and less than 1, and M1 is either the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block. This indicates rounding down to the nearest integer.
[0038] Based on this implementation method, the number of bit numbers in the second pre-frozen bit number set can be determined using only one parameter λ. The configuration is simple and can improve the performance and stability of polar codes.
[0039] In one possible implementation, the N bit numbers corresponding to the N bit sub-channels of the polar code are divided into M sub-blocks, where M is an integer greater than 1 and N is equal to the coding length; the second pre-frozen bit number set includes X bit numbers, where X is an integer greater than 1, and the X bit numbers are located in at least two of the M sub-blocks.
[0040] This implementation method facilitates parallel processing.
[0041] In one possible implementation method, Wherein, the X bit sequence numbers are located within the M sub-blocks, and the i-th sub-block of the M sub-blocks contains P from the X bit sequence numbers. i A bit sequence number, P i Let i be a non-negative integer, i = 1, 2, ..., M.
[0042] In one possible implementation, the P i The bit sequence numbers are consecutive.
[0043] In one possible implementation, the size of X is related to at least one of the following: the number of information bits in the M sub-blocks, the code length after rate matching of the M sub-blocks, the coding length of the M sub-blocks, or the code rate of the M sub-blocks.
[0044] Based on this implementation method, the size of the second pre-frozen bit sequence set can be flexibly configured, which can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0045] In one possible implementation, the size of X increases as the number of bits in the M sub-blocks increases, as the code length after rate matching of the M sub-blocks increases, as the coding length of the M sub-blocks increases, and as the code rate of the M sub-blocks increases.
[0046] In one possible implementation, the bit numbers in the second pre-frozen bit number set are row-correlated with the rows in the polarization coding matrix that correspond to the M sub-blocks respectively.
[0047] Based on this implementation method, the stability of polar code performance can be further improved.
[0048] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the pre-stored sequences corresponding to the M sub-blocks respectively.
[0049] Based on this implementation method, the design space can be expanded and the stability of polar code performance can be further improved.
[0050] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the order of the bit numbers within the M sub-blocks.
[0051] Based on this implementation method, the implementation can be simplified and the stability of polar code performance can be further improved.
[0052] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequences corresponding to the M sub-blocks, and the reliability sequences corresponding to the M sub-blocks are used to indicate the order of reliability between bits corresponding to different bit numbers in each of the M sub-blocks.
[0053] Based on this implementation method, it is helpful to select the bit sequence number corresponding to the bit with lower reliability to form the second pre-frozen bit sequence number set, and then select the bit sequence number corresponding to the bit with higher reliability to form the information bit set, thereby improving the accuracy of polar code reliability and thus improving polar code performance and communication quality.
[0054] Thirdly, embodiments of this application provide a communication device that has the function of implementing any of the methods described in the first aspect. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the aforementioned function.
[0055] Fourthly, embodiments of this application provide a communication device that has the function of implementing any of the methods described in the second aspect above. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the aforementioned function.
[0056] Fifthly, embodiments of this application provide a communication device, including units or means for performing each step of any of the implementation methods in the first to second aspects described above.
[0057] Sixthly, embodiments of this application provide a communication device, including a processor and an interface circuit. The processor is configured to communicate with other devices via the interface circuit and execute any of the implementation methods described in the first to second aspects. The processor may include one or more devices.
[0058] Optionally, the communication device may further include a memory for storing computer instructions, the memory being coupled to a processor that executes the computer instructions stored in the memory to cause the device to perform any of the implementation methods of the first to second aspects described above.
[0059] In a seventh aspect, embodiments of this application also provide a computer program product, which includes a computer program or instructions that, when executed by a communication device, cause any of the implementation methods in the first to second aspects described above to be executed.
[0060] Eighthly, embodiments of this application also provide a computer-readable storage medium storing instructions that, when executed on a communication device, cause any implementation method in the first aspect to be performed.
[0061] Ninthly, this application provides a chip (or chip system) including a processor coupled to a memory storing a computer program; the processor is configured to invoke part or all of the computer program in the memory, causing any implementation method of the first to second aspects described above to be executed.
[0062] In a tenth aspect, this application provides a communication system, including a first device for performing any implementation of the first aspect described above, and a second device for performing any implementation of the second aspect described above. Attached Figure Description
[0063] Figure 1 A schematic diagram of the architecture of a communication system used in an embodiment of this application;
[0064] Figure 2 This is a schematic diagram of the compilation and decoding process provided for an embodiment of this application;
[0065] Figure 3 An 8×8 polarization transformation matrix is provided in this embodiment;
[0066] Figure 4 A flowchart illustrating an encoding method provided in an embodiment of this application;
[0067] Figure 5 A flowchart illustrating a decoding method provided in an embodiment of this application;
[0068] Figure 6 This is a schematic diagram of the structure of the communication device provided in the embodiments of this application;
[0069] Figure 7 A schematic diagram of another communication device provided for an embodiment of this application;
[0070] Figure 8 A schematic diagram of another communication device provided in the embodiments of this application;
[0071] Figure 9 A schematic diagram of a chip system provided in an embodiment of this application;
[0072] Figure 10 This is a schematic diagram of another chip system provided in an embodiment of this application. Detailed Implementation
[0073] The technical solutions of this application can be applied to various communication systems, such as Long Term Evolution (LTE) systems and 5th Generation (5G) mobile communication systems (e.g., New Radio (NR) systems). The technical solutions provided in this application can also be applied to future communication systems, such as 6th Generation (6G) mobile communication systems. Communication systems can also be Bluetooth communication systems, Wireless Local Area Network (WLAN) communication systems, Wireless Fidelity (WiFi) communication systems, Internet of Things (IoT) communication systems, etc.
[0074] Figure 1This is a schematic diagram of the architecture of a communication system used in an embodiment of this application. The communication system includes network devices and terminal devices, wherein... Figure 1 The example uses one network device and two terminal devices (terminal device A and terminal device B). When the network device is the sender, terminal device A or terminal device B is the receiver; when terminal device A or terminal device B is the sender, the network device is the receiver.
[0075] The aforementioned terminal devices can also be referred to as terminals, user equipment (UE), mobile stations, mobile terminals, etc. Terminal devices can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), the Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, smart cities, etc. Terminal devices can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicles, drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, in-vehicle terminals, IoT terminals, wearable devices, etc. The embodiments of this application do not limit the specific technologies or device forms used in the terminal devices.
[0076] Network equipment can also be called access network (AN) equipment or radio access network (RAN) equipment. It can be a base station, an evolved NodeB (eNodeB), a transmitter and receiver point (TRP), an integrated access and backhauling (IAB) node, a next-generation NodeB (gNB) in 5G mobile communication systems, a base station in 6G mobile communication systems, a base station in other future mobile communication systems, an access node in a WiFi system, a home base station (e.g., home evolved nodeB, or home nodeB, HNB), an access point (AP) in a wireless fidelity (WIFI) system, a wireless relay node, a wireless backhaul node, etc. It can also be a module or unit that performs some of the functions of a base station; for example, it can be a central unit (CU) or a distributed unit (DU). The CU here performs the functions of the radio resource control protocol and packet data convergence protocol (PDCP) of the base station, and can also perform the functions of the service data adaptation protocol (SDAP). The DU performs the functions of the radio link control layer and medium access control (MAC) layer of the base station, and can also perform some or all of the physical layer functions. For specific descriptions of the above protocol layers, please refer to the relevant technical specifications of the 3rd Generation Partnership Project (3GPP). Network equipment can also be non-terrestrial base stations, such as low earth orbit (LEO) / very low earth orbit (VLEO) satellites, high-attitude platform stations (HAPS), and terminals that perform network equipment functions in V2X, D2D, and machine-to-machine (M2M) communications.
[0077] In the embodiments of this application, the functions of the network device can be executed by modules (such as chips) within the network device, or by a control subsystem that includes network device functions. This control subsystem, including network device functions, can be a control center in application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities. Similarly, the functions of the terminal device can be executed by modules (such as chips or modems) within the terminal device, or by a device that includes terminal device functions.
[0078] Still with Figure 1 Taking the communication system shown as an example, to ensure the reliability of communication between devices, information can be encoded and decoded. (See also...) Figure 2 The encoding and decoding process shown is as follows: the source signal at the transmitting end is sequentially encoded by source, encoded by channel, and modulated to output a modulated symbol. After receiving the modulated symbol, the receiving end sequentially demodulates, decodes by channel, and decodes by source to obtain the destination signal. The receiving end can obtain useful information based on the destination signal.
[0079] To facilitate understanding by those skilled in the art, some terms used in the embodiments of this application are explained below.
[0080] I. Polar code
[0081] Polar codes are the first coding scheme that can be rigorously proven to "achieve" Shannon channel capacity. They have the advantages of good decoding performance and low complexity, and have been selected by 3GPP as the control channel coding scheme for the eMBB scenario.
[0082] II. Polar code encoding
[0083] Polar codes are linear block codes, where the polarization transformation matrix is G. N The polarization transformation matrix can also be denoted as G, and it can also be called the encoding matrix or the generator matrix. The encoding process is as follows: in It is a binary row vector, that is, a binary sequence of length N, where N is the code length of the polar code; G N It is an N×N matrix, and It can be defined as the Kronecker product of log₂ N matrices F₂.
[0084] During the encoding process of polar codes, A portion of the bits are used to carry information; these information-carrying bits are called information bits, and the set of information bit indices (also called bit sequence numbers) of these bits is denoted as A. The remaining bits are set to fixed values agreed upon beforehand by the receiver and transmitter; this set is called fixed bits or frozen bits, and its set of bit indices is the complement of A. c This indicates that the polar code encoding process is equivalent to: Here, G N (A) is G N G is a submatrix obtained by considering the rows corresponding to the bit indices in set A. N (A C ) is G N The middle is composed of set A c The submatrix obtained by the rows corresponding to the bit indices in μ. A for The set of information bits in the data is K in number; for The set of frozen bits in the polar code, numbered (NK), is a known set of bits. These frozen bits are usually set to 0, but can be arbitrarily set as long as the receiver and transmitter agree beforehand. The encoded output of the polar code can be simplified to: Here μ A for The set of information bits in μ A Let G be a row vector of length K, i.e., |A| = K, where |A| represents the number of elements in set A, K is the block size, or K is the number of information bits, or K is the size of the set of information bits. N (A) is matrix G N G is a submatrix obtained by considering the rows corresponding to the bit indices in set A. N (A) is a K×N matrix.
[0085] The construction process of polar codes is essentially the selection process of set A, which determines the performance of the polar codes. The construction process typically involves determining N polarization channels based on the code length N, each corresponding to one of the N rows of the polarization transformation matrix. The channel reliability of each polarization channel is calculated. The bit indices (i.e., bit sequences) of the top K polarization channels with the highest reliability are used as elements of set A. The bit indices corresponding to the remaining (NK) polarization channels are used as the bit index set A of the frozen bits. c The elements. Set A determines the position of the information bits. c This determines the position of the frozen bits.
[0086] Figure 3 An 8×8 polarization transformation matrix is shown. Figure 3 This example illustrates a specific encoding process, where the left side can be understood as the side to be encoded, with the bits on the left denoted by u, and the right side can be understood as the encoding side (or codeword side), with the bits on the right denoted by x. The process from left to right is the process by which the transmitting end encodes the sequence of bits to be encoded. The information bits to be encoded are represented by the sequence u(0, 0, 0, 0, 0, 0, 1, 1). After a polarization transformation matrix, the encoded bits are represented by the sequence x(0, 1, 0, 1, 0, 1, 0, 1). Mapping x to modulation symbols allows transmission through channel W. Bits corresponding to high channel reliability are used to map information bits, while bits corresponding to low channel reliability are used to map frozen bits. For example... Figure 3 As shown, {u0, u1, u2, u4} are frozen bits, i.e., the positions of the frozen bits, and {u3, u5, u6, u7} are information bits, i.e., the positions of the information bits. In this embodiment of the application, the information bits are also called information bits. The frozen bits are also called frozen positions.
[0087] See Figure 3 In the encoding process, two adjacent columns constitute a coding layer. The left column of bits represents the input bits of the coding layer, and the right column represents the output bits. For example, in the leftmost coding layer, the input bit sequence is (0, 0, 0, 0, 0, 0, 1, 1), and the output bit sequence is (0, 0, 0, 0, 0, 0, 0, 1). The operation symbols in the middle of the coding layer... This represents the XOR operation, specifically... express The bits in the current row and A single XOR operation between the bits in the row. The bits on the right represent the result of the operation. For example, in the leftmost coding layer, the first input bit (value 0) and the second input bit (value 0) are processed... The operation yields the first output bit (with a value of 0).
[0088] The construction process of Polar codes accomplishes two objectives: 1) When the Polar code has a non-coded length, determining the rate matching method; where the coded length is an integer power of 2 (e.g., 2^2). n ), where the non-encoded length is a non-integer power of 2. 2) Determine the information bits and frozen bits. In this embodiment, the non-encoded length is also called the non-mother code length.
[0089] The following sections will introduce them separately.
[0090] 1) Rate Matching. In practical applications, the required length of the Polar code may be non-coded. In this case, it is necessary to remove some bits from the polar code without transmitting them or to retransmit some bits. This process is usually called rate matching. The following describes the rate matching methods in three different cases.
[0091] ① Punch: Punching refers to directly creating holes in certain positions of a Polar code of the encoded length without transmitting the data. This method generates Polar code bit sequences of arbitrary length. On the decoding side, since there is no information at the corresponding "punch" positions, the log likelihood ratio (LLR) of the corresponding bit is set to 0.
[0092] ②Shorten: Shortening is another common rate-matching method. This method involves designing the Polar code so that certain positions in the encoded bit sequence are fixed values, thus eliminating the need for transmission. On the decoding side, since the corresponding "shortened" positions are known at the receiver (usually 0), the LLR of the corresponding bit is set to infinity.
[0093] ③ Repetition: "Repetition" refers to obtaining a longer Polar code bit sequence by repeatedly sending parts of the codeword bits.
[0094] 2) Determination of Information Bits and Frozen Bits. Bits with higher reliability are designated as information bits (data), and bits with lower reliability are designated as frozen bits. In 5G NR, the frozen bits and information bits of the Polar code are determined based on the reliability sequence. Taking an 8-bit Polar code as an example, assuming the reliability sequence is [0 1 24 3 5 6 7], the bits with reliability from highest to lowest are: bit number 7, bit number 6, bit number 5, bit number 3, bit number 4, bit number 2, bit number 1, and bit number 0. Here, a bit can be understood as a sub-channel. The bit number can be understood as the index or identifier of the bit. When constructing a Polar code with a coding length of 8 and an information length of 4, the bits corresponding to bit number 7, bit number 6, bit number 5, and bit number 3 are selected from the end to the beginning as information bits, while the bits corresponding to bit number 4, bit number 2, bit number 1, and bit number 0 are selected as frozen bits.
[0095] Assume the Polar code has a coding length of N (where N is an integer power of 2), a code length of E after rate matching, and K information bits to be encoded, meaning the information bits to be encoded consist of K bits, where K is an integer greater than 1 and less than E. For Polar codes that support rate matching, when the rate matching method is shortening or puncturing, the transmitting device determines K information bits, which are used to carry the K information bits. The process of the transmitting device determining the K information bits is as follows: First, the bits corresponding to the NE bit indices indicated by the first bit sequence set are pre-frozen; then, K bits are selected from the remaining E bits as the K information bits. These K bits are the K most reliable bits among the E bits, and they are used to carry the information bits.
[0096] After determining the K information bits, the transmitting device encodes the K information bits to be encoded based on the K information bits to obtain an encoded bit sequence of length N. Then, based on the first bit sequence set, it performs rate matching on the encoded bit sequence of length N, that is, punches or shortens NE bits to obtain an encoded bit sequence of length E. Finally, it sends the encoded bit sequence of length E to the receiving device.
[0097] The problem with the above method is that the introduction of rate matching may cause changes in the reliability order of information bits. For example, before rate matching, the reliability of the selected K information bits is high, but after rate matching, the reliability of one or more of the K information bits may decrease, resulting in a decrease in the performance of the constructed Polar code and thus affecting the communication quality.
[0098] To address this problem, this application provides corresponding embodiments, which are described in detail below.
[0099] Figure 4 This is a flowchart illustrating an encoding method provided in an embodiment of this application. The method is executed by a first device. Unless otherwise specified, the "first device" in this application may refer to the first device itself (e.g., a terminal device or a network device), a component within the first device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the first device.
[0100] The method includes the following steps:
[0101] Step 401: The first device determines the rate matching method and the first bit sequence number set (represented by Q1) based on the number of information bits to be encoded (represented by K), the code length after rate matching (represented by E), and the encoding length of the polar code (represented by N).
[0102] The information bits to be encoded consist of K bits, where K is an integer greater than 1. These K bits can be all payload bits, or they can contain both payload bits and parity bits. The sequence of these information bits to be encoded is also called the information bit sequence, therefore the number of information bits to be encoded is the length of the information bit sequence.
[0103] In this application, the encoding length N of the polar code is an integer power of 2. In this embodiment, the encoding length is also called the mother code length. This application does not limit the method for determining the encoding length; however, two exemplary implementation methods are given below.
[0104] Method 1, simplified calculation method:
[0105] The code length N is the smallest power of 2 greater than or equal to the rate-matched code length E. For example, if E = 252, then N = 256. Or, if E = 5, then N = 8.
[0106] The code length after rate matching is also called the code length after rate matching. The size of the code length E after rate matching is determined by factors such as the available resource size and the number of information bits K to be encoded.
[0107] Method 2, NR calculation method:
[0108] ① Calculate n1. If K / E < 9 / 16 and E < (1 + 1 / 8) * N0 / 2, then otherwise,
[0109] Where K is the number of information bits to be encoded, and E is the code length after rate matching. N0 is the smallest integer power of 2 greater than or equal to the code length E after rate matching. For example, if E = 252, then N0 = 256. Or, if E = 5, then N0 = 8.
[0110] ② Calculate n². Where, R min R represents the minimum supported bitrate. min =1 / 8. This indicates rounding up to the nearest integer.
[0111] ③ Calculate n. Where, n = max{min{n1, n2, n... max}, n min}, where the minimum code length is Maximum encoding length is n min =5, n during uplink transmission max =10, n during downlink transmission max =5.
[0112] ④ Determine the encoding length N based on n, where N = 2 n .
[0113] In this embodiment, the first bit sequence number set Q1 is used to indicate pre-frozen bits and rate-matching bits. The pre-frozen bits indicated by the first bit sequence number set Q1 refer to bits not used for information transmission indicated before encoding. The rate-matching bits indicated by the first bit sequence number set Q1 refer to bits used for rate matching after encoding. The frozen bits indicated by the first bit sequence number set Q1 and the rate-matching bits indicated by the first bit sequence number set Q1 can be completely different, partially the same, or completely identical. The first bit sequence number set can also be called the rate-matching bit sequence number set or rate-matching bit set, etc.
[0114] For example, the process of the second device determining the rate matching method is as follows: when E>N, the rate matching method is selected as repetition; when E<=N and K / E<=7 / 16, the rate matching method is selected as perforation; when E<=N and K / E>7 / 16, the rate matching method is selected as shortening.
[0115] The ratio of K to E (i.e., K / E) is called the bitrate R, that is, bitrate R = K / E.
[0116] For example, the process of determining the first bit sequence set Q1 is as follows: the bit sequence numbers 0, 1, 2, ..., N-1 are divided into 32 sub-blocks, and then the sub-blocks are interleaved to obtain the interleaved bit sequence vector. This application does not limit the specific implementation method of the sub-block interleaving. Taking N=64 as an example, the bit sequence vector after interleaving is [0, 1, 2, 3, 4, 5, 8, 9, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 32, 33, 18, 19, 34, 35, 20, 21, 36, 37, 22, 23, 38, 39, 24, 25, 40, 41, 26, 27, 42, 43, 28, 29, 44, 45, 30, 31, 46, 47, 48, 49, 50, 51, 52, 53, 56, 57, 54, 55, 58, 59, 60, 61, 62, 63]. Wherein, when the rate matching method is shortening, the first device selects NE numbers from the interleaved bit sequence vector from back to front to form the first bit sequence set Q1; when the rate matching method is puncturing, the first device selects NE numbers from the interleaved bit sequence vector from front to back to form the first bit sequence set Q1. Taking N=64 and E=42 as an example, when the rate matching method is puncturing, Q1=[0,1,2,3,4,5,8,9,6,7,10,11,12,13,14,15,16,17,32,33,18,19]; when the rate matching method is shortening, Q1=[44,45,30,31,46,47,48,49,50,51,52,53,56,57,54,55,58,59,60,61,62,63].
[0117] In addition, common Polar code rate matching methods such as natural ordering and bit reversal can also be used, which will not be elaborated further.
[0118] Step 402: When the rate matching method is shortening, the first device determines the first pre-frozen bit sequence set (denoted by Q3) based on the encoding length and the first bit sequence set.
[0119] The first pre-frozen bit sequence number set Q3 is used to indicate the pre-frozen bit bits or bit sub-channels, wherein the frozen bit bits are not used to transmit information bits.
[0120] The first pre-frozen bit sequence set Q3 consists of the first bit sequence set Q1 and the second pre-frozen bit sequence set Q2. The second pre-frozen bit sequence set Q2 contains at least one bit sequence that does not appear in the first bit sequence set Q1. For example, the first bit sequence set Q1 and the second pre-frozen bit sequence set Q2 have no intersection. Alternatively, the first bit sequence set Q1 and the second pre-frozen bit sequence set Q2 have an intersection, and the second pre-frozen bit sequence set Q2 also includes other bit sequences besides those in the intersection. Therefore, the number of bit sequences in the first pre-frozen bit sequence set Q3 is greater than the number of bit sequences in the first bit sequence set Q1.
[0121] The second pre-freezed bit sequence set Q2 is also called the additional pre-freezed bit sequence set, extra pre-freezed bit sequence set, additional pre-freezed bit set, extra pre-freezed bit set, pre-freezed set, or pre-freezed position set, etc.
[0122] Step 403: The first device determines the information bit set based on the reliability sequence of the polar code (represented by S) and the first pre-frozen bit sequence number set.
[0123] The reliability sequence S is used to indicate the order of reliability of bits in the polar code. The reliability sequence contains the order of N bit indices, which correspond one-to-one with the N bits (i.e., the N bit sub-channels), where N is the coding length.
[0124] This set of information bits is also called the information bit set, information position set, or information bit set. This set of information bits is used to carry information bits.
[0125] When the number of information bits to be encoded is equal to K, the information bit set includes K information bits, which are used to carry K information bits.
[0126] For example, the first device removes the first pre-frozen bit sequence number set Q3 from the reliability sequence S to obtain the reliability sequence S1, and then reads K bits from the reliability sequence S1 from back to front to form an information bit set. These K bits are the K bits with the highest reliability in the reliability sequence S1.
[0127] The following example illustrates this. Assume N = 64, E = 42, K = 18, and S is [0, 1, 2, 4, 8, 16, 32, 3, 5, 9, 6, 17, 10, 18, 12, 33, 20, 34, 24, 36, 7, 11, 40, 19, 13, 48, 14, 21, 35, 26, 37, 25, 22, 38, 41, 28, 42, 49, 44, 50, 15, 52, 23, 56, 27]. 39, 29, 43, 30, 45, 51, 46, 53, 54, 57, 58, 60, 31, 47, 55, 59, 61, 62, 63], the first bit sequence set Q1 is [0, 1, 2, 3, 4, 5, 8, 9, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 32, 33, 18, 19], the second pre-frozen bit sequence set Q2 is [20, 2 Given [1, 24, 29, 34, 36, 40, 48], then S1 = [35, 26, 37, 25, 22, 38, 41, 28, 42, 49, 44, 50, 52, 23, 56, 27, 39, 43, 30, 45, 51, 46, 53, 54, 57, 58, 60, 31, 47, 55, 59, 61, 62, 63]. Therefore, the first pre-frozen bit sequence number set Q3 If the information bits are [0, 1, 2, 3, 4, 5, 8, 9, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 32, 33, 18, 19, 20, 21, 24, 29, 34, 36, 40, 48], then the information bit set is [39, 43, 30, 45, 51, 46, 53, 54, 57, 58, 60, 31, 47, 55, 59, 61, 62, 63].
[0128] Step 404: The first device performs polar coding on the information bit sequence according to the information bit set to obtain the first coded bit sequence.
[0129] The length of the first encoded bit sequence is equal to the encoded length N.
[0130] Step 405: The first device performs rate matching on the first encoded bit sequence according to the first bit sequence number set to obtain the second encoded bit sequence.
[0131] In this sequence, the length of the information bit sequence is K, and the length of the second encoded bit sequence is E, where E is less than N. Here, E is the code length after rate matching, therefore, the second encoded bit sequence refers to the encoded bit sequence after rate matching.
[0132] For example, the first device removes NE bits from a first encoded bit sequence of length N based on a first bit sequence set Q1 to obtain a second encoded bit sequence of length E.
[0133] In the above solution, when the rate matching method is shortening, outside the first set of bit sequence numbers, a second set of pre-frozen bit sequence numbers is introduced. The first set of pre-frozen bit sequence numbers is composed of the first set of bit sequence numbers and the second set of pre-frozen bit sequence numbers, and the information bit set is determined according to the first set of pre-frozen bit sequence numbers. This method can improve the stability of polar code construction, enhance the accuracy of the reliability of polar codes, help select more reliable information bits for transmitting information, and thus improve the performance of polar codes and communication quality.
[0134] In an embodiment of the present application, the number of bit positions in the second set of pre-frozen bit sequence numbers Q2 is denoted as X. Three different implementation methods for determining the second set of pre-frozen bit sequence numbers Q2 are given below. For each implementation method, the implementation methods for the distribution, quantity, and position of the bit positions in the second set of pre-frozen bit sequence numbers Q2 are respectively described.
[0135] Implementation method 1: Do not partition the N bit sequence numbers of the Polar code.
[0136] 1) Distribution of bit sequence numbers in the second set of pre-frozen bit sequence numbers Q2
[0137] In one implementation method, the X bit sequence numbers in Q2 are consecutive, that is, the bit sub-channels corresponding to the X bit sequence numbers in Q2 are consecutive.
[0138] In one implementation method, the X bit sequence numbers in Q2 are not consecutive, that is, the bit sub-channels corresponding to the X bit sequence numbers in Q2 are not consecutive.
[0139] In one implementation method, when the rate matching method is shortening, if the coding length N < N1 (this N1 is also called the coding length threshold), then Q2 is an empty set, and if the coding length N ≥ N1, then Q2 is a non-empty set. For example, the threshold is 32, 33, 64, or 128, etc. Based on this implementation method, if the coding length N is greater than or equal to the coding length threshold, an additional set of pre-frozen bit sequence numbers (i.e., the second set of pre-frozen bit sequence numbers Q2) is enabled outside the first set of bit sequence numbers Q1, which can improve the performance stability of the Polar code.
[0140] 2) Quantity of bit sequence numbers in the second set of pre-frozen bit sequence numbers Q2 (denoted by X, X is an integer greater than or equal to 1)
[0141] In an implementation method, the number X of bit serial numbers in Q2 is related to one or more of the coding length N of the polar code, the length K of the information bit sequence to be coded, the coded length E after rate matching of the polar code, or the code rate R of the polar code. Where R = K / E. For example, X is proportional to N, so the larger N is, the larger X is, that is, the size of X increases as N increases. For another example, X is proportional to E, so the larger E is, the larger X is, that is, the size of X increases as E increases. For another example, X is proportional to K, so the larger K is, the larger X is, that is, the size of X increases as K increases. For another example, X is proportional to R, so the larger R is, the larger X is, that is, the size of X increases as R increases.
[0142] In an implementation method, when the coded length E after rate matching is less than E1 (this E1 is also called the coding length threshold or the first threshold), the number X of bit serial numbers in Q2 is proportional to E, that is, the size of X increases as E increases; when E > E1, the number X of bit serial numbers in Q2 is inversely proportional to E, that is, the size of X decreases as E increases. Therefore, when E = E1, the number X of bit serial numbers in Q2 is the largest. Exemplarily, E1 can be equal to 5N / 8, 3N / 4N or 7N / 8, etc. Optionally, when E = N / 2 or N, the number X of bit serial numbers in Q2 is the smallest.
[0143] In an implementation method, Q2 contains one bit serial number, that is, X = 1, and this bit serial number is N / 2, where N is the coding length. Based on this implementation method, outside the first set of bit serial numbers, a simple 1-bit pre-frozen bit position is also enabled, which is simple and can improve the performance stability of the Polar code.
[0144] In another case, Q2 contains X bit serial numbers, and the X bit serial numbers are where N is the coding length.
[0145] 3) The bit positions corresponding to the bit serial numbers in the second set of pre-frozen bit serial numbers Q2
[0146] In one implementation, the bit positions corresponding to the bit indices in the second pre-frozen bit index set Q2 are related to the row weight of the polar coding matrix. Row weight refers to the number of non-zero elements in a row of the polar coding matrix. For example, if a row contains 5 non-zero elements, its row weight is 5. The polar coding matrix is an N*N matrix. Each row of the polar coding matrix corresponds to a bit sub-channel, so N rows correspond to N bit sub-channels. Each bit sub-channel has a corresponding bit index, so N bit sub-channels correspond to N bit indices. For example, the first device preferentially selects the bit index of the bit sub-channel corresponding to the row with the lighter row weight as the pre-frozen bit index. If two rows have the same row weight, the bit index of the bit sub-channel corresponding to the later row is preferentially selected as the pre-frozen bit index. Therefore, the bit indices in the second pre-frozen bit index set Q2 are the bit indices corresponding to the X rows with the smallest row weight in the polar coding matrix. For example, assuming the Polar code has a coding length of 8, and the row weights in the polar coding matrix are 1, 2, 2, 4, 2, 4, 4, 8 from front to back. If the number of bits in the second pre-frozen bit sequence set Q2 is X = 1, then the bit sequence number of the 1st sub-channel is selected as the pre-frozen bit sequence number. If the number of bits in the second pre-frozen bit sequence set Q2 is X = 2, then the bit sequences of the 1st and 5th sub-channels in the Polar code are selected as the pre-frozen bit sequence numbers. If the number of bits in the second pre-frozen bit sequence set Q2 is X = 3, then the bit sequences of the 1st, 5th, and 3rd sub-channels in the Polar code are selected as the pre-frozen bit sequence numbers.
[0147] In another implementation, the bit positions corresponding to the bit numbers in the second pre-frozen bit number set Q2 are related to the reliability sequence corresponding to the N bit sub-channels. For example, the first device preferentially selects bits with lower reliability as pre-frozen bits. For instance, assuming the Polar code has a coding length of 8 and a reliability sequence of [1, 2, 3, 5, 4, 6, 7, 8], that is, the bit numbers are arranged from highest to lowest reliability as follows: 8, 7, 6, 4, 5, 3, 2, 1. If the number of bit numbers in the second pre-frozen bit number set Q2 is X = 1, then the bit number of the first bit sub-channel in the Polar code is selected as the pre-frozen bit number. If the number of bit numbers in the second pre-frozen bit number set Q2 is X = 4, then the bit numbers of the first, second, third, and fifth bit sub-channels in the Polar code are selected as the pre-frozen bit numbers.
[0148] In another implementation, the bit positions corresponding to the bit numbers in the second pre-frozen bit sequence set Q2 are related to the reliability of the bit positions corresponding to the bit numbers outside the first bit sequence set in the reliability sequence. That is, first, the bit numbers in the first bit sequence set are removed from the reliability sequence, and then the X bit numbers with the lowest reliability are selected from the remaining bit numbers to form the second pre-frozen bit sequence set Q2. Here, the reliability of a bit number refers to the reliability of the bit position corresponding to that bit number.
[0149] In another implementation, the bit positions corresponding to the bit numbers in the second pre-frozen bit sequence set Q2 are related to a pre-stored sequence, which is a predefined order of bit numbers, and the predefinition method is not limited. For example, assuming the Polar code encoding length is 8, and the pre-stored sequence is [1, 5, 2, 6, 3, 7, 4, 8], if the number of bit numbers in the second pre-frozen bit sequence set Q2 is X = 1, then the bit number of the first sub-channel of the Polar code is selected as the pre-frozen bit number. If the number of bit numbers in the second pre-frozen bit sequence set Q2 is X = 4, then the bit numbers of the 1st, 5th, 2nd, and 6th sub-channels of the Polar code are selected as the pre-frozen bit numbers. Again, assuming the Polar code encoding length is 8, and the pre-stored sequence is [1, 5, 3, 2, 7, 6, 4, 8], if the number of bit numbers in the second pre-frozen bit sequence set Q2 is X = 1, then the bit number of the first sub-channel of the Polar code is selected as the pre-frozen bit number. If the number of bit numbers in the second pre-frozen bit number set Q2 is X = 4, then the bit numbers of the 1st, 5th, 3rd, and 2nd sub-channels in the polar code are selected as the pre-frozen bit numbers.
[0150] Method 2 involves dividing the N bit sequence numbers corresponding to the N bit sub-channels of the Polar code into two sub-blocks. The first sub-block, consisting of the first N / 2 bit sequence numbers, is denoted as the V code, and the second sub-block, consisting of the last N / 2 bit sequence numbers, is denoted as the U code. All bit sequence numbers in the second pre-frozen bit sequence number set Q2 are located within the U code, and N is the encoding length.
[0151] 1) Distribution of bit indices and corresponding bit positions in the second pre-frozen bit index set Q2
[0152] In one implementation, the second pre-frozen bit sequence set Q2 is composed of the first X bits of the U code. In this method, the pre-frozen bit sequences in Q2 are consecutive, thus simplifying implementation.
[0153] In one implementation method, the second pre-frozen bit sequence set Q2 is composed of the first X bits from the U code excluding the first bit sequence set. Specifically, the bits belonging to the first bit sequence set are first removed from the U code, and then the first X bits are selected from the remaining bits to form the second pre-frozen bit sequence set Q2. In this method, the pre-frozen bit sequences in Q2 are consecutive, thus simplifying implementation.
[0154] In one implementation, the second pre-frozen bit sequence set Q2 is composed of any X bits from the U code. This method has a large design space and therefore good performance. Optionally, the first device can determine X bits from the U code as pre-frozen bit sequences based on a pre-given sequence. For example, assuming the length of the U code in Polar is 8, and the given sequence is [1, 5, 3, 2, 7, 6, 4, 8]. If the number of bits in the second pre-frozen bit sequence set Q2 is X = 1, then the first bit in the U code is selected as the pre-frozen bit sequence. If the number of bits in the second pre-frozen bit sequence set Q2 is X = 4, then the first, fifth, third, and second bits in the U code are selected as the pre-frozen bit sequences.
[0155] In one implementation, the second pre-frozen bit sequence set Q2 is composed of any X bits from the bit sequence sets in the U code, excluding the first bit sequence set. This method has a larger design space and therefore better performance.
[0156] 2) The number of bit numbers in the second pre-frozen bit number set Q2 (denoted by X)
[0157] In one implementation, X = M1, where M1 is the number of bit numbers in the U code excluding the first bit sequence set, or the number of bit numbers in the U code.
[0158] In another implementation method, Where M1 is the number of bit numbers in the U code excluding the first bit sequence set, or the number of bit numbers in the U code, and λ is greater than 0 and less than 1, for example, λ = 15 / 16 or 31 / 32. This indicates rounding down. Based on this method, the number of bit numbers in the second pre-frozen bit number set Q2 can be determined using only one parameter λ. This configuration is simple and can improve the performance and stability of polar codes.
[0159] In another implementation method, Where M1 is the number of bit numbers in the U code excluding the first bit sequence set, or the number of bit numbers in the U code, and λ is greater than 0 and less than 1, for example, λ = 15 / 16 or 31 / 32. This indicates rounding up. Based on this method, the number of bit numbers in the second pre-frozen bit number set Q2 can be determined using only one parameter λ. This method is simple to configure and can improve the performance and stability of polar codes.
[0160] In another implementation, X equals the result of rounding λM1, where M1 is the number of bit numbers in the U code excluding the first bit sequence set, or the number of bit numbers in the U code itself, and λ is greater than 0 and less than 1, for example, λ = 15 / 16 or 31 / 32. Based on this method, the number of bit numbers in the second pre-frozen bit sequence set Q2 can be determined using only one parameter λ, which is simple to configure and can improve the performance and stability of polar codes.
[0161] It should be noted that the above explanation is based on the example that all the bit numbers in the second pre-frozen bit number set Q2 are located within the U code. In practical applications, all the bit numbers in the second pre-frozen bit number set Q2 can also be located within the V code.
[0162] The third implementation method divides the N bit sequence numbers corresponding to the N bit sub-channels of the Polar code into M (M is an integer greater than 1) sub-blocks, and the bit sequence numbers in the second pre-frozen bit sequence number set Q2 are located in at least two of the M sub-blocks.
[0163] 1) Distribution of bit indices in the second pre-frozen bit index set Q2
[0164] In one implementation, the bit indices in the second pre-frozen bit index set Q2 are distributed across M sub-blocks of the Polar code, wherein the i-th sub-block of these M sub-blocks contains the P bits from the second pre-frozen bit index set Q2. i There are 1, 2, ..., M bit indices, i = 1, 2, ..., M. Let X represent the number of bit indices in the second pre-frozen bit indices set Q2. Among them, P i The value of can be 0, 1, 2, ..., etc. For example, assuming N = 64 and M = 4, the 64 bits corresponding to the 64 sub-channels of the Polar code are divided into 4 sub-blocks, each containing 16 bits. For instance, if X = 6, P1 = 0, P2 = 1, P3 = 3, and P4 = 2, it means that the second pre-frozen bit set Q2 contains 6 bits. Of these 6 bits, 1 bit is located in the second sub-block, 3 bits are located in the third sub-block, and 2 bits are located in the fourth sub-block.
[0165] For example, P in the second pre-frozen bit sequence number set Q2 contained in the i-th sub-block iThe bit numbers are consecutive, where i iterates from 1 to M. That is, the bit numbers in the second pre-frozen bit number set Q2 contained in each sub-block are all consecutive.
[0166] For example, the number of bit numbers in the second pre-frozen bit number set Q2 contained in each sub-block is the same.
[0167] 2) The number of bit numbers in the second pre-frozen bit number set Q2 (denoted by X)
[0168] The number of bit numbers X in the second pre-frozen bit number set Q2 is related to at least one of the following: the encoding length of each sub-block in the M sub-blocks, the number of information bits in each sub-block (i.e., the number of bit numbers of the information bits to be encoded in each of the M sub-blocks), the code length after rate matching of each sub-block, or the code rate of each sub-block.
[0169] For example, X is directly proportional to the coding length of each sub-block; therefore, the larger the coding length of each sub-block, the larger X becomes. In other words, the size of X increases as the coding length of the M sub-blocks increases. Similarly, X is directly proportional to the code length after rate matching of each sub-block; therefore, the larger the code length after rate matching of each sub-block, the larger X becomes. In other words, the size of X increases as the code length after rate matching of the M sub-blocks increases. Furthermore, X is directly proportional to the number of information bits in each sub-block; therefore, the larger the number of information bits in each sub-block, the larger X becomes. In other words, the size of X increases as the number of bit indices of the information bits within the M sub-blocks increases. Finally, X is directly proportional to the code rate of each sub-block; therefore, the larger the code rate of each sub-block, the larger X becomes. In other words, the size of X increases as the code rate of the M sub-blocks increases.
[0170] 3) The bit positions corresponding to the bit indices in the second pre-frozen bit index set Q2
[0171] In one implementation, the bit positions corresponding to the bit numbers in the second pre-frozen bit number set Q2 are correlated with the row weight of the rows corresponding to each sub-block in the polar coding matrix. For example, for a row corresponding to a certain sub-block in the polar coding matrix, the first device preferentially selects the bit number of the sub-channel corresponding to the row with the lighter row weight as the pre-frozen bit number. If two rows have the same row weight, the bit number of the sub-channel corresponding to the later row is preferentially selected as the pre-frozen bit number. For example, assuming the Polar code has a coding length of 8 bits, the 8 bit indices corresponding to the 8 sub-channels of the Polar code are equally divided into two sub-blocks. Each sub-block contains 4 bit indices. The bit indices of the first sub-block are 0, 1, 2, 3, corresponding to rows 1-4 of the polar coding matrix, and the row weights of these rows are 1, 2, 2, 4 from beginning to end. The bit indices of the second sub-block are 4, 5, 6, 7, corresponding to rows 5-8 of the polar coding matrix, and the row weights of these rows are 2, 4, 4, 8 from beginning to end. If one bit in the second pre-frozen bit indices set Q2 is located in the first sub-block, then the first bit in the first sub-block is selected as the pre-frozen bit indices, i.e., bit indices 0 are selected. If two bits from the second pre-frozen bit set Q2 are located in the first sub-block, then the first and third bits within the first sub-block are selected as pre-frozen bit numbers, i.e., bits 0 and 2 are selected. If one bit from the second pre-frozen bit set Q2 is located in the second sub-block, then the first bit within the second sub-block is selected as the pre-frozen bit number, i.e., bit 4 is selected. If two bits from the second pre-frozen bit set Q2 are located in the second sub-block, then the first and third bits within the second sub-block are selected as pre-frozen bit numbers, i.e., bits 4 and 6 are selected.
[0172] In another implementation, the bit positions corresponding to the bit positions in the second pre-frozen bit sequence set Q2 are related to the sequence numbers of the bit sub-channels in each sub-block. Within each sub-block, pre-freezing occurs sequentially from front to back, meaning the earlier bit sequences are frozen first. For example, assuming the Polar code has an encoding length of 8 bits, the 8 bit sequences corresponding to the 8 bit sub-channels of the Polar code are equally divided into two sub-blocks, each containing 4 bit sequences. The bit sequences corresponding to the first sub-block are 0, 1, 2, and 3; the bit sequences corresponding to the second sub-block are 4, 5, 6, and 7. If a bit sequence number in the second pre-frozen bit sequence set Q2 is located in the first sub-block, then the first bit sequence number within the first sub-block is selected as the pre-frozen bit sequence number, i.e., bit sequence number 0 is selected. If two bits from the second pre-frozen bit set Q2 are located in the first sub-block, then the first and second bits within the first sub-block are selected as pre-frozen bit numbers, i.e., bits 0 and 1 are selected. If one bit from the second pre-frozen bit set Q2 is located in the second sub-block, then the first bit within the second sub-block is selected as the pre-frozen bit number, i.e., bit number 4 is selected. If two bits from the second pre-frozen bit set Q2 are located in the second sub-block, then the first and second bits within the second sub-block are selected as pre-frozen bit numbers, i.e., bits 4 and 5 are selected.
[0173] In another implementation, the bit positions corresponding to the bit numbers in the second pre-frozen bit number set Q2 are related to the pre-stored sequence corresponding to each sub-block. For example, assuming the Polar code has an encoding length of 8, the 8 bit numbers corresponding to the 8 sub-channels of the Polar code are equally divided into 2 sub-blocks, each containing 4 bit numbers. Among them, the bit numbers corresponding to the first sub-block are 0, 1, 2, 3 in sequence, and the corresponding pre-stored sequence is [1, 3, 2, 4]; the bit numbers corresponding to the second sub-block are 4, 5, 6, 7 in sequence, and the corresponding pre-stored sequence is [7, 4, 5, 6].
[0174] above Figure 4 In one embodiment, when the rate matching method is shortened, the first device, in addition to determining the first bit sequence number set, also determines an additional pre-frozen bit sequence number set (i.e., a second pre-frozen bit sequence number set). In another implementation, the above... Figure 4The method of the embodiment can also be applied to any rate matching method. That is, when rate matching is required, the rate matching method can be shortening, puncturing, or repetition. In this case, in addition to determining the first bit sequence number set, the first device also determines an additional pre-frozen bit sequence number set. The determination of the additional pre-frozen bit sequence number set (i.e., the second pre-frozen bit sequence number set) can be referred to the foregoing description. The method for determining whether rate matching is required can be: when the target code length (i.e., the encoded length after encoding the information bits) is not equal to the encoded length of the polar code (i.e., an integer power of 2), then rate matching is required; when the target code length is equal to the encoded length of the polar code, then rate matching is not required. Optionally, when the rate matching method is repetition, the pre-frozen bit sequence number set can also be an empty set.
[0175] Figure 5 This is a flowchart illustrating a decoding method provided in an embodiment of this application. The method is executed by a second device. Unless otherwise specified, the "second device" in this application may refer to the second device itself (e.g., a terminal device or a network device), a component within the second device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the second device.
[0176] The method includes the following steps:
[0177] Step 501: The second device acquires the first sequence of symbols to be decoded.
[0178] The first sequence of symbols to be decoded corresponds to an encoded bit sequence, which is generated based on information bits. The information bits consist of K bits, where K is an integer greater than 1. The K bits in the information bits can be all payload bits, or they can contain both payload bits and parity bits.
[0179] In one implementation method, the second device obtains the first sequence of symbols to be decoded. Specifically, the second device may receive physical signals through an air interface and obtain the first sequence of symbols to be decoded by parsing the physical signals; or the second device may obtain the first sequence of symbols to be decoded locally through an internal interface.
[0180] Step 502: The second device determines the rate matching method and the first bit sequence number set based on the number of information bits, the code length after rate matching, and the encoding length of the polar code.
[0181] The first bit sequence set is used to indicate the pre-frozen bits and the rate-matched bits.
[0182] The encoding length is an integer power of 2.
[0183] Step 503: When the rate matching method is shortened, the second device determines the first pre-frozen bit sequence set based on the encoding length and the first bit sequence set.
[0184] The first pre-frozen bit sequence number set is used to indicate the pre-frozen bits. The first pre-frozen bit sequence number set is composed of a first bit sequence number set and a second pre-frozen bit sequence number set. The second pre-frozen bit sequence number set contains at least one bit sequence number that does not appear in the first bit sequence number set.
[0185] Step 504: The second device determines the information bit set based on the reliability sequence of the polar code and the first pre-frozen bit sequence number set.
[0186] The information bit set is used to carry information bits, and the reliability sequence is used to indicate the order of the reliability of the bits in the polar code.
[0187] Steps 502 to 504 above are the same as those described above. Figure 4 Steps 401 to 403 in the embodiments are the same, and the corresponding specific implementation methods are also the same. Please refer to the foregoing description, and they will not be repeated here.
[0188] Step 505: The second device performs de-rate matching on the first sequence of symbols to be decoded according to the first set of bit numbers to obtain the second sequence of symbols to be decoded.
[0189] The length of the second sequence of symbols to be decoded is the encoding length of the polar code.
[0190] It should be noted that step 505 can be performed as any step after step 502 and before step 506.
[0191] Step 506: The second device performs polarization decoding on the second sequence of symbols to be decoded based on the information bit set to obtain the information bit sequence.
[0192] In the above scheme, when the rate matching method is shortened, a second pre-frozen bit sequence set is introduced in addition to the first bit sequence set. The first pre-frozen bit sequence set is formed by the first bit sequence set and the second pre-frozen bit sequence set, and the information bit set is determined based on the first pre-frozen bit sequence set. This method can improve the stability of polar code construction, improve the accuracy of polar code reliability, and help select more reliable information bits for information transmission, thereby improving polar code performance and communication quality.
[0193] The above Figure 4 Implementation examples and Figure 5The embodiments can be implemented independently or in combination. In the case of a combined implementation, after step 405 above, the first device can send a second coded bit sequence to the second device. The second device receives a physical signal generated based on the second coded bit sequence, parses the physical signal, and obtains a first sequence of symbols to be decoded, which corresponds to the second coded bit sequence sent by the first device. Then the second device... Figure 5 In one embodiment, the first sequence of symbols to be decoded is rate-matched according to the first set of bit numbers to obtain a second sequence of symbols to be decoded. Then, the second sequence of symbols to be decoded is decoded to obtain information bits, which contain K bits.
[0194] It is understood that, in order to achieve the functions in the above embodiments, the first device or the second device includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.
[0195] The following, combined with Figures 6 to 10 This application provides a detailed description of the communication device provided in its embodiments. The embodiments of this application can divide the communication device into functional modules based on the above method examples. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware, software, or a combination of both. The module division in this application is illustrative and represents only one logical functional division; other division methods may exist in actual implementation. The following description uses the example of dividing the device into functional modules corresponding to each function.
[0196] Figure 6 The diagram illustrates the possible structures of communication devices provided in embodiments of this application. These communication devices can be used to implement the functions of the first or second device in the above method embodiments, and thus also achieve the beneficial effects of the above method embodiments. In the embodiments of this application, the communication device can be either the first or second device.
[0197] Figure 6 The communication device 600 shown includes a processing unit 610 and a transceiver unit 620. The communication device 600 is used to implement the functions of the first device or the second device in the above method embodiments.
[0198] When the communication device 600 is used to implement the function of the first device in the above method embodiment, the processing unit 610 is used to determine the rate matching method and the first bit sequence number set according to the number of information bits to be encoded, the code length after rate matching, and the encoding length of the polar code, wherein the encoding length is an integer power of 2; when the rate matching method is shortening, a first pre-frozen bit sequence number set is determined according to the encoding length and the first bit sequence number set; wherein the first pre-frozen bit sequence number set is used to indicate the pre-frozen bits, and the first pre-frozen bit sequence number set is composed of the first bit sequence number set and the second pre-frozen bit sequence number set. The set contains at least one bit sequence number that does not appear in the first bit sequence number set; based on the reliability sequence of the polar code and the first pre-frozen bit sequence number set, an information bit set is determined, the information bit set being used to carry information bits, and the reliability sequence being used to indicate the order of reliability of bits in the polar code; based on the information bit set, the information bits are polar-coded to obtain a first coded bit sequence, the length of the first coded bit sequence being equal to the code length; based on the first bit sequence number set, the first coded bit sequence is rate-matched to obtain a second coded bit sequence, the length of the second coded bit sequence being equal to the code length after rate matching. The transceiver unit 620 transmits the coded bit sequence.
[0199] In one possible implementation, the second pre-frozen bit sequence number set includes one bit sequence number, which is N / 2, where N is the encoding length.
[0200] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequences. The X bits are numbered as follows: Wherein, N is the encoding length.
[0201] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequence numbers, where X is an integer greater than or equal to 1, and the size of X is related to at least one of the number of information bits, the code length after rate matching, the encoding length, or the code rate; wherein, the code rate is the ratio of the number of information bits to the code length after rate matching.
[0202] In one possible implementation, the size of X increases with the number of information bits, increases with the increase of the code length after rate matching, increases with the increase of the encoding length, and increases with the increase of the code rate.
[0203] In one possible implementation, when the code length after rate matching is less than a first threshold, the size of X increases as the code length after rate matching increases; when the code length after rate matching is greater than the first threshold, the size of X decreases as the code length after rate matching increases.
[0204] In one possible implementation, the bit indices in the second pre-frozen bit index set are row-dependent with respect to the polarization coding matrix.
[0205] In one possible implementation, the bit numbers in the second pre-frozen bit number set are the bit numbers corresponding to the X rows with the smallest row weight in the polarization coding matrix.
[0206] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequence.
[0207] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the reliability of the bits corresponding to the bit numbers in the reliability sequence other than the first bit number set.
[0208] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the pre-stored sequence.
[0209] In one possible implementation, the X bit numbers are consecutive.
[0210] In one possible implementation, the N bit indices corresponding to the N bit sub-channels of the polar code are equally divided into a first sub-block and a second sub-block. The first sub-block consists of the first N / 2 bits of the N bit indices, and the second sub-block consists of the last N / 2 bits of the N bit indices. The N bits are equal to the coding length. The second pre-frozen bit indices set includes X bit indices, where X is a positive integer, and all X bit indices are located within the second sub-block.
[0211] In one possible implementation, the X bit numbers are the first X bit numbers in the bit numbers of the second sub-block.
[0212] In one possible implementation, X equals M1, where M1 is the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block.
[0213] In one possible implementation, X equals λ is greater than 0 and less than 1, and M1 is either the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block. This indicates rounding down to the nearest integer.
[0214] In one possible implementation, the N bit numbers corresponding to the N bit sub-channels of the polar code are divided into M sub-blocks, where M is an integer greater than 1 and N is equal to the coding length; the second pre-frozen bit number set includes X bit numbers, where X is an integer greater than 1, and the X bit numbers are located in at least two of the M sub-blocks.
[0215] In one possible implementation method, Wherein, the X bit sequence numbers are located within the M sub-blocks, and the i-th sub-block of the M sub-blocks contains P from the X bit sequence numbers. i A bit sequence number, P i Let i be a non-negative integer, i = 1, 2, ..., M.
[0216] In one possible implementation, the P i The bit sequence numbers are consecutive.
[0217] In one possible implementation, the size of X is related to at least one of the following: the number of information bits in the M sub-blocks, the code length after rate matching of the M sub-blocks, the coding length of the M sub-blocks, or the code rate of the M sub-blocks.
[0218] In one possible implementation, the size of X increases as the number of bits in the M sub-blocks increases, as the code length after rate matching of the M sub-blocks increases, as the coding length of the M sub-blocks increases, and as the code rate of the M sub-blocks increases.
[0219] In one possible implementation, the bit numbers in the second pre-frozen bit number set are row-correlated with the rows in the polarization coding matrix that correspond to the M sub-blocks respectively.
[0220] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the pre-stored sequences corresponding to the M sub-blocks respectively.
[0221] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the order of the bit numbers within the M sub-blocks.
[0222] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequences corresponding to the M sub-blocks, and the reliability sequences corresponding to the M sub-blocks are used to indicate the order of reliability between bits corresponding to different bit numbers in each of the M sub-blocks.
[0223] When the communication device 600 is used to implement the function of the second device in the above method embodiment, the transceiver unit 620 is used to acquire a first sequence of symbols to be decoded, the first sequence of symbols to be decoded corresponding to an encoded bit sequence, the encoded bit sequence being generated based on information bits; the processing unit 610 is used to determine a rate matching method and a first bit sequence number set based on the number of information bits, the code length after rate matching, and the encoding length of the polar code, the encoding length being an integer power of 2; when the rate matching method is shortening, a first pre-frozen bit sequence number set is determined based on the encoding length and the first bit sequence number set; wherein, the first pre-frozen bit sequence number set is used to indicate pre-frozen bits, the first pre-frozen bit sequence number... The set consists of a first bit sequence set and a second pre-frozen bit sequence set, wherein at least one bit sequence number in the second pre-frozen bit sequence set does not appear in the first bit sequence set; an information bit set is determined based on the reliability sequence of the polar code and the first pre-frozen bit sequence set, the information bit set being used to carry information bits, and the reliability sequence being used to indicate the order of reliability of bits in the polar code; based on the first bit sequence set, the first sequence of symbols to be decoded is subjected to de-rate matching to obtain a second sequence of symbols to be decoded, the length of the second sequence of symbols to be decoded being the encoding length; based on the information bit set, the second sequence of symbols to be decoded is subjected to polar decoding to obtain the information bits.
[0224] In one possible implementation, the second pre-frozen bit sequence number set includes one bit sequence number, which is N / 2, where N is the encoding length.
[0225] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequences. The X bits are numbered as follows: Wherein, N is the encoding length.
[0226] In one possible implementation, the second pre-frozen bit sequence number set includes X bit sequence numbers, where X is an integer greater than or equal to 1, and the size of X is related to at least one of the number of information bits, the code length after rate matching, the encoding length, or the code rate; wherein, the code rate is the ratio of the number of information bits to the code length after rate matching.
[0227] In one possible implementation, the size of X increases with the number of information bits, increases with the increase of the code length after rate matching, increases with the increase of the encoding length, and increases with the increase of the code rate.
[0228] In one possible implementation, when the code length after rate matching is less than a first threshold, the size of X increases as the code length after rate matching increases; when the code length after rate matching is greater than the first threshold, the size of X decreases as the code length after rate matching increases.
[0229] In one possible implementation, the bit indices in the second pre-frozen bit index set are row-dependent with respect to the polarization coding matrix.
[0230] In one possible implementation, the bit numbers in the second pre-frozen bit number set are the bit numbers corresponding to the X rows with the smallest row weight in the polarization coding matrix.
[0231] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequence.
[0232] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the reliability of the bits corresponding to the bit numbers in the reliability sequence other than the first bit number set.
[0233] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the pre-stored sequence.
[0234] In one possible implementation, the X bit numbers are consecutive.
[0235] In one possible implementation, the N bit indices corresponding to the N bit sub-channels of the polar code are equally divided into a first sub-block and a second sub-block. The first sub-block consists of the first N / 2 bits of the N bit indices, and the second sub-block consists of the last N / 2 bits of the N bit indices. The N bits are equal to the coding length. The second pre-frozen bit indices set includes X bit indices, where X is a positive integer, and all X bit indices are located within the second sub-block.
[0236] In one possible implementation, the X bit numbers are the first X bit numbers in the bit numbers of the second sub-block.
[0237] In one possible implementation, X equals M1, where M1 is the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block.
[0238] In one possible implementation, X equals λ is greater than 0 and less than 1, and M1 is either the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block. This indicates rounding down to the nearest integer.
[0239] In one possible implementation, the N bit numbers corresponding to the N bit sub-channels of the polar code are divided into M sub-blocks, where M is an integer greater than 1 and N is equal to the coding length; the second pre-frozen bit number set includes X bit numbers, where X is an integer greater than 1, and the X bit numbers are located in at least two of the M sub-blocks.
[0240] In one possible implementation method, Wherein, the X bit sequence numbers are located within the M sub-blocks, and the i-th sub-block of the M sub-blocks contains P from the X bit sequence numbers. i A bit sequence number, P i Let i be a non-negative integer, i = 1, 2, ..., M.
[0241] In one possible implementation, the P i The bit sequence numbers are consecutive.
[0242] In one possible implementation, the size of X is related to at least one of the following: the number of information bits in the M sub-blocks, the code length after rate matching of the M sub-blocks, the coding length of the M sub-blocks, or the code rate of the M sub-blocks.
[0243] In one possible implementation, the size of X increases as the number of bits in the M sub-blocks increases, as the code length after rate matching of the M sub-blocks increases, as the coding length of the M sub-blocks increases, and as the code rate of the M sub-blocks increases.
[0244] In one possible implementation, the bit numbers in the second pre-frozen bit number set are row-correlated with the rows in the polarization coding matrix that correspond to the M sub-blocks respectively.
[0245] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the pre-stored sequences corresponding to the M sub-blocks respectively.
[0246] In one possible implementation, the bit numbers in the second pre-frozen bit number set are related to the order of the bit numbers within the M sub-blocks.
[0247] In one possible implementation, the bit numbers in the second pre-frozen bit number set are associated with the reliability sequences corresponding to the M sub-blocks, and the reliability sequences corresponding to the M sub-blocks are used to indicate the order of reliability between bits corresponding to different bit numbers in each of the M sub-blocks.
[0248] For a more detailed description of the processing unit 610 and the transceiver unit 620, please refer directly to the relevant descriptions in the above method embodiments, which will not be repeated here.
[0249] Figure 7 This is an exemplary block diagram of a communication device provided in an embodiment of this application. For example, the communication device 10 may include a chip system 110, a memory 120, a bus 130, a power management module 140, or a transceiver 150, etc.
[0250] The chip system 110 can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed through integrated logic circuits in the hardware of the chip system 110 or through software instructions.
[0251] As an example and not a limitation, chip system 110 may include circuitry or chips responsible for signal processing (such as a modem chip, also known as a baseband chip, or a system-on-chip (SoC) chip or system-in-package (SIP) chip containing a modem core).
[0252] Optionally, the chip system 110 may also include a memory (such as a cache) for storing instructions and data. In some embodiments, the memory in the chip system 110 is a cache memory. This memory can store instructions or data that the chip system 110 has just used or that are used repeatedly. If the chip system 110 needs to use the instruction or data again, it can directly retrieve it from the memory. This avoids repeated accesses, reduces the waiting time of the chip system 110, and thus improves the efficiency of the system.
[0253] In some embodiments, the chip system 110 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a SIM interface, and / or a USB interface, etc.
[0254] Memory 120 may include random access memory (RAM) and read-only memory (ROM). Memory 120 may store computer-readable, computer-executable code, including instructions that, when executed, cause the processor to perform the various functions described in this application.
[0255] Optionally, the code may include instructions for implementing various aspects of the embodiments of this application. The code may be stored in a non-transitory computer-readable medium such as system memory or other types of memory. In some cases, the code may not be directly executable by the chip system 110, but may enable a computer (e.g., at compile and execution time) to perform the functions described in this application. In some cases, memory 120 may in particular contain a basic I / O system that controls basic hardware or software operations, such as interaction with peripheral components or devices.
[0256] For example, the chip system 110 executes various functional applications and data processing of the communication device 10 by running instructions stored in the memory 120. For instance, when the communication device 10 transfers files with other devices (which may also be terminal devices or network devices), the chip system 110 of the communication device 10 can call the computer-executable program code stored in the memory 120 to implement the encoding or decoding methods provided in the embodiments of this application.
[0257] In addition, the memory 120 can be integrated into the chip system 110 or independent of the chip system 110.
[0258] Bus 130 may be a universal serial bus (USB) used to support communication between the various parts of the communication device 10.
[0259] The power management module 140 is used to receive charging input from the charger. Optionally, the power management module 140 can also supply power to the communication device 10 while charging it (e.g., the battery module of the communication device 10). By way of example and not limitation, the power management module 140 can also supply power to other devices besides the communication device 10.
[0260] Transceiver 150 can communicate bidirectionally via one or more antennas, wired links, or wireless links. For example, transceiver 150 can represent a wireless transceiver and can communicate bidirectionally with another wireless transceiver. Transceiver 150 may also include a modem for modulating packets and providing the modulated packets to the antenna for transmission, and for demodulating packets received from the antenna. Transceiver 150 may include a receiver and a transmitter, the receiver performing the function of receiving information and the transmitter performing the function of transmitting information.
[0261] In some cases, a wireless device may include a single antenna. However, in other cases, a device may have more than one antenna, such as... Figure 7 Antennas 1 and 2 shown may be capable of simultaneously transmitting or receiving multiple wireless transmissions. Exemplarily, antennas 1 and 2 are used to transmit and receive electromagnetic wave signals. Each antenna in communication device 10 can be used to cover one or more communication frequency bands. Different antennas can also be multiplexed to improve antenna utilization. For example, antenna 1 can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antennas can be used in conjunction with a tuning switch. Communication device 10 can transfer files to other devices via wireless communication functions.
[0262] In one design, the communication device 10 may correspond to the first device in the above method embodiments. The device 10 may implement the steps or processes performed by the first device in the above method embodiments, wherein the transceiver 150 may be used to perform the transmission and reception related operations of the first device in the above method embodiments; and the chip system 110 may be used to perform the processing related operations of the first device in the above method embodiments.
[0263] In another design, the communication device 10 may correspond to the second device in the above method embodiments. The device 10 may implement the steps or processes performed by the second device in the above method embodiments, wherein the transceiver 150 may be used to perform the transmission and reception related operations of the second device in the above method embodiments; and the chip system 110 may be used to perform the processing related operations of the second device in the above method embodiments.
[0264] Under this design, the communication device 10 may include, for example: Figure 7 The short-range communication module 164, sensor 161, display 162, or camera 163 shown are examples of such modules.
[0265] The short-range communication module 164 may include modules that support short-range communication, such as Wi-Fi and Bluetooth.
[0266] Sensor 161 may include pressure sensors, gyroscope sensors, barometric pressure sensors, magnetic sensors, accelerometers, distance sensors, proximity sensors, fingerprint sensors, temperature sensors, touch sensors, ambient light sensors, bone conduction sensors, etc.
[0267] Display 162 is used to display images, videos, etc. The display includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a miniature LED, a microLED, a quantum dot light-emitting diode (QLED), etc. For example, in this embodiment, the display can be used to display the interface required by the communication device 10. Exemplarily, the communication device 10 implements display functions through a GPU, a display, and an application processor. The GPU is a microprocessor for image processing, connected to the display and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The chip system 110 may include one or more GPUs that execute program instructions to generate or modify display information.
[0268] Camera 163 is used to acquire images, videos, etc.
[0269] Understandable, Figure 7 The structure shown does not constitute a specific limitation on the communication device 10. In some embodiments, the communication device 10 may also include a larger... Figure 7 This could mean having more or fewer components, combining some components, separating some components, or having different component arrangements. Or, Figure 7 Some of the components shown can be implemented in hardware, software, or a combination of software and hardware; the communication device 10 can be in... Figure 7 The components were added or removed based on the given structure.
[0270] Figure 8 This is a schematic block diagram of a communication device provided in an embodiment of this application. The communication device 20 may include a baseband unit 210, which can communicate with external devices via a cellular radio frequency (RF) transceiver 220 (e.g., if the communication device 20 is a terminal device, the baseband unit 210 can communicate with network devices via the cellular RF transceiver 220; or, if the communication device 20 is a network device, the baseband unit 210 can communicate with terminal devices and / or core network devices via the cellular RF transceiver 220).
[0271] The baseband unit 210 may include a receiving unit 201, a management unit 202, and a transmitting unit 203. The management unit 202 includes one or more sub-units. For example, in... Figure 8 In the example, the management unit 202 includes a first subunit and a second subunit. The first subunit is configured to: determine a rate matching method and a first bit sequence set based on the number of information bits to be encoded, the code length after rate matching, and the encoding length of the polar code, wherein the encoding length is an integer power of 2; if the rate matching method is shortening, determine a first pre-frozen bit sequence set based on the encoding length and the first bit sequence set; wherein the first pre-frozen bit sequence set indicates pre-frozen bits, and the first pre-frozen bit sequence set is composed of the first bit sequence set and a second pre-frozen bit sequence set, wherein the second pre-frozen bit sequence set contains at least one bit sequence number not present in the first bit sequence set; determine an information bit set based on the reliability sequence of the polar code and the first pre-frozen bit sequence set, wherein the information bit set carries information bits, and the reliability sequence indicates the order of reliability of bits in the polar code; and perform polar encoding on the information bits based on the information bit set to obtain a first encoded bit sequence, wherein the length of the first encoded bit sequence is equal to the encoding length. The second subunit is used to perform rate matching on the first coded bit sequence according to the first bit sequence number set to obtain a second coded bit sequence, the length of which is equal to the code length after rate matching. The units within the management unit 202 can be stored in a computer-readable medium / memory and / or configured as hardware within the baseband unit 210. The receiving unit 201 and the transmitting unit 203 can be referred to as transceiver units.
[0272] Baseband unit 210 may include computer-readable medium / memory. Baseband unit 210 is responsible for general processing, including the execution of software stored on the computer-readable medium / memory. When executed by baseband unit 210, the software causes baseband unit 210 to perform the various functions described above. The computer-readable medium / memory may also be used to store data manipulated by baseband unit 210 during software execution.
[0273] Figure 9 This is a schematic block diagram of a chip system provided in an embodiment of this application. The chip system 30 includes, but is not limited to, a modem chip, also known as a baseband chip, or a system-on-chip (SoC) chip or a system-in-package (SIP) chip containing a modem core.
[0274] The chip system (or processing system) includes a processor 310, a memory 320, and an input / output interface 330.
[0275] The processor 310 can be a processing circuit in a chip system (including at least one processor, such as...). Figure 9 (Shown as processor 1 and processor 2, etc.). Processor 310 can be coupled to memory 320, calling instructions in memory 320, so that the chip system can implement the methods and functions of the various embodiments of this application. Input / output interface 330 can be an input / output circuit in the chip system, outputting information processed by the chip system, or inputting data or signaling information to be processed into the chip system for processing.
[0276] As one approach, the chip system is used to implement the operations performed by the first or second device in the various method embodiments described above.
[0277] For example, processor 310 is used to implement the processing-related operations performed by the first device or the second device in the above method embodiments, as described in the foregoing embodiments; input / output interface 330 is used to implement the sending and / or receiving-related operations performed by the first device or the second device in the above method embodiments, as described in the foregoing embodiments.
[0278] Figure 10 This is a schematic block diagram of a chip system provided in an embodiment of this application. The chip system 40 (or processing system) includes an input / output interface 410 and logic circuitry 420. The input / output interface 410 can be an input / output circuit within the chip system, outputting processed information or inputting data or signaling information to be processed into the chip system for processing; details can be found in the descriptions of the foregoing embodiments. The logic circuitry 420 is used to execute the aforementioned communication method; details can also be found in the descriptions of the foregoing embodiments.
[0279] As one approach, the chip system is used to implement the operations performed by the first or second device in the various method embodiments described above.
[0280] For example, logic circuit 420 is used to implement processing-related operations performed by the first device or the second device in the above method embodiments; input / output interface 410 is used to implement sending and / or receiving-related operations performed by the first device or the second device in the above method embodiments.
[0281] This application also provides a computer-readable storage medium storing computer instructions for implementing the methods executed by the first device and / or the second device in the above-described method embodiments.
[0282] For example, when the computer program is executed by a computer, it enables the computer to implement the methods performed by the first device and / or the second device in the various embodiments of the above methods.
[0283] This application also provides a computer program product comprising instructions which, when executed by a computer, implement the methods performed by the first device and / or the second device in the above-described method embodiments.
[0284] This application also provides a communication system, including the aforementioned first device and second device.
[0285] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.
[0286] The method steps in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, portable hard disks, compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Furthermore, the ASIC can reside in a first device or a second device. Alternatively, the processor and storage medium can exist as discrete components in an access network device or terminal.
[0287] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. A computer program is a set of instructions that directs each step of an action of an electronic computer or other device with message processing capabilities. It is typically written in a programming language and runs on a target architecture. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed, in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video optical disc; or it can be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium can be volatile or non-volatile, or it can include both types of storage media.
[0288] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.
[0289] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. In the textual description of this application, the character " / " generally indicates an "or" relationship between the preceding and following related objects; in the formulas of this application, the character " / " indicates a "division" relationship between the preceding and following related objects.
[0290] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers described above does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.
Claims
1. An encoding method, characterized in that, include: Based on the number of information bits to be encoded, the code length after rate matching, and the encoding length of the polar code, the rate matching method and the first bit sequence set are determined, wherein the encoding length is an integer power of 2. When the rate matching method is shortened, a first pre-frozen bit sequence set is determined based on the encoding length and the first bit sequence set; wherein, the first pre-frozen bit sequence set is used to indicate the pre-frozen bits, the first pre-frozen bit sequence set is composed of the first bit sequence set and the second pre-frozen bit sequence set, and the second pre-frozen bit sequence set contains at least one bit sequence number that does not appear in the first bit sequence set; Based on the reliability sequence of the polar code and the first pre-frozen bit sequence number set, an information bit set is determined. The information bit set is used to carry information bits, and the reliability sequence is used to indicate the order of the reliability of the bits in the polar code. Based on the set of information bits, the information bits are polar-coded to obtain a first coded bit sequence, wherein the length of the first coded bit is equal to the coding length; Based on the first set of bit indices, rate matching is performed on the first encoded bit sequence to obtain a second encoded bit sequence, the length of which is equal to the code length after rate matching.
2. A decoding method, characterized in that, include: Obtain a first sequence of symbols to be decoded, which corresponds to an encoded bit sequence, the encoded bit sequence being generated based on information bits; Based on the number of information bits, the code length after rate matching, and the encoding length of the polar code, the rate matching method and the first bit sequence set are determined, wherein the encoding length is an integer power of 2; When the rate matching method is shortened, a first pre-frozen bit sequence set is determined based on the encoding length and the first bit sequence set; wherein, the first pre-frozen bit sequence set is used to indicate the pre-frozen bits, the first pre-frozen bit sequence set is composed of the first bit sequence set and the second pre-frozen bit sequence set, and the second pre-frozen bit sequence set contains at least one bit sequence number that does not appear in the first bit sequence set; Based on the reliability sequence of the polar code and the first pre-frozen bit sequence number set, an information bit set is determined. The information bit set is used to carry information bits, and the reliability sequence is used to indicate the order of the reliability of the bits in the polar code. Based on the first bit sequence number set, the first sequence of symbols to be decoded is subjected to de-rate matching to obtain a second sequence of symbols to be decoded, wherein the length of the second sequence of symbols to be decoded is the encoding length; Based on the set of information bits, the second sequence of symbols to be decoded is polarized to obtain the information bits.
3. The method as described in claim 1 or 2, characterized in that, The second pre-frozen bit sequence number set includes one bit sequence number, which is N / 2, where N is the encoding length.
4. The method as described in claim 1 or 2, characterized in that, The second pre-frozen bit sequence number set includes X bit sequence numbers. The X bits are numbered as follows: Wherein, N is the encoding length.
5. The method as described in claim 1 or 2, characterized in that, The second pre-frozen bit sequence number set includes X bit sequence numbers, where X is an integer greater than or equal to 1, and the size of X is related to at least one of the number of information bits, the code length after rate matching, the encoding length, or the code rate; wherein, the code rate is the ratio of the number of information bits to the code length after rate matching.
6. The method as described in claim 5, characterized in that, The size of X increases with the increase of the number of information bits, increases with the increase of the code length after rate matching, increases with the increase of the encoding length, and increases with the increase of the code rate.
7. The method as described in claim 5, characterized in that, When the code length after rate matching is less than the first threshold, the size of X increases as the code length after rate matching increases; When the code length after rate matching is greater than the first threshold, the size of X decreases as the code length after rate matching increases.
8. The method according to any one of claims 5 to 7, characterized in that, The bit numbers in the second pre-frozen bit number set are row-dependent with respect to the polarization coding matrix.
9. The method as described in claim 8, characterized in that, The bit numbers in the second pre-frozen bit number set are the bit numbers corresponding to the X rows with the smallest row weight in the polarization coding matrix.
10. The method according to any one of claims 5 to 7, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the reliability sequence.
11. The method as described in claim 10, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the reliability of the bits corresponding to the bit numbers in the reliability sequence other than the first bit number set.
12. The method according to any one of claims 5 to 7, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the pre-stored sequence.
13. The method according to any one of claims 5 to 12, characterized in that, The X bits are consecutive.
14. The method as described in claim 1 or 2, characterized in that, The N bit sequence numbers corresponding to the N bit sub-channels of the polar code are equally divided into a first sub-block and a second sub-block. The first sub-block is composed of the first N / 2 bit sequence numbers of the N bit sequence numbers, and the second sub-block is composed of the last N / 2 bit sequence numbers of the N bit sequence numbers. The N is equal to the coding length. The second pre-frozen bit sequence number set includes X bit sequence numbers, where X is a positive integer, and all X bit sequence numbers are located within the second sub-block.
15. The method as described in claim 14, characterized in that, The X bit sequence numbers are the first X bit sequence numbers in the bit sequence numbers of the second sub-block.
16. The method as described in claim 14, characterized in that, X equals M1, where M1 is the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block.
17. The method as described in claim 14, characterized in that, The X equals λ is greater than 0 and less than 1, and M1 is either the number of bit numbers in the second sub-block excluding the first bit number set, or the number of bit numbers in the second sub-block. This indicates rounding down to the nearest integer.
18. The method as described in claim 1 or 2, characterized in that, The N bit sequence numbers corresponding to the N bit sub-channels of the polar code are divided into M sub-blocks, where M is an integer greater than 1 and N is equal to the coding length; The second pre-frozen bit sequence number set includes X bit sequence numbers, where X is an integer greater than 1, and the X bit sequence numbers are located in at least two of the M sub-blocks.
19. The method as described in claim 18, characterized in that, Wherein, the X bit sequence numbers are located within the M sub-blocks, and the i-th sub-block of the M sub-blocks contains P from the X bit sequence numbers. i A bit sequence number, P i Let i be a non-negative integer, i = 1, 2, ..., M.
20. The method as described in claim 19, characterized in that, The P i The bit sequence numbers are consecutive.
21. The method according to any one of claims 18 to 20, characterized in that, The size of X is related to at least one of the following: the number of information bits in the M sub-blocks, the code length of the M sub-blocks after rate matching, the coding length of the M sub-blocks, or the code rate of the M sub-blocks.
22. The method as described in claim 21, characterized in that, The size of X increases as the number of information bits in the M sub-blocks increases, as the code length after rate matching of the M sub-blocks increases, as the coding length of the M sub-blocks increases, and as the code rate of the M sub-blocks increases.
23. The method according to any one of claims 18 to 22, characterized in that, The bit numbers in the second pre-frozen bit number set are row-correlated with the rows in the polarization coding matrix that correspond to the M sub-blocks respectively.
24. The method according to any one of claims 18 to 22, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the pre-stored sequences corresponding to the M sub-blocks respectively.
25. The method according to any one of claims 18 to 22, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the order of the bit numbers in the M sub-blocks.
26. The method according to any one of claims 18 to 22, characterized in that, The bit numbers in the second pre-frozen bit number set are related to the reliability sequences corresponding to the M sub-blocks respectively. The reliability sequences corresponding to the M sub-blocks are used to indicate the order of reliability between the bits corresponding to different bit numbers in each of the M sub-blocks.
27. A communication device, characterized in that, It includes a processor and an interface circuit, the processor being configured to communicate with other devices via the interface circuit and to perform the method of any one of claims 1, 3 to 26, or to perform the method of any one of claims 2 to 26.
28. A computer program product, characterized in that, The computer program product includes instructions that, when executed on a processor, cause the method of any one of claims 1, 3 to 26 to be implemented, or the method of any one of claims 2 to 26 to be implemented.
29. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions that, when executed by a communication device, enable the implementation of the method as described in any one of claims 1, 3 to 26, or the implementation of the method as described in any one of claims 2 to 26.