Optical fiber-optical chip interconnection architecture

Abstract

The invention relates to the technical field of optical communication, in particular to an optical fiber-optical chip interconnection architecture, which comprises an optical fiber array module connected with an external light source so as to feed in a target light source; and the optical fiber-optical chip interface module is respectively connected with the optical fiber array module and the target chip core area so as to further feed multiple paths of optical fiber signals in the target light source into the target chip core area and perform chip coupling calibration, and by constructing a heterogeneous coupling integrated array and a feedback loop propagation channel, the multi-path optical fiber signals in the target light source can be further fed into the target chip core area. Therefore, the universal optical fiber-chip interface module with high robustness and low cost is realized. Therefore, the problems that traditional optical fiber-chip coupling calibration is difficult, cost is high, and application scenes are limited are solved.

Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to a fiber-optic chip interconnect architecture based on heterogeneous coupling integration and loop feedback propagation. Background Technology

[0002] With the surge in demand for high-speed, low-power optical interconnects in fields such as optical communication, data centers, and high-performance computing, the efficient and stable interconnection of optical chips (such as silicon photonics chips, indium phosphide photonics chips, and lithium niobate photonics chips) with optical fibers has become a core requirement and a key bottleneck in technological development, as these are core devices for optical signal processing and transmission. Currently, mainstream fiber-optic chip interconnection solutions mainly rely on simple direct alignment coupling (such as fiber-optic chip edge coupling and vertical coupling) between optical fibers and discrete optical coupling elements (such as waveguide couplers, microlens arrays, and V-groove fiber arrays).

[0003] However, existing technical solutions have significant limitations: First, they are not robust. Mismatch in the thermal expansion coefficients of optical fibers and optical chips, environmental vibrations, or temperature fluctuations can easily lead to coupling interface shifts, causing insertion loss fluctuations, long-term stability degradation, and even coupling channel failure due to manufacturing process errors, yield issues, or test damage. Second, coupling and calibration are difficult and costly. Discrete component direct coupling schemes require high-precision alignment processes (such as active alignment equipment), increasing manufacturing complexity and cost. Dedicated interface chips, on the other hand, lack a universal architecture design, making it difficult to support the iterative upgrades of multiple generations of optical chips. Third, they lack compatibility. The designs of optical chip interconnect interfaces vary greatly in different application scenarios. Existing interface designs are mostly dedicated, and different design schemes require different coupling alignment and calibration schemes, making it difficult to adapt to the needs of multiple application scenarios.

[0004] In summary, there is an urgent need for a robust, low-cost, and universal fiber-to-optical-chip interconnect architecture to overcome the compatibility, stability, and cost limitations of existing technologies and support the large-scale application and performance improvement of fiber-to-optical-chip interconnect systems. Summary of the Invention

[0005] This invention provides a fiber-optic chip interconnect architecture to solve the problems of difficult calibration, high cost, and limited application scenarios of traditional fiber-optic chip coupling.

[0006] A first aspect of the present invention provides a fiber-optic chip interconnect architecture, comprising: a fiber array module connected to an external light source for feeding a target light source; and a fiber-optic chip interface module connected to the fiber array module and a target chip core area for further feeding multiple fiber optic signals from the target light source into the target chip core area and performing chip coupling calibration.

[0007] Optionally, the fiber-to-optical-chip interface module includes:

[0008] An optical coupler array is used to couple the multiple fiber optic signals to obtain heterogeneous multiplexed optical signals; an optical combiner is used to combine the heterogeneous multiplexed optical signals into a single fiber optic signal; an optical beam splitter is used to spatially separate the single fiber optic signal to obtain multiple split optical signals; a directional coupler is used to divide the multiple split optical signals into a drive signal and a coupling calibration signal according to a preset power ratio; and an optical circuit is used to feed the coupling calibration signal back to the optical coupler array for chip coupling calibration.

[0009] Optionally, the optical coupler array is a heterogeneous integrated coupler array, wherein the heterogeneous integrated coupler array includes multiple different types of edge couplers and / or multiple different types of vertical couplers.

[0010] Optionally, the structural dimensions of the fiber array module match the structural dimensions of the corresponding optical coupler array, and the fiber array module is coupled to the optical coupler array through multiple single-path optical fibers.

[0011] Optionally, the directional coupler is connected to the chip routing module of the target chip core area, and the driving signal is fed into the chip functional module of the target chip core area through the main optical path of the chip routing module, and the coupling calibration signal is fed into the optical circuit through the beam splitting path of the chip routing module.

[0012] Optionally, the optical circuit is an optical feedback channel formed by the reverse connection of the beam splitter path of the chip routing module and the optical path of the optical coupler array.

[0013] A second aspect of the present invention provides a photonic device including the fiber-optic chip interconnect architecture as described in the above embodiments.

[0014] The fiber-optic chip interconnect architecture proposed in this invention integrates heterogeneous coupling modules and loop feedback to design a highly robust, low-cost, and universal fiber-optic chip interface module that does not rely on a fixed single feed channel or chip core area devices. The fiber-optic chip interface module efficiently connects external light sources to the chip core area without relying on the coupling success rate of a certain type of coupler or a certain channel. During the coupling process, the heterogeneous integrated coupler array of the fiber-optic chip interface module can improve the robustness of the coupling channel, and the coupling-calibration synchronization can be achieved through the optical feedback channel.

[0015] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0016] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0017] Figure 1 This is a block diagram illustrating a fiber-optic chip interconnect architecture provided in an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram of a general optical chip architecture provided in an embodiment of the present invention;

[0019] Figure 3 This is a schematic diagram of a fiber-optic chip interconnect architecture provided in an embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram illustrating the specific implementation of a fiber-optic chip interconnect architecture provided in an embodiment of the present invention.

[0021] Explanation of reference numerals in the attached figures:

[0022] 10-Fiber-optic chip interconnect architecture, 101-Fiber array module, 102-Fiber-optic chip interface module, 1021-Optical coupler array, 1022-Optical combiner, 1023-Optical splitter, 1024-Directional coupler, and 1025-Optical circuit. Detailed Implementation

[0023] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0024] The fiber-to-chip interconnect architecture of embodiments of the present invention is described below with reference to the accompanying drawings. Addressing the problems of weak robustness, high cost, and insufficient versatility faced by traditional fiber-to-chip interconnect technologies based on homogeneous coupling direct connection, as mentioned in the background section, the present invention provides a fiber-to-chip interconnect architecture based on heterogeneous coupling integration and loop feedback propagation to solve the problems of weak robustness, high cost, and insufficient versatility faced by traditional fiber-to-chip interconnects.

[0025] Specifically, Figure 1 This is a block diagram illustrating a fiber-optic chip interconnect architecture provided in an embodiment of the present invention.

[0026] like Figure 1As shown, the fiber-optic chip interconnect architecture 10 includes: a fiber array module 101 and a fiber-optic chip interface module 102.

[0027] The fiber optic array module 101 is connected to an external light source to feed the target light source. The fiber-to-optical-chip interface module 102 is connected to both the fiber optic array module 101 and the core area of ​​the target chip to further feed multiple fiber optic signals from the target light source into the core area of ​​the target chip for chip coupling calibration. Figure 2 and 3 As shown, the fiber-to-chip interconnect architecture 10 proposed in this embodiment of the invention, compared with the traditional fiber-to-chip interconnect technology based on homogeneous coupling direct connection, that is, the interconnection scheme in which the light source feed area (used to connect the external light source of the chip and the chip interface module) is directly coupled to the chip core area (connecting the chip fiber module and the chip core area containing the chip routing module and the chip functional module), can achieve synchronous coupling and calibration, and has the advantages of high robustness, low cost and sufficient compatibility, which can support the large-scale application and performance improvement of fiber-to-chip interconnect systems.

[0028] In some embodiments, the fiber array module 101 serves as an intermediary component connecting the external light source and the core area of ​​the target chip. It can be any structure of fiber array, not limited to the end face projection angle, end face type, fiber material, etc. Those skilled in the art can make appropriate selections according to the actual situation.

[0029] In some embodiments, such as Figure 3 As shown, the fiber-to-chip interface module 102 is the core component of this embodiment of the invention. It feeds the fiber signal into the core area of ​​the target chip by integrating a heterogeneous coupler module and a feedback loop module, so as to realize fiber-to-chip coupling calibration synchronization, and greatly improve robustness and compatibility, and reduce cost.

[0030] Furthermore, the fiber-to-optical chip interface module 102 mainly includes: an optical coupler array 1021, an optical combiner 1022, an optical splitter 1023, a directional coupler 1024, and an optical circuit 1025. Specifically, the optical coupler array 1021 is connected to the fiber array module 101 to couple multiple fiber signals fed into the fiber array module 101 to obtain heterogeneous multiplexed optical signals; the optical combiner 1022 is connected to the optical coupler array 1021 to combine the heterogeneous multiplexed optical signals into a single fiber signal; the optical beam splitter 1023 is connected to the optical combiner 1022 to spatially separate the single fiber signal to obtain multiple split optical signals; the directional coupler 1024 is connected to the optical beam splitter 1023 and the target chip core area respectively to divide the multiple split optical signals into a driving signal and a coupling calibration signal according to a preset power ratio, and feeds the driving signal into the target chip core area and feeds the coupling calibration signal into the optical circuit 1025; the optical circuit 1025 feeds the coupling calibration signal back to the optical coupler array 1021 for chip coupling calibration. This module demonstrates strong versatility and can serve as a standard architecture compatible with the fiber-to-chip coupling packaging and calibration requirements of various optical chips. More complex fiber-to-chip interconnect interfaces can also be implemented based on the above architecture and methods according to actual application needs.

[0031] It should be noted that the fiber-optic chip interface module 102 is not limited to any particular chip material platform. It can be based on silicon chips, silicon nitride chips, indium phosphide chips, lithium niobate chips, etc. Those skilled in the art will not make specific limitations here, and can make appropriate selections according to actual conditions. In addition, the structure, type, quantity, and distribution of the optical coupler array 1021 in the fiber-optic chip interface module 102 can be diversified according to requirements. The structure, type, quantity, and distribution of the optical combiner 1022 and optical splitter 1023 in the fiber-optic chip interface module 102 can also be adjusted and changed as needed. Similarly, those skilled in the art can make appropriate selections according to actual conditions, and will not make specific limitations here.

[0032] In some embodiments, such as Figure 4 As shown, the optical coupler array 1021 in the fiber-optic chip interface module 102 is a heterogeneous integrated coupler array, which can heterogeneously integrate various types of edge couplers or various types of vertical couplers. The heterogeneously integrated couplers can be arranged in parallel, staggered, single row, or multiple rows. Those skilled in the art can make the appropriate selection according to the actual situation, and no specific limitation is made here.

[0033] In some embodiments, such as Figure 4As shown, the fiber optic array module 101 can be a one-dimensional or two-dimensional structure, but the structural dimension of the fiber optic array module 101 must match the structural dimension of the optical coupler array 1021, so that the target light source fed into the fiber optic array module 101 is coupled to multiple couplers in the optical coupler array 1021 each time through multiple single-path optical fibers. For example, at least one fiber optic signal in the target light source is coupled to multiple couplers in the optical coupler array 1021 each time through a single-path optical fiber (such as...). Figure 4 The optical path 2) and a specific coupler in the optical coupler array 1021 (such as...) Figure 4 The fiber optic signal is coupled through a coupler (either 21 or 22), and then transmitted via a series of optical beam combining, splitting, and directional coupling. This feeds multiple fiber optic signals into the core area of ​​the target chip to drive the chip's functional modules. The calibration signal is then fed back to the optical coupler array 1021 via the optical circuit 1025 for chip coupling calibration. This matching method significantly reduces the success rate of fiber-to-chip coupling calibration from being dependent on the coupling success rate of a particular type of coupler or channel, achieving a robust, low-cost, and universal interconnect between the external light source and the core functional area.

[0034] In some embodiments, such as Figure 4 As shown, the directional coupler 1024 is connected to the chip routing module in the core area of ​​the target chip. According to a preset power ratio, it divides the multi-beam split optical signal into a driving signal and a coupling calibration signal. The driving signal is fed into the chip functional module in the core area of ​​the target chip via the main optical path of the chip routing module, while the coupling calibration signal is fed into the optical loop 1025 via the splitting path of the chip routing module. Based on the interface optical path of the optical coupler array 1021, after the directional coupler 1024 splits the light (assuming a preset power ratio of η) and the optical loop 1025 provides feedback, the calibration optical signal power is at most 1 / ηN of the source signal. This effectively avoids the influence of loop propagation on the signal source while meeting calibration requirements.

[0035] In some embodiments, the optical circuit 1025 is an optical feedback channel formed by the reverse connection of the optical path of the chip routing module and the optical path of the optical coupler array 1021. The optical path of the chip routing module can form an optical feedback channel with directional couplers of different types and preset power ratios, or with all couplers, or with only some couplers. Therefore, the optical circuit 1025 can feed back the coupling calibration signal to the optical coupler array 1021 for chip coupling calibration, thereby achieving synchronization between signal feeding and signal monitoring.

[0036] like Figure 4As shown, the workflow of the fiber-optic chip interconnect architecture proposed in this embodiment of the invention is as follows: An external light source is fed into the optical coupler array 1021 of the fiber-optic chip interface module 102 via the fiber array module 101. The optical coupler array 1021 couples multiple fiber optic signals, combining them into one or a heterogeneous multiplexed optical signal. For example, a 1×N coupler distributes one input signal to N multiplexed optical signals (e.g., 1×2, 1×4 splitters); an N×1 coupler combines N input signals into one multiplexed optical signal (e.g., 2×1, 4×1 combiners); and an M×N coupler: a more complex array can realize any combination of multiple inputs to multiple outputs (e.g., matrix switches) to obtain... Heterogeneous multiplexed optical signals are combined into single-path optical fiber signals by at least one optical combiner 1022. Then, an optical beamsplitter 1023 spatially separates the single-path optical fiber signals to create multiple-path split optical signals. These split signals are divided into drive signals and coupling calibration signals according to a preset power ratio. The drive signal is fed into the core functional module of the target chip through the main optical path of the chip routing module, while the coupling calibration signal is fed into the optical loop 1025 through the splitting path of the chip routing module. This achieves synchronous fiber-to-chip coupling calibration and solves the problems of weak robustness, high cost, and insufficient versatility faced by traditional fiber-to-chip interconnects. Applications of this fiber-to-chip interconnect architecture include, but are not limited to, optical sensing, optical computing, and optical switching, and are not limited to chip testing, packaging testing, or wafer-level large-scale testing.

[0037] In summary, the fiber-optic chip interconnect architecture proposed according to embodiments of the present invention has the following beneficial effects:

[0038] (1) By integrating heterogeneous optical coupling modules and non-reciprocal optical feedback channels, the coupling success rate is made independent of a fixed single feed channel, and the difficulty of coupling calibration is greatly reduced by monitoring the feedback loop array signal, thus achieving a robust and low-cost general-purpose fiber-chip interconnect.

[0039] (2) By matching the fiber array module and the chip coupler array module, single-channel coupling multi-channel calibration is realized, and by propagating through the non-reciprocal beam splitting-combining optical circuit, the coupling-calibration integration of fiber-chip interconnection is realized;

[0040] (3) By flexibly adjusting the fiber-coupler feed path and combining it with synchronous monitoring of the calibration coupler array circuit signal, the general application of the fiber-coupler interconnect interface module can be realized.

[0041] This invention also provides a photonic device that employs the fiber-optic chip interconnect architecture described in the above embodiments.

[0042] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0043] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "N" means at least two, such as two, three, etc., unless otherwise explicitly specified.

Claims

1. A fiber-optic-chip interconnect architecture, characterized in that, include: A fiber optic array module, which is connected to an external light source to feed the target light source; The fiber-optic chip interface module is connected to the fiber array module and the core area of ​​the target chip, respectively, so as to further feed the multiple fiber optic signals in the target light source into the core area of ​​the target chip and perform chip coupling calibration.

2. The fiber-optic chip interconnect architecture according to claim 1, characterized in that, The fiber-to-optical chip interface module includes: An optical coupler array is used to couple the multiple fiber optic signals to obtain heterogeneous multiplexed optical signals; An optical beam combiner is used to combine the heterogeneous multiplexed optical signals into a single optical fiber signal. An optical beam splitter is used to spatially separate the single-path optical fiber signal to obtain a multi-path split optical signal. A directional coupler is used to divide the multi-beam split optical signal into a driving signal and a coupling calibration signal according to a preset power ratio; An optical circuit is used to feed back the coupling calibration signal to the optical coupler array for chip coupling calibration.

3. The fiber-optic chip interconnect architecture according to claim 2, characterized in that, The optical coupler array is a heterogeneous integrated coupler array, wherein the heterogeneous integrated coupler array includes multiple different types of edge couplers and / or multiple different types of vertical couplers.

4. The fiber-optic chip interconnect architecture according to claim 2, characterized in that, The structural dimensions of the fiber array module match those of the corresponding optical coupler array, and the fiber array module is coupled to the optical coupler array through multiple single-path optical fibers.

5. The fiber-optic chip interconnect architecture according to claim 2, characterized in that, The directional coupler is connected to the chip routing module of the core area of ​​the target chip. The driving signal is fed into the chip functional module of the core area of ​​the target chip through the main optical path of the chip routing module, and the coupling calibration signal is fed into the optical circuit through the splitting optical path of the chip routing module.

6. The fiber-optic chip interconnect architecture according to claim 5, characterized in that, The optical circuit is an optical feedback channel formed by the reverse connection of the optical path of the chip routing module and the optical path of the optical coupler array.

7. A photonic device, characterized in that, Including the fiber-optic chip interconnect architecture according to any one of claims 1-6.

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