Video decoding method and device, video coding method and device, electronic equipment, storage medium, program product and bit stream storage method

Abstract

The invention provides a video decoding method and device, a video coding method and device, electronic equipment, a storage medium, a program product and a bit stream storage method, and the video decoding method comprises the steps of circularly executing the following steps for current coding processing blocks until decoding is completed: determining one coding block from the current coding processing blocks as a current coding block; determining a target reference pixel point of the current coding block; according to a decoding mark sequence, whether decoding of the unit coding blocks corresponding to the target reference pixel points is completed is determined, and the decoding mark sequence comprises decoding marks in one-to-one correspondence with the unit coding blocks in the current coding processing block; when it is determined that decoding of the unit coding block corresponding to the target reference pixel point is completed, obtaining decoding information of the unit coding block corresponding to the target reference pixel point; according to the obtained decoding information, decoding the current coding block; and updating the decoding marks of all the unit coding blocks of the current coding block into completion marks.

Description

Technical Field

[0001] This disclosure relates to video encoding / decoding and compression. More specifically, this disclosure relates to a video decoding method, a video encoding method, an apparatus, an electronic device, a storage medium, a program product, and a method for storing bitstreams. Background Technology

[0002] During video decoding, decoding is performed frame by frame. The smallest unit for decoding a single video frame is the Coding Unit (CU). To improve compression performance and reduce spatial redundancy, decoding the current CU relies on previously decoded CUs from the current frame. The information in these CUs is called neighborhood information. Neighborhood information includes at least one reference pixel. Since neighborhood information needs to be accessed when decoding each CU, the memory access efficiency of neighborhood information directly affects the decoding efficiency.

[0003] One relevant technology is a highly efficient neighborhood information access scheme called diag buffer. Although it can efficiently store neighborhood information, its implementation relies on an auxiliary array. This auxiliary array is used to describe the decoding status of different pixels in the entire image. It needs to be continuously occupied during the decoding process of the entire image, and the maintenance cost is very high. Moreover, this array is only needed in very few cases, meaning the return on investment is very low, resulting in very low decoding efficiency. Summary of the Invention

[0004] Embodiments of this disclosure provide a video decoding method, a video encoding method, an apparatus, an electronic device, a storage medium, a program product, and a method for storing bitstreams to improve decoding efficiency.

[0005] According to one aspect of this disclosure, a video decoding method is provided, the video decoding method comprising repeatedly performing the following steps for a current encoding processing block until decoding is completed: determining a coding block as the current coding block from the current coding processing block, wherein the current coding processing block includes multiple coding blocks, each coding block including at least one unit coding block; determining a target reference pixel of the current coding block; determining whether the unit coding block corresponding to the target reference pixel has completed decoding according to a decoding mark sequence, wherein the decoding mark sequence includes decoding marks corresponding one-to-one with each unit coding block in the current coding processing block, the decoding marks including a completion mark and an incomplete mark; if it is determined that the unit coding block corresponding to the target reference pixel has completed decoding, obtaining decoding information of the unit coding block corresponding to the target reference pixel; decoding the current coding block according to the obtained decoding information; and updating the decoding marks of all unit coding blocks of the current coding block to the completion mark.

[0006] Optionally, the decoding tag sequence includes multiple decoding tag numbers, each decoding tag number being a binary number with a preset number of bits, wherein each decoding tag number corresponds to a unit coding block row in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit coding block columns in the current encoding processing block, and each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block row; or, wherein each decoding tag number corresponds to a unit coding block column in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit coding block rows in the current encoding processing block, and each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block column.

[0007] Optionally, the completion marker is a first value, and the incomplete marker is a second value. When the preset number of bits is greater than the number of columns or rows of the current encoding block, the portion of the decoding marker count that does not record the decoding marker is filled with the second value.

[0008] Optionally, updating the decoding markers of all unit coding blocks of the current coding block to the completion marker includes: for each decoding marker number corresponding to the current coding block, using bitwise logic operations, updating all decoding markers in the decoding marker number corresponding to the current coding block to the first value, wherein when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

[0009] Optionally, determining whether the unit coding block corresponding to the target reference pixel has completed decoding based on the decoding mark sequence includes: determining the number of decoding marks corresponding to the target reference pixel in the decoding mark sequence as the target decoding mark number; determining whether the unit coding block corresponding to the target reference pixel has completed decoding based on the difference between the preset number of bits and the number of consecutive second values ​​of the target decoding mark number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 0 counting instruction; when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 1 counting instruction.

[0010] Optionally, determining whether the unit coding block corresponding to the target reference pixel has completed decoding based on the decoding marker sequence includes: if it is determined that the target reference pixel does not meet the preset boundary conditions, determining whether the unit coding block corresponding to the target reference pixel has completed decoding based on the decoding marker sequence, wherein the preset boundary conditions are used to indicate that the specified pixel coordinates related to the target reference pixel are at the boundary of the current image or the current coding processing block.

[0011] Optionally, determining a coding block from the current coding processing block as the current coding block includes: determining a coding block from the current coding processing block according to the raster scan order under single-threaded conditions, and using it as the current coding block.

[0012] Optionally, the video decoding method further includes: if the current encoding processing block has completed decoding, determining a new current encoding processing block and initializing all decoding tokens in the decoding token sequence to the incomplete tokens.

[0013] According to one aspect of this disclosure, a video encoding method is provided, the video encoding method comprising repeatedly performing the following steps for a current encoding processing block until encoding is completed: determining an encoding block as the current encoding block from the current encoding processing block, wherein the current encoding processing block includes multiple encoding blocks, each encoding block including at least one unit encoding block; determining a target reference pixel of the current encoding block; determining whether the unit encoding block corresponding to the target reference pixel has completed encoding according to an encoding mark sequence, wherein the encoding mark sequence includes encoding marks corresponding one-to-one with each unit encoding block in the current encoding processing block, the encoding marks including a completion mark and an incomplete mark; if it is determined that the unit encoding block corresponding to the target reference pixel has completed encoding, obtaining encoding information of the unit encoding block corresponding to the target reference pixel; encoding the current encoding block according to the obtained encoding information; and updating the encoding marks of all unit encoding blocks of the current encoding block to the completion mark.

[0014] Optionally, the encoding tag sequence includes multiple encoding tag numbers, each encoding tag number being a binary number with a preset number of bits, wherein each encoding tag number corresponds to a unit encoding block row in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit encoding block columns in the current encoding processing block, and each encoding tag number sequentially records the encoding tag of each unit encoding block in the corresponding unit encoding block row; or, wherein each encoding tag number corresponds to a unit encoding block column in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit encoding block rows in the current encoding processing block, and each encoding tag number sequentially records the encoding tag of each unit encoding block in the corresponding unit encoding block column.

[0015] Optionally, the completion marker is a first value, and the incomplete marker is a second value. When the preset number of bits is greater than the number of columns or rows of the current encoding processing block, the portion of the encoding marker count that does not record the encoding marker is filled with the second value.

[0016] Optionally, updating the encoding tags of all unit encoding blocks of the current encoding block to the completion tag includes: for each encoding tag number corresponding to the current encoding block, using bitwise logic operations, updating all encoding tags in the encoding tag number corresponding to the current encoding block to the first value, wherein when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

[0017] Optionally, determining whether the unit coding block corresponding to the target reference pixel has completed encoding based on the coding mark sequence includes: determining the number of coding marks corresponding to the target reference pixel in the coding mark sequence as the target coding mark number; determining whether the unit coding block corresponding to the target reference pixel has completed encoding based on the difference between the preset number of bits and the number of consecutive second values ​​of the target coding mark number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target coding mark number using a 0 counting instruction; when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target coding mark number using a 1 counting instruction.

[0018] Optionally, determining whether the unit coding block corresponding to the target reference pixel has completed coding based on the coding mark sequence includes: if it is determined that the target reference pixel does not meet the preset boundary conditions, determining whether the unit coding block corresponding to the target reference pixel has completed coding based on the coding mark sequence, wherein the preset boundary conditions are used to indicate that the specified pixel coordinates related to the target reference pixel are at the boundary of the current image or the current coding processing block.

[0019] Optionally, determining a coding block from the current coding processing block as the current coding block includes: determining a coding block from the current coding processing block according to the raster scan order under single-threaded conditions, and using it as the current coding block.

[0020] Optionally, the video encoding method further includes: when the current encoding processing block has completed encoding, determining a new current encoding processing block and initializing all encoding tags in the encoding tag sequence to the incomplete tags.

[0021] According to another aspect of this disclosure, a video decoding apparatus is provided, the video decoding apparatus comprising the following units that cyclically operate for a current encoding processing block until decoding is completed: an encoding block determination unit configured to determine an encoding block from the current encoding processing block as the current encoding block, wherein the current encoding processing block includes a plurality of encoding blocks, each encoding block including at least one unit encoding block; a reference determination unit configured to determine a target reference pixel of the current encoding block; a decoding determination unit configured to determine whether the unit encoding block corresponding to the target reference pixel has completed decoding based on a decoding mark sequence, wherein the decoding mark sequence includes decoding marks corresponding one-to-one with each unit encoding block in the current encoding processing block, the decoding marks including a completion mark and an incomplete mark; a target acquisition unit configured to acquire decoding information of the unit encoding block corresponding to the target reference pixel when it is determined that the unit encoding block corresponding to the target reference pixel has completed decoding; a decoding processing unit configured to decode the current encoding block based on the acquired decoding information; and a mark update unit configured to update the decoding marks of all unit encoding blocks of the current encoding block to the completion mark.

[0022] Optionally, the decoding tag sequence includes multiple decoding tag numbers, each decoding tag number being a binary number with a preset number of bits, wherein each decoding tag number corresponds to a unit coding block row in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit coding block columns in the current encoding processing block, and each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block row; or, wherein each decoding tag number corresponds to a unit coding block column in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit coding block rows in the current encoding processing block, and each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block column.

[0023] Optionally, the completion marker is a first value, and the incomplete marker is a second value. When the preset number of bits is greater than the number of columns or rows of the current encoding block, the portion of the decoding marker count that does not record the decoding marker is filled with the second value.

[0024] Optionally, the tag update unit is further configured to use bitwise logic operations to update all the decoded tags corresponding to the current coding block in the decoded tag count to the first value for each decoded tag count corresponding to the current coding block. Wherein, when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

[0025] Optionally, the decoding determination unit is further configured to: determine the number of decoding marks corresponding to the target reference pixel in the decoding mark sequence as the target decoding mark number; determine whether the unit coding block corresponding to the target reference pixel has completed decoding based on the difference between the preset number of bits and the number of consecutive second values ​​of the target decoding mark number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 0 counting instruction, and when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 1 counting instruction.

[0026] Optionally, the decoding determination unit is further configured to determine, based on the decoding mark sequence, whether the unit coding block corresponding to the target reference pixel has completed decoding when it is determined that the target reference pixel does not meet the preset boundary conditions, wherein the preset boundary conditions are used to indicate that the specified pixel coordinates associated with the target reference pixel are at the boundary of the current image or the current coding processing block.

[0027] Optionally, the coding block determination unit is further configured to determine a coding block from the current coding processing block in a single thread according to the raster scan order, and use it as the current coding block.

[0028] Optionally, the video decoding device further includes an initialization unit configured to, when the current encoding processing block has completed decoding, redetermine a new current encoding processing block and initialize all decoding tokens in the decoding token sequence to the incomplete tokens.

[0029] According to another aspect of this disclosure, a video encoding apparatus is provided, the video encoding apparatus comprising the following units that cyclically operate for a current encoding processing block until encoding is completed: an encoding block determination unit configured to determine an encoding block from the current encoding processing block as the current encoding block, wherein the current encoding processing block includes a plurality of encoding blocks, each encoding block including at least one unit encoding block; a reference determination unit configured to determine a target reference pixel of the current encoding block; an encoding determination unit configured to determine whether the unit encoding block corresponding to the target reference pixel has completed encoding based on an encoding mark sequence, wherein the encoding mark sequence includes encoding marks corresponding one-to-one with each unit encoding block in the current encoding processing block, the encoding marks including a completion mark and an incomplete mark; a target acquisition unit configured to acquire encoding information of the unit encoding block corresponding to the target reference pixel when it is determined that the unit encoding block corresponding to the target reference pixel has completed encoding; an encoding processing unit configured to encode the current encoding block according to the acquired encoding information; and a mark update unit configured to update the encoding marks of all unit encoding blocks of the current encoding block to the completion mark.

[0030] Optionally, the encoding tag sequence includes multiple encoding tag numbers, each encoding tag number being a binary number with a preset number of bits, wherein each encoding tag number corresponds to a unit encoding block row in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit encoding block columns in the current encoding processing block, and each encoding tag number sequentially records the encoding tag of each unit encoding block in the corresponding unit encoding block row; or, wherein each encoding tag number corresponds to a unit encoding block column in the current encoding processing block, the preset number of bits being greater than or equal to the number of unit encoding block rows in the current encoding processing block, and each encoding tag number sequentially records the encoding tag of each unit encoding block in the corresponding unit encoding block column.

[0031] Optionally, the completion marker is a first value, and the incomplete marker is a second value. When the preset number of bits is greater than the number of columns or rows of the current encoding processing block, the portion of the encoding marker count that does not record the encoding marker is filled with the second value.

[0032] Optionally, the tag update unit is further configured to use bitwise logic operations to update all the coding tags corresponding to the current coding block in the coding tag count to the first value for each coding tag count corresponding to the current coding block. Wherein, when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

[0033] Optionally, the encoding determination unit is further configured to: determine the number of encoding tags corresponding to the target reference pixel in the encoding tag sequence as the target encoding tag number; determine whether the unit encoding block corresponding to the target reference pixel has been encoded based on the difference between the preset number of bits and the number of consecutive second values ​​of the target encoding tag number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target encoding tag number using a 0 counting instruction, and when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target encoding tag number using a 1 counting instruction.

[0034] Optionally, the encoding determination unit is further configured to determine, based on the encoding mark sequence, whether the unit encoding block corresponding to the target reference pixel has completed encoding when it is determined that the target reference pixel does not meet the preset boundary conditions, wherein the preset boundary conditions are used to indicate that the specified pixel coordinates associated with the target reference pixel are at the boundary of the current image or the current encoding processing block.

[0035] Optionally, the coding block determination unit is further configured to determine a coding block from the current coding processing block in a single thread according to the raster scan order, and use it as the current coding block.

[0036] Optionally, the video encoding apparatus further includes an initialization unit configured to, upon completion of encoding of the current encoding block, determine a new current encoding block and initialize all encoding tags in the encoding tag sequence to the incomplete tags.

[0037] According to another aspect of this disclosure, an electronic device is provided, comprising: at least one processor; and at least one memory storing computer-executable instructions, wherein the computer-executable instructions, when executed by the at least one processor, cause the at least one processor to perform the video decoding method as described above.

[0038] According to another aspect of this disclosure, a computer-readable storage medium is provided that, when the instructions in the computer-readable storage medium are executed by at least one processor, causes at least one processor to perform the video decoding method as described above.

[0039] According to another aspect of this disclosure, a computer program product is provided, including computer instructions that, when executed by at least one processor, implement the video decoding method described above.

[0040] According to another aspect of this disclosure, a method for storing a bitstream is provided, comprising: storing the bitstream on a digital storage medium, wherein the bitstream includes encoded video information generated by the above-described encoding method or encoded video information to be decoded by the above-described decoding method.

[0041] The video decoding method, video encoding method, apparatus, electronic device, storage medium, program product, and storage bitstream method according to exemplary embodiments of this disclosure use a decoding tag sequence to characterize the decoding status of each unit encoding block in the current encoding processing block. This means it only applies to the current encoding processing block, has a small coverage area, and low maintenance cost. Furthermore, since the same decoding tag is used for each unit encoding block to indicate whether decoding is complete, there is no need to perform special calculations for each element that needs updating, resulting in a smaller computational load, further reducing the maintenance cost of the decoding tag sequence and improving decoding efficiency.

[0042] It will be understood that the above general description and the following detailed description are merely examples and do not limit this disclosure. Attached Figure Description

[0043] The accompanying drawings, which are incorporated in and form part of this specification, illustrate examples according to this disclosure and, together with this description, serve to explain the principles of this disclosure.

[0044] Figure 1 This is a block diagram illustrating an exemplary system for encoding and decoding video blocks according to some embodiments of the present disclosure.

[0045] Figure 2 This is a block diagram illustrating an exemplary video encoder according to some embodiments of the present disclosure.

[0046] Figure 3 This is a block diagram illustrating an exemplary video decoder according to some embodiments of the present disclosure.

[0047] Figure 4 This is a schematic diagram illustrating exemplary reference pixels according to some embodiments of the present disclosure.

[0048] Figure 5 This is a schematic diagram illustrating the principle of the diag buffer neighborhood information access scheme of related technologies.

[0049] Figure 6 This is a flowchart illustrating an exemplary video decoding method according to some embodiments of the present disclosure.

[0050] Figure 7 This is a block diagram illustrating an exemplary video decoding apparatus according to some embodiments of the present disclosure.

[0051] Figure 8 This is a diagram illustrating a computing environment coupled to a user interface according to some embodiments of the present disclosure. Detailed Implementation

[0052] Referring now to the detailed description, examples of which are illustrated in the accompanying drawings. Numerous non-limiting details are set forth in the following detailed description to aid in understanding the subject matter presented herein. However, various alternatives may be used without departing from the scope of the claims, and the subject matter may be practiced without these specific details. For example, the subject matter presented herein can be implemented on many types of electronic devices with digital video capabilities.

[0053] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this disclosure are used to distinguish objects and are not used to describe any specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in sequences other than those shown in the drawings or described in this disclosure.

[0054] Figure 1 This is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel, according to some embodiments of the present disclosure. Figure 1 As shown, system 10 includes a source device 12 that generates and encodes video data that will later be decoded by a target device 14. The source device 12 and target device 14 can include any electronic device from a wide variety of electronic devices, including cloud servers, server computers, desktop or laptop computers, tablet computers, smartphones, set-top boxes, digital televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some embodiments, the source device 12 and target device 14 are equipped with wireless communication capabilities.

[0055] In some implementations, the target device 14 may receive the encoded video data to be decoded via link 16. Link 16 may include any type of communication medium or device capable of moving the encoded video data from the source device 12 to the target device 14.

[0056] In some other implementations, the encoded video data can be sent from the output interface 22 to the storage device 32. Subsequently, the target device 14 can access the encoded video data in the storage device 32 via the input interface 28.

[0057] like Figure 1As shown, source device 12 includes a video source 18, a video encoder 20, and an output interface 22. The video source 18 may include sources or combinations of such sources, such as: a video capture device (e.g., a camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video.

[0058] The captured, pre-captured, or computer-generated video can be encoded by the video encoder 20. The encoded video data can be sent directly to the target device 14 via the output interface 22 of the source device 12. Alternatively, the encoded video data can be stored on the storage device 32 for later access by the target device 14 or other devices for decoding and / or playback.

[0059] Target device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and / or a modem, and receives encoded video data via link 16. The encoded video data transmitted via link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 when decoding the video data. Such syntax elements may be included within encoded video data transmitted on a communication medium, stored on a storage medium, or stored on a file server.

[0060] Video encoder 20 and video decoder 30 can operate according to proprietary or industry standards (e.g., VVC, HEVC, MPEG-4 Part 10, AVC) or extensions of such standards. It should be understood that this application is not limited to any particular video encoding / decoding standard and can be applied to other video encoding / decoding standards. It is generally understood that the video encoder 20 of source device 12 can be configured to encode video data according to any of these current or future standards. Similarly, it is also generally understood that the video decoder 30 of target device 14 can be configured to decode video data according to any of these current or future standards.

[0061] The video encoder 20 and video decoder 30 can be implemented as any circuit of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic devices, software, hardware, firmware, or any combination thereof. When partially implemented in software, the electronic device may store instructions for software in a suitable non-transitory computer-readable medium and use one or more processors to execute the instructions in hardware to perform the video encoding / decoding operations disclosed in this disclosure. Each of the video encoder 20 and video decoder 30 may be included in one or more encoders or decoders, and either encoder or decoder may be integrated as part of a combined encoder / decoder (CODEC) in the respective device.

[0062] Figure 2 This is a block diagram illustrating an exemplary video encoder 20 according to some embodiments described in this application. The video encoder 20 can perform intra-frame predictive coding and inter-frame predictive coding on video blocks within a video frame. Intra-frame predictive coding relies on spatial prediction to reduce or remove spatial redundancy in the video data within a given video frame or picture. Inter-frame predictive coding relies on temporal prediction to reduce or remove temporal redundancy in the video data within neighboring video frames or pictures of a video sequence. It should be noted that in the field of video encoding and decoding, the term "frame" can be used as a synonym for the terms "image" or "picture".

[0063] like Figure 2As shown, the video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy coding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a segmentation unit 45, an intra-frame prediction processing unit 46, and an intra-frame block copy (BC) unit 48. In some embodiments, the video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63, such as a deblocking filter, can be located between the adder 62 and the DPB 64 to filter block boundaries to remove block artifacts from the reconstructed video. In addition to the deblocking filter, another loop filter (e.g., a sample adaptive offset (SAO) filter, a cross-component sample adaptive offset (CCSAO) filter, and / or an adaptive loop filter (ALF)) can be used to filter the output of the adder 62. In some examples, the loop filter can be omitted, and the decoded video block can be directly provided to the DPB 64 by the adder 62. The video encoder 20 can take the form of a fixed or programmable hardware unit, or it can be distributed among one or more of the fixed or programmable hardware units described.

[0064] The video data storage device 40 can store video data encoded by the components of the video encoder 20. For example, it can store data from... Figure 1 The video source 18 shown obtains video data from the video data storage 40. The DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) used by the video encoder 20 (e.g., in intra-frame or inter-frame predictive coding mode) when encoding the video data.

[0065] like Figure 2 As shown, after receiving video data, the segmentation unit 45 within the prediction processing unit 41 segments the video data into video blocks. This segmentation may also include segmenting the video frame into strips, tiles (e.g., a collection of video blocks) or other larger coding units (CUs) according to a predefined splitting structure (e.g., a quadtree (QT) structure) associated with the video data. It should be noted that the term "block" or "video block" as used herein can be a portion of a frame or image, particularly a rectangular (square or non-square) portion. Referring to, for example, HEVC and VVC, a block or video block can be or corresponds to a coding tree unit (CTU), CU, prediction unit (PU), or transform unit (TU) and / or can be or corresponds to a corresponding block (e.g., coding tree block (CTB), coding block (CB), prediction block (PB), or transform block (TB)) and / or sub-block.

[0066] The prediction processing unit 41 can select one of several feasible predictive coding modes for the current video block based on error results (e.g., coding rate and distortion level), such as one or more inter-frame predictive coding modes among multiple intra-frame predictive coding modes. The prediction processing unit 41 can provide the resulting intra-frame or inter-frame predictive coding block to adder 50 to generate a residual block, and to adder 62 to reconstruct the coding block for subsequent use as part of a reference frame. The prediction processing unit 41 also provides syntax elements (e.g., motion vectors, intra-frame mode indicators, segmentation information, and other such syntax information) to entropy coding unit 56.

[0067] To select a suitable intra-predictive coding mode for the current video block, the intra-predictive processing unit 46 within the prediction processing unit 41 can perform intra-predictive coding of the current video block in relation to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. The motion estimation unit 42 and motion compensation unit 44 within the prediction processing unit 41 perform inter-predictive coding of the current video block in relation to one or more prediction blocks in one or more reference frames to provide temporal prediction. The video encoder 20 can perform multiple coding passes, for example, to select a suitable coding mode for each block of video data.

[0068] In some implementations, motion estimation unit 42 determines an inter-frame prediction mode for the current video frame by generating motion vectors based on a predetermined pattern within the video frame sequence. The motion vectors indicate the displacement of a video block within the current video frame relative to a prediction block within a reference video frame. Motion estimation performed by motion estimation unit 42 is the process of generating motion vectors that estimate the motion of video blocks. For example, the motion vectors may indicate the displacement of a video block within the current video frame or picture relative to a prediction block within a reference frame associated with the current block being encoded in the current frame. The predetermined pattern may designate video frames in the sequence as P-frames or B-frames. Intra-frame BC unit 48 may determine vectors (e.g., block vectors) for intra-frame BC coding in a similar manner to how motion estimation unit 42 determines motion vectors for inter-frame prediction, or the block vectors may be determined using motion estimation unit 42.

[0069] Regardless of whether the predicted block comes from the same frame predicted intra-frame or from different frames predicted inter-frame, the video encoder 20 can form a residual video block by subtracting the pixel values ​​of the predicted block from the pixel values ​​of the current video block being encoded. The pixel difference forming the residual video block can include both luma component difference and chroma component difference.

[0070] Intra-prediction processing unit 46 can encode the current block using various intra-prediction modes, for example, during individual encoding passes, and intra-prediction processing unit 46 (or, in some examples, mode selection unit) can select a suitable intra-prediction mode from the tested intra-prediction modes for use. Intra-prediction processing unit 46 can provide information indicating the intra-prediction mode selected for the block to entropy coding unit 56. Entropy coding unit 56 can encode the information indicating the selected intra-prediction mode into the bitstream.

[0071] After prediction processing unit 41 determines the prediction block for the current video block via inter-frame prediction or intra-frame prediction, adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. Transform processing unit 52 uses a transform (e.g., discrete cosine transform (DCT) or a conceptually similar transform) to transform the residual video data into residual transform coefficients.

[0072] The transform processing unit 52 can send the resulting transform coefficients to the quantization unit 54. The quantization unit 54 quantizes the transform coefficients to further reduce the bit rate. The quantization process can also reduce the bit depth associated with some or all of the coefficients. The degree of quantization can be modified by adjusting the quantization parameters. In some examples, the quantization unit 54 can subsequently perform a scan on the matrix including the quantized transform coefficients. Alternatively, the entropy coding unit 56 can perform the scan.

[0073] After quantization, the entropy coding unit 56 entropy codes the quantized transform coefficients into a video bitstream using, for example, context-adaptive variable-length coding (CAVLC), context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probabilistic interval segmented entropy (PIPE) coding, or another entropy coding method or technique. The encoded bitstream can then be sent to, for example,... Figure 1 The video decoder 30 shown, or archived in, for example Figure 1 The data is stored in storage device 32 for later transmission to or retrieval by video decoder 30. Entropy coding unit 56 can also entropy code the motion vectors and other syntax elements used for the current video frame being encoded.

[0074] The inverse quantization unit 58 and the inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct residual video blocks in the pixel domain for generating reference blocks to predict other video blocks. As noted above, the motion compensation unit 44 can generate motion-compensated prediction blocks from one or more reference blocks of frames stored in the DPB 64. The motion compensation unit 44 can also apply one or more interpolation filters to the prediction blocks to compute sub-integer pixel values ​​for use in motion estimation.

[0075] Adder 62 adds the reconstructed residual block to the motion-compensated prediction block generated by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block can then be used as a prediction block by intra-frame BC unit 48, motion estimation unit 42, and motion compensation unit 44 for inter-frame prediction of another video block in subsequent video frames.

[0076] Figure 3 This is a block diagram illustrating an exemplary video decoder 30 according to some embodiments of this application. The video decoder 30 includes a video data memory 79, an entropy decoding unit 80, a prediction processing unit 81, an inverse quantization unit 86, an inverse transform processing unit 88, an adder 90, and a DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra-frame prediction unit 84, and an intra-frame BC unit 85. The video decoder 30 can perform operations in conjunction with the above. Figure 2 The decoding process described for the video encoder 20 is essentially the inverse of the encoding process. For example, the motion compensation unit 82 can generate prediction data based on the motion vectors received from the entropy decoding unit 80, while the intra-frame prediction unit 84 can generate prediction data based on the intra-frame prediction mode indicator received from the entropy decoding unit 80.

[0077] In some examples, embodiments of this disclosure may be distributed across one or more units of the video decoder 30. For example, the intra-frame prediction (BC) unit 85 may perform embodiments of this application individually or in combination with other units of the video decoder 30, such as the motion compensation unit 82, the intra-frame prediction unit 84, and the entropy decoding unit 80. In some examples, the video decoder 30 may not include the intra-frame prediction (BC) unit 85, and the functionality of the intra-frame prediction (BC) unit 85 may be performed by other components of the prediction processing unit 81, such as the motion compensation unit 82.

[0078] The video data storage device 79 can store video data, such as encoded video bitstreams, that will be decoded by other components of the video decoder 30. The video data stored in the video data storage device 79 can be obtained, for example, from the storage device 32, from a local video source (e.g., a camera), via wired or wireless network communication of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk).

[0079] During the decoding process, the video decoder 30 receives a encoded video bitstream representing video blocks and associated syntax elements of encoded video frames. The entropy decoding unit 80 of the video decoder 30 performs entropy decoding on the bitstream to generate quantization coefficients, motion vectors or intra-prediction mode indicators, and other syntax elements. The entropy decoding unit 80 then forwards the motion vectors or intra-prediction mode indicators, and other syntax elements to the prediction processing unit 81.

[0080] When a video frame is encoded as an intra-predictive coded (I) frame or used as an intra-coded prediction block in other types of frames, the intra-predictive unit 84 of the prediction processing unit 81 can generate prediction data for the video block of the current video frame based on the intra-predictive mode transmitted by the signal and reference data from the previous decoded block of the current frame.

[0081] When a video frame is encoded as an inter-frame predictive coded (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks for the current video frame based on motion vectors and other syntax elements received from the entropy decoding unit 80. Each of the prediction blocks can be generated from a reference frame within a reference frame list. The video decoder 30 can construct the reference frame list, i.e., list 0 and list 1, based on the reference frames stored in the DPB 92 using a default construction technique.

[0082] In some examples, when a video block is encoded according to the intra-frame BC mode described herein, the intra-frame BC unit 85 of the prediction processing unit 81 generates a prediction block for the current video block based on the block vector and other syntax elements received from the entropy decoding unit 80. The prediction block can be located within a reconstructed region of the same image as the current video block, as defined by the video encoder 20.

[0083] The motion compensation unit 82 and / or the intra-frame BC unit 85 determine the prediction information for the video block of the current video frame by parsing motion vectors and other syntax elements, and then use the prediction information to generate a prediction block for the current video block being decoded.

[0084] The motion compensation unit 82 can also perform interpolation using interpolation filters, such as those used by the video encoder 20 during encoding of video blocks, to calculate interpolated values ​​for sub-integer pixels of the reference block. In this case, the motion compensation unit 82 can determine the interpolation filters used by the video encoder 20 based on the received syntax elements and use these interpolation filters to generate the prediction block.

[0085] The dequantization unit 86 dequantizes the quantized transform coefficients provided in the bitstream and entropy-decoded by the entropy decoding unit 80 using the same quantization parameters calculated by the video encoder 20 for each video block in the video frame to determine the degree of quantization. The inverse transform processing unit 88 applies an inverse transform (e.g., inverse DCT, inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to reconstruct the residual block in the pixel domain.

[0086] After the motion compensation unit 82 or the intra-frame BC unit 85 generates a prediction block for the current video block based on vectors and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by adding the residual block from the inverse transform processing unit 88 to the corresponding prediction block generated by the motion compensation unit 82 and the intra-frame BC unit 85. A loop filter 91 (e.g., a deblocking filter, SAO filter, CCSAO filter, and / or ALF) may be located between the adder 90 and the DPB 92 for further processing of the decoded video block. In some examples, the loop filter 91 may be omitted, and the decoded video block may be directly provided to the DPB 92 by the adder 90. The decoded video block in a given frame is then stored in the DPB 92, which stores reference frames for subsequent motion compensation of the next video block. The DPB 92 or a separate memory device may also store the decoded video for later presentation on a display device (e.g., ...). Figure 1 On the display device 34).

[0087] Figure 4 Examples are shown of some reference pixels that can serve as the location of neighborhood information for the current coding block. Figure 5 This is a schematic diagram illustrating the principle of a diag buffer neighborhood information access scheme in related technologies. Detailed information about this scheme can be found in Chinese patent application number 202310906346.7. Figure 5 As shown, the buffer in this scheme is diagonal, and the entire buffer information is called a cache column. The cache column includes multiple cache units, each cache unit corresponding to... Figure 5A diagonal line in the sequence represents all the unit coded blocks along that diagonal, forming a unit coded block sequence. The decoding information of the most recently decoded unit coded block in this sequence is stored in the corresponding buffer unit. Since decoding is performed from top to bottom and from left to right, when obtaining neighborhood information for the current coded block, we can first determine the unit coded block corresponding to the required reference pixel, then obtain the buffer unit corresponding to the unit coded block sequence to which that unit coded block belongs, and retrieve the decoding information of that unit coded block from it. This scheme can replace the function of multiple buffers in the traditional scheme with a single diagonal buffer, while ensuring that information from all neighborhoods can be properly obtained.

[0088] Specifically, when it is necessary to access neighborhood information, assuming the coordinates of the top left corner of the current CU are (x, y) and the width and height of the current CU are (w, h), the neighborhood information can be obtained according to the following diag_buffer.

[0089]

[0090]

[0091]

[0092]

[0093]

[0094] In other words, assuming the coordinates of the top-left pixel of a unit coding block are (x, y), then the index of the cache unit corresponding to that unit coding block is... That is, the corresponding cache unit is .

[0095] Specifically, when it is necessary to obtain Figure 4 When decoding the A0 / B0 information, since the unit code block to which A0 / B0 belongs may not have been decoded yet, the corresponding cache unit does not store the decoding information of the unit code block to which A0 / B0 belongs. If the corresponding cache unit value is still obtained in the above manner, it may lead to incorrect information. To solve this problem, related technologies propose an auxiliary array `progress` to record the decoding progress of each cache unit. The index of each element in the `progress` array is also... The value of each element is equal to 1 / 4 of the sum of the horizontal and vertical coordinates of the top-left pixel of the most recently decoded unit in the unit coding block sequence, which is... As the decoding process progresses, the most recently decoded unit block in the same unit block sequence continuously shifts to the lower right corner. Therefore, the value of each element in the `progress` array gradually increases as the decoding process progresses. If the value of the `progress` element corresponding to A0 / B0 is less than 1 / 4 of the sum of the horizontal and vertical coordinates of A0 / B0, it indicates that the unit block to which A0 / B0 belongs has not yet been decoded, and the decoding information in the corresponding cache unit cannot be obtained; otherwise, it can be obtained. This logic can be expressed as follows.

[0096] If satisfied If not, then A0 is inaccessible; otherwise, obtain the neighborhood information of A0 according to the following diag_buffer.

[0097]

[0098] If satisfied If not, B0 cannot be accessed; otherwise, the neighborhood information of B0 is obtained according to the following diag_buffer.

[0099]

[0100] After the current CU has finished decoding, the diag_buffer array and the progress array need to be updated, as follows.

[0101] The current decoding information of the CU.

[0102] The current decoding information of the CU.

[0103] For range i in .

[0104] For range i in .

[0105] As can be seen, this scheme needs to rely on an auxiliary array progress to determine whether A0 / B0 has been decoded, or in other words, if we want to obtain decoding information from the corresponding cache unit for A0 / B0, we need to first determine whether the information is valid.

[0106] However, the progress array describes the decoding progress of different pixels in the entire image. It needs to be continuously occupied during the decoding process of the entire image. After each CU is decoded, the elements in the progress array associated with the currently decoded CU need to be updated. Furthermore, the updated values ​​of these elements also depend on the coordinate values ​​of the corresponding pixels, which requires special calculation and has a very high maintenance cost. This array is only needed in a very few cases, which means the input-output ratio is very low, resulting in very low decoding efficiency.

[0107] Based on this scheme, this disclosure proposes a video decoding method that maintains the original `diag_buffer` maintenance method while removing the `progress` maintenance method. It proposes a neighborhood maintenance method with lower maintenance costs, using a decoding tag sequence to represent the decoding status of each unit coding block in the current coding block. This method only targets the current coding block, resulting in a smaller coverage area and lower maintenance costs. Furthermore, since the same decoding tag is used for each unit coding block to indicate whether decoding is complete, there is no need to perform dedicated calculations for each element that needs updating, further reducing the computational load and lowering the maintenance cost of the decoding tag sequence, thus improving decoding efficiency.

[0108] Figure 6 This is a flowchart illustrating an exemplary video decoding method according to some embodiments of the present disclosure. This video decoding method can be implemented in the target device 14 described above.

[0109] Reference Figure 6 The method includes repeatedly executing steps S601 to S606 for the current encoding processing block until decoding is completed.

[0110] In step S601, a coding block is determined from the current coding processing block as the current coding block.

[0111] The current encoding processing block comprises multiple encoding blocks, and each encoding block includes at least one unit encoding block. In other words, the current encoding processing block consists of multiple unit encoding blocks. For example, a current encoding processing block of size 128×128, divided into 4×4 unit encoding blocks, can be divided into 32×32 unit encoding blocks, i.e., 32 rows and 32 columns. These unit encoding blocks can be divided into different encoding blocks.

[0112] Optionally, step S601 includes: determining a coding block from the current coding processing block according to the raster scan order under single-threaded conditions, and using it as the current coding block. This embodiment simplifies the video coding standard to avoid image partitioning such as slices / tiles / subpics and eliminates WPP (Wavefront Parallel Processing) tools. In other words, it does not perform multi-threaded parallel processing within the current frame, but instead performs encoding and decoding of coding blocks serially according to the raster scan order under single-threaded conditions. With the assistance of the preceding memory access design, memory access efficiency can be further improved.

[0113] In step S602, the target reference pixel of the current coding block is determined.

[0114] The target reference pixel is the pixel whose decoding progress requires special attention, such as A0 and B0 in the related techniques described above. It should be understood that the operation of other reference pixels can be referenced in the relevant techniques, and will not be elaborated upon here.

[0115] In step S603, based on the decoding mark sequence, it is determined whether the unit coding block corresponding to the target reference pixel has been decoded.

[0116] The decoding marker sequence includes decoding markers that correspond one-to-one with each unit coding block in the current encoding processing block. These decoding markers include completion and incomplete markers. By querying the decoding marker sequence to determine whether the unit coding block corresponding to the target reference pixel has been decoded, it can be clearly determined whether the decoding information of that unit coding block can be accessed. That is, if decoding is complete, it can be accessed; if decoding is incomplete, it cannot be accessed. Therefore, decoding information is only acquired when it is clear that access is possible, and not when it is clear that access is impossible, ensuring the reliability of information acquisition.

[0117] Optionally, the decoding tag sequence includes multiple decoding tag numbers, each of which is a binary number with a preset number of bits. This allows each bit of the binary number to be used as a decoding tag for a unit of encoded blocks, enabling convenient batch marking. By using multiple decoding tag numbers, each tag can be used to mark a row or column of unit encoded blocks within the current encoding processing block. This reduces the number of bits in a single decoding tag number and improves the positioning speed of each unit of encoded blocks, enabling rapid and convenient acquisition of the decoding tag for each unit of encoded blocks.

[0118] Specifically, in one example, each decoding token number corresponds to a unit coding block row in the current encoding processing block. The preset bit length is greater than or equal to the number of unit coding block columns in the current encoding processing block. Each decoding token number sequentially records the decoding token of each unit coding block in the corresponding unit coding block row. That is, within a decoding token number, the decoding tokens of each unit coding block in the corresponding row of unit coding blocks are recorded sequentially from left to right. The preset bit length must be at least equal to the number of unit coding blocks in a row of unit coding blocks to ensure that the decoding token of each unit coding block is recorded. It should be understood that regarding the recording order of the decoding markers, since the bit number in a binary number usually decreases gradually from the high bit to the low bit (for example, for a 32-bit binary number, the bit number of the highest bit is usually 31 and the bit number of the lowest bit is usually 0), there are sometimes cases where the bit number gradually increases. Therefore, in order to correspond with the order of the unit coding block, the bits can be recorded in the order of gradually increasing bit number. Thus, it is usually recorded from the low bit to the high bit, but sometimes it is recorded from the high bit to the low bit. When the preset number of bits is greater than the number of unit coding block columns of the current coding processing block, there are usually some idle bits in the high bits of the decoding markers, and sometimes there are some idle bits in the low bits.

[0119] In another example, each decoder tag corresponds to a unit code block column in the current encoding block. The preset bit length is greater than or equal to the number of unit code block rows in the current encoding block. Each decoder tag sequentially records the decoder tag of each unit code block in the corresponding unit code block column. That is, the decoder tag of each unit code block in the corresponding column of unit code blocks is recorded sequentially from top to bottom within a decoder tag number. The preset bit length must be at least equal to the number of unit code blocks in a column of unit code blocks to ensure that the decoder tag of each unit code block is recorded. The recording order of the decoder tag numbers is the same as in the previous example and will not be repeated.

[0120] Further optionally, the completion mark is set to the first value, such as 1, and the incomplete mark is set to the second value, such as 2. When the preset number of bits is greater than the number of columns or rows of the unit coding block in the current coding processing block, the part of the decoding mark count that has not recorded the decoding mark is filled with the second value, that is, the incomplete mark is used by default, which can reduce the risk of errors and improve data reliability.

[0121] Optionally, step S603 includes: determining the number of decoded tags corresponding to the target reference pixel in the decoded tag sequence as the target decoded tag number; determining whether the unit coding block corresponding to the target reference pixel has been decoded based on the difference between the preset number of bits and the number of consecutive second values ​​of the target decoded tag number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target decoded tag number using a 0 counting instruction, and when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target decoded tag number using a 1 counting instruction.

[0122] In this embodiment, the number of decoding markers corresponding to the unit coding block corresponding to the target reference pixel is first determined to clarify the decoding completion status of the unit coding block. Based on this, instead of sequentially searching for the decoding markers of the unit coding block to determine its decoding completion status, this embodiment utilizes the decoding order characteristics of the unit coding block and the CPU's built-in bit operation instructions to quickly determine the required information, further improving decoding efficiency.

[0123] Specifically, the decoding order characteristic of unit coding blocks is that, in the same row, the unit coding block on the left will be decoded before the unit coding block on the right; in the same column, the unit coding block above will be decoded before the unit coding block below. Therefore, the first and second values ​​in the same decoding mark number are continuously distributed. The CPU's built-in bit manipulation instructions include those for counting the number of consecutive 0s or 1s starting from the most or least significant bit of a binary number. These instructions are CLZ (Count Leading Zeros), CTZ (Count Trailing Zeros), CLO (Count Leading Ones), and CTO (Count Trailing Ones). Depending on the actual setting of the decoding markers (including whether the second value is 0 or 1, and whether it starts from the most or least significant bit), these instructions count the number of consecutive second values ​​starting from the position with the largest bit number (usually the most significant bit, but sometimes the least significant bit). The difference between the preset number of bits and the number of consecutive second values ​​represents the number of decoded unit code blocks in that row / column. The coordinates of the target reference pixel reflect the sequence number of its corresponding unit code block in that row / column. Therefore, by combining these two pieces of information, it is possible to determine whether the unit code block corresponding to the target reference pixel belongs to the unit code block that has been decoded, thus understanding whether it has been decoded.

[0124] As an example, continuing with the case of using 4×4 blocks as the unit encoding blocks mentioned earlier, assuming that each decoding tag number corresponds to a unit encoding block row in the current encoding processing block, and that the top-left pixel coordinates are (0,0) in the current encoding processing block, then for the target reference pixel, the product of the number of unit encoding blocks that have been decoded in the current row and 4 minus 1 is equal to the maximum horizontal coordinate of the pixel that has been decoded. If the horizontal coordinate of the target reference pixel is less than or equal to this maximum value, it means that the unit encoding block corresponding to the target reference pixel has been decoded; otherwise, it has not been decoded.

[0125] Optionally, step S603 includes: if it is determined that the target reference pixel does not meet the preset boundary conditions, determining whether the unit coding block corresponding to the target reference pixel has completed decoding based on the decoding marker sequence, wherein the preset boundary conditions are used to indicate that the specified pixel coordinates related to the target reference pixel are at the boundary of the current image or the current coding block. (Refer to...) Figure 4 Assuming the coordinates of the top-left corner of the current CU are (x, y), and the width and height of the current CU are (w, h), then the coordinates of A0 are (x-1, y+h). If x or y+h is on the boundary of the current image, or if y+h is on the boundary of the current encoding block (e.g., CTU), then A0 cannot be accessed, and there is no need to query the decoding marker sequence. The coordinates of B0 are (x+w, y). If x+w or y is on the boundary of the current image, then B0 cannot be accessed. If x+w or y is not on the boundary of the current image, but x+w is on the boundary of the current encoding block, then B0 can be accessed, and there is no need to query the decoding marker sequence. By configuring such preset boundary conditions, and only querying the decoding marker sequence when these preset boundary conditions are not met to determine whether the unit encoding block corresponding to the target reference pixel has completed decoding, the operation of understanding the decoding completion status can be further simplified, and decoding efficiency can be improved.

[0126] Return to reference Figure 6 In step S604, if it is determined that the unit coding block corresponding to the target reference pixel has been decoded, the decoding information of the unit coding block corresponding to the target reference pixel is obtained.

[0127] For methods of obtaining decoding information, please refer to relevant technologies, which will not be elaborated here.

[0128] In step S605, the current encoded block is decoded based on the obtained decoding information.

[0129] For specific decoding methods, please refer to the relevant technologies and the previous introduction, which will not be repeated here.

[0130] In step S606, the decoding markers of all unit coding blocks of the current coding block are updated to completion markers.

[0131] By uniformly updating the decoding markers of all unit coding blocks in the current coding block after decoding is completed, it can be ensured that subsequent decoding of other coding blocks can be performed smoothly.

[0132] Optionally, step S606 includes: for each decoded tag number corresponding to the current encoded block, using bitwise logic operations to update all decoded tags in the decoded tag number corresponding to the current encoded block to a first value, wherein when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation. For the decoded tag number of binary numbers, by using bitwise logic operations, batch updates of multiple decoded tags in the decoded tag number can be achieved, significantly reducing maintenance costs. Taking the case where the first value is 1 and the second value is 0 as an example, the initial value of the decoding marker is 0. The part that has been decoded needs to be updated to 1. This can be achieved using a bitwise OR operation. First, a binary reference value is constructed for calculation. This reference value has a value of 1 within the bit range corresponding to the unit coding block sequence number range covered by the current coding block, and a value of 0 for other bit ranges. This reference value is then bitwise ORed with the number of decoding markers before the update. Since 1|0 equals 1, the decoding marker value in the corresponding bit range of the decoding marker count can be updated to 1. Furthermore, since 1|1 also equals 1, the original 1s in the decoding marker count can remain unchanged, thus achieving the update of the decoding marker count. The case where the first value is 0 and the second value is 1 is similar and will not be elaborated further. It should be understood that since coding blocks are usually rectangular, if the current coding block involves multiple decoding marker counts that need to be updated, the same reference value can be used to implement bitwise logical operations, further reducing maintenance costs. Of course, for different coding blocks, the reference value needs to be modified.

[0133] The setting of reference values ​​can also be quickly achieved using the shift rules specific to binary numbers. Taking the case where the first value is 1 and the second value is 0 as an example, assuming each decoding marker is a 32-bit binary number and corresponds to a unit encoding block row in the current encoding processing block, we can first create a 32-bit binary number 0xFFFFFFFF with all values ​​set to 1 as the initial value. Based on this, assuming the coordinates of the top-left corner of the current encoding processing block are (0,0), the coordinates of the top-left corner of the current encoding block are (x,y), the width and height of the current encoding block are (w,h), and the unit encoding block is a 4×4 block, then we need to keep all values ​​in the interval from x / 4 to (x+w) / 4 in the initial value set to 1, and change the remaining positions to 0. To do this, the initial value can be shifted by (32-w / 4) bits in the direction of decreasing position (usually towards the lower position) to obtain w / 4 1s. Then, it can be shifted by x / 4 bits in the direction of increasing position (usually towards the higher position) so that the position of the starting position of these 1s is x / 4, thus obtaining the reference value.

[0134] Furthermore, the video decoding method according to an exemplary embodiment of this disclosure further includes: when the current encoding processing block has completed decoding, determining a new current encoding processing block, and initializing all decoding tokens in the decoding token sequence to incomplete tokens. By initializing the decoding token sequence to a completely incomplete state, the decoding token sequence can be reused, reducing maintenance costs. It should be understood that for a new current encoding processing block, steps S601 to S606 are repeatedly executed.

[0135] The following describes a video decoding method according to a specific embodiment of this disclosure.

[0136] In this specific embodiment, the encoding processing block is a 128×128 CTU, the encoding block is a CU, and the unit encoding block is a 4×4 small block. This specific embodiment can be named the ctu_bitmap maintenance method. When using the ctu_bitmap maintenance method, the video encoding standard needs to be simplified as follows: 1. There is no image segmentation such as slice / tile / subpic; 2. There are no WPP tools.

[0137] The decoding marker sequence is defined as an array uint32_t ctu_bitmap

[32] , which has a total of 32 elements. Each element is a 32-bit binary number, representing the decoding status of the current 4×4 block in the row. 1 in the binary number is the completion marker in the decoding marker, indicating that decoding has been completed, and 0 is the incomplete marker in the decoding marker, indicating that decoding has not been completed.

[0138] When a CU(x, y, w, h) is decoded, the ctu_bitmap needs to be updated. The update method is as follows: for the range ( The corresponding elements in ctu_bitmap within i are updated as follows.

[0139]

[0140] Specifically, when A0 needs to be accessed, it cannot be accessed if x or y+h is on the image boundary, or if y+h is on the CTU boundary. Otherwise, the following judgment is made: if the result is true, it can be accessed; otherwise, it cannot be accessed.

[0141] The specific determination is whether A0 is decoded. To improve the efficiency of the determination, a built-in CPU bit manipulation instruction CLZ is used, which retrieves the number of consecutive 0 bits starting from the most significant bit of the current number. The determination expression is as follows.

[0142]

[0143] Specifically, when B0 needs to be accessed, if x+w or y is on the image boundary, it cannot be accessed; otherwise, if x+w is on the CTU boundary, it can be accessed. Otherwise, the following judgment is made: if the result is true, it can be accessed; otherwise, it cannot be accessed. The expression for determining whether B0 is decoded is as follows.

[0144]

[0145] This specific implementation significantly reduces the maintenance cost of the neighborhood array and further improves memory access efficiency by designing a bitmap-based neighborhood array, using built-in CPU bit operation instructions, and simplifying video encoding standards. Tests on the OPPO R17 phone showed that single-threaded decoding speed increased from 82.02 FPS to 85.43 FPS, reducing decoding complexity by 4%.

[0146] In this embodiment, a video encoding method is also provided, which applies the overall scheme of the aforementioned video decoding method to the video encoding process. Specifically, it uses a sequence of encoding markers to characterize the encoding status of each unit encoding block in the current encoding processing block. Correspondingly, the encoding information of each unit encoding block can be stored and accessed using a dig buffer neighborhood information memory access scheme. For the sake of brevity, this will not be repeated here.

[0147] Figure 7 This is a block diagram illustrating an exemplary video decoding apparatus according to some embodiments of the present disclosure.

[0148] Reference Figure 7 The video decoding device 700 includes the following units that cycle through the current encoding processing block until decoding is completed: encoding block determination 701, reference determination unit 702, decoding determination unit 703, target acquisition unit 704, decoding processing unit 705, and mark update unit 706.

[0149] The 701 unit can determine a coding block from the current coding processing block as the current coding block. The current coding processing block includes multiple coding blocks, and each coding block includes at least one unit coding block.

[0150] Optionally, the coding block determination 701 can also determine a coding block from the current coding processing block according to the raster scan order in a single thread, and use it as the current coding block.

[0151] The reference determination unit 702 can determine the target reference pixel point of the current coding block.

[0152] The decoding determination unit 703 can determine whether the unit coding block corresponding to the target reference pixel has been decoded based on the decoding mark sequence. The decoding mark sequence includes decoding marks that correspond one-to-one with each unit coding block in the current coding processing block. The decoding marks include completion marks and incomplete marks.

[0153] Optionally, the decoding tag sequence includes multiple decoding tag numbers, each decoding tag number being a binary number with a preset number of bits. Each decoding tag number corresponds to a unit coding block row in the current encoding processing block, and the preset number of bits is greater than or equal to the number of unit coding block columns in the current encoding processing block. Each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block row. Alternatively, each decoding tag number corresponds to a unit coding block column in the current encoding processing block, and the preset number of bits is greater than or equal to the number of unit coding block rows in the current encoding processing block. Each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block column.

[0154] Optionally, the completion mark is set to the first value, and the incomplete mark is set to the second value. If the preset number of bits is greater than the number of columns or rows of the unit coding block in the current coding processing block, the part of the decoding mark count that has not recorded the decoding mark is filled with the second value.

[0155] Optionally, the decoding determination unit 703 may further: determine the number of decoding marks corresponding to the target reference pixel in the decoding mark sequence as the target decoding mark number; determine whether the unit coding block corresponding to the target reference pixel has been decoded based on the difference between the preset number of bits and the number of consecutive second values ​​of the target decoding mark number and the coordinates of the target reference pixel, wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 0 counting instruction, and when the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target decoding mark number using a 1 counting instruction.

[0156] Optionally, the decoding determination unit 703 may also determine whether the unit coding block corresponding to the target reference pixel has completed decoding based on the decoding mark sequence if the target reference pixel does not meet the preset boundary conditions. The preset boundary conditions are used to indicate that the specified pixel coordinates related to the target reference pixel are at the boundary of the current image or the current coding block.

[0157] The target acquisition unit 704 can acquire the decoding information of the unit coding block corresponding to the target reference pixel after determining that the unit coding block corresponding to the target reference pixel has been decoded.

[0158] The decoding processing unit 705 can decode the current encoded block based on the acquired decoding information.

[0159] The marker update unit 706 can update the decoding markers of all unit coding blocks of the current coding block to completion markers.

[0160] Optionally, the tag update unit 706 may also use bitwise logic operations to update all the decoded tags corresponding to the current coding block in the decoded tag count to the first value for each decoded tag count corresponding to the current coding block. When the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

[0161] Optionally, the video decoding device 700 further includes an initialization unit (not shown in the figure), which can redetermine a new current encoding processing block when the current encoding processing block has been decoded, and initialize all decoding tokens in the decoding token sequence as incomplete tokens.

[0162] In one embodiment, a video encoding device is also provided, which is similar to... Figure 7 Corresponding to the video decoding device 700 shown, the corresponding video decoding scheme can be applied as a whole to the video encoding process. That is, the video encoding device contains corresponding encoding determination units and tag update units, using an encoding tag sequence to characterize the encoding status of each unit encoding block in the current encoding processing block. Accordingly, this video encoding device can utilize a dig buffer neighborhood information memory access scheme to store and access the encoding information of unit encoding blocks. For the sake of brevity, further details are omitted here.

[0163] Regarding the apparatus in the above embodiments, the specific manner in which each unit performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0164] Figure 8 A computing environment 810 coupled to a user interface 850 is shown. The computing environment 810 may be part of a data processing server. The computing environment 810 includes a processor 820, a memory 830, and an input / output (I / O) interface 840.

[0165] Processor 820 typically controls the overall operation of computing environment 810, such as operations associated with display, data acquisition, data communication, and image processing. Processor 820 may include one or more processors for executing instructions to perform all or some of the steps in the methods described above. Furthermore, processor 820 may include one or more modules that facilitate interaction between processor 820 and other components. The processor may be a central processing unit (CPU), microprocessor, microcontroller, graphics processing unit (GPU), etc.

[0166] Memory 830 is configured to store various types of data to support the operation of computing environment 810. Memory 830 may include predefined software 832. Examples of such data include instructions for any application or method operating on computing environment 810, video datasets, image data, etc. Memory 830 can be implemented using any type of volatile or non-volatile memory device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0167] I / O interface 840 provides an interface between processor 820 and peripheral interface modules (such as keyboard, click wheel, buttons, etc.). Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I / O interface 840 can be coupled to encoders and decoders.

[0168] In an embodiment, a non-transitory computer-readable storage medium is also provided, including, for example, a memory 830 containing a plurality of programs and / or storing a bitstream generated by the above-described encoding method or a bitstream to be decoded by the above-described decoding method. The plurality of programs can be executed by a processor 820 in a computing environment 810 to perform the above-described methods. In one example, the plurality of programs can be executed by a processor 820 in a computing environment 810 to (e.g., from...) Figure 2 The video encoder 20 in the computing environment 810 receives a bitstream or data stream including encoded video information (e.g., video blocks representing encoded video frames, and / or one or more associated syntax elements, etc.), and can also be executed by the processor 820 in the computing environment 810 to perform the above-described decoding method based on the received bitstream or data stream. In another example, the plurality of programs can be executed by the processor 820 in the computing environment 810 to perform the above-described encoding method to encode video information (e.g., video blocks representing video frames, and / or one or more associated syntax elements, etc.) into a bitstream or data stream, and can also be executed by the processor 820 in the computing environment 810 to (e.g., to...) Figure 3 The video decoder 30 in the middle sends the bitstream or data stream. Alternatively, a non-transitory computer-readable storage medium may store data generated by the encoder (e.g., Figure 2 The video encoder 20 in the video encoder uses, for example, the encoding method described above to generate the video for the decoder (e.g., Figure 3The video decoder 30 in the video decoder uses a bitstream or data stream that includes encoded video information (e.g., video blocks representing encoded video frames, and / or one or more associated syntax elements, etc.) when decoding video data. Non-transitory computer-readable storage media can be, for example, ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, optical data storage devices, etc.

[0169] In one embodiment, a bitstream generated by the above-described encoding method or a bitstream to be decoded by the above-described decoding method is provided. In another embodiment, a bitstream comprising encoded video information generated by the above-described encoding method or encoded video information to be decoded by the above-described decoding method is provided.

[0170] In one embodiment, a computing device is also provided, comprising: one or more processors (e.g., processor 820); and a non-transitory computer-readable storage medium or memory 830 therein storing a plurality of programs executable by the one or more processors, wherein the one or more processors are configured to perform the methods described above when executing the plurality of programs.

[0171] In one embodiment, a computer program product having instructions for storing or transmitting a bitstream is also provided, the bitstream including encoded video information generated by the encoding method described above or encoded video information to be decoded by the decoding method described above. In another embodiment, a computer program product including, for example, a plurality of programs in a memory 830 is also provided, the plurality of programs being executable by a processor 820 in a computing environment 810 to perform the methods described above. For example, the computer program product may include a non-transitory computer-readable storage medium.

[0172] In an embodiment, the computing environment 810 may be implemented by one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), FPGAs, GPUs, controllers, microcontrollers, microprocessors, or other electronic components for performing the methods described above.

[0173] In one embodiment, a method for storing a bitstream is also provided, comprising: storing the bitstream on a digital storage medium, wherein the bitstream includes encoded video information generated by the above-described encoding method or encoded video information to be decoded by the above-described decoding method.

[0174] In one embodiment, a method for transmitting a bitstream generated by the encoder described above is also provided. In another embodiment, a method for receiving a bitstream to be decoded by the decoder described above is also provided.

[0175] The description in this disclosure has been presented for illustrative purposes and is not intended to be exhaustive or limited to this disclosure. Many modifications, variations, and alternative embodiments will be apparent to those skilled in the art from the teachings presented in the foregoing description and the associated drawings.

[0176] Unless otherwise specifically stated, the order of steps in the method according to this disclosure is intended to be illustrative only, and the steps of the method according to this disclosure are not limited to the specific order described above, but may be changed according to actual circumstances. Furthermore, at least one step in the method according to this disclosure may be adjusted, combined, or omitted as needed.

[0177] The examples chosen and described are intended to explain the principles of this disclosure and to enable others skilled in the art to understand the various embodiments of this disclosure, and preferably to utilize the basic principles and various embodiments with various modifications suitable for the intended particular purpose. Therefore, it will be understood that the scope of this disclosure is not limited to the specific examples of the disclosed embodiments, and that modifications and other embodiments are intended to be included within the scope of this disclosure.

Claims

1. A video decoding method, characterized in that, The video decoding method includes repeatedly executing the following steps for the current encoding block until decoding is complete: One coding block is determined from the current coding processing block as the current coding block, wherein the current coding processing block includes multiple coding blocks, and each coding block includes at least one unit coding block; Determine the target reference pixel of the current coding block; Based on the decoding marker sequence, it is determined whether the unit coding block corresponding to the target reference pixel has been decoded. The decoding marker sequence includes decoding markers that correspond one-to-one with each unit coding block in the current coding processing block. The decoding markers include completion markers and incomplete markers. If it is determined that the unit coding block corresponding to the target reference pixel has been decoded, the decoding information of the unit coding block corresponding to the target reference pixel is obtained. Based on the obtained decoding information, the current encoded block is decoded; Update the decoding markers of all unit coding blocks of the current coding block to the completion marker.

2. The video decoding method as described in claim 1, characterized in that, The decoded tag sequence includes multiple decoded tag numbers, each of which is a binary number with a preset number of bits. Each decoding tag number corresponds to a unit coding block row in the current coding block, the preset number of bits is greater than or equal to the number of unit coding block columns in the current coding block, and each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block row; or Each decoding tag number corresponds to a unit coding block column in the current coding processing block. The preset number of bits is greater than or equal to the number of unit coding block rows in the current coding processing block. Each decoding tag number sequentially records the decoding tag of each unit coding block in the corresponding unit coding block column.

3. The video decoding method as described in claim 2, characterized in that, The completion marker is a first value, and the incomplete marker is a second value. When the preset number of bits is greater than the number of columns or rows of the current encoding block, the portion of the decoding marker count that does not record the decoding marker is filled with the second value.

4. The video decoding method as described in claim 3, characterized in that, The step of updating the decoding markers of all unit coding blocks of the current coding block to the completion marker includes: For each decoding tag number corresponding to the current encoding block, bitwise logic operations are used to update all decoding tags in the decoding tag number corresponding to the current encoding block to the first value. Wherein, when the first value is 1 and the second value is 0, the bitwise logic operation is a bitwise OR operation, and when the first value is 0 and the second value is 1, the bitwise logic operation is a bitwise AND operation.

5. The video decoding method as described in claim 3, characterized in that, The step of determining whether the unit coding block corresponding to the target reference pixel has been decoded based on the decoding marker sequence includes: The number of decoded tags corresponding to the target reference pixel in the decoded tag sequence is determined as the target decoded tag number; Based on the difference between the preset bit depth and the number of consecutive second values ​​of the target decoding marker, and the coordinates of the target reference pixel, it is determined whether the unit coding block corresponding to the target reference pixel has been decoded. Wherein, when the first value is 1 and the second value is 0, the number of consecutive second values ​​is obtained by processing the target decoding marker using a 0 counting instruction. When the first value is 0 and the second value is 1, the number of consecutive second values ​​is obtained by processing the target decoding marker using a 1 counting instruction.

6. The video decoding method according to any one of claims 1 to 5, characterized in that, The step of determining whether the unit coding block corresponding to the target reference pixel has been decoded based on the decoding marker sequence includes: If the target reference pixel does not meet the preset boundary conditions, the unit coding block corresponding to the target reference pixel is determined to have completed decoding according to the decoding mark sequence. The preset boundary conditions are used to indicate that the specified pixel coordinates associated with the target reference pixel are at the boundary of the current image or the current coding block.

7. The video decoding method according to any one of claims 1 to 5, characterized in that, The step of determining a coding block from the current coding processing block as the current coding block includes: determining a coding block from the current coding processing block according to the raster scan order under single-threaded conditions, and using it as the current coding block.

8. The video decoding method according to any one of claims 1 to 5, characterized in that, The video decoding method further includes: If the current encoding processing block has completed decoding, a new current encoding processing block is determined, and all decoding tokens in the decoding token sequence are initialized to the incomplete tokens.

9. A video encoding method, characterized in that, The video encoding method includes repeatedly executing the following steps for the current encoding block until encoding is complete: One coding block is determined from the current coding processing block as the current coding block, wherein the current coding processing block includes multiple coding blocks, and each coding block includes at least one unit coding block; Determine the target reference pixel of the current coding block; Based on the encoding marker sequence, it is determined whether the unit encoding block corresponding to the target reference pixel has been encoded. The encoding marker sequence includes encoding markers that correspond one-to-one with each unit encoding block in the current encoding processing block. The encoding markers include completion markers and incomplete markers. If it is determined that the unit coding block corresponding to the target reference pixel has been encoded, the encoding information of the unit coding block corresponding to the target reference pixel is obtained. The current encoding block is encoded based on the obtained encoding information; Update the encoding tags of all unit encoding blocks of the current encoding block to the completion tag.

10. A video decoding device, characterized in that, The video decoding device includes the following units that cycle through the current encoding block until decoding is complete: The coding block determination unit is configured to determine a coding block from the current coding processing block as the current coding block, wherein the current coding processing block includes multiple coding blocks, and each coding block includes at least one unit coding block; The reference determination unit is configured to determine the target reference pixel point of the current coding block; The decoding determination unit is configured to determine whether the unit coding block corresponding to the target reference pixel has been decoded based on the decoding mark sequence, wherein the decoding mark sequence includes decoding marks that correspond one-to-one with each unit coding block in the current coding processing block, and the decoding marks include completion marks and incomplete marks; The target acquisition unit is configured to acquire the decoding information of the unit coding block corresponding to the target reference pixel when it is determined that the unit coding block corresponding to the target reference pixel has been decoded. The decoding processing unit is configured to decode the current encoded block based on the acquired decoding information; The tag update unit is configured to update the decoding tags of all unit coding blocks of the current coding block to the completion tag.

11. A video encoding device, characterized in that, The video encoding apparatus includes the following units that cycle through the current encoding block until encoding is complete: The coding block determination unit is configured to determine a coding block from the current coding processing block as the current coding block, wherein the current coding processing block includes multiple coding blocks, and each coding block includes at least one unit coding block; The reference determination unit is configured to determine the target reference pixel point of the current coding block; The encoding determination unit is configured to determine whether the unit encoding block corresponding to the target reference pixel has been encoded based on the encoding mark sequence, wherein the encoding mark sequence includes encoding marks that correspond one-to-one with each unit encoding block in the current encoding processing block, and the encoding marks include completion marks and incomplete marks; The target acquisition unit is configured to acquire the encoding information of the unit encoding block corresponding to the target reference pixel when it is determined that the unit encoding block corresponding to the target reference pixel has been encoded. The encoding processing unit is configured to encode the current encoding block according to the acquired encoding information; The marker update unit is configured to update the coding markers of all unit coding blocks of the current coding block to the completion marker.

12. An electronic device, characterized in that, include: At least one processor; At least one memory that stores computer-executable instructions. The computer-executable instructions, when executed by at least one processor, cause at least one processor to perform the video decoding method as described in any one of claims 1 to 8 or the video encoding method as described in claim 9.

13. A computer-readable storage medium, characterized in that, When the instructions in the computer-readable storage medium are executed by at least one processor, they cause at least one processor to perform the video decoding method as claimed in any one of claims 1 to 8 or the video encoding method as claimed in claim 9.

14. A computer program product comprising computer instructions, characterized in that, When the computer instructions are executed by at least one processor, they implement the video decoding method as claimed in any one of claims 1 to 8 or the video encoding method as claimed in claim 9.

15. A method for storing a bit stream, characterized in that, include: The bitstream is stored on a digital storage medium, wherein the bitstream includes encoded video information generated by the video encoding method of claim 9 or encoded video information to be decoded by the video decoding method of any one of claims 1 to 8.

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