A composite bus bar structure with photo-generated carrier collection function and a preparation method and application thereof

By introducing a pn junction parallel structure and a low-temperature ALD buffer layer into photovoltaic modules, the problems of high resistance and interface defects in traditional busbars are solved, improving the collection efficiency of photogenerated carriers and the stability of the modules, and realizing the efficient integration of photoelectric conversion and busbar operation.

CN120936106BActive Publication Date: 2025-12-26CANDO SOLARPHOTOELECTRIC TECH (CHANGZHOU) CO LTD
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Patent Information

Application Number
CN202511433795.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-09
Publication Date
2025-12-26
Estimated Expiration
2045-10-09

AI Technical Summary

Technical Problem

Traditional busbars in photovoltaic modules have high resistance and low carrier transport efficiency. They are also prone to delamination or failure due to interface defects and differences in thermal expansion coefficients, which affects the collection efficiency of photogenerated carriers.

Method used

A pn junction is formed on a metal substrate. The main cell area and the newly added pn junction area are connected in parallel by laser scribing and mask layering. A SiO2 or Al2O3 buffer layer is introduced by combining low-temperature ALD process, the tin plating layer is thinned and the lamination parameters are optimized to improve the photoelectric conversion and parallel bus efficiency.

Benefits of technology

It improves the overall power generation efficiency of photovoltaic modules, enhances carrier transport efficiency and device stability, reduces interface recombination losses, extends module lifespan, and improves packaging reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a composite busbar structure with a photo-generated carrier collection function and a preparation method and application thereof, and belongs to the technical field of photovoltaic modules. The application forms a p-n junction by depositing a p-type semiconductor and an L-shaped n-type semiconductor with a cross-sectional shape on the surface of a tinned copper strip. Under illumination, the built-in electric field separates photo-generated carriers, and the main cell area and the newly-added p-n junction area are connected in parallel by setting laser scribe and mask layering. The photoelectric conversion and busbar parallel of the tinned copper strip are realized, the current of the photovoltaic module is increased, and thus the overall power generation efficiency of the photovoltaic module is improved. The function integration is realized. The application breaks through the function limitation of the traditional busbar as a conductor, realizes the change from passive conduction to active photoelectric conversion, and has significant technical progress significance and good application prospect.
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Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of photovoltaic modules, and particularly relates to a composite busbar structure with a photo-generated carrier collection function and a preparation method and application thereof. BACKGROUND

[0002] In current mainstream photovoltaic modules (such as crystalline silicon solar cell modules), a busbar is usually used to connect multiple cell pieces in series or in parallel, playing a role of electric conduction and current collection. The traditional busbar only serves as a current conduction path and does not participate in the photoelectric conversion process. In order to reduce the light-shading loss, a "non-shading" busbar layout has also appeared in modern designs, but its core function is still electric conduction. Moreover, the traditional busbar has a thick tin plating layer (10-20 μm), resulting in high resistance, low carrier transport efficiency, and easy interface defect affecting the adhesion of semiconductor materials. The tin-plated copper strip of the traditional busbar has a large difference in thermal expansion coefficient with the semiconductor material, and is prone to interface stress at high temperature, resulting in delamination or failure. The lamination process used at high temperature (150℃) is easy to damage the semiconductor functional layer, and the insufficient interface bonding force between POE and the coating layer also easily leads to delamination.

[0003] With the development of high-efficiency cell technology (such as PERC, HJT, TOPCon, etc.), the requirement for carrier collection efficiency is continuously improved. Therefore, how to further improve the collection efficiency of photo-generated carriers by photovoltaic modules is one of the important research directions for improving the conversion efficiency of the modules. SUMMARY

[0004] The present application provides a composite busbar structure with a photo-generated carrier collection function and a preparation method and application thereof, a p-n junction is formed on the surface of a metal substrate, the built-in electric field separates the photo-generated carriers under illumination, and the main cell area and the newly added p-n junction area are connected in parallel by setting laser scribe and mask delamination, realizing the parallel of photoelectric conversion and current collection of the metal substrate, and improving the overall power generation efficiency of the photovoltaic module.

[0005] To achieve the above purpose, the present application adopts the following technical solutions:

[0006] A composite busbar structure with a photo-generated carrier collection function, from bottom to top, comprises a metal substrate, a buffer layer, a TCO layer, a p-n junction semiconductor photoelectric functional layer, and a transparent high-temperature coating layer;

[0007] The back light surface of the metal substrate is connected with a cell tab (for collecting the current of the cell piece), and the light receiving surface is surface treated and subsequently coated;

[0008] Part of the TCO layer is located at both ends of the metal substrate, and the buffer layer is located between the part of the TCO layer,

[0009] Another part of the TCO layer is located on the buffer layer and is a plurality of independent conductive areas;

[0010] The p-n junction semiconductor photoelectric functional layer is located on the buffer layer and is a plurality of independent units connected with each other.

[0011] The p-n junction semiconductor photoelectric functional layer has a p-type layer at the bottom and an n-type layer at the top.

[0012] A preparation method of a composite bus bar structure with a photo-generated carrier collection function, comprising the following steps:

[0013] Pretreating the metal substrate;

[0014] Taking a plurality of high-temperature adhesive tapes and respectively bonding the two long sides of the metal substrate;

[0015] Placing a mask ① and shielding part of the positive and negative electrodes of the metal substrate by the mask ①;

[0016] Depositing a buffer layer on the surface of the metal substrate to relieve the difference in thermal expansion;

[0017] Peeling off the mask ①, placing a mask ②, and breaking the subsequent TCO layer to be deposited into a plurality of independent conductive areas by the mask ②;

[0018] Depositing a TCO thin film layer and peeling off the mask ② after deposition;

[0019] Placing a mask ③ and breaking the subsequent p-type layer to be deposited into a plurality of independent areas by the mask ③;

[0020] Depositing a p-type semiconductor layer on the buffer layer;

[0021] Peeling off the mask ③ and then depositing an n-type semiconductor layer to form a p-n junction;

[0022] Removing the p-n semiconductor layer in the specified area to form independent units and realize interconnection between the units, and finally obtain a composite bus bar structure.

[0023] In the above steps, the placement rule of the mask ② is that the total number of PN junctions is N, the number of masks ② is N, and the positions are adjusted according to the total number of PN to make the length of the TCO2 layer between the masks ② equal, the length of the TCO2 layer is 1-10 mm, and the length of the TCO1 layer is 1-2 mm;

[0024] The placement rule of the mask ③ is that the total number of PN junctions is N, the number of masks ③ is N, and the positions are adjusted according to the total number of PN to make the length of the p-type layer between the masks ③ equal, the length of the mask ③ is 1-5 mm, and because the TCO thin film layer is very thin (100-300 nm), the leftmost end of each mask ③ can be considered to coincide with the rightmost end of the mask ② when the mask ③ is placed, and the overlapping part is controlled to be 0.1-0.5 mm;

[0025] By adjusting the doping concentration of the p-type semiconductor layer and the n-type semiconductor layer and the total number of PN junctions, the total built-in potential V 总 Matched with the open circuit voltage (Voc) of the main battery string:

[0026] V 总 =N×V bi ,

[0027] ,

[0028] Conduction band offset: ,

[0029] Valence band offset: ,

[0030] Wherein, N is the total number of PN junctions, is the built-in potential of a single p-n junction, , The doping concentration of the p-type layer and the n-type layer respectively, is the concentration of intrinsic carriers in the p-type layer without doping, is the concentration of intrinsic carriers in the n-type layer without doping, is the Boltzmann constant, is the absolute temperature of the environment of the semiconductor material, is the electronic charge, is the electron affinity of the p-type layer, is the electron affinity of the n-type layer, is the band gap of the p-type layer, is the band gap of the n-type layer.

[0031] The composite busbar structure obtained above is used to assemble a photovoltaic module.

[0032] Beneficial effects: The present application provides a composite busbar structure with a photo-generated carrier collection function and its preparation method and application, which has the following advantages compared with the prior art:

[0033] 1、The present application forms a p-n junction by depositing a p-type semiconductor and an L-shaped n-type semiconductor in cross-section on the surface of the tin-plated copper strip, separates photo-generated carriers under illumination by the built-in electric field, and realizes parallel connection of the main battery area and the newly added p-n junction area by setting laser scribe and mask layering, realizes photoelectric conversion and bus parallel of the tin-plated copper strip, increases the current of the photovoltaic module, thereby improving the overall power generation efficiency of the photovoltaic module, realizes functional integration, breaks through the functional limitation of the traditional busbar as a conductor, realizes the transformation from "passive conduction" to "active photoelectric conversion", has significant technical progress significance and good application prospect;

[0034] 2、The tin plating layer is thinned to 1-5 μm, surface defects are repaired, semiconductor material is uniformly deposited, carrier transport efficiency is improved, interface recombination loss is reduced, and device stability is enhanced;

[0035] 3、The low-temperature ALD process is used to introduce a SiO2 or Al2O3 buffer layer to relieve the thermal expansion difference between the copper substrate (≈17 ppm / K) and the semiconductor, so that the interface stress is reduced by more than 80%, and the device life is prolonged; and the low-temperature ALD process is used to prevent tin migration from causing tin plating layer structure damage, avoiding the risk of short circuit or open circuit;

[0036] 4、Optimize the lamination parameters in the photovoltaic module assembly process: the peak temperature is reduced to 140℃, the pressure gradient (0.3→0.8 bar) is controlled to promote the full contact of POE and coating, the time is extended to 20 minutes, and an Al2O3 transparent high-temperature resistant coating (10-20 nm) and plasma activation treatment are introduced, the plasma activation increases the surface hydroxyl (-OH), improves the POE wettability and chemical bonding ability, and the reliability of the module packaging is significantly improved. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 It is a schematic diagram of the composite busbar structure in the embodiment of the application;

[0038] Figure 2 It is a schematic diagram of the preparation process of the composite busbar in the embodiment of the application;

[0039] Figure 3 It is Figure 2 a schematic diagram of the position of mask ① in the embodiment of the application;

[0040] Figure 4 It is a schematic diagram of the photovoltaic module circuit in the embodiment of the application;

[0041] Figure 5 It is a flowchart of the photovoltaic module manufacturing process using the composite busbar in the embodiment of the application. DETAILED DESCRIPTION

[0042] The application will be described in detail below in conjunction with the drawings and specific embodiments:

[0043] Embodiment 1

[0044] As shown in Figure 2 and Figure 5 , the preparation method of the composite busbar structure includes the following steps:

[0045] Step one: metal substrate pretreatment

[0046] The tin-plated copper strip with a thickness of 0.3-0.4 mm and a width of 4-6 mm is selected, the thickness of the tin-plated layer on the front surface of the tin-plated copper strip is reduced from 10-20 μm in the traditional process to 1-5 μm through chemical mechanical polishing (CMP) or wet etching, the resistance can be reduced, the carrier transport efficiency can be improved, and the specific surface area can be increased in a nearly lossless manner through one-step low-temperature plasma activation, thereby synergistically enhancing the effective adhesion and combination of the subsequent semiconductor material.

[0047] The chemical mechanical polishing method specifically includes the following steps:

[0048] The polishing liquid formula is: silicon dioxide abrasive particles (50 nm, concentration 5 wt%) + citric acid buffer (pH = 4.5 ± 0.2).

[0049] The process parameters are: polishing disc rotation speed 80-100 rpm, pressure 0.1-0.3 MPa, and end point monitored by online four-probe resistance resistivity ≤0.5 mΩ·cm.

[0050] The wet etching method specifically includes the following steps:

[0051] The nitric acid-ammonium fluoride system (HNO3:NH4F = 1:3 vol%) is used, the etching rate is controlled at 0.8-1.2 μm / min, and after etching, deionized water ultrasonic cleaning (40 kHz, 5 minutes) is required to remove residual acid.

[0052] Optionally, tin-plated layer defect repair: if there are pinholes or roughness in the tin-plated layer, the surface defects need to be repaired by plasma treatment or ultraviolet ozone cleaning in the pretreatment stage to ensure uniform deposition of the subsequent semiconductor material, reduce interface recombination loss, and avoid the risk of peeling of the subsequent deposited material.

[0053] The plasma treatment parameters are: Ar / O2 mixed gas (ratio 4:1), power 200 W, treatment time 120 seconds, and chamber vacuum degree ≤1×10 -3 mbar.

[0054] Ultraviolet ozone cleaning: wavelength 254 nm, ozone concentration ≥100 ppm, treatment time 30 minutes, and surface contact angle ≤10° (verify hydrophilicity).

[0055] Step two: bus bar bonding

[0056] Select PET transparent high-temperature adhesive tape (or polyimide (PI) or Teflon (PTFE) tape), width ≥ bus bar width, 5-7 mm, thickness 0.05-0.08 mm.

[0057] Bus bar bonding: take 4 sections of 18-20 mm high-temperature adhesive tape, such as Figures 1-3As shown, respectively, A-B-C, D-E-F are two long bus bars, and the high-temperature adhesive tape is attached to the back of the tin-plated copper strip (metal substrate), i.e. the side of the battery tab connection.

[0058] Step three: place mask ① (take long bus bar A-B-C as an example)

[0059] The mask ① shields part of the positive and negative electrodes of the tin-plated copper strip, and the width of the mask is 0.5-1mm wider than the conductive area of the bus bar (4-6mm), i.e. the total width of the mask is 5-7mm. The mask ① is located Figure 3 As shown, the positive and negative electrodes of A-B-C, D-E-F are shielded, and the distance between the mask and the outermost tab is 1mm. The length of the mask ① is 2-3mm. The material of the mask is polyimide (PI) mask with a thickness of 50-100μm, a temperature resistance of ≥250℃ (adapted to ALD process temperature of 180-200℃), high chemical stability (acid and alkali corrosion resistance), and a flatness of ≤5μm to avoid uneven ALD deposition due to warping.

[0060] Step four: introduce a buffer layer

[0061] Silicon dioxide buffer layer: 10-20nm of SiO2 is deposited on the surface of the tin-plated layer by atomic layer deposition (ALD) to alleviate the difference in thermal expansion coefficient (copper ≈ 17ppm / K, SiO2 ≈ 0.5ppm / K), reduce interface stress, and improve stability.

[0062] Process parameters:

[0063] Precursor: SiCl4 (purity ≥ 99.999%) + H2O (resistivity ≥ 18MΩ·cm);

[0064] Deposition temperature: 180±5℃, cycle number 200-300 times (thickness 10-20 nm), low-temperature process can protect the structure of the tin-plated layer and avoid short circuit or open circuit caused by tin migration;

[0065] Thickness uniformity control: configure in-situ ellipsometer (accuracy ±0.1nm), within-chip non-uniformity ≤3%.

[0066] Step five: place mask ②

[0067] After mechanically peeling off the mask ①, the mask ② is used to break the ITO film to be deposited subsequently into multiple independent conductive areas. The width and thickness of the mask ② are consistent with those of the aforementioned mask ①, and the position is as shown in Figure 2 The length of the TCO2 layer between the three masks ② is equal, and the length of the TCO2 layer is 1-10mm, and the length of the TCO1 layer is 1-2mm.

[0068] According to embodiment 1, the total length of the busbars A-B-C and D-E-F is 1086 mm, and according to the three segments shown in the diagram, the length of the mask ② required for each segment is 355-360 mm. According to the voltage of the main battery area, the number of mask segments can be adjusted accordingly.

[0069] Step six: deposition of TCO film (taking ITO film as an example)

[0070] ITO film layer: ITO film is deposited on the buffer layer by magnetron sputtering method (RF / DC sputtering), and the thickness of the ITO film is 100-300 nm, which takes into account the conductivity (low resistivity) and light transmittance (≥90%), while avoiding the loss of near-infrared light caused by excessive thickness.

[0071] Target selection: In2O3: Sn (ITO) ceramic target (In: Sn molar ratio 9: 1), purity ≥99.99%;

[0072] Sputtering gas: argon (Ar, purity ≥99.999%) + oxygen (O2, purity ≥99.999%), mixed ratio Ar / O2=95:5 (volume ratio);

[0073] Auxiliary gas: nitrogen (N2, purity ≥99.999%), used as an annealing protective atmosphere.

[0074] Sputtering parameters: radio frequency 13.56 MHz, power 150-200 W, sputtering pressure 0.5-0.8 Pa, temperature 150-180℃, sputtering time 10-20 min, target-to-substrate distance 80-100 mm.

[0075] Annealing parameters: temperature 200-250℃, time 30 min, N2 / H2 (95:5) mixed gas.

[0076] Step seven: placing mask ③

[0077] After mechanically peeling off the mask ②, the mask ③ is used to break the p-type layer to be deposited subsequently into multiple independent regions. The width and thickness of the mask ③ are consistent with those of the aforementioned mask ①, and the position is as shown in Figure 2 The length of the mask ③ is 1-5 mm, so that the length of the p-type layer between the three masks ③ is equal. Since the ITO layer is very thin, 100-300 nm, when placing the mask ③, it can be directly considered that the leftmost end of each mask ③ coincides with the rightmost end of the mask ②, and the overlapping part is controlled to be 0.1-0.5 mm.

[0078] Step eight: deposition of photoelectric functional layer

[0079] The p-n materials are not limited to using silicon materials, and typical thin film or compound semiconductor photovoltaic materials can also be used.

[0080] Deposition of p-type layer: A p-type semiconductor film with a thickness of 40-80 nm is deposited on the buffer layer, and the semiconductor film is deposited by atomic layer deposition (ALD);

[0081] Semiconductor material: Mg-doped GaN (alternatives can be compound semiconductors (II-VI or III-V), nickel oxide (NiO), copper sulfide (CuS), etc.);

[0082] Process parameters:

[0083] Precursor combination: TMGa (trimethylgallium) + Cp2Mg (magnesiumocene, p-type doping source);

[0084] Deposition temperature: 300-350°C, single cycle thickness 0.1-0.15Å / cycle;

[0085] Total thickness matching: p-type layer thickness ≈ 80% of n-type layer (e.g. n-layer 100 nm → p-layer 80 nm);

[0086] Annealing process: 450°C nitrogen annealing for 30 minutes after deposition to activate the dopant;

[0087] Deposition of N-type layer: After mechanical stripping of mask ③, an N-type semiconductor (such as n-Si) with a thickness of 50-100 nm is deposited to form a p-n junction, and the semiconductor film is deposited by atomic layer deposition (ALD);

[0088] Semiconductor material: P-doped amorphous silicon (P-a-Si:H) (alternatives can be compound semiconductors (II-VI or III-V), zinc oxide (Zn(O,S,OH)x), cadmium sulfide (CdS), etc.);

[0089] Process parameters:

[0090] Precursor combination: SiH4 (silane) + PH3 (phosphorus doping source);

[0091] Deposition temperature: 180-200°C;

[0092] Single cycle thickness: 0.1-0.15Å / cycle, total thickness 50-100 nm (cycle number 300-500 times);

[0093] Reaction pressure: 0.2-0.3 Torr, carrier gas is high-purity nitrogen (purity ≥ 99.999%);

[0094] Specifically, by adjusting the doping concentration of the p-type semiconductor layer and the n-type semiconductor layer and the total number of PN junctions, the total built-in potential V 总 Match the open-circuit voltage (Voc) of the main battery string:

[0095] V 总 =N×V bi ,

[0096] ,

[0097] Conduction band offset: ,

[0098] Valence band offset: ,

[0099] where N is the total number of PN junctions, is the built-in potential of a single p-n junction, , are the doping concentrations of the p-type layer and n-type layer, respectively, is the intrinsic carrier concentration of the p-type layer when undoped, is the intrinsic carrier concentration of the n-type layer when undoped, is the Boltzmann constant, is the absolute temperature of the environment in which the semiconductor material is located, is the electronic charge, is the electron affinity of the p-type layer, is the electron affinity of the n-type layer, is the bandgap width of the p-type layer, is the bandgap width of the n-type layer.

[0100] Step nine: laser scribing

[0101] Laser scribing: Remove the semiconductor layer in the specified area by laser etching to form independent units and achieve interconnection between units through the TCO layer. The etching depth needs to be accurately controlled above the TCO layer to avoid damaging the TCO layer (100-300 nm)

[0102] Pre-treatment: Clean the surface of the N-type layer to remove particulate contaminants. Fix the bus bar on the vacuum adsorption platform to ensure flatness (<50 μm);

[0103] Laser system configuration: Select a UV nanosecond laser (wavelength 355 nm), pulse width 10-30 ns, repetition frequency 50-100 kHz, single pulse energy 50-100 μJ, average power 2.5-10 W, and spot diameter 10-30 μm;

[0104] Laser system calibration: Ensure that the laser is perpendicular to the sample surface (deviation <0.1°), and use the Z-axis automatic focusing system to accurately position the focal point on the surface of the N-type layer;

[0105] Scribing path planning: Scribing position is as follows Figure 2The width of the scribe line is 30-50 μm, and the distance between adjacent scribe lines is determined by the number of segments of the p-n structure. In the three-segment structure shown in Example 1, the distance is kept at 360-370 cm.

[0106] N-type layer etching parameters: laser energy density 0.5-1.0 J / cm², scanning times 1-3 times, scanning speed 1000-2000 mm / s;

[0107] P-type layer etching parameters: laser energy density 0.3-0.7 J / cm², scanning times 1-2 times, scanning speed 1500-2500 mm / s;

[0108] Process monitoring:

[0109] Coaxial microscope: real-time observation of the etching process to monitor the quality of the scribe line

[0110] Power meter: dynamic monitoring of the stability of the laser output power (fluctuation <±5%)

[0111] Spectrometer: analysis of plasma emission spectrum to determine the etching endpoint

[0112] Post-processing and detection: nitrogen blowing to remove debris, 3D microscope observation of the surface morphology without obvious thermal damage cracks, SEM observation of the edge roughness <5 μm, step meter observation of the etching depth without touching the TCO layer, four-probe tester for testing the electrical isolation resistance >10 MΩ (between adjacent cells)

[0113] This example takes a 12 half-piece 210R photovoltaic module as an example. The circuit of the photovoltaic module is as shown in Figure 4 The photovoltaic module assembly process using the above bus bar structure includes the following steps:

[0114] Step 1: Prepare a transparent high-temperature-resistant coating

[0115] Transparent high-temperature-resistant coating: Al2O3 (thickness 10-20 nm) by atomic layer deposition (ALD), which has both insulation and thermal stability (temperature resistance >300°C). Form an isolation layer on the surface of the bus bar (a transparent high-temperature-resistant layer is formed on the P-N junction layer) to prevent direct contact between the lamination high temperature and the POE material and the PN layer.

[0116] Coating material:

[0117] Aluminum source: trimethylaluminum (TMA, purity ≥99.9999%), to avoid the influence of carbon impurities on insulation.

[0118] Oxygen source: deionized water (resistivity ≥18 MΩ·cm) or ozone (O3 concentration ≥200 g / m³)

[0119] Process parameters:

[0120] Deposition temperature: 150-180℃

[0121] Cycle number: 100-200 times (single cycle thickness ≈ 0.1 nm, total thickness 10-20 nm)

[0122] Reaction pressure: 0.5-2 Torr, carrier gas is high-purity nitrogen (purity ≥ 99.999%)

[0123] Pulse time: TMA pulse 0.1 s → purge 5 s → H2O pulse 0.05 s → purge 5 s

[0124] Effects:

[0125] Thickness uniformity: in-wafer non-uniformity ≤ ± 3% (real-time monitoring by in-situ ellipsometer)

[0126] Insulation performance: breakdown field strength ≥ 8 MV / cm

[0127] Transmittance: visible light band (400-800 nm) transmittance ≥ 95% (detected by spectrophotometer)

[0128] Plasma activation treatment: after depositing the transparent high-temperature-resistant coating, use oxygen plasma to bombard the coating surface, radio frequency frequency 13.56 MHz, electrode spacing 30 mm, increase the active groups such as hydroxyl (-OH) on the surface, improve the wettability and chemical bonding ability of POE, and improve the interfacial bonding force between the transparent coating and POE. For example, the final busbar structure with three p-n structures is as shown in Figure 1 .

[0129] Process parameters of oxygen plasma activation treatment:

[0130] Power: 80 W (power density ≈ 0.5 W / cm², to avoid coating damage)

[0131] Treatment time: 40 seconds (too long time may cause Al2O3 surface roughening)

[0132] Gas ratio: O2 / Ar = 1:3 (total flow 100 sccm), chamber pressure 50 mTorr

[0133] Substrate temperature: room temperature (to avoid thermal stress leading to coating cracking)

[0134] Surface modification effect:

[0135] Hydroxyl density: XPS detects that the content of -OH groups on the surface is ≥ 5 at.%

[0136] Wettability: water contact angle ≤ 15°

[0137] Step two: laminated packaging

[0138] Laminated encapsulation: laminated in the order of "glass-POE-battery / busbar (composite busbar structure and battery string after the whole welding)-POE-backplane", after vacuum laminated installation frame, complete the preparation of the new busbar photovoltaic module.

[0139] Temperature optimization:

[0140] The laminating peak temperature is reduced from the conventional 150°C to 140°C (Al2O3 coating temperature resistance > 300°C, POE can still be effectively crosslinked at this temperature).

[0141] Pressure gradient control:

[0142] The initial pressure is 0.3 bar for 3 minutes, which makes the molten POE slowly infiltrate the coating surface; gradually increased to 0.8 bar and maintained for 10 minutes to ensure sufficient contact between the interfaces.

[0143] Time extension:

[0144] The total laminating time is extended from 15 minutes to 20 minutes to promote the reaction of POE molecular chains and coating surface active groups.

[0145] Table 1 Parameter settings at each stage of the laminated encapsulation process

[0146]

[0147] The above only describes the preferred embodiments of the present application, and it should be noted that for those skilled in the art, several improvements can be made without departing from the principles of the present application, and these improvements should also be considered as the protection scope of the present application.

Claims

1. A composite busbar structure having a photo-carrier collection function, characterized by, From bottom to top are metal base, buffer layer, TCO layer, p-n junction semiconductor photoelectric functional layer, transparent high-temperature coating layer; The back of the metal base is connected with the battery welding strip, and the light-receiving surface is surface-treated and coated subsequently; Part of the TCO layer is located at the positive and negative poles of the metal base, and the buffer layer is located between the part of the TCO layer, Another part of the TCO layer is located on the buffer layer and is a plurality of independent conductive regions; The p-n junction semiconductor photoelectric functional layer is located on the buffer layer; The p-n junction semiconductor photoelectric functional layer is a plurality of independent units, and the units are connected to each other through the TCO layer.

2. The composite busbar structure with photo-generated carrier collection function according to claim 1, characterized in that, The p-n junction semiconductor photoelectric functional layer has a p-type layer at the bottom and an n-type layer at the top.

3. A method for manufacturing a composite busbar structure having a photo-carrier collection function, characterized by, The method comprises the following steps: Pretreating the metal base; A plurality of high-temperature adhesive tapes are taken and adhered to the two long sides of the metal base respectively; A mask ① is placed to shield part of the positive and negative poles of the metal base from the current; A buffer layer is deposited on the surface of the metal base to relieve the difference in thermal expansion; The mask ① is peeled off, a mask ② is placed, and the TCO layer to be deposited subsequently is broken into a plurality of independent conductive regions by using the mask ②; A TCO thin film layer is deposited, and the mask ② is peeled off after deposition; A mask ③ is placed to break the p-type layer to be deposited subsequently into a plurality of independent regions; A p-type semiconductor layer is deposited on the buffer layer; The mask ③ is peeled off, and then an n-type semiconductor layer is deposited to form a p-n junction; The p-n semiconductor layer in the specified region is removed to form independent units and realize interconnection between the units, and finally a composite bus bar structure is obtained.

4. The method of claim 3, wherein the method further comprises: The placement rule of the mask ② is that the total number of PN junctions is N, the number of masks ② is N, and the positions are adjusted according to the total number of PN junctions so that the lengths of the TCO layers between the masks ② are equal.

5. The method of producing a composite busbar structure with a photo-generated carrier collecting function according to claim 3 or 4, characterized in that, The lengths of the TCO layers between the masks ② are 1-10 mm, and the lengths of the TCO layers at the left and right ends are 1-2 mm.

6. The method of claim 3, wherein the method further comprises: The placement rule of the mask ③ is that the total number of PN junctions is N, the number of masks ③ is N, and the positions are adjusted according to the total number of PN junctions so that the lengths of the p-type semiconductor layers between the masks ③ are equal.

7. The method of producing a composite busbar structure with a photo-carrier collection function according to claim 3 or 6, wherein When the mask ③ is placed, the leftmost end of each mask ③ coincides with the rightmost end of the mask ②, and the coinciding part is controlled to be 0.1-0.5 mm.

8. The method of claim 3, wherein the method further comprises: By adjusting the doping concentration of the p-type semiconductor layer, the n-type semiconductor layer and the total number of PN junctions, the total built-in potential V 总 Matches the open circuit voltage Voc of the main battery string: V 总 =N×V bi , Conduction band offset: , Valence band offset: , wherein N is the total number of PN junctions, is the built-in potential of a single p-n junction, , are the doping concentrations of the p-type layer and n-type layer, respectively, is the intrinsic carrier concentration of the p-type layer when not doped, is the intrinsic carrier concentration of the n-type layer when not doped, is the Boltzmann constant, is the absolute temperature of the environment in which the semiconductor material is located, is the electronic charge, is the electron affinity of the p-type layer, is the electron affinity of the n-type layer, is the band gap of the p-type layer, is the band gap of the n-type layer.

9. Use of the composite busbar structure having a photo-generated carrier collecting function according to any one of claims 1 to 2, characterized in that, The composite bus bar structure is used for assembling a photovoltaic module.

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