MLCC DC bias aging test device and method

Abstract

The invention relates to the technical field of MLCC testing, and discloses an MLCC DC bias aging test device and method. The device comprises a first test mother board, a second test mother board and a test daughter board, the first test mother board comprises a first printed circuit board arranged in a normal temperature environment, and a first switch, a first test daughter board slot, a first welding area and a second welding area which are arranged on the first printed circuit board; the second test mother board comprises a second printed circuit board and a third printed circuit board, the second printed circuit board and the third printed circuit board are connected through a third welding area, the second printed circuit board is arranged in a high and low temperature environment, and the second printed circuit board is provided with a second test daughter board slot; the third printed circuit board is provided with a second switch, a fourth welding area and a fifth welding area; and the test daughter board comprises a fourth printed circuit board, and a sample welding area and a golden finger which are arranged on the fourth printed circuit board. According to the invention, the test accuracy can be improved, and the test temperature range is widened.

Description

Technical Field

[0001] This invention relates to the field of MLCC testing technology, and in particular to an MLCC DC bias aging test apparatus and method. Background Technology

[0002] Multilayer ceramic capacitors (MLCCs) are crucial passive components in electronic circuits. Their long-term performance stability and reliability under DC voltage conditions directly determine the operational life and safety of the entire equipment. Therefore, DC bias-related tests on MLCCs are of great significance.

[0003] DC bias characteristic testing is mainly used to evaluate the instantaneous performance changes of MLCCs under DC voltage bias, especially the fluctuation of capacitance value after applying DC voltage; while DC bias aging test, based on DC bias characteristic testing, further evaluates the performance degradation law and reliability of MLCCs under long-term operation by simulating the long-term aging process in actual use scenarios, and is a key means to determine the service life of MLCCs.

[0004] Currently, the mainstream DC bias aging test procedure for MLCCs is as follows: First, the MLCC sample is placed in a test circuit with a constant DC voltage for aging; after the preset test time point is reached, the sample is removed from the test circuit by disconnecting the power and then transferred to an LCR meter (test circuit) with the bias voltage turned on for measuring parameters such as capacitance and leakage current. However, this test procedure has obvious drawbacks: First, the transfer of the sample from the test circuit to the test circuit will generate a "voltage idle period" of tens of seconds to several minutes. During this period, the MLCC is de-biased, and the internal pinned domain walls and dipoles undergo a brief polarization recovery, causing the capacitance decay rate measured at the time to fail to accurately reflect the actual decay state during the aging process, resulting in a significant decrease in the accuracy of the test results; Second, this test method can only be carried out at room temperature and cannot simulate the aging test of MLCCs in high and low temperature environments, thus limiting the test capability range. Summary of the Invention

[0005] In order to overcome the above-mentioned defects of existing MLCC DC bias aging test methods, the present invention provides an MLCC DC bias aging test device and method.

[0006] In a first aspect, embodiments of the present invention provide a DC bias aging test apparatus for MLCCs, comprising:

[0007] A first test motherboard, a second test motherboard, and a test daughterboard, wherein the test daughterboard is inserted into the first test motherboard or the second test motherboard;

[0008] The first test motherboard includes a first printed circuit board placed in a normal temperature environment and a first switch, a first test sub-board slot, a first soldering area and a second soldering area disposed on the first printed circuit board. The two ends of the first soldering area are respectively connected to a first DC power supply and the first switch, and the two ends of the second soldering area are respectively connected to a first test instrument and the first switch.

[0009] The second test motherboard includes a second printed circuit board and a third printed circuit board. The second printed circuit board and the third printed circuit board are connected by a third solder joint. The second printed circuit board is placed in a high and low temperature environment. The second printed circuit board is provided with a second test sub-board slot. The third printed circuit board is provided with a second switch, a fourth solder joint, and a fifth solder joint. The two ends of the fourth solder joint are respectively connected to a second DC power supply and the second switch. The two ends of the fifth solder joint are respectively connected to a second test instrument and the second switch.

[0010] The test sub-board includes a fourth printed circuit board, a sample soldering area for mounting the MLCC under test, and gold fingers for inserting into the test sub-board slot, all disposed on the fourth printed circuit board.

[0011] Preferably, the first switch is a three-position switch, with the left position of the first switch connected to the first DC power supply, the middle position of the first switch connected to the first test sub-board slot, and the right position of the first switch connected to the first test instrument.

[0012] Preferably, there are two first switches, and when the test sub-board is plugged into the first test motherboard, the two ends of the MLCC under test are respectively connected to the two first switches through the printed circuit of the first printed circuit board.

[0013] Preferably, the second switch is a three-position switch, with the left position of the second switch connected to the second DC power supply, the middle position of the second switch connected to the second test board slot, and the right position of the second switch connected to the second test instrument.

[0014] Preferably, there are two second switches, and when the test sub-board is plugged into the second test motherboard, the two ends of the MLCC under test are respectively connected to the two second switches through the printed circuit of the second printed circuit board and the third solder area.

[0015] Preferably, the sample welding area includes several parallel welding positions, and each welding position is equipped with a MLCC to be tested that conforms to a preset size range.

[0016] Preferably, the thickness of each printed circuit board is 1 mm to 4 mm, and the copper thickness of each printed circuit board is 0.5 ounces to 2 ounces.

[0017] Preferably, each solder area is fitted with a high-temperature shielded wire by soldering.

[0018] Secondly, embodiments of the present invention provide a DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs as described above, comprising:

[0019] Move the first switch to the middle position and turn on the first DC power supply and the first test instrument. The first switch is a three-position switch. The left position of the first switch is connected to the first DC power supply, the middle position of the first switch is connected to the first test sub-board slot, and the right position of the first switch is connected to the first test instrument.

[0020] The test sub-board is plugged into the first test motherboard, and the first switch is turned to the right position. The initial capacitance value of the MLCC under test is read and recorded by the first test instrument.

[0021] The first test instrument reads and records the current capacitance value of the MLCC under test at each preset time node. The process of obtaining each current capacitance value includes turning the first switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, turning the first switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the first test instrument.

[0022] Set the first switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

[0023] Thirdly, embodiments of the present invention provide a DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs as described above, comprising:

[0024] Set the second switch to the middle position and turn on the second DC power supply and the second test instrument. The second switch is a three-position switch. The left position of the second switch is connected to the second DC power supply, the middle position of the second switch is connected to the second test sub-board slot, and the right position of the second switch is connected to the second test instrument.

[0025] The test sub-board is plugged into the second test motherboard, and the second switch is turned to the right position. The initial capacitance value of the MLCC under test is read and recorded by the second test instrument.

[0026] The second test instrument reads and records the current capacitance value of the MLCC under test at each preset time node. The process of obtaining each current capacitance value includes turning the second switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, turning the second switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the second test instrument.

[0027] Set the second switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

[0028] Compared with existing technologies, the MLCC DC bias aging test device and method of this invention have the following advantages: Through a three-stage switch design, the MLCC under test can be quickly switched between DC bias aging and parameter testing states, reducing the idle time of the sample away from the bias voltage in traditional testing from minutes to milliseconds. This maximizes the reproduction of the true aging state of the MLCC in a continuous DC environment, ensuring that the capacitance measurement results at different time points are closer to actual working conditions. Utilizing the split design of the second test motherboard, it overcomes the limitation of traditional equipment that can only test at room temperature, allowing aging tests to be carried out in a wide temperature range of -40℃ to 150℃. Furthermore, the switching operation and instrument readings are completed outside the high and low temperature environment, ensuring stable control of the high and low temperature environment while improving operational safety and convenience. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the installation of the first test motherboard according to an embodiment of the present invention;

[0030] Figure 2 This is another installation diagram of the first test motherboard according to an embodiment of the present invention;

[0031] Figure 3 This is a circuit diagram of the first test motherboard of this embodiment of the invention;

[0032] Figure 4 This is a schematic diagram of the installation of the second test motherboard according to an embodiment of the present invention;

[0033] Figure 5 This is a circuit diagram of the second printed circuit board according to an embodiment of the present invention;

[0034] Figure 6 This is a circuit diagram of the third printed circuit board according to an embodiment of the present invention;

[0035] Figure 7 This is a circuit diagram of the test sub-board according to an embodiment of the present invention;

[0036] Figure 8 This is a schematic flowchart of a DC bias aging test method for MLCCs according to an embodiment of the present invention;

[0037] Figure 9 This is another schematic diagram of a DC bias aging test method for MLCCs according to an embodiment of the present invention;

[0038] Figure 10 This is a schematic diagram showing the comparison results of different test methods in the embodiments of the present invention. Detailed Implementation

[0039] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and are not intended to limit the scope of the invention.

[0040] In the description of this invention, it should be understood that the terms "first" and "second," etc., are used to distinguish different objects, rather than to describe a specific order.

[0041] In the description of this invention, it should be noted that, unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by those skilled in the art. The terminology used in this specification is for the purpose of describing specific embodiments only and is not intended to limit the invention. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0042] When a DC voltage is applied or applied for an extended period, the internal microstructure of a multi-layer capacitor (MLCC) undergoes significant changes. Specifically, immediately upon voltage application, the domain walls move rapidly, and the dipoles initially align with the electric field. As the bias voltage continues and the time increases, the domain walls and dipoles gradually become pinned together, macroscopically manifesting as performance degradation such as decreased capacitance and increased leakage current. DC bias aging tests capture this macroscopic performance degradation caused by the microscopic changes, enabling accurate assessment of the long-term stability of MLCCs.

[0043] This invention provides a DC bias aging test device for MLCCs, comprising: a first test motherboard, a second test motherboard, and a test daughterboard. The test daughterboard is inserted into either the first or second test motherboard.

[0044] It should be noted that the first and second test motherboards correspond to two different test temperature environments. The first test motherboard, i.e., the room temperature test motherboard, is a one-piece design, with the control switch and sample slot all on the same motherboard. It has a simple structure, smaller size, and is easier to operate, but can only be used in a room temperature environment. The second test motherboard, i.e., the high and low temperature test motherboard, is a separate design, including a sample testing section and a switch control section. The sample testing section can be placed in a high and low temperature chamber, enabling MLCC samples to be tested in an environment ranging from -40℃ to 150℃.

[0045] like Figure 1 As shown, this is a schematic diagram of the installation of the first test motherboard according to an embodiment of the present invention. Figure 2 As shown, this is another installation schematic diagram of the first test motherboard according to an embodiment of the present invention. Figure 3 As shown, it is a circuit diagram of the first test motherboard of the present invention.

[0046] Reference Figures 1-3 The first test motherboard of this embodiment includes a first printed circuit board placed in a room temperature environment, and a first switch, a first test sub-board slot, a first solder pad, and a second solder pad disposed on the first printed circuit board. The two ends of the first solder pad are respectively connected to a first DC power supply and the first switch, and the two ends of the second solder pad are respectively connected to a first test instrument and the first switch. In this embodiment, the first test instrument is an LCR meter, which is connected to the second solder pad via an LCR meter test fixture. It can be understood that the first DC power supply and the first test instrument are both connected to the first test motherboard, and together they constitute a DC bias aging test device suitable for MLCCs under room temperature conditions.

[0047] Specifically, the first switch is a three-position switch. The left position of the first switch is connected to the first DC power supply, the middle position is connected to the first test board slot, and the right position is connected to the first test instrument. Figure 3 It is known that the first switch is mounted on the first printed circuit board via a switch slot. It can be understood that the middle position of the first switch is connected to the first test sub-board slot, and then further connected to the sample under test via the first test sub-board slot.

[0048] Furthermore, there are two first switches, and when the test sub-board is plugged into the first test motherboard, the two ends of the MLCC under test are respectively connected to the two first switches through the printed circuit of the first printed circuit board. It should be noted that when both first switches are simultaneously switched to the first DC power supply, the sample is in the pressure test state; when both first switches are simultaneously switched to the first test instrument, the sample is in the capacitance test state.

[0049] like Figure 4 As shown, this is a schematic diagram of the installation of the second test motherboard according to an embodiment of the present invention. Figure 5 As shown, this is a circuit diagram of the second printed circuit board according to an embodiment of the present invention. Figure 6 As shown, it is a circuit diagram of the third printed circuit board of the present invention.

[0050] Reference Figures 4-6The second test motherboard of this embodiment includes a second printed circuit board and a third printed circuit board, which are connected by a third solder joint. The second printed circuit board is placed in a high and low temperature environment and has a second test daughterboard slot. The third printed circuit board has a second switch, a fourth solder joint, and a fifth solder joint. The two ends of the fourth solder joint are connected to a second DC power supply and a second switch, respectively. The two ends of the fifth solder joint are connected to a second test instrument and a second switch, respectively. In this embodiment, the second test instrument is an LCR meter, which is connected to the fifth solder joint via an LCR meter test fixture.

[0051] It is understandable that the second printed circuit board is the sample testing section, the third printed circuit board is the switch control section, the second DC power supply and the second test instrument are all connected to the second test motherboard, and together they constitute the MLCC DC bias aging test device suitable for high and low temperature environments.

[0052] Specifically, the second switch is a three-position switch. The left position of the second switch is connected to the second DC power supply, the middle position is connected to the second test board slot, and the right position is connected to the second test instrument. Figure 6 It is known that the second switch is mounted on the third printed circuit board via a switch slot. It can be understood that the middle position of the second switch is connected to the second test sub-board slot, and then further connected to the sample under test via the second test sub-board slot.

[0053] Furthermore, there are two second switches, and when the test sub-board is plugged into the second test motherboard, the two ends of the MLCC under test are connected to the two second switches respectively through the printed circuit of the second printed circuit board and the third solder area. It should be noted that when both second switches are simultaneously switched to the second DC power supply, the sample is in the pressure test state; when both second switches are simultaneously switched to the second test instrument, the sample is in the capacitance test state.

[0054] It should be noted that the aforementioned MLCC DC bias aging test device achieves accurate testing through a unique motherboard design and switch control logic. Specifically, in a normal temperature environment, the integrated first test motherboard integrates control and slots, using a three-stage switch to quickly switch between the pressure test state and capacitance test state of the sample. In high and low temperature environments, the split second test motherboard is divided into a sample testing section and a switch control section. The sample testing section enters the high and low temperature chamber to meet the testing requirements of -40℃ to 150℃, while the switch control section is external, allowing testers to switch circuits without entering the temperature chamber. The two motherboards adapt to different temperature requirements, and together with the three-stage switch, ensure stable voltage conditions when the sample switches states, avoiding measurement deviations caused by the connection method in traditional tests, and effectively compensating for the shortcomings of existing test circuits in terms of environmental adaptability and test accuracy.

[0055] like Figure 7 The diagram shown is a circuit schematic of the test sub-board according to an embodiment of the present invention. (Refer to...) Figure 7 The test sub-board of this embodiment includes a fourth printed circuit board, a sample soldering area disposed on the fourth printed circuit board for mounting the MLCC under test, and gold fingers for inserting into the test sub-board slot.

[0056] Specifically, the sample soldering area includes several parallel solder pads, each of which houses a MLCC (Multi-Layer Ceramic Capacitor) conforming to a preset size range. The MLCC is mounted in the sample soldering area using soldering. Further, in this embodiment, the number of solder pads is 1 to 12, with a preset size range of 008004 (length 0.008 inches × width 0.004 inches) to 1210 (length 0.12 inches × width 0.10 inches). That is, each solder pad can accommodate MLCCs within the size range of 008004 to 1210. The sample specification of the MLCC under test is 0603-X7T-106-10V.

[0057] Furthermore, there are multiple gold fingers. When the test sub-board is plugged into the first test motherboard, the gold finger area composed of multiple gold fingers is inserted into the first test sub-board slot; when the test sub-board is plugged into the second test motherboard, the gold finger area composed of multiple gold fingers is inserted into the second test sub-board slot.

[0058] The first test motherboard, the second test motherboard, and the test daughterboard are all double-sided circuit board designs, using FR-4 flame-retardant material. The thickness of each printed circuit board is 1mm to 4mm, and the copper thickness of each printed circuit board is 0.5 oz to 2 oz. The solder joints on the boards are bare copper and treated with lead-free tin plating.

[0059] Each soldering area is equipped with a high-temperature shielded wire using soldering. Specifically, for the first soldering area, one end of the high-temperature shielded wire is connected to the first DC power supply, and the other end is connected to the first switch; for the second soldering area, one end of the high-temperature shielded wire is connected to the first test instrument, and the other end is connected to the first switch; for the third soldering area, the second and third printed circuit boards are connected via a high-temperature shielded wire installed on the third soldering area; for the fourth soldering area, one end of the high-temperature shielded wire is connected to the second DC power supply, and the other end is connected to the second switch; for the fifth soldering area, one end of the high-temperature shielded wire is connected to the second test instrument, and the other end is connected to the second switch.

[0060] This invention discloses a DC bias aging test device for MLCCs. Through a three-stage switch design, it enables rapid switching between DC bias aging and parameter testing states for the MLCC under test. This reduces the idle time of the sample being removed from the bias voltage in traditional testing from minutes to milliseconds, maximally replicating the true aging state of the MLCC in a continuous DC environment. This ensures that the capacitance measurement results at different time points are closer to actual working conditions. Utilizing a split design of the second test motherboard, it overcomes the limitation of traditional equipment that can only test at room temperature, allowing aging tests to be conducted in a wide temperature range of -40℃ to 150℃. Furthermore, the switching operation and instrument readings are all completed outside the high and low temperature environment, ensuring stable control of the high and low temperature environment while improving operational safety and convenience.

[0061] like Figure 8 The diagram shown is a flowchart illustrating a DC bias aging test method for MLCCs according to an embodiment of the present invention. This embodiment of the present invention provides a DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs described above. (Refer to...) Figure 8 An embodiment of the present invention provides a DC bias aging test method for MLCCs, comprising the following steps:

[0062] S11. Set the first switch to the middle position and turn on the first DC power supply and the first test instrument;

[0063] The first switch is a three-position switch. The left position of the first switch is connected to the first DC power supply, the middle position of the first switch is connected to the first test board slot, and the right position of the first switch is connected to the first test instrument.

[0064] S12. Connect the test sub-board to the first test motherboard, and turn the first switch to the right position. Read and record the initial capacitance value of the MLCC under test through the first test instrument.

[0065] S13. Read and record the current capacitance value of the MLCC under test at each preset time node using the first test instrument;

[0066] The process of obtaining each current capacitance value includes switching the first switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, switching the first switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the first test instrument.

[0067] S14. Switch the first switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

[0068] It should be noted that, Figure 8 The DC bias aging test method for MLCCs shown is a test method under normal temperature conditions. For ease of understanding, the test method under normal temperature conditions is explained in detail below:

[0069] 1) Experiment preparation and equipment initialization;

[0070] Place the first test motherboard in a room temperature environment, turn the first switch to the middle position, and disconnect the sample from the test circuit (left position) and the test circuit (right position) to make the voltage across the MLCC under test 0V. Simultaneously start the first DC power supply and the first test instrument, ensuring that the voltage magnitude and current direction of the test circuit are consistent with those of the test circuit.

[0071] 2) Sample loading and initial capacitance testing;

[0072] The MLCC to be tested is soldered to the sample soldering area of ​​the test daughter board, and the gold fingers are inserted into the first test daughter board slot of the first test mother board to achieve electrical connection. The first switch is turned to the right position, so that the MLCC to be tested is connected to the test circuit. At this time, the first test instrument directly measures the initial capacitance value of the sample through the test fixture, and saves the initial capacitance value as the reference value of the unaged state.

[0073] 3) DC bias aging and node testing;

[0074] After the initial test is completed, the sample is connected to the test circuit by switching the switch to enter the long-term aging stage; and the capacitance change is tested periodically according to the preset time nodes.

[0075] Specifically, the first switch is switched to the left position, the MLCC under test is connected to the test circuit, and the long-term pressure test begins, and the aging time is started; when the preset time node is reached, the first switch is quickly switched to the right position to switch to the test circuit, the current capacitance value is read through the first test instrument, the data is recorded, and then the switch is immediately switched back to the left position to restore the DC bias and continue aging; the above process is repeated to complete the test at all preset time nodes in sequence.

[0076] 4) End of test and unloading of samples.

[0077] After completing the last time node test, switch the first switch to the middle position to disconnect the test circuit from the test circuit, so that the voltage across the sample is zero; pull out the test sub-board to complete the room temperature aging test of the sample; if multiple samples need to be tested, repeat 2) to 4), load the new test sub-board in sequence and execute the process.

[0078] It should be noted that the specific limitations of the above-mentioned MLCC DC bias aging test method are the same as those of the MLCC DC bias aging test device mentioned above. The two have the same function and role, and will not be repeated here.

[0079] like Figure 9The diagram shown illustrates another flowchart of a DC bias aging test method for MLCCs according to an embodiment of the present invention. This embodiment of the present invention provides a DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs described above. (Refer to...) Figure 9 An embodiment of the present invention provides a DC bias aging test method for MLCCs, comprising the following steps:

[0080] S21. Set the second switch to the middle position and turn on the second DC power supply and the second test instrument;

[0081] The second switch is a three-position switch. The left position of the second switch is connected to the second DC power supply, the middle position of the second switch is connected to the second test board slot, and the right position of the second switch is connected to the second test instrument.

[0082] S22. Connect the test sub-board to the second test motherboard, and turn the second switch to the right position. Read and record the initial capacitance value of the MLCC under test through the second test instrument.

[0083] S23. Read and record the current capacitance value of the MLCC under test at each preset time node using the second test instrument;

[0084] The process of obtaining each current capacitance value includes switching the second switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, switching the second switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the second test instrument.

[0085] S24. Switch the second switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

[0086] It should be noted that, Figure 9 The DC bias aging test method for MLCCs shown is a test method under high and low temperature environments. For ease of understanding, the test method under high and low temperature environments is explained in detail below:

[0087] 1) Place the second printed circuit board (sample test section) in a high and low temperature chamber, set the required temperature conditions for the test, and keep the sample at that temperature for a period of time;

[0088] 2) Before the test begins, all the second switches connected to the sample are switched to the middle position. At this time, the two ends of the sample are not connected to the test circuit or the test circuit, and the voltage across the sample is zero. At the same time, turn on the second DC power supply and the second test instrument to ensure that the voltage magnitude and current direction of the test circuit are consistent with those of the test circuit.

[0089] 3) At the start of the test, switch the second switch at both ends of the first sample to the test circuit and read the initial capacitance value of the sample through the second test instrument;

[0090] 4) When the preset time node is reached, switch the second switch at both ends of the first sample from the test circuit to the test circuit, record the capacitance value of the sample at the preset time node, and switch the second switch back to the test circuit after the test is completed. Repeat the same steps to complete the test of the remaining samples.

[0091] 5) After the last preset time node test is completed, the second switches at both ends of the sample are switched to the middle position and the pressure is no longer applied. The test of this sample is over. The remaining samples are also tested in the same way according to the above steps.

[0092] It should be noted that the specific limitations of the above-mentioned MLCC DC bias aging test method are the same as those of the MLCC DC bias aging test device mentioned above. The two have the same function and role, and will not be repeated here.

[0093] To verify the effectiveness of the MLCC DC bias aging test method according to an embodiment of the present invention, in one embodiment, the existing MLCC DC bias aging test method is compared with the MLCC DC bias aging test method of the present invention.

[0094] Before presenting the comparison results, we will first explain the existing DC bias aging test method for MLCCs in detail:

[0095] 1) Turn on the bias voltage of the LCR meter, and keep the bias voltage consistent with the test voltage condition. Use the test fixture to clamp the two ends of the sample in sequence and test the initial capacitance of the sample.

[0096] 2) After the initial capacitance values ​​of all samples on the test board have been tested, connect the test board to a DC power supply. All samples on the test board are connected to the DC power supply in parallel. Start the DC power supply and begin the test.

[0097] 3) When the predetermined test time point is reached, disconnect the test board from the DC power supply, and turn the bias voltage of the LCR meter back on. The bias voltage should be consistent with the test voltage condition. Use the test fixture to clamp the two ends of the sample in sequence, ensuring that the test current direction is consistent with the test current direction. Measure the capacitance value of the sample at this time point. After the test is completed, reconnect the sample to the DC power supply and continue the voltage test.

[0098] 4) After the last test time point is completed, the sample is no longer connected to the DC power supply, and the test of the sample ends.

[0099] Specifically, the comparison results between the existing MLCC DC bias aging test method and the MLCC DC bias aging test method of the present invention are shown in Tables 1 to 4.

[0100] Table 1 Results

[0101] Test time (h) 0 5 12 24 96 This invention (at room temperature) 5.461 4.911 4.734 4.496 4.065 This invention (high temperature) 3.918 3.717 3.686 3.674 3.636 Existing methods (at room temperature) 5.433 5.121 4.874 4.615 4.178

[0102] Table 2 Results 2

[0103] Test time (h) 192 264 336 408 504 This invention (at room temperature) 3.899 3.758 3.612 3.538 3.465 This invention (high temperature) 3.641 3.601 3.565 3.498 3.455 Existing methods (at room temperature) 4.272 4.012 3.919 3.804 3.711

[0104] Table 3 Results 3

[0105] Test time (h) 0 5 12 24 96 This invention (at room temperature) 0.0％ -10.1％ -13.3％ -17.7％ -25.6％ This invention (high temperature) 0.0％ -5.1％ -5.9％ -6.2％ -7.2％ Existing methods (at room temperature) 0.0％ -5.7％ -10.3％ -15.1％ -23.1％

[0106] Table 4 Results

[0107] Test time (h) 192 264 336 408 504 This invention (at room temperature) -28.6％ -31.2％ -33.9％ -35.2％ -36.6％ This invention (high temperature) -7.1％ -8.1％ -9.0％ -10.7％ -11.8％ Existing methods (at room temperature) -21.4％ -26.2％ -27.9％ -30.0％ -31.7％

[0108] It should be noted that results one and two together constitute the capacitance value result of the MLCC DC bias aging test, and results three and four together constitute the capacitance value change rate result of the MLCC DC bias aging test. The high-temperature condition is 90℃. The test sample specification used in this invention and existing methods is 0603-X7T-106-10V, the test voltage condition is 3V, and the test result is the average value of 5 test samples.

[0109] To visually present the comparison results between the existing MLCC DC bias aging test method and the MLCC DC bias aging test method of this invention, as shown in the following example... Figure 10 As shown, this is a schematic diagram comparing the results of different test methods in an embodiment of the present invention. The horizontal axis represents the test time, and the vertical axis represents the capacitance value and the capacitance change rate, respectively.

[0110] Depend on Figure 10 It is known that existing tests, due to the interruption of bias voltage during circuit switching, cause the microstructure inside the MLCC to temporarily escape bias stress, resulting in the captured capacitance decay being less than the true value (the capacitance change rate in existing tests is even slower). In contrast, the test of this invention achieves rapid state switching through a three-stage switch, keeping the sample in a near-continuous bias state, thus fully recording microstructure degradation. Therefore, the capacitance change rate is more significant, and the data more closely reflects the true aging process.

[0111] In summary, the MLCC DC bias aging test device and method of this invention, through a three-stage switch design, enables rapid switching between DC bias aging and parameter testing states for the MLCC under test. This reduces the idle time of the sample being removed from the bias voltage in traditional testing from minutes to milliseconds, maximally restoring the true aging state of the MLCC in a continuous DC environment and ensuring that the capacitance measurement results at different time points are closer to actual working conditions. Utilizing the split design of the second test motherboard, it overcomes the limitation of traditional equipment that can only test at room temperature, allowing aging tests to be carried out in a wide temperature range of -40℃ to 150℃. Furthermore, the switching operation and instrument readings are all completed outside the high and low temperature environment, ensuring stable control of the high and low temperature environment while improving operational safety and convenience.

[0112] The various embodiments in this specification are described in a progressive manner. For directly identical or similar parts of the various embodiments, refer to each other. Each embodiment focuses on its differences from other embodiments. It should be noted that the technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as these combinations of technical features do not contradict each other, they should be considered within the scope of this specification.

[0113] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and substitutions can be made without departing from the technical principles of the present invention, and these improvements and substitutions should also be considered within the scope of protection of the present invention.

Claims

1. A DC bias aging test device for MLCCs, characterized in that, include: A first test motherboard, a second test motherboard, and a test daughterboard, wherein the test daughterboard is inserted into the first test motherboard or the second test motherboard; The first test motherboard includes a first printed circuit board placed in a normal temperature environment and a first switch, a first test sub-board slot, a first soldering area and a second soldering area disposed on the first printed circuit board. The two ends of the first soldering area are respectively connected to a first DC power supply and the first switch, and the two ends of the second soldering area are respectively connected to a first test instrument and the first switch. The second test motherboard includes a second printed circuit board and a third printed circuit board. The second printed circuit board and the third printed circuit board are connected by a third solder joint. The second printed circuit board is placed in a high and low temperature environment. The second printed circuit board is provided with a second test sub-board slot. The third printed circuit board is provided with a second switch, a fourth solder joint, and a fifth solder joint. The two ends of the fourth solder joint are respectively connected to a second DC power supply and the second switch. The two ends of the fifth solder joint are respectively connected to a second test instrument and the second switch. The test sub-board includes a fourth printed circuit board, a sample soldering area for mounting the MLCC under test, and gold fingers for inserting into the test sub-board slot, all disposed on the fourth printed circuit board.

2. The MLCC DC bias aging test apparatus according to claim 1, characterized in that, The first switch is a three-position switch. The left position of the first switch is connected to the first DC power supply, the middle position of the first switch is connected to the first test board slot, and the right position of the first switch is connected to the first test instrument.

3. The MLCC DC bias aging test apparatus according to claim 2, characterized in that, There are two first switches, and when the test sub-board is plugged into the first test motherboard, the two ends of the MLCC under test are respectively connected to the two first switches through the printed circuit of the first printed circuit board.

4. The MLCC DC bias aging test apparatus according to claim 1, characterized in that, The second switch is a three-position switch. The left position of the second switch is connected to the second DC power supply, the middle position of the second switch is connected to the second test board slot, and the right position of the second switch is connected to the second test instrument.

5. The MLCC DC bias aging test apparatus according to claim 4, characterized in that, There are two second switches, and when the test sub-board is plugged into the second test motherboard, the two ends of the MLCC under test are respectively connected to the two second switches through the printed circuit of the second printed circuit board and the third solder area.

6. The MLCC DC bias aging test apparatus according to claim 1, characterized in that, The sample welding area includes several parallel welding positions, and each welding position is equipped with a MLCC to be tested that conforms to a preset size range.

7. The MLCC DC bias aging test apparatus according to claim 1, characterized in that, Each printed circuit board has a thickness of 1mm to 4mm and a copper thickness of 0.5 ounces to 2 ounces.

8. The MLCC DC bias aging test apparatus according to claim 1, characterized in that, Each soldering zone is equipped with a high-temperature shielded wire by soldering.

9. A DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs as described in any one of claims 1 to 8, characterized in that, include: Move the first switch to the middle position and turn on the first DC power supply and the first test instrument. The first switch is a three-position switch. The left position of the first switch is connected to the first DC power supply, the middle position of the first switch is connected to the first test sub-board slot, and the right position of the first switch is connected to the first test instrument. The test sub-board is plugged into the first test motherboard, and the first switch is turned to the right position. The initial capacitance value of the MLCC under test is read and recorded by the first test instrument. The first test instrument reads and records the current capacitance value of the MLCC under test at each preset time node. The process of obtaining each current capacitance value includes turning the first switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, turning the first switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the first test instrument. Set the first switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

10. A DC bias aging test method for MLCCs, applied to the DC bias aging test apparatus for MLCCs as described in any one of claims 1 to 8, characterized in that, include: Set the second switch to the middle position and turn on the second DC power supply and the second test instrument. The second switch is a three-position switch. The left position of the second switch is connected to the second DC power supply, the middle position of the second switch is connected to the second test sub-board slot, and the right position of the second switch is connected to the second test instrument. The test sub-board is plugged into the second test motherboard, and the second switch is turned to the right position. The initial capacitance value of the MLCC under test is read and recorded by the second test instrument. The second test instrument reads and records the current capacitance value of the MLCC under test at each preset time node. The process of obtaining each current capacitance value includes turning the second switch to the left position to connect the MLCC under test to the DC bias circuit, and when the corresponding preset time node is reached, turning the second switch to the right position, and reading and recording the current capacitance value of the MLCC under test through the second test instrument. Set the second switch to the middle position to disconnect the DC bias circuit of the MLCC under test.

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