All-electrical parameter reconfigurable direct current superconducting quantum interference device simulator

Abstract

The application discloses a direct current superconducting quantum interference device (DC SQUID) simulator with reconfigurable full electrical parameters, belonging to the fields of superconducting electronics and weak magnetic signal detection, and comprises a circuit containing a programmable logic device, which can receive a DC SQUID input signal and model parameters and output a DC SQUID output voltage signal; a DC SQUID characteristic solver, which can be processed by the circuit containing the programmable logic device, and can perform parallel numerical solution on electrical differential equations under given DC SQUID model parameters, and can obtain an actual DC SQUID output voltage signal by post-processing a solution result and store the actual DC SQUID output voltage signal into a memory of the circuit containing the programmable logic device; and a DC SQUID output calculator, which can obtain the DC SQUID output voltage signal by using the DC SQUID input signal and user-set parameters and output the DC SQUID output voltage signal to an output device. The simulator can improve the research and development and test efficiency of DC SQUID readout and control electronics.

Description

Technical Field

[0001] This invention belongs to the fields of superconducting electronics and weak magnetic signal detection, and specifically relates to a DC superconducting quantum interference device simulator with fully reconfigurable electrical parameters for readout and control verification of DC superconducting quantum interference devices. Background Technology

[0002] A superconducting quantum interference device (SQUID) is a type of magnetic sensor with extremely high sensitivity that operates at low temperatures, constructed using the Josephson structure. By converting the signal to be measured into a magnetic signal, the SQUID can achieve highly sensitive measurements of the physical signal being measured and has been widely used in many fields such as high-energy physics, quantum computing, geophysics, and medicine.

[0003] A superconducting quantum interference device (SQUID) consisting of two Josephson junctions connected in parallel operates under DC bias and is also known as a DC superconducting quantum interference device (DC SQUID). Compared to other types of SQUIDs, it achieves higher sensitivity. A DC SQUID is a nonlinear device; the relationship between the magnetic flux detected by the DC SQUID and its output voltage (hereinafter referred to as the transfer characteristic curve) differs under different DC bias currents. Under an appropriate DC bias current, the transfer characteristic curve of a DC SQUID exhibits periodicity, with a period equal to one magnetic flux quantum. By selecting a suitable quiescent operating point, the DC SQUID can detect the magnetic flux signal and amplify it to output a voltage signal.

[0004] Based on the physical characteristics of DC SQUID, such as Figure 1 As shown, the readout and control electronics of a DC SQUID can typically be divided into the following parts according to their functions: DC SQUID bias section, DC SQUID output voltage signal readout section, and DC SQUID feedback section; among which, the DC SQUID bias section includes the DC SQUID's... , , The bias, where The bias current of a DC squuid determines its transfer characteristic curve. Furthermore, and These are the bias voltage and bias flux of the DC SQUID, respectively. The biasing of these two physical quantities is used to adjust the quiescent operating point of the DC SQUID on this transfer curve. The DC SQUID biasing section in readout and control electronics, through the biasing of these three electrical quantities, enables the DC SQUID to operate at a quiescent operating point with a high flux-to-voltage conversion factor (hereinafter referred to as...). The definitions are the same as above); the DC SQUID output voltage signal reading part is mainly composed of a low noise amplifier (LNA), which is used for amplifying and reading the DC SQUID output voltage signal, and the output voltage signal is ; the DC SQUID feedback part is composed of a feedback circuit, which is also commonly known as a flux lock loop (FLL). The signal generated by the feedback circuit will form a feedback flux signal through a resistor and an inductor and be coupled into the DC SQUID, which is used to perform negative feedback on the DC SQUID to increase the dynamic range of the DC SQUID operation. It should be noted that, considering the structure of the actual readout circuit, the bias of and in the DC SQUID bias is not directly applied to the DC SQUID, but is indirectly applied to the static operating point of the DC SQUID by acting on the DC SQUID output voltage signal reading and DC SQUID feedback two functional modules.

[0005] In the verification test of DC SQUID readout and control electronics, the verification of the electronic feedback function is particularly important, and it is necessary to verify the control level of the electronics on the nonlinear controlled object of the DC SQUID. Directly debugging the readout and control electronics with the DC SQUID usually encounters the following difficulties: low-temperature DC SQUIDs with better signal-to-noise ratio usually need to be tested in a liquid helium level low-temperature environment, and liquid helium is a non-renewable resource and expensive, with high testing cost. Even if a high-critical-temperature DC SQUID is used, it is difficult to obtain a low-temperature environment that allows it to work normally under general electronic testing conditions. In a single test, the DC SQUID needs to be slowly transferred from room temperature to the low-temperature end, and the single test takes a long time. The DC SQUID is extremely susceptible to electromagnetic interference in the environment and has extremely strict requirements for the test environment. The above test difficulties greatly affect and limit the development and testing of readout and control electronics.

[0006] Due to the above testing limitations, in the development, feedback algorithm optimization, verification, etc. of DC SQUID readout and control electronics, using a DC SQUID simulator as a simulation of the actual DC SQUID behavior is a common method. Using a DC SQUID simulator to test the readout and control electronics can directly and quickly carry out functional testing of the system under general electronic testing conditions, forming an evaluation of the feedback function of the readout and control electronics. ​​

[0007] The current implementation of the DC SQUID simulator can be divided into analog circuit and digital circuit two schemes.

[0008] In the analog circuit scheme, the adder composed of operational amplifier as the core is usually used to replace the DC SQUID simulation. One input signal of the adder is equivalent to the magnetic flux signal or current signal input to the DC SQUID (if understood as a current signal, the current signal is coupled to the DC SQUID through inductance), another input signal of the adder is equivalent to the feedback current signal input to the DC SQUID (same as above, the feedback current signal is coupled to the DC SQUID through inductance), and the output signal of the adder is used as the output voltage signal of the DC SQUID. But the DC SQUID simulator realized by the analog circuit method uses the adder to simulate the DC SQUID, which cannot reflect the nonlinearity of the DC SQUID, and the physical meaning is not clear, which is a relatively rough simulation method. In order to introduce the nonlinearity of the DC SQUID, a signal generator can be introduced in the above basis, but in this case, there are still problems of low integration, poor flexibility and poor model accuracy.

[0009] In the digital circuit scheme, microprocessors and field programmable gate arrays (FPGA) are usually used as the core of the DC SQUID simulator, and necessary analog-digital converters (ADC) and digital-analog converters (DAC) are provided, wherein the input signal of the ADC is equivalent to the magnetic flux signal or current signal detected by the DC SQUID, and the output signal of the DAC is equivalent to the voltage signal output by the DC SQUID. The transfer characteristic curve of the DC SQUID is stored in the memory of the microprocessor or FPGA in advance, and after the input signal is collected and quantized by the ADC, the look-up table operation is performed in the memory to obtain the corresponding output voltage signal and sent to the DAC output. The transfer characteristic curve and related parameters stored in the system can be configured through the serial port. In the current technical scheme, the transfer characteristic curve in the memory is usually configured in two situations, one is the standard sinusoidal curve, and the other is the measured DC SQUID transfer characteristic curve.

[0010] The current digital DC SQUID simulator can realize the description of the nonlinear characteristics of the DC SQUID, but still has the following shortcomings: the model is rough, the transfer characteristic curve of the actual DC SQUID has a large gap with the sine function curve, and the description of the DC SQUID by using the sine function is too rough; the model is incomplete, the transfer characteristic curve of the actual DC SQUID is controlled by , the static operating point is controlled by and , the effect of is not considered by simply storing the transfer characteristic curve and searching the table, and the modeling of the SQUID lacks a degree of freedom; the flexibility is poor, if multiple DC SQUIDs with different parameters are to be tested, multiple sets of transfer characteristic curves of the DC SQUIDs need to be obtained, which requires a lot of preliminary preparation work and a long adjustment time.

[0011] Therefore, the DC SQUID simulator realized at the present stage mostly has the problems of poor model accuracy, poor completeness, poor flexibility and poor integration, and how to realize a DC SQUID simulator with high accuracy, high completeness, high flexibility and high integration to facilitate the design and testing of DC SQUID readout and control electronics is a problem to be solved.

[0012] In view of this, the present application is proposed. SUMMARY

[0013] The purpose of the present application is to provide a full-electrical-parameter reconfigurable DC SQUID simulator, which can flexibly and accurately provide a DC SQUID model, has short calculation time, high system integration and high model completeness, can improve the research and development and testing efficiency of DC SQUID readout and control electronics, and further solves the above technical problems in the prior art.

[0014] The purpose of the present application is realized by the following technical solutions:

[0015] A full-electrical-parameter reconfigurable DC SQUID simulator, comprising:

[0016] A circuit comprising a programmable logic device, including an input device, an output device and an interactive device, capable of receiving an external magnetic flux signal input through the input device and a parameter of the DC SQUID model set through the interactive device, and outputting an actual DC SQUID output voltage signal through the output device;

[0017] The DC SQUID characteristic solver can process by using the circuit containing the programmable logic device, and can solve the numerical value of the electrical differential equation group satisfied by the DC SQUID in parallel under the given parameters of the DC SQUID model, and can obtain the output voltage signal of the DC SQUID by post-processing the solving result and store the output voltage signal to the memory of the circuit containing the programmable logic device.

[0018] The DC SQUID output calculator can obtain the net input magnetic flux signal corresponding to the external magnetic flux signal according to the external magnetic flux signal received by the circuit containing the programmable logic device and the user-set parameters, can find the corresponding DC SQUID output voltage signal in the memory of the circuit containing the programmable logic device according to the net input magnetic flux signal, can obtain the actual DC SQUID output voltage signal by subtracting the voltage bias signal of the DC SQUID from the DC SQUID output voltage signal, and can output the actual DC SQUID output voltage signal to the output device of the circuit containing the programmable logic device.

[0019] Compared with the prior art, the all-electrical parameter reconfigurable DC superconducting quantum interference device simulator and method provided by the application have the beneficial effects including:

[0020] By adopting the circuit containing programmable logic device, combining with the DC SQUID characteristic solver, the equation group satisfied by the adopted DC SQUID can be numerically solved in parallel, and the actual DC SQUID output voltage signal is obtained through post-processing of the solving result and stored to the memory of the circuit containing programmable logic device, and the actual DC SQUID output voltage signal is obtained by cooperating with the DC SQUID output calculator. The DC SQUID simulator can provide various DC SQUID models, and the accuracy, completeness and flexibility of the models are greatly improved compared with the previous DC SQUID models; through the segmented processing of the solving time, the equation with strong dependence characteristics is converted into a parallel computing format suitable for segmented pipeline computing of the circuit containing programmable logic device, so that the computing advantage of the circuit containing programmable logic device can be exerted, the modification and update of the DC SQUID characteristics can be quickly completed with high throughput, and the time overhead in the DC SQUID readout and control electronics test is further reduced; since the DC SQUID simulator calculation process is completely implemented in the electronics circuit containing programmable logic device, and the interactive device is also equipped, the user can control the simulator and obtain the state of the simulator through the on-board interactive device, realizing an integrated simulator and improving the integration and convenience of the system. The DC SQUID simulator can complete the test of the DC SQUID readout and control electronics, especially the test of the feedback control function under general electronics test conditions, and can reduce the cost and improve the test efficiency in the DC SQUID readout and control electronics research and development and feedback algorithm optimization and device verification stage. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0022] Figure 1 The schematic diagram of the readout and control electronics structure of the DC SQUID of the prior art magnetic measurement.

[0023] Figure 2 The electrical structure diagram of the DC SQUID based on the RCSJ model.

[0024] Figure 3The segmented excitation signal schematic diagram of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator taking a ramp signal as an example is provided for the embodiments of the present application; wherein, the second, third, sixth, eighth and tenth dotted lines marked from left to right are five equidivisions of the starting point of the excitation signal and the set end point of the excitation signal; the time of the intersection of each signal segment (including the extension of the last signal segment) is the same, that is, the distance between 2, 3, 4, 5, 6, 7, 8, 9 and 10 is the same; A represents the starting point of the excitation signal; B represents the set end point of the excitation signal; and C represents the actual end point of the excitation signal.

[0025] Figure 4 The circuit structure schematic diagram of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator is provided for the embodiments of the present application.

[0026] Figure 5 The implementation method flowchart of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator is provided for the embodiments of the present application.

[0027] Figure 6 The variable solving parallelization schematic diagram of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator is provided for the embodiments of the present application.

[0028] Figure 7 The segmented pipeline calculation schematic diagram of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator is provided for the embodiments of the present application.

[0029] Figure 8 The work flowchart of the full-electricity-parameter reconfigurable direct current superconducting quantum interference device simulator is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present application will be described clearly and completely in combination with the specific contents of the present application; obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments, which do not constitute a limitation to the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0031] Firstly, the terms possibly used in the present text are explained as follows:

[0032] The term "and / or" means either of the two or both, for example, X and / or Y means three cases including "X", "Y" or "X and Y".

[0033] ​The terms "comprise", "comprising", "include", "including", "contain", "containing", "have", "having", or any other similar semantic descriptions, are to be construed as open-ended rather than limiting. For example, the inclusion of an element, such as a raw material, component, ingredient, carrier, dosage form, material, dimension, part, component, mechanism, device, step, process, method, reaction condition, processing condition, parameter, algorithm, signal, data, product, or article, is to be interpreted as including not only the explicitly recited element, but also any element known to one of ordinary skill in the art to be associated with or useful in conjunction with the explicitly recited element.

[0034] The term "consisting of" means excluding any element not specifically recited. If the term is used in the context of a claim, the term shall make the claim closed, meaning that the claim does not include any element not specifically recited. If the term is used in the context of a clause in a claim, the term shall limit the clause to only the elements specifically recited in that clause, but other clauses in the claim are not excluded from the overall claim.

[0035] Unless specifically stated otherwise, the terms "mount", "connected", "connected", "fixed", and the like, are to be construed broadly, for example, as either a fixed connection, or as a detachable connection, or as an integral connection; as either a mechanical connection, or as an electrical connection; as either a direct connection, or as an indirect connection via an intermediate medium; or as a communication between the internal elements of two components. The specific meaning of the above terms in the context of the present disclosure can be understood by one of ordinary skill in the art according to the specific circumstances.

[0036] When a concentration, temperature, pressure, dimension, or other parameter is expressed as a numerical range, the numerical range should be understood to specifically disclose all ranges formed from any upper limit value, lower limit value, or preferred value within the numerical range, regardless of whether the range is explicitly recited; for example, if a numerical range "2-8" is recited, the numerical range should be interpreted to include ranges "2-7", "2-6", "5-7", "3-4 and 6-7", "3-5 and 7", "2 and 5-7", and the like. Unless otherwise specified, numerical ranges recited herein include all integers and fractions within the range.

[0037] The terms "central", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like indicate the orientation or positional relationship shown in the drawings based on the orientation or positional relationship shown in the drawings, and are only for the convenience of description and simplification of description, and do not mean that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting herein.

[0038] The schemes provided by the present application will be described in detail below. The contents not described in detail in the embodiments of the present application belong to the prior art known to those skilled in the art. If the specific conditions are not specified in the embodiments of the present application, the conventional conditions or the conditions recommended by the manufacturer are used. If the reagents or instruments used in the embodiments of the present application are not specified by the manufacturer, they are all conventional products that can be purchased on the market.

[0039] Referring to Figure 4 The embodiments of the present application provide a DC SQUID simulator with full electrical parameters reconfigurable, which can flexibly and accurately provide a DC SQUID model, can be used independently of the host computer, has the characteristics of short calculation time, high system integration, high model completeness, etc., and can improve the efficiency of DC SQUID readout and control electronics research and testing, including:

[0040] The circuit including programmable logic devices includes input devices, output devices and interactive devices, can receive external magnetic flux signals input through the input devices and parameters of the DC SQUID model set through the interactive devices, and output the corresponding DC SQUID output voltage signals through the output devices;

[0041] The DC SQUID characteristic solver can use the circuit including programmable logic devices for processing, realize the numerical parallel solution of the electrical differential equation set satisfied by the corresponding DC SQUID under the given parameters of the DC SQUID model, and obtain the corresponding DC SQUID output voltage value through post-processing of the solution result and store it to the memory of the circuit including programmable logic devices;

[0042] The DC SQUID output calculator receives an external magnetic flux signal and a user-set parameter via a circuit containing a programmable logic device, obtains a net input magnetic flux signal corresponding to the external magnetic flux signal, looks up a corresponding DC SQUID output voltage signal in a memory of the circuit containing the programmable logic device according to the net input magnetic flux signal, obtains an actual DC SQUID output voltage signal by subtracting a voltage bias signal of the SQUID from the output voltage signal, and outputs the actual DC SQUID output voltage signal to an output device of the circuit containing the programmable logic device.

[0043] Preferably, in the above simulator, the circuit containing the programmable logic device comprises a programmable logic device, a multi-channel ADC as an input device, a single-channel DAC as an output device, a memory, and an interactive device; wherein,

[0044] The multi-channel ADC as the input device is electrically connected to an input terminal of the programmable logic device, and is configured to input the external magnetic flux signal;

[0045] The single-channel DAC as the output device is electrically connected to an output terminal of the programmable logic device, and is configured to output the DC SQUID output voltage signal;

[0046] The memory is electrically connected to a storage terminal of the programmable logic device, and is configured to store the corresponding DC SQUID output voltage value obtained by the DC SQUID characteristic solver;

[0047] The interactive device is electrically connected to the programmable logic device, and is configured to set the parameters of the DC SQUID model.

[0048] Preferably, in the above simulator, the programmable logic device is an FPGA chip or a system-on-chip chip containing a programmable logic part.

[0049] The memory is an external memory or a memory in the programmable logic device.

[0050] It can be understood that the above hardware circuit part needs to be equipped with peripheral devices to enable the above devices to work normally.

[0051] Preferably, in the above simulator, the DC SQUID characteristic solver utilizes the circuit containing the programmable logic device to process in the following manner: numerical parallel solving of a set of electrical differential equations satisfied by the DC SQUID is realized under given parameters of the DC SQUID model, and data processing is performed on a solving result to obtain the DC SQUID output voltage signal, which comprises:

[0052] Step 1, determining the time step, discretizing the electrical differential equation set satisfied by the DC SQUID, converting from a continuous time model to a discrete numerical solution, simplifying the iterative operation involved in the difference equation, and obtaining the simplified difference equation; can reduce the calculation dependence, facilitate parallel operation;

[0053] Step 2, solving the constant operation items in the simplified difference equation, including the division between the flux quantum and the time step; avoid repeated calculation of constants in subsequent operations;

[0054] Step 3, combining the order of magnitude of each parameter of the time step, selecting the units used by all physical quantities in the equation obtained by the above processing; avoid the case that the numerical value of the physical quantity in the difference equation has a large difference in magnitude;

[0055] Step 4, selecting the data format of the physical quantities involved in the difference equation, and implementing data fixed-point according to the selected data format; the selected data format needs to have enough precision to ensure convergence and enough representation range to complete the above physical quantities;

[0056] Step 5, calculating the sine function in the equation using a lookup table, setting a read-only memory in a circuit containing a programmable logic device, using the input of the sine function as the address, and using the stored value as the calculation value of the sine function;

[0057] Step 6, processing the division operation in the simplified difference equation as multiplication operation, and parallel processing the operations without data dependency in the multiplication, addition and sine operation involved in the single calculation process of the difference equation, realizing numerical solution parallel processing, and forming the calculation process of one difference equation iteration;

[0058] Step 7, according to the calculation process obtained in step 6, the calculation process is realized by time period decomposition and segment parallel calculation, and the corresponding output voltage signal of the DC SQUID is calculated.

[0059] Preferably, in the above simulator, in step 1, the given DC SQUID model solved by the DC SQUID characteristic solver is a DC SQUID composed of a left Josephson junction and a right Josephson junction in parallel based on the RCSJ model (Resistively and Capacitively Shunted Junction model), and its circuit structure is as shown in Figure 2 The electrical differential equation set satisfied by the DC SQUID is:

[0060] ;

[0061] In the above formula, and are the current through the left Josephson junction and the current through the right Josephson junction of the DC SQUID, respectively; is the bias current of the DC SQUID; and are the contribution of the left Josephson junction and the right Josephson junction to the loop inductance of the DC SQUID, respectively, and the sum of which constitutes the loop inductance of the DC SQUID; is the input external magnetic flux signal; is the magnetic flux quantum; is the phase difference of the wave functions of the two superconductors constituting the left Josephson junction, is the phase difference of the wave functions of the two superconductors constituting the right Josephson junction; is an arbitrary integer; and are the capacitance of the left Josephson junction and the capacitance of the right Josephson junction, respectively; and are the resistance of the left Josephson junction and the resistance of the right Josephson junction, respectively; and are the critical current of the left Josephson junction and the critical current of the right Josephson junction, respectively; is time;

[0062] Preferably, in order to facilitate the processing of the equations, the parameters in the above model can be further constrained , such that ;

[0063] Further, when using the above model to describe the DC SQUID, it is considered that the input external magnetic flux signal and the bias current of the DC SQUID are slowly varying physical quantities, and the direct influence of the changes of the two physical quantities on the output voltage can be ignored, and the output voltage of the DC SQUID is written as:

[0064] ;

[0065] The electrical differential equation group satisfied by the above DC SQUID based on the RCSJ model is discretized, converted from a continuous time model to a discrete numerical solution, and the iteration operation involved in the difference equation is simplified to obtain the simplified difference equation.

[0066] Preferably, the above electrical differential equation group is discretized using the explicit Euler scheme with smaller computational complexity, and the discretization result is as follows:

[0067] ;

[0068] In the above formula, is the time step chosen when discretizing the differential equation; the variable is written as:

[0069] ;

[0070] The above variable with the subscript or is a discrete independent variable introduced when converting the differential equation to a difference equation, and is an integer, i.e.

[0071] ;

[0072] The remaining variables of the simplified difference equation above remain the same as the corresponding variables used in the set of electrical differential equations satisfied by the RCSJ model-based DCSQUID.

[0073] Preferably, the RCSJ model used above can be simplified to an RSJ model. In this case, the capacitance effect in the RCSJ model used to describe the DCSQUID can be ignored, and the RSJ model is converted, and the term containing the capacitance in the above formula is eliminated, and the set of electrical differential equations satisfied by the RSJ model-based DCSQUID is:

[0074] ;

[0075] The variables in the above formula remain the same as the corresponding variables used in the set of electrical differential equations satisfied by the RCSJ model-based DCSQUID.

[0076] Preferably, in order to facilitate the processing of the equation, the parameter in the above model can be further constrained to ;

[0077] Further, when using the above RSJ model to describe the DCSQUID, the input external magnetic flux signal and the bias current are considered to be slowly varying physical quantities, and the direct influence of the changes of these two variables on the output voltage can be ignored, and the output voltage of the DCSQUID is written as:

[0078] ;

[0079] Discretize the set of electrical differential equations satisfied by the RSJ model-based DCSQUID, convert the continuous time model to a discrete numerical solution, and simplify the iteration operation involved in the difference equation to obtain the simplified difference equation.

[0080] Preferably, the above differential equations are discretized using the explicit Euler scheme with low computational complexity, and the discretization results are as follows:

[0081]

[0082] In the above formula, is the time step selected when discretizing the differential equation;

[0083] The above variable The subscript carried by the variable or is a discrete independent variable introduced when converting the differential equation to a difference equation, and is an integer, i.e.

[0084]

[0085] The remaining variables in the above simplified difference equation remain the same as the corresponding variables used in the electrical differential equation set satisfied by the RCSJ model-based DC SQUID.

[0086] Preferably, in the above equation set, the model can be simplified according to the actual application requirements to reduce the computational complexity.

[0087] Preferably, in the above solving process, for convenience, the gain of a low-noise amplifier in electronics is multiplied in the output voltage of the above difference equation in advance.

[0088] Preferably, in the above simulator, in step 8, the DC SQUID characteristic solver implements the above calculation process in a time period decomposition and segment parallel calculation manner based on the calculation flow obtained in step 7, including:

[0089] Time period decomposition calculation and segment parallel pipeline calculation; wherein,

[0090] The time period decomposition calculation is as follows:

[0091] The DC SQUID characteristic solver analyzes the number of clock cycles required for a single difference equation calculation based on parallel processing of the difference equation, and if the number of clock cycles required for a single recursion is , the solving time is divided into time periods, , The starting point of the th time period in the th time period is written as (for the convenience of expression, this expression does not consider the solving time step), ; It should be noted that, in principle, the Any positive integer can be used, but it is sufficient to bring the computing advantage of the programmable logic device into full play in this problem only when .

[0092] The segment parallel pipeline computing mode is as follows:

[0093] The DC SQUID characteristic solver performs parallel pipeline computing on each time segment decomposed in two cases of segment number and segment number ; in the first case of segment number , the data and corresponding excitation signal of the first time segment are sent in the first clock cycle, the data and corresponding excitation signal of the second time segment are sent in the second clock cycle, and so on, in the first clock cycle, the result of the second time point of the first time segment is calculated, and the data and excitation signal of this time point are sent to the computing process to continue the calculation of the result of the third time point of the first time segment, in the second clock cycle, the calculation of the second time point of the second time segment is completed, and the subsequent iteration is carried out in combination with the excitation signal of the current time point, so that the output voltage of each time segment is calculated in parallel using the same set of hardware solving resources;

[0094] In the second case of segment number , a first-in-first-out register with a length of is maintained on the basis of the computing process of the above first case to cache the iteration solving quantity of the equation, wherein , this solving mode can expand the number of clock cycles required by the entire solving process to , so that the same computing structure as the first case is formed to carry out the calculation.

[0095] The DC SQUID characteristic solver further comprises a segmented excitation signal generator for providing excitation signals for parallel pipeline calculation of each time segment, capable of accessing the input external magnetic flux signal in the above-mentioned model, the number of segments of the excitation signals being consistent with the number of segments of the segmented calculation of the DC SQUID characteristic solver, each output interface of the segmented excitation signal generator outputs the waveform of the corresponding segment, and the segmented excitation signal generator alternately outputs each segment signal for calculation of each time segment. In addition, each segment signal in the segmented excitation signal generator has a certain intersection to facilitate subsequent splicing of the segmented calculation results. The form of the intersection is that the end segment signal of the current signal segment is the same as the start segment signal of the next signal segment, the end segment signal of the last signal segment is the same as the start segment signal of the first signal segment, and the intersection time of all intersection signal segments (i.e. the duration of the signal in which the current signal segment and the next signal segment are the same) is the same. The specific intersection time of the segmented excitation signal generator is determined by the group delay of the subsequent digital low-pass filter for filtering the results, and the intersection time should be greater than the group delay of the digital low-pass filter to prevent jumps at the splicing position when splicing the results. To realize the above-mentioned segmented excitation signal generator, the last segment of the segmented excitation signal generator needs to be correspondingly lengthened, the length of the lengthening is the intersection time of the segmented excitation signal generator, and the lengthened signal is the same as the start segment signal of the first signal segment. The specific waveform of the excitation signal is not limited, but a ramp signal is a better choice for the excitation signal. Taking a five-segment ramp excitation signal as an example, the waveform segmentation diagram is shown in Figure 3 wherein the excitation signals of each time segment have the same meaning, and taking the excitation signal of time segment 1 as an example, it refers to the time segment that is divided out as time segment 1 in the segmented time segment solving scheme, and the excitation signal of time segment 1 is used for calculation.

[0096] Preferably, in the above-mentioned simulator, in principle, the duration of the excitation signal is not limited, but for convenience, the duration of the excitation signal (including the lengthening time of the last signal) is set to the total solving time T of the electrical differential equation set satisfied by the DC SQUID.

[0097] Preferably, in the above-mentioned simulator, when the excitation signal is accessed to the input external magnetic flux signal for transfer characteristic curve scanning, the intersection part of the adjacent two signals (including the head and tail signals) of the above-mentioned segmented excitation signal generator needs to satisfy the condition that the remainder of the magnetic flux quantum is the same. In order to facilitate the calculation of the DCSQUID output voltage signal, the scanning range of the input magnetic flux can be set to .

[0098] Preferably, the initial conditions for each segment of the above differential equations are set to zero, and for the RCSJ model, the initial conditions are:

[0099] ;

[0100] All the variables in the above equations are defined the same as the corresponding variables used in the electrical differential equations that the DC SQUID based on the RCSJ model satisfies.

[0101] For the RSJ model, the initial conditions for each segment are set to zero as follows:

[0102] ;

[0103] All the variables in the above equations are defined the same as the corresponding variables used in the RSJ model description of the DC SQUID.

[0104] Preferably, in the solving process of each segment of the above differential equations, all the physical quantities except the physical quantity connected to the segment excitation signal generator are maintained at the set values.

[0105] Preferably, in the above simulator, after step 8, the DC SQUID characteristic solver sends the calculated output voltage signal to a digital low-pass filter designed in the programmable logic device to filter out high-frequency oscillation signals, obtains the required corresponding DC SQUID output voltage signal, and stores the output voltage signal of the digital low-pass filter as the corresponding DC SQUID output voltage signal in segments in the memory (such as Block Random Access Memory, BRAM) of the programmable logic device.

[0106] Preferably, in the above simulator, the digital low-pass filter uses a multi-channel parallel low-pass filter that can achieve single clock cycle data refresh. The multi-channel parallel low-pass filter can simultaneously perform low-pass filtering on the results of the above segment solving, and obtain the characteristics of the DC SQUID without data compression;

[0107] Preferably, in the above simulator, the DC SQUID characteristic solver post-processes the output voltage signal of the digital low-pass filter stored in the on-chip memory of the programmable logic device in the following manner, including:

[0108] Splicing and aligning the segmented output voltage signals, and marking the splicing positions of each segment of the output voltage signal;

[0109] The output voltage signal of the calculation result overflow is reminded and the data overflow position is marked. (Under the good data format selection, the actually used DC SQUID parameters usually do not cause data overflow)

[0110] For the case of the transfer characteristic curve scanning, the DC SQUID characteristic solver converts the period of the transfer characteristic curve to obtain the representation result of the period (i.e. one flux quantum) of the transfer characteristic curve under the data format selection.

[0111] Preferably, in the above simulator, the DC SQUID output calculator obtains the output voltage signal according to the transfer characteristic curve solved by the DC SQUID characteristic solver, the user-set parameters and the sampling value of the ADC. This part calculates the net input flux signal according to the input signals of the multi-channel ADC and the user-set parameters, then looks up the output voltage signal of the DC SQUID in the memory according to the net input flux signal (if the net input flux signal exceeds the scanning range of the DC SQUID characteristic solving part, the auxiliary calculation is performed through the period characteristic of the DC SQUID), and obtains the actual output voltage signal of the DC SQUID by subtracting the bias voltage of the DC SQUID from the output voltage signal, finally outputs the signal to the DAC.

[0112] ​In summary, the DC SQUID simulator provided by the embodiment of the present application can complete the test of the DC SQUID readout and control electronics, especially the test of the feedback control function, under general electronic test conditions, can reduce the cost and improve the test efficiency in the research and development of the DC SQUID readout and control electronics and the optimization of the feedback algorithm and the verification of the device, meanwhile, the underlying principle of the DC SQUID simulator is the RCSJ model, the physical meaning is clear, easy to configure and use, and the DC SQUID model can provide various DC SQUID models, the accuracy, completeness and flexibility of the model are greatly improved compared with the previous DC SQUID model. On the other hand, the present application provides a method for solving the RCSJ model on a programmable logic device, by segmenting the solving time, the equation with strong dependence characteristics is converted into a parallel computing format suitable for segmented pipeline computing of the programmable logic device, the computing advantage of the programmable logic device can be utilized to quickly complete the modification and update of the DC SQUID characteristics with high throughput, further reducing the time overhead in the test of the DC SQUID readout and control electronics, in addition, the DC SQUID simulator calculation process described in the present application is completely implemented in the programmable logic device of the electronics, and the interactive device is also equipped, which does not need to rely on the host computer, the user can control the simulator and obtain the state of the simulator through the on-board interactive device, realizing an integrated simulator, improving the integration of the system and being more convenient to use.

[0113] According to the RCSJ model or the RSJ model obtained by simplifying the RCSJ model, a DCSQUID simulator with full electrical parameter reconfigurability is proposed, which can accurately simulate the working characteristics of the DCSQUID and be used for electronic test under the condition of flexibly specifying the DC SQUID construction parameters and bias parameters.

[0114] In order to more clearly show the technical solutions provided by the present application and the technical effects produced, the following specific embodiments are used to describe the solutions provided by the embodiments of the present application in detail.

[0115] Embodiment 1

[0116] In order to facilitate technical description, the DC SQUID in the following embodiments refers to the DC SQUID composed of two parameters consistent Josephson structures described by the RSJ model obtained by simplifying the RCSJ model. It should be particularly pointed out that the method, device and claims proposed by the present application are compatible with the RCSJ model described case, and can realize the DC SQUID simulator based on the RCSJ model after modifying the equation. Using the RCSJ model to model the DC SQUID by using the method described in the present application should also be included in the scope of the present application.

[0117] For the convenience of technical description, the following embodiments are described with FPGA as an example. It is necessary to emphasize again that, as described in the technical content, the selection of specific programmable logic device does not affect the core of the present application, and the use of other types of programmable logic device or system on chip (SoC) chip containing programmable logic part for constructing the simulator should also be considered as the content of the present application.

[0118] An embodiment of a symmetric DC SQUID simulator constructed for a DC SQUID transfer characteristic curve is as follows, which is composed of a programmable logic device containing circuit, a DC SQUID characteristic solver and a DC SQUID output calculator as shown in Figure 4 The programmable logic device containing circuit is used to provide the actual electronics entity for the DC SQUID simulator, receive the external magnetic flux signal input by the input device and the DC SQUID model parameters set by the interaction device and output the corresponding DC SQUID output voltage signal through the output device; the DC SQUID characteristic solver realizes the numerical parallel solution of the DC SQUID equation under the given DC SQUID model parameters through the analysis of the differential equation satisfied by the DC SQUID, the numerical discretization, the numerical calculation simplification, the parallelization, the pipelining, the excitation signal generation and the data post-processing process, etc., and performs data post-processing on the solution result to obtain the output voltage signal of the actual DC SQUID and store it; the DC SQUID output calculator is used to calculate the output voltage signal of the constructed DC SQUID, which calculates the output voltage signal of the DC SQUID according to the input external magnetic flux signal and the generated DC SQUID model and outputs it to the output device of the programmable logic device containing circuit.

[0119] The overall implementation process of the simulator is as shown in Figure 5 , which includes the following steps.

[0120] S1: In terms of hardware circuit, the programmable logic device containing circuit of the embodiment includes an FPGA chip, two ADCs and a DAC. Two ADCs and a DAC are used in this example, and in terms of specific function allocation, one of the ADCs is configured to sample and quantify the signal obtained by detecting the DC SQUID; one ADC is used to collect the feedback signal of the readout and control electronics; optionally, more ADCs can be deployed to sample the DC SQUID bias signal , , DAC is used to output the response of the DC SQUID, and optionally, the DAC can be omitted if there is no need for the output DC SQUID signal. Both the multi-channel ADC and the DAC are connected to the FPGA. In addition, the circuit of the embodiment is equipped with an interactive device for user interaction. The embodiment also includes the remaining devices required to enable the above devices to function properly.

[0121] The FPGA chip mentioned above is used to process complex operations and control logic and is connected to the above-mentioned ADC, DAC, and interactive device, and uses the BRAM inside the FPGA chip as a memory.

[0122] S2: In terms of solving the DC SQUID characteristic solver, the embodiment incorporates the gain of the readout and control electronics into the electrical differential equations satisfied by the DC SQUID. After appropriate transformation, a sufficiently large time step is used as the solving time step (which is generally on the order of picoseconds, and for the sake of convenience in the following description, a specific time step of 1 picosecond is selected), and the electrical differential equations satisfied by the DC SQUID based on the RSJ model are discretized using the explicit Euler method to obtain the following formula:

[0123] ;

[0124] In the above formula, is the phase difference of the wave function of the two superconductors constituting the left Josephson junction, is the phase difference of the wave function of the two superconductors constituting the right Josephson junction; is the resistance of a single Josephson junction in the DC SQUID; is the discrete time interval; is the bias current of the DC SQUID; is the contribution value of a single Josephson junction to the inductance of the DC SQUID loop; is the externally input magnetic flux signal; is the critical current of a single Josephson junction; is the magnetic flux quantum; is the low-noise amplifier gain;

[0125] To reduce the computational dependence, the iteration formula for and in the discretized differential equation set is further simplified, and the simplified result is as follows:

[0126] .

[0127] S3: In terms of solving the DC SQUID characteristic solver, further, the embodiment completes the calculation of the magnetic flux quantum , the solving time step and The multiplication and division operation of the related calculation results is involved in the calculation as a whole constant; taking the solving time step of 1 picosecond as an example, there are the following specific steps:

[0128] ;

[0129] The international unit system is used in the calculation, other unit systems can also be used to calculate in advance, in addition, different calculation precisions will also affect the representation of the calculation results, even if the results are different, but this does not affect the core of the present application.

[0130] S4: In the solving aspect of the DC SQUID characteristic solver, further, the embodiment selects the units of time, resistance, current, voltage, inductance, and magnetic flux as picoseconds, ohms, microamperes, millivolts, picohenries, and one magnetic flux quantum, respectively, and designs the model parameters according to the units. It should be noted that the above unit selection is only an example, other unit selection methods can also be used and the equation can be represented with high precision, which does not affect the core of the present application. In addition, all physical quantities in the hardware calculation logic are 32-bit data width, and the data interpretation selects the Q15.16 fixed-point data format. It should be noted that there are many choices for the selection of fixed-point format, other fixed-point formats can also be used as appropriate data formats, in addition, for FPGAs with sufficient resources, floating-point data formats can also be selected, and the specific data format does not affect the core of the present application.

[0131] S5: In the solving aspect of the DC SQUID characteristic solver, further, the embodiment constructs a ROM in the FPGA for table lookup calculation of the sine function.

[0132] S6: In the solving aspect of the DC SQUID characteristic solver, further, the embodiment processes the division as multiplication and decomposes the above equation group iteration operation process to parallelize the operation and form a single calculation flowchart. The parallelized iteration process of is shown in Figure 6 , The parallelized iteration process of is similar.

[0133] S7: In the solving aspect of the DC SQUID characteristic solver, further, the embodiment decomposes the solving time period according to the calculation flowchart obtained in step S6, divides the time period to be solved into 5 segments (the number of segments selected here corresponds to the number of clock cycles required for a single iteration), and performs segment parallel pipeline calculation on each time period, while calculating the solution of multiple time periods. The pipeline working diagram is as follows: Figure 7The specific number of segments can be any integer, but the FPGA can be maximally utilized when the number of segments is greater than or equal to the number of clock cycles required for a single iteration. For convenience of explanation, the number of segments is equal to the number of time cycles required for a single iteration. The selection of different numbers of segments is described in the technical content part of the present application, and the specific selection of the number of segments does not affect the core of the present application.

[0134] S8: In the solving aspect of the DC SQUID characteristic solver, further, a segmented excitation signal generator is designed and implemented in the FPGA in the embodiment to provide excitation signals for segment parallel pipeline calculation, and the number of segments is 5 (consistent with the number of segments in step S7). The optional solution is to design a segmented ramp signal generator. The segmented excitation signal generated by the segmented excitation signal generator is connected to the input external magnetic flux signal, and the start signal of the value solving is used as the enable signal of the segmented excitation signal.

[0135] S9: In the segmented solving aspect of the DC SQUID characteristic solver, further, the zero initial condition is used to solve each segment of the above differential equation, and the physical quantity except the input external magnetic flux signal is kept at a constant. The zero initial condition involved in this step is as follows:

[0136] .

[0137] S10: In the solving aspect of the DC SQUID characteristic solver, further, a low-pass filter is designed in the FPGA in the embodiment to filter the voltage signal obtained by solving the DC SQUID equation. The filtered signal is written into the BRAM of the FPGA. Optionally, in order to improve the readability of the operation and adapt to the solving process, the above low-pass filter can be designed as a five-channel low-pass filter (the number of channels corresponds to the number of segments), and the above memory can also be designed as multiple blocks of memory. The difference between the specific filter type and the storage structure does not affect the core of the present application.

[0138] S11: In the solving aspect of the DC SQUID characteristic solver, further, the data calculated in step S10 is analyzed and spliced in the FPGA, the splicing address of the BRAM is marked, and the data overflow position is marked; in addition, period conversion logic is designed to calculate the output transfer characteristic curve period. Optionally, in S4, reasonable selection of the unit of magnetic flux can simplify the period conversion logic.

[0139] S12: In terms of the output of the DC SQUID output calculator, the FPGA calculates the net input magnetic flux signal according to the input signal of the ADC and the parameters set by the user, and looks up the net input magnetic flux signal in the BRAM. If it is found that the total magnetic flux exceeds one period of the DC SQUID transfer characteristic curve during the lookup process, the curve period calculated in S11 needs to be used for lookup. The value obtained by looking up is subtracted from the output voltage signal of the actual DC SQUID, and the output voltage signal can be output through the DAC.

[0140] Further, the following steps are further included:

[0141] S13: Finally, in terms of system application, the FPGA is used to realize the interface logic of the interactive device to provide data interaction for the user.

[0142] In order to further illustrate the scheme of the embodiment, the working process of the simulator of the embodiment is given as follows, as shown in Figure 8 , which includes:

[0143] Step P1: The user sets the parameters through the interactive device, and the device sends the parameters such as the resistance of a single Josephson junction in the DC SQUID, the critical current of a single Josephson junction, the contribution value of a single Josephson junction to the loop inductance, the bias current, the readout and control electronics gain, etc. to the FPGA of the circuit containing the programmable logic device, and starts the numerical solution of the DC SQUID once.

[0144] Step P2: The data obtained by the FPGA once is written into the BRAM in the FPGA after being filtered by the low-pass filter, and the FPGA performs post-processing such as splicing and period calculation on the calculated curve.

[0145] Step P3: The FPGA calculates and outputs the post-processed results to the interactive device.

[0146] Step P4: The user sets the bias voltage and the bias magnetic flux through the interactive device.

[0147] Step P5: The FPGA starts processing the signal transmitted by the ADC according to the set parameters, looks up the output voltage signal in the BRAM, and outputs the output voltage signal to the DAC after subtracting .

[0148] It should be noted that the parameter configuration of the above use flow has no sequence requirement, only to ensure that the resistance, critical current, bias current, input inductance, readout and control electronics gain are completed before the DC SQUID simulation is performed; all parameter configurations are completed before the output signal. Moreover, the above flow can be interrupted at any time and returned to P1 for re-execution.

[0149] The above embodiment shows a DC SQUID characteristic solver with configurable parameters, and realizes the scanning acquisition of the transfer characteristic curve. It should be noted that the segmented excitation signal generator of the DC SQUID characteristic solver can be connected to any physical quantity. After adjusting the calculation structure of S2, any physical quantity can be scanned and analyzed (such as fixing the size of the input magnetic flux signal, scanning the relationship between the DC SQUID output voltage and the DC SQUID bias current). Any scanning analysis of the remaining physical quantities of the DC SQUID, including implementing multiple physical quantity scanning in an instance, should be considered as part of the present application.

[0150] In addition, the DC SQUID simulator includes a hardware parallel pipeline algorithm based on FPGA for solving the DC SQUID electrical model. In this embodiment, only the parallel hardware solving method for symmetric DC SQUID is included. Obviously, when simulating asymmetric DC SQUID, the parallel processing method described in this method can still adapt to this condition and operate normally after slight modification of the model equation, which should be considered as part of the present application.

[0151] It should be noted that, as mentioned at the beginning of this embodiment, this embodiment only shows the solution of the equation set of DC SQUID under the RSJ model. Obviously, when using the RCSJ model to solve DC SQUID, only slight modification of the model equation in S2 is needed, and after adding the capacitance-related equation, the solution can be carried out according to the method described in the patent (when the RCSJ model is used, the time step that can be selected in S2 is usually in the order of hundreds of femtoseconds), therefore, using the method described in the patent to carry out DC SQUID modeling using the RCSJ model should also be considered as part of the present application.

[0152] It should be noted that the present application provides a segmented parallel pipeline DC SQUID model FPGA solving method, and introduces its single parameter scanning solving method in the technical content. The method is further illustrated in the subsequent embodiment introduction and the accompanying drawings. Obviously, if the time axis is not segmented and pipelined, but instead parallel pipelined processing is performed on multiple tasks, this method can also realize: parallel simulation modeling of five-channel DC SQUID (based on Figure 6parallel computing structure in single step iteration of the iterative equation, the more the number of computing steps, the higher the number of parallelism that can be supported, multi-variable scanning simulation modeling of single DC SQUID. In these scenarios, the high throughput computing characteristics of the present application are demonstrated. In summary, any parallel pipelining application based on the iterative equation mentioned in the present application (or modified version thereof) should be considered as the content of the present application.

[0153] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by programs instructing related hardware, and the programs can be stored in a computer-readable storage medium. When the programs are executed, the processes of the above-mentioned embodiment methods can be included. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM), a random access memory (RAM), or the like.

[0154] The above is only a preferred specific embodiment of the present application, but the protection scope of the present application is not limited to this. Any changes or replacements that can be easily thought of by those skilled in the art within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims. The information disclosed in the background section of the present application is only intended to deepen the understanding of the overall background of the present application, and should not be considered as acknowledging or implying in any form that the information constitutes prior art known to those skilled in the art.

Claims

1. A fully electrically parameter reconfigurable direct current superconducting quantum interference device simulator, characterized in that, include: A circuit containing programmable logic devices, including input devices, output devices and interactive devices, is capable of receiving external magnetic flux signals input through the input devices and parameters of a DC SQUID model set through the interactive devices, and outputting actual DC SQUID output voltage signals through the output devices. The DC SQUID characteristic solver can use circuits containing programmable logic devices to process the numerical parallel solution of the electrical differential equations satisfied by the DC SQUID under the given parameters of the DC SQUID model. The solution results are then post-processed to obtain the DC SQUID output voltage signal and stored in the memory of the circuit containing programmable logic devices. The DC SQUID output calculator can obtain the net input magnetic flux signal corresponding to the external magnetic flux signal based on the external magnetic flux signal received by the circuit containing programmable logic devices and the user-defined parameters. It then searches for the corresponding DC SQUID output voltage signal in the memory of the circuit containing programmable logic devices according to the net input magnetic flux signal. The difference between the DC SQUID output voltage signal and the DC SQUID voltage bias signal is used to obtain the actual DC SQUID output voltage signal. Finally, the actual DC SQUID output voltage signal is output to the output device of the circuit containing programmable logic devices.

2. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 1, wherein, The circuit containing the programmable logic device includes: a programmable logic device, a multi-channel ADC as an input device, a single-channel DAC as an output device, a memory, and an interaction device; wherein, The multi-channel ADC, as an input device, is electrically connected to the input terminal of the programmable logic device; One of the DACs, acting as an output device, is electrically connected to the output terminal of a programmable logic device; The memory is electrically connected to the storage terminal of the programmable logic device; Interactive devices are electrically connected to programmable logic devices.

3. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 2, wherein, The programmable logic device is an FPGA chip or a system-on-a-chip that includes programmable logic. The memory is an external memory or a memory in a programmable logic device.

4. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator according to any one of claims 1-3, wherein, The DC SQUID characteristic solver utilizes a circuit containing programmable logic devices to perform numerical parallel solutions to the electrical differential equations satisfied by the DC SQUID under given DC SQUID model parameters. The solution results are then processed to obtain the DC SQUID output voltage signal, including: Step 1: Determine the solution time step, discretize the electrical differential equations satisfied by DC SQUID, transform the continuous time model into a discrete numerical solution, simplify the iterative operations involved in the difference equations, and obtain the simplified difference equations. Step 2: Solve in advance the constant multiplication terms in the simplified difference equation, including the division between the magnetic flux quantum and the solution time step; Step 3: Based on the magnitude of each parameter of the solution time step, select the units to be used for all physical quantities in the difference equation obtained from the above processing. Step 4: Select the data format for the physical quantities involved in the difference equation, and perform data localization according to the selected data format; Step 5, the sine function in the difference equation is calculated by using a look-up table, a read-only memory is set in a circuit containing a programmable logic device, an input of the sine function is taken as an address, and a stored value is taken as a calculation value of the sine function; Step 6, the division operation in the simplified difference equation is processed as a multiplication operation, and all multiplication, addition and sine operation operations involved in a single calculation process of the difference equation are parallelized without data dependency, so that numerical solution parallelization processing is realized, and a calculation flow of one iteration of the difference equation is formed; Step 7, the calculation process is realized by time period decomposition and segment parallel calculation according to the calculation flow obtained in step 6, and a corresponding DC SQUID output voltage signal is calculated.

5. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 4, wherein, In step 1, the given DC SQUID model solved by the DC SQUID characteristic solver is a DC SQUID composed of a left Josephson junction and a right Josephson junction in parallel based on an RCSJ model, and the DC SQUID satisfies the following electrical differential equation group: ； In the above equations, and are the current through the left Josephson junction and the current through the right Josephson junction of the DC SQUID, respectively; is the bias current of the DC SQUID; and are the contributions of the left Josephson junction and the right Josephson junction to the loop inductance of the DC SQUID, respectively, and are the contributions of the left Josephson junction and the right Josephson junction to the loop inductance of the DC SQUID, respectively, is the input external magnetic flux signal; is the magnetic flux quantum; is the phase difference of the wave functions of the two superconductors constituting the left Josephson junction, is the phase difference of the wave functions of the two superconductors constituting the right Josephson junction; is an arbitrary integer; and are the capacitance of the left Josephson junction and the capacitance of the right Josephson junction, respectively; and are the resistance of the left Josephson junction and the resistance of the right Josephson junction, respectively; and are the critical current of the left Josephson junction and the critical current of the right Josephson junction, respectively; is time; Let the parameters in the above equation be and ignore the direct influence of the slowly varying physical quantities, the input external flux signal and the bias current of the DC SQUID, on the output voltage of the DC SQUID, the output voltage of the DC SQUID be written as: ； The electrical differential equation group satisfied by the DC SQUID is discretized in the following manner, converted from a continuous time model to a discrete numerical solution, and the iteration operation involved in the difference equation is simplified to obtain the simplified difference equation: ； In the above equation, the time step chosen to discretize the differential equation; the variable in the above equation is written as: ； The above variables The subscripts And Both are discrete independent variables introduced when converting from differential equations to difference equations, both are integers, namely: ； The remaining variables in the above simplified difference equation remain the same definition as the corresponding variables used in the electrical differential equation group satisfied by the DC SQUID based on the RCSJ model; Alternatively, in step 1, the given DC SQUID model solved by the DC SQUID characteristic solver is a DC SQUID based on an RSJ model obtained by simplifying the above RCSJ model, and the DC SQUID satisfies the following electrical differential equation group: ； The variables in the above formula remain the same definition as the corresponding variables used in the electrical differential equation group satisfied by the DC SQUID based on the RCSJ model; The parameters in the electrical differential equations satisfied by the above-mentioned DC SQUID based on the RSJ model , and ignoring the direct influence of the slowly-varying physical quantities, i.e. the input external magnetic flux signal and the bias current of the DC SQUID, on the output voltage, the output voltage of the DC SQUID is written as: ； The electrical differential equation group satisfied by the DC SQUID based on the RSJ model is discretized in the following manner, converted from a continuous time model to a discrete numerical solution, and the iteration operation involved in the difference equation is simplified to obtain the simplified difference equation: ； In the above formulae, the time step chosen to discretize the differential equation; The above variables with subscripts or are discrete independent variables introduced when converting from differential equations to difference equations, and are integers, i.e.: ； The remaining variables in the above simplified difference equation remain the same definition as the corresponding variables used in the electrical differential equation group satisfied by the DC SQUID based on the RCSJ model.

6. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 5, wherein, In the process of solving the electrical differential equation group satisfied by the DC SQUID in step 7, the gain of a low-noise amplifier in electronics is multiplied in the output voltage of the above difference equation in advance; In step 7, the DC SQUID characteristic solver realizes the above calculation process by time period decomposition and segment parallel calculation according to the calculation flow obtained in step 7, including time period decomposition calculation and segment parallel pipeline calculation. The time period decomposition calculation is as follows, including: The DC SQUID characteristic solver analyzes the number of clock cycles required for a single calculation of the difference equation based on the parallel processing analysis of the difference equation. If the analysis shows that the number of clock cycles required for a single recursion is... The solution time will then be... Divided into A time period , The first time period The start time of each time period is written as... , ; The segment parallel pipeline calculation is as follows, including: The DC SQUID characteristic solver is divided into segments. and number of segments Parallel pipelined computation is performed on each of the decomposed time periods in two scenarios, where the number of segments... In the first case, data for the first time period and the corresponding excitation signal are sent in during the first clock cycle, data for the second time period and the corresponding excitation signal are sent in during the second clock cycle, and so on, until the... After one clock cycle, the result of the second time point in the first time period is calculated, and this data, along with the excitation signal at that moment, is sent into the calculation process to continue calculating the result of the third time point in the first time period. After one clock cycle, the second time point of the second time period is calculated and combined with the excitation signal at the current moment for subsequent iterations, so as to realize the parallel calculation of the output voltage of each time period under the same set of hardware solution resources; In the number of segments In the second case, based on the calculation process of the first case, maintain a length of The first-in-first-out (FIFO) register caches the iterative solution quantities of the equation, where... It can extend the number of clock cycles required for the entire solution process to This allows it to form the same computational structure as the first case for performing calculations.

7. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 6, wherein, The DC SQUID characteristic solver further comprises a segmented excitation signal generator for providing excitation signals for parallel pipeline calculation of each time segment, capable of accessing the input external magnetic flux signal, the number of segments of the excitation signals being consistent with the number of segments solved by the DC SQUID characteristic solver; each output interface of the segmented excitation signal generator outputs the waveform of the corresponding segment, and the segmented excitation signal generator sequentially outputs the above segment signals for calculation of each time segment; Each segment excitation signal in the segmented excitation signal generator has a certain intersection, and the form of the intersection is that the end segment signal of the current signal segment is the same as the start segment signal of the next signal segment, the end segment signal of the last signal segment is the same as the start segment signal of the first signal segment, and the intersection time of all intersection signal segments is the same, that is, the duration of the same part of the current signal segment and the next signal segment is the same; The intersection time of the segmented excitation signal generator is greater than the group delay of the digital low-pass filter for subsequent filtering of the result; The last segment of the segmented excitation signal generator is correspondingly extended, the length of the extension is the intersection time of the segmented excitation signal generator, and the extended signal is the same as the start segment signal of the first signal segment; The duration of the excitation signal is set as the total solving time of the electrical differential equation group satisfied by the DC SQUID; In the transfer characteristic curve scanning of the input external magnetic flux signal with the excitation signal, the intersection part of the adjacent two segment signals of the segmented excitation signal generator needs to meet the condition of being completely same or having the same remainder of magnetic flux quantum ; for the convenience of the calculation of the DC SQUID output voltage signal, the scanning range of the input magnetic flux is set as .

8. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 6, wherein, In step 7, the zero initial condition for solving each segment of the electrical differential equation group satisfied by the DC SQUID based on the RCSJ model is as follows: ； All variables in the above formula have the same definition as the corresponding variables used in the electrical differential equation group satisfied by the DC SQUID based on the RCSJ model; In step 7, the zero initial condition for solving each segment of the electrical differential equation group satisfied by the DC SQUID based on the RSJ model is as follows: ； All variables in the above formula have the same definition as the corresponding variables used in the electrical differential equation group satisfied by the DC SQUID based on the RSJ model; In the solving process of each segment of the above differential equation group, all physical quantities except the physical quantity accessed to the segmented excitation signal generator are maintained at the set values during the solving process.

9. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 4, wherein, After step 7, the DC SQUID characteristic solver sends the calculated output voltage signal to a digital low-pass filter designed in a programmable logic device to filter out high-frequency oscillation signals and obtain the required DC SQUID output voltage signal, and the output voltage signal of the digital low-pass filter as the DC SQUID output voltage signal is segmented and stored in the memory of the circuit containing the programmable logic device.

10. The all-electrical parameter reconfigurable direct current superconducting quantum interference device simulator of claim 9, wherein, The digital low-pass filter adopts a multi-channel parallel low-pass filter capable of realizing single-cycle data refresh; The DC SQUID characteristic solver post-processes the output signal of the digital low-pass filter segmented and stored in the memory of the circuit containing the programmable logic device in the following manner, including: aligning and marking the splicing position of each segment of the output voltage signal; warning and marking the data overflow position of the output voltage signal with calculation result overflow; In the case of scanning the transfer characteristic curve, the DC SQUID characteristic solver performs period conversion on the period of the transfer characteristic curve to obtain a representation result of the period of the transfer characteristic curve under the selected data format. In the case of scanning the transfer characteristic curve, the DC SQUID characteristic solver performs period conversion on the period of the transfer characteristic curve to obtain a representation result of the period of the transfer characteristic curve under the selected data format.

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