Ultrasonic wave fingerprint identification module

Abstract

The invention relates to the technical field of fingerprint identification, and provides an ultrasonic wave fingerprint identification module which comprises a mother glass substrate, a first metal wire layer, a piezoelectric layer, a second metal wire layer and a protective layer. Wherein the first metal wire layer is arranged on the upper surface of the substrate and comprises a plurality of first wires extending along a first direction and a first contact area electrically connected with the first wires; the piezoelectric layer is arranged in a partial area of the first metal wire layer and exposes the first contact area. The second metal wire layer is arranged on the piezoelectric layer and comprises a plurality of second wires extending in the second direction and a second contact area electrically connected with the second wires. The protective layer covers the second metal wire layer. The first contact area and the second contact area are respectively used for electrically connecting the algorithm chip and the power supply control chip. The module structure can be simplified, the integration elasticity and the manufacturing efficiency are improved, and sensing stability and module lightening and thinning are facilitated.

Description

Technical Field

[0001] This application relates to the field of fingerprint recognition technology, and in particular to an ultrasonic fingerprint recognition module. Background Technology

[0002] Current ultrasonic fingerprint recognition modules can generally be divided into two types. The first type is as follows: Figure 1 The diagram shows a cross-sectional view of an ultrasonic fingerprint recognition module based on a TFT array substrate, as described in related technologies. The basic structure of this ultrasonic fingerprint recognition module, from bottom to top, includes a TFT array substrate 11, a piezoelectric layer 12, an electrode layer 13, and a protective layer 14. The TFT array substrate 11 is typically fabricated using the traditional LTPS process, with common materials such as silicon nitride (SiN), silicon oxide (SiO), molybdenum / aluminum / molybdenum trilayer metal (MoAlMo), indium tin oxide (ITO), amorphous silicon (a-Si), and molybdenum-tungsten alloy (MoW). Multiple coating and photolithography processes are required to form the sensing pixel circuitry. Sensing wires are positioned below the piezoelectric layer 12 in both the X and Y directions and are isolated by an intermediate insulating layer. Furthermore, the module also includes a flexible printed circuit board (FPC) 15 and an algorithm chip (Algorithm IC) 16 mounted on it, connected to the contacts in the sensing area via wires to achieve signal acquisition and digital processing of the fingerprint image. Although the overall structural design can achieve high-resolution sensing, the process is complex, there are many types of materials, and the requirements for wire alignment and insulation thickness are extremely high, resulting in low yield and high cost.

[0003] The second type is as follows Figure 2 The diagram shows a cross-sectional view of an ultrasonic fingerprint recognition module based on a wafer substrate, as described in related technologies. The basic structure of this ultrasonic fingerprint recognition module mainly consists of a wafer substrate 21, a piezoelectric layer 22, an electrode layer 23, and a protective layer 24. The wafer substrate 21 is fabricated through processes such as film deposition, photolithography, and ion implantation, using materials such as silicon (Si), germanium (Ge), gallium arsenide (GaAs), or gallium nitride (GaN). In this structure, the sensing pixel circuit is also located below the piezoelectric layer 22, and the X / Y conductors are also integrated into the wafer substrate 21. The circuit layout is dense, requiring high alignment, and the overall structure is not conducive to module thinning. Furthermore, the module also includes a flexible printed circuit board (FPC) 25 and a power / switch IC 26 mounted on it. This chip provides sensing drive voltage, switches scanning channels, and works with the main chip to achieve complete fingerprint sensing and signal processing. The wires and connections usually require complex layer connections or vertical via designs, increasing the difficulty of manufacturing.

[0004] Both of these structures share common drawbacks, including numerous process steps, stringent requirements for wire width and spacing, and the need for high-precision alignment of insulating layers and multi-layer patterns, leading to reduced yield and increased costs. Furthermore, the design of the contact area is not easily simplified, often requiring vias or additional layers for connection, and it hinders chip integration and module thinning. Therefore, the industry still has a need for improved technologies that are simpler in structure, easier to process, lower in cost, and conducive to module integration and thinning. Summary of the Invention

[0005] In view of this, in order to solve the problems that current ultrasonic fingerprint recognition modules generally have, such as complex structure, high process precision requirements, difficulty in simplifying contact design, insufficient flexibility in module integration and limited thickness, the main purpose of this application is to provide an ultrasonic fingerprint recognition module that simplifies the wire structure and improves the convenience of chip integration, thereby improving manufacturing efficiency and achieving module thinning.

[0006] To achieve the above objectives, this application provides an ultrasonic fingerprint recognition module, including a substrate, a first metal wire layer, a piezoelectric layer, a second metal wire layer, and a protective layer. The substrate is made of plain glass and has an upper surface. The first metal wire layer is disposed on the upper surface of the substrate and includes a plurality of first wires extending along a first direction, and a first contact area electrically connected to the plurality of first wires. The first contact area includes a plurality of contacts for electrically connecting to an algorithm chip. The piezoelectric layer is disposed in a portion of the first metal wire layer and exposes the first contact area. The second metal wire layer is disposed on the piezoelectric layer and includes a plurality of second wires extending along a second direction perpendicular to the first direction, and a second contact area electrically connected to the plurality of second wires. The second contact area includes a plurality of contacts for electrically connecting to a power control chip. The protective layer covers the second metal wire layer.

[0007] According to an embodiment of this application, the aforementioned algorithm chip and power control chip are disposed on a flexible circuit board, and the flexible circuit board is electrically connected to the first contact area and the second contact area, respectively.

[0008] According to an embodiment of this application, the aforementioned algorithm chip is disposed above the substrate and electrically connected to the first contact area, and the power control chip is disposed on the flexible circuit board, which is electrically connected to the second contact area.

[0009] According to embodiments of this application, the thickness of the aforementioned substrate is between 50 micrometers and 150 micrometers.

[0010] According to embodiments of this application, the aforementioned first and second metal conductor layers are MoAlMo or Cu / Ti metal materials.

[0011] According to an embodiment of this application, the aforementioned ultrasonic fingerprint recognition module further includes an ITO conductive film, which is disposed on the surface of the first metal wire layer.

[0012] According to embodiments of this application, the thickness of the aforementioned ITO conductive film is between 0.05 micrometers and 0.1 micrometers.

[0013] According to embodiments of this application, the thicknesses of the aforementioned first metal conductor layer and second metal conductor layer are both between 0.5 micrometers and 1 micrometer.

[0014] According to embodiments of this application, the thickness of the aforementioned piezoelectric layer is between 5 micrometers and 15 micrometers.

[0015] According to embodiments of this application, the aforementioned protective layer is a polymer coating or film with a thickness between 10 micrometers and 30 micrometers.

[0016] Compared with prior art, the embodiments of this application have the following advantages:

[0017] (1) In this application, the contact area is respectively located on the first metal conductor layer and the second metal conductor layer, which can effectively simplify the contact output and wiring design and improve the integration efficiency and reliability of electrical connection.

[0018] (2) This application uses a plain glass substrate and a simplified double-layer metal wire structure. The material composition is simple, the required metal types are few, and the process steps are reduced, which helps to reduce manufacturing costs and improve production yield.

[0019] (3) The specifications for the line width and spacing of the conductor layer in this application are relatively lenient, which can reduce the requirements for the alignment accuracy of the yellow light, improve the overall process tolerance, and reduce the risk of open circuit or short circuit caused by minor errors.

[0020] (4) The stacked design of the conductive layer and the piezoelectric layer in this application is beneficial to the symmetry of the module sensing area and the structural stability, and also helps to reduce the module thickness and achieve the requirements of lightweight design.

[0021] (5) This application provides two chip integration configuration methods, which can set the algorithm chip and power control chip on the substrate or flexible circuit board according to the application requirements of the module, thereby improving design flexibility and application expandability.

[0022] The following detailed description through specific embodiments will make it easier to understand the purpose, technical content, features, and effects achieved by this application. Attached Figure Description

[0023] Figure 1 This is a cross-sectional view of an ultrasonic fingerprint recognition module based on a TFT array substrate in related technologies.

[0024] Figure 2 This is a cross-sectional view of an ultrasonic fingerprint recognition module based on a wafer substrate in related technologies.

[0025] Figure 3 This is a cross-sectional view of the ultrasonic fingerprint recognition module provided in the first embodiment of this application.

[0026] Figure 4 This is a schematic diagram of the configuration of the first metal conductor layer and the second metal conductor layer in the first embodiment of this application.

[0027] Figure 5 and Figure 6 This is a schematic diagram of an ITO conductive film disposed on a first metal wire layer in the first embodiment of this application.

[0028] Figure 7 This is a schematic diagram illustrating the integration of the ultrasonic fingerprint recognition module with the algorithm chip and power control chip in the first embodiment of this application.

[0029] Figure 8 This is a cross-sectional view of the ultrasonic fingerprint recognition module provided in the second embodiment of this application.

[0030] Figure 9 This is a schematic diagram illustrating the integration of the ultrasonic fingerprint recognition module with the algorithm chip and power control chip in the second embodiment of this application.

[0031] Figure 10 This is a partial cross-sectional view of the ultrasonic fingerprint recognition module along the Y-axis in the second embodiment of this application.

[0032] Figure 11 This is a partial cross-sectional view of the ultrasonic fingerprint recognition module along the X-axis in the second embodiment of this application.

[0033] Explanation of reference numerals in the attached figures:

[0034] 11: TFT array substrate;

[0035] 12: Piezoelectric layer;

[0036] 13: Electrode layer;

[0037] 14: Protective layer;

[0038] 15: Flexible circuit board;

[0039] 16: Algorithm chip;

[0040] 21: Wafer substrate;

[0041] 22: Piezoelectric layer;

[0042] 23: Electrode layer;

[0043] 24: Protective layer;

[0044] 25: Flexible circuit board;

[0045] 26: Power control chip;

[0046] 100: Ultrasonic fingerprint recognition module;

[0047] 110:Substrate;

[0048] 120: First metallic conductor layer;

[0049] 121a: Molybdenum layer;

[0050] 121b: Aluminum layer;

[0051] 121c: molybdenum layer;

[0052] 121d: Titanium layer;

[0053] 121e: Copper layer;

[0054] 122: First conductor;

[0055] 123: First contact area;

[0056] 124: ITO conductive thin film;

[0057] 130: Piezoelectric layer;

[0058] 140: Second metallic conductor layer;

[0059] 142: Second conductor;

[0060] 143: Second contact area;

[0061] 150: Protective layer;

[0062] 160: Algorithm chip;

[0063] 170: Flexible circuit board;

[0064] 180: Power control chip;

[0065] 200: Ultrasonic fingerprint recognition module;

[0066] 210:Substrate;

[0067] 220: First metallic conductor layer;

[0068] 221: First conductor;

[0069] 223: First contact area;

[0070] 224: ITO conductive thin film;

[0071] 230: Piezoelectric layer;

[0072] 240: Second metallic conductor layer;

[0073] 242: Second conductor;

[0074] 243: Second contact area;

[0075] 250: Protective layer;

[0076] 260: Algorithm chip;

[0077] 270: Flexible circuit board;

[0078] 280: Power control chip. Detailed Implementation

[0079] The embodiments of this application will be further explained below with reference to the accompanying drawings. Wherever possible, the same reference numerals represent the same or similar components in the drawings and description. In the drawings, shapes and thicknesses may be exaggerated for simplicity and convenience. It is understood that elements not specifically shown in the drawings or described in the description are forms known to those skilled in the art. Those skilled in the art can make various changes and modifications based on the content of this application.

[0080] The technical solutions used in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of this application, and are therefore only examples. Unless otherwise specified, they should not be used to limit the scope of protection of this application. In the description of the specification, many specific details are provided to give the reader a more complete understanding of this application; however, this application may still be implemented even if some or all of the specific details are omitted. Furthermore, well-known steps or elements are not described in the details to avoid unnecessarily limiting this application. Unless otherwise specified, the embodiments and features in the embodiments of this application can be arbitrarily combined with each other. It should be noted that, unless otherwise specified, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0081] As previously described, current ultrasonic fingerprint recognition modules mostly use TFT substrates or wafers as substrates. Their structural design relies on multi-layered metal wire stacking and insulating layer isolation. The dense wire layout and high alignment accuracy requirements lead to complex processes, high costs, and unstable yields, also limiting module thickness and application flexibility. To address these issues, the basic concept of this application is to provide an ultrasonic fingerprint recognition module that uses a plain glass substrate as the carrier structure. A simplified stacking method of two layers of wires and a piezoelectric layer is used to form contact areas electrically connected to the algorithm chip and power control chip, respectively. This design helps reduce process steps and wire stacking difficulty, increases the freedom of wire layout and module integration flexibility, thereby improving module thinness and overall stability.

[0082] Please refer to Figure 3and combined Figure 4 and Figure 7 This will be explained together. Figure 3 A cross-sectional view of the ultrasonic fingerprint recognition module 100 provided in the first embodiment of this application; Figure 4 This is a schematic diagram showing the configuration of the first metal conductor layer 120 and the second metal conductor layer 140 in the first embodiment; Figure 7 This is a schematic diagram illustrating the integration of the ultrasonic fingerprint recognition module 100 with the algorithm chip 160 and power control chip 180 in the first embodiment. In this embodiment, the ultrasonic fingerprint recognition module 100 includes a substrate 110, a first metal conductive layer 120, a piezoelectric layer 130, a second metal conductive layer 140, and a protective layer 150. The ultrasonic fingerprint recognition module 100 also includes an algorithm chip (Algorithm IC) 160 and a power control chip (Power / Switch IC) 180 disposed on a flexible circuit board (FPC) 170, which are electrically connected to the first contact area 123 of the first metal conductive layer 120 and the second contact area 143 of the second metal conductive layer 140, respectively.

[0083] The substrate 110 is made of plain glass, and glass materials with high thermal stability and low coefficient of thermal expansion, such as borosilicate glass, can be selected. The thickness can be controlled to 50 to 150 micrometers after chemical or mechanical thinning, which helps to make the module thinner and improve the ultrasonic penetration efficiency.

[0084] A first metal conductive layer 120 is disposed on the upper surface of the substrate 110, including a plurality of first conductive lines 122 extending along a first direction (e.g., the X-axis direction) and a first contact area 123 electrically connected to the first conductive lines 122. The pattern of the first conductive lines 122 is designed according to application requirements and can present straight lines, grids, serpentine lines, or other variable line shapes. The first contact area 123 is disposed at one end of the first conductive lines 122 and includes a plurality of contacts, reserved for electrical connection to the algorithm chip 160 as a transmission channel for sensing signals. The first metal conductive layer 120 can be made of a metal material such as MoAlMo or Cu / Ti, with a thickness ranging from 0.5 micrometers to 1 micrometer, and can be formed by sputtering and photolithography.

[0085] A piezoelectric layer 130 is disposed on a portion of the first metal conductor layer 120, exposing the first contact area 123. To ensure the conductive contacts remain exposed, the piezoelectric layer 130 is not fully coated, but selectively coated on the sensing area, which refers to the overlapping area of ​​the piezoelectric layer 130 with the first metal conductor layer 120 and the second metal conductor layer 140. The piezoelectric layer 130 can be made of polymer materials such as PVDF, PVDF-HFP, and P(VDF-TrFE), or a ceramic dispersion with a piezoelectric effect. Coating methods include spin coating, precision screen printing, and droplet printing, with the thickness controlled between 5 micrometers and 15 micrometers, balancing sensing sensitivity and mechanical adaptability.

[0086] The second metal conductive layer 140 is disposed on the piezoelectric layer 130 and includes a plurality of second conductive lines 142 extending along a second direction (e.g., the Y-axis direction). The second direction is perpendicular to the extension direction of the first conductive line 122. The first conductive line 122 and the second conductive line 142 together form a sensing electrode arranged alternately in the horizontal and vertical directions. The second metal conductive layer 140 also includes a second contact region 143 for electrical connection with the power control chip 180. The second metal conductive layer 140 may be made of the same or different material as the first metal conductive layer 120, with a thickness between 0.5 micrometers and 1 micrometer, and may be formed by sputtering and photolithography.

[0087] A protective layer 150 is disposed on the second metal conductor layer 140 as a protective layer for the overall module surface. The protective layer 150 may be a polymer coating with a thickness between 10 micrometers and 30 micrometers, such as polyimide (PI) or polymethyl methacrylate (PMMA), or an adhesive polymer film material may be used to provide protective functions such as waterproofing, scratch resistance and environmental isolation.

[0088] The sensing signal can be transmitted to the corresponding second contact area 143 via the interlaced second wires 142 disposed on the piezoelectric layer 130, and then connected to the power control chip 180 through the second contact area 143 to realize the transmission and reception of the sensing signal and drive control. The first contact area 123 can be connected to the algorithm chip 160 disposed on the flexible circuit board 170 via the first wire 122. The algorithm chip 160 is directly disposed on the substrate 110 and electrically integrated with the sensing signal line. In addition, the power control chip 180 is electrically connected to the second contact area 143 to provide the driving voltage, scan control and power management functions required by the module, further realizing the integration of the overall module's signal sensing, processing and output functions.

[0089] This embodiment uses plain glass as the substrate material, which differs from the current processes for TFT array substrates or wafer substrates. This effectively simplifies the number of process layers and photomask passes, reducing process complexity and cost. Furthermore, the two sets of metal conductive layers are respectively mapped to the contact areas of the algorithm chip and the power control chip, allowing the module to maintain a thin profile and simplified wiring configuration while still possessing good signal processing and energy control capabilities. In addition, the perpendicular orientation of the conductive layers facilitates the formation of a matrix-type sensing area, improving fingerprint recognition accuracy.

[0090] The following details the manufacturing method of the ultrasonic fingerprint recognition module 100 in the first embodiment of this application.

[0091] First, a plain glass substrate 110 is provided. Then, a first metal conductive layer 120 is formed on the upper surface of the substrate 110. The metal layer can be deposited by PVD sputtering, and then the desired pattern is formed by photolithography and etching. The material of the first metal conductive layer 120 can be MoAlMo, Cu / Ti alloy, or other materials with good conductivity and adhesion. The first conductive lines 122 are arranged along a first direction, and the spacing between the conductive lines can vary from 20 / 20 micrometers to 100 / 100 micrometers, providing great process flexibility and suitability for various resolution designs. For example, at 500ppi, the line width / spacing is 40 / 40 micrometers; for higher resolutions, it can be designed to be as low as 20 / 20 micrometers. A first contact area 123 is located at one end of the first metal conductive layer 120 and includes multiple contacts reserved for electrical connection with the algorithm chip 160 and the flexible circuit board 170.

[0092] Additionally, please refer to Figure 5 This is a schematic diagram illustrating the fabrication of the first metal conductive layer 120 using a MoAlMo structure in the first embodiment. The first metal conductive layer 120 is formed on a plain glass substrate 110 by sequentially forming a molybdenum layer 121a, an aluminum layer 121b, and a molybdenum layer 121c, forming a three-layer metal stack structure. An ITO conductive thin film 124 is then formed on the top layer. The molybdenum layers 121a and 121c provide excellent conductivity and adhesion, while the aluminum layer 121b offers both conductivity and cost-effectiveness. This metal stack structure has a uniform thickness, with the overall thickness of the first conductive layer 120 controlled between 0.5 micrometers and 1 micrometer, suitable for the uniform film deposition requirements of large-area sensing arrays. This metal stack structure possesses high conductivity, good adhesion, and resistive stability, and is commonly used in precision sensing element processes.

[0093] Please refer to Figure 6This is a schematic diagram illustrating the fabrication of the first metal conductive layer 120 using a Cu / Ti structure in the first embodiment. The process involves sequentially depositing a titanium (Ti) layer 121d and a copper (Cu) layer 121e on a plain glass substrate 110. The titanium layer 121d serves as an adhesion layer for the copper conductive lines and prevents diffusion, while the copper layer 121e provides a highly conductive and low-resistance path. Similarly, an ITO conductive film 124 is formed on the top layer to enhance stability and protect the metal layers from oxidation. The overall thickness of this metal stack structure is controlled within 0.5 to 1 micrometer, exhibiting excellent conductivity and low material cost.

[0094] An ITO conductive film 124 is disposed on the first metal conductor layer 120. ITO has high surface conductivity and oxidation resistance, which can meet the product's requirements for conductivity stability and durability. The ITO conductive film 124 can be formed by sputtering, with the thickness controlled between 0.05 and 0.1 micrometers. This fabrication method is a recommended structure in the embodiments of this application, suitable for ultrasonic fingerprint modules with high conductivity requirements and symmetrical structural designs.

[0095] Figure 5 and Figure 6 Both fabrication methods shown can be applied to the processes of the first metal conductive layer 120 and the second metal conductive layer 140 in this application. Depending on product application requirements, conductive layer design, and cost considerations, a MoAlMo or Cu / Ti structure can be selected. Both can be used in conjunction with ITO conductive thin film processes to achieve compatibility with the required conductive patterns and subsequent coating processes.

[0096] Subsequently, a piezoelectric layer 130 is formed in a portion of the first metal conductor layer 120, leaving the first contact area 123 exposed. The piezoelectric layer 130 can be made of organic piezoelectric materials such as polyvinylidene fluoride (PVDF), or copolymers can be used to enhance mechanical elasticity and sensing sensitivity. Coating can be performed using spin coating, printing, microdroplet coating, or other suitable methods, with the thickness of the piezoelectric layer 130 controlled between 5 and 15 micrometers. The piezoelectric layer 130 is coated only in the sensing area, leaving the first contact area 123 exposed to ensure smooth electrical connection with the algorithm chip 160 above the flexible circuit board 170.

[0097] A second metal conductive layer 140 is further formed on the piezoelectric layer 130. The second conductive lines 142 of the second metal conductive layer 140 extend along a second direction perpendicular to the first conductive line 122 to form an interlaced sensing grid. The second conductive lines 142 can be made of the same material as the first conductive lines 122 (e.g., MoAlMo or Cu / Ti), or they can be made of different materials. The second conductive lines 142 can extend to the edge of the piezoelectric layer 130 and electrically connect to the second contact area 143. The second contact area 143 includes multiple contacts reserved for electrical connection with the power control chip 180 and the flexible circuit board 170. The alignment and pattern of the second conductive lines 142 can be adjusted according to application requirements, and the line width / spacing design is flexible, which is beneficial for optimizing module resolution and sensitivity. This design omits multi-layer insulation and via steps, making the sensing array structure more stable and easier to mass-produce. The sensing signal is read out via a matrix, and after calculation by the algorithm chip 160, a precise fingerprint image can be obtained.

[0098] After the second metal conductor layer 140 is completed, a protective layer 150 is applied to it. The protective layer 150 can be made of flexible polymer materials such as polyimide, acrylic, or silicone resin, and can be formed by coating or printing to form a polymer coating. Alternatively, a pre-fabricated polymer film can be adhered to the surface of the second metal conductor layer 140. The thickness of the polymer film is typically between 15 and 25 micrometers, while the thickness of the polymer coating can be controlled between 5 and 20 micrometers to balance the protective effect required for fingerprint sensing with the penetration requirements of ultrasonic signals, and to effectively prevent damage to the conductor structure from environmental moisture or foreign objects.

[0099] Finally, as Figure 7 As shown, after completing the protective layer 150, the module and chip can be further integrated and packaged. The algorithm chip 160 and the power control chip 180 are both disposed on the flexible circuit board 170 and are respectively bonded to the contacts formed by the first contact area 123 and the second contact area 143 via soldering. Further explanation: the first contact area 123 extends and connects via a first wire 122 disposed on the first metal wire layer 120 and is electrically connected to the algorithm chip 160 on the flexible circuit board 170 to receive signals output from the sensing area. The second contact area 143 extends and connects via a second wire 142 disposed on the second metal wire layer 140 and is electrically connected to the power control chip 180 on the flexible circuit board 170 to provide module drive voltage and scan control signals. This packaging design effectively integrates functions such as sensing signal reading, algorithm processing, and power supply control, simplifying the module structure and improving system stability and process yield. The integrated packaging design of this embodiment effectively integrates module functions and improves overall system stability, module thinning, and mass production capabilities.

[0100] Please refer to Figure 8 and Figure 9 . Figure 8 A cross-sectional view of the ultrasonic fingerprint recognition module 200 provided in the second embodiment of this application; Figure 9 This is a schematic diagram illustrating the integration of the ultrasonic fingerprint recognition module 200 with the algorithm chip 260 and the power control chip 280 in the second embodiment. The overall structure of the second embodiment is basically the same as that of the first embodiment. The ultrasonic fingerprint recognition module 200 in the second embodiment also includes a substrate 210, a first metal conductor layer 220, a piezoelectric layer 230, a second metal conductor layer 240, and a protective layer 250. The ultrasonic fingerprint recognition module 200 can also integrate the algorithm chip 260 and the power control chip 280, and electrically connect them to the first contact area 223 and the second contact area 243, respectively.

[0101] In this embodiment, substrate 210 is a plain glass substrate. The first metal wire layer 220 and the second metal wire layer 240 can adopt the same MoAlMo structure or Cu / Ti structure as in the first embodiment. The thickness, the arrangement direction of the first wire 221 and the second wire 242, and the configuration of the piezoelectric layer 230 can also completely correspond to the description in the first embodiment. The piezoelectric layer 230 is disposed in the sensing area, and the first contact area 223 and the second contact area 243 are left exposed to facilitate subsequent electrical connection. The protective layer 250 is disposed on the second metal wire layer 240 to protect the overall module structure.

[0102] The main difference between the second embodiment and the first embodiment is that the algorithm chip 260 is disposed in the upper region of the substrate 210 and is directly electrically connected to the first contact area 223; while the power control chip 280 is disposed on the flexible circuit board 270 and is electrically connected to the second contact area 243 (see Figure 12). This structural configuration helps to shorten the signal transmission path between the algorithm chip 260 and the sensing electrode, further improving the real-time processing efficiency of the fingerprint image algorithm.

[0103] Please refer to Figure 10 and Figure 11 These are partial cross-sectional views of the ultrasonic fingerprint recognition module 200 along the Y-axis and X-axis directions in the second embodiment. Figure 10 As shown, the first metal wire layer 220, the piezoelectric layer 230, the protective layer 250 and the second metal wire layer 240 are stacked on the substrate 210 and form a sensing electrode along the Y-axis direction. Figure 11 Further shown in the X-axis direction, the algorithm chip 260 is disposed on the substrate 210 and electrically connected to the corresponding first metal wire layer 220, showing the direct integration method between the algorithm chip 260 and the first metal wire layer 220 in this embodiment, specifically demonstrating the module integration and thin and light design emphasized in this application.

[0104] In other words, unlike the first embodiment where both chips are placed on a flexible circuit board, the second embodiment places the algorithm chip 260 directly on the glass substrate 210, which helps to reduce packaging space, reduce wire length and parasitic capacitance effect, and is particularly suitable for fingerprint sensing application products that emphasize thinness and high-speed computing.

[0105] In summary, the ultrasonic fingerprint recognition module provided in this application, based on a bare glass substrate and incorporating a simplified stacked structure of metal conductive layers and piezoelectric layers, not only simplifies the overall process flow and the number of photomasks but also reduces reliance on advanced process conditions and precise alignment techniques. Through the vertically interleaved configuration of the first and second conductive lines, coupled with a separate or integrated chip configuration design, it can be flexibly adjusted according to product application requirements, achieving a thinner, lighter module with high stability and efficient electrical integration. Overall, this application possesses advantages such as simple structure, user-friendly process, and high flexibility in conductive line configuration, exhibiting high practicality and industrial application potential, and is particularly suitable for fingerprint recognition modules in next-generation wearable devices, mobile terminals, and biometric systems.

[0106] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of this application. Therefore, all equivalent variations or modifications made in accordance with the features and spirit described in the claims of this application should be included within the scope of the claims of this application.

Claims

1. An ultrasonic fingerprint recognition module, characterized in that, The ultrasonic fingerprint recognition module includes: The substrate is made of plain glass and has an upper surface; A first metal conductor layer is disposed on the upper surface, the first metal conductor layer comprising: A plurality of first conductors extending along a first direction; and The first contact area is electrically connected to the plurality of first wires, and the first contact area includes a plurality of contacts for electrically connecting to the algorithm chip; A piezoelectric layer is disposed on a portion of the first metal conductor layer, exposing the first contact area; a second metal conductor layer is disposed on the piezoelectric layer, the second metal conductor layer comprising: A plurality of second conductors extending along a second direction, the second direction being perpendicular to the first direction; and The second contact area is electrically connected to the plurality of second wires, and the second contact area includes a plurality of contacts for electrically connecting to the power control chip; and A protective layer covering the second metal conductor layer.

2. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The algorithm chip and the power control chip are mounted on a flexible circuit board, which is electrically connected to the first contact area and the second contact area, respectively.

3. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The algorithm chip is disposed above the substrate and electrically connected to the first contact area. The power control chip is disposed on the flexible circuit board, and the flexible circuit board is electrically connected to the second contact area.

4. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The thickness of the substrate is between 50 micrometers and 150 micrometers.

5. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The first metal conductor layer and the second metal conductor layer are MoAlMo or Cu / Ti metal materials.

6. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The ultrasonic fingerprint recognition module also includes an ITO conductive film, which is disposed on the surface of the first metal wire layer.

7. The ultrasonic fingerprint recognition module as described in claim 6, characterized in that, The thickness of the ITO conductive film is between 0.05 micrometers and 0.1 micrometers.

8. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The thickness of both the first metal conductor layer and the second metal conductor layer is between 0.5 micrometers and 1 micrometer.

9. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The thickness of the piezoelectric layer is between 5 micrometers and 15 micrometers.

10. The ultrasonic fingerprint recognition module as described in claim 1, characterized in that, The protective layer is a polymer coating or film with a thickness between 10 micrometers and 30 micrometers.

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