Semiconductor structure and method of manufacturing the same

Abstract

The application relates to a semiconductor structure and a manufacturing method thereof, wherein the semiconductor structure comprises a substrate and a photoresist structure on the substrate, the photoresist structure comprises an opening exposing the substrate, the opening comprises a first part close to the substrate and a second part away from the substrate, the width of the first part is constant along the direction perpendicular to the surface of the substrate, the width of the second part gradually decreases, and the minimum width of the second part is equal to the width of the first part. The application reduces or avoids the problem of etchant residue in the subsequent wet etching process, thereby effectively reducing or avoiding the probability of pollution or damage of the exposed substrate surface of the opening, and further helping to improve the performance and stability of the semiconductor device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a semiconductor structure and a manufacturing method thereof. BACKGROUND

[0002] In the existing 28nm process, different voltage regions have different requirements for gate oxide. Based on this, a general process will increase an exposure process after growing a gate oxide layer (GOX), so as to adapt to the requirements of different voltage regions by changing the thickness of the gate oxide layer. However, due to the limitation of the photoresist structure design, the liquid residue is prone to occur at the concave region (or opening) in the photoresist structure, for example, the hydrogen fluoride (HF) that consumes the gate oxide layer is easy to be blocked by the photoresist structure and stay in the concave region (or opening), at this time, the residual hydrogen fluoride will corrode the gate oxide layer and further damage the silicon substrate below the gate oxide layer, thereby causing the damage of the silicon substrate, and even affecting the performance of the semiconductor device in severe cases. SUMMARY

[0003] Based on this, it is necessary to provide a semiconductor structure and a manufacturing method thereof, which reduces or avoids the probability of liquid residue in the opening of the photoresist structure, thereby helping to improve the yield of the semiconductor device.

[0004] The present application provides a semiconductor structure, comprising:

[0005] a substrate;

[0006] a photoresist structure located on the substrate, the photoresist structure comprising an opening exposing the substrate, the opening comprising a first part close to one side of the substrate and a second part away from the substrate, along the direction perpendicular to the surface of the substrate, the width of the first part is constant, the width of the second part gradually decreases, and the minimum width of the second part is equal to the width of the first part.

[0007] In one of the embodiments, the ratio between the height of the first part and the height of the second part ranges from 1:15 to 5:32.

[0008] In one of the embodiments, the inclination angle of the sidewall of the second part ranges from 15° to 30°.

[0009] In one of the embodiments, the height of the first part ranges from 2kÅ to 6kÅ.

[0010] In one of the embodiments, the cross-sectional shape of the first part is rectangular, and the cross-sectional shape of the second part is inverted trapezoidal.

[0011] In one of the embodiments, the substrate includes a substrate and a gate oxide layer arranged in a stack, the photoresist structure is disposed on the gate oxide layer, and the opening exposes the gate oxide layer.

[0012] Accordingly, the present application also provides a method for manufacturing a semiconductor structure, comprising:

[0013] providing a substrate, and forming a photoresist layer on the substrate;

[0014] performing a first exposure process to form a first exposure region in the photoresist layer;

[0015] performing a second exposure process to form a second exposure region in the photoresist layer, and a projection of the first exposure region towards the substrate falls into a projection of the second exposure region towards the substrate;

[0016] developing the photoresist layer to remove portions of the photoresist layer within the first exposure region and the second exposure region, to form a photoresist structure with an opening, the opening exposing the substrate;

[0017] wherein the opening includes a first portion near a side of the substrate and a second portion away from the side of the substrate, along a direction perpendicular to a surface of the substrate, a width of the first portion is constant, a width of the second portion gradually decreases, and a minimum width of the second portion is equal to the width of the first portion.

[0018] In one of the embodiments, a focal length of the first exposure process is smaller than a focal length of the second exposure process, and an injection dose of the first exposure process is smaller than an injection dose of the second exposure process.

[0019] In one of the embodiments, the focal length of the first exposure process ranges from 150nm to 250nm, and the exposure dose ranges from 200J / m 2 ~300J / m 2 .

[0020] the focal length of the second exposure process ranges from 250nm to 350nm, and the exposure dose ranges from 300J / m 2 ~500J / m 2 .

[0021] In one of the embodiments, the process of providing a substrate includes:

[0022] providing a substrate;

[0023] forming a gate oxide layer on the substrate to form the substrate including the substrate and the gate oxide layer;

[0024] The photoresist structure is formed on the gate oxide layer, and the opening exposes the gate oxide layer.

[0025] The unexpected effect of the present application is that by arranging the photoresist structure with the opening on the substrate, and keeping the width of the first part of the opening near the substrate side unchanged along the direction perpendicular to the surface of the substrate, and gradually reducing the width of the second part of the opening away from the substrate side along the direction, and the minimum width of the second part is equal to the width of the first part, the problem of etchant residue in the subsequent wet etching process is reduced or avoided, thereby effectively reducing or avoiding the probability of pollution or damage of the substrate surface exposed by the opening, and further helping to improve the performance and stability of the semiconductor device. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0027] Figure 1 A schematic diagram of a three-dimensional structure of a concave photoresist in a related art.

[0028] Figure 2 A schematic diagram of a semiconductor structure provided by one of the embodiments of the present application.

[0029] Figure 3 A flowchart of a manufacturing method of a semiconductor structure provided by one of the embodiments of the present application.

[0030] Figure 4 A schematic diagram of a substrate provided in a manufacturing method of a semiconductor structure provided by one of the embodiments of the present application.

[0031] Figure 5 A schematic diagram of a photoresist layer formed on a substrate in a manufacturing method of a semiconductor structure provided by one of the embodiments of the present application.

[0032] Figure 6 A schematic diagram of a first exposure process performed in a manufacturing method of a semiconductor structure provided by one of the embodiments of the present application.

[0033] Figure 7 A schematic diagram of a second exposure process performed in a manufacturing method of a semiconductor structure provided by one of the embodiments of the present application.

[0034] Figure 8 The structure diagram corresponding to the step of developing the photoresist layer in the manufacturing method of the semiconductor structure provided in one of the embodiments of the present application.

[0035] In the drawings, reference numerals include: 100-silicon substrate; 101-gate oxide layer; 110-concave photoresist; 111-concave opening; A-bottom corner area; 200-base; 201-substrate; 202-gate oxide layer; 210-photoresist structure; 211-opening; 211a-first part; 211b-second part; 212-photoresist layer; 212a-first exposure area; 212b-second exposure area; a-inclination angle. DETAILED DESCRIPTION

[0036] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0038] It will be understood that when an element or layer is referred to as being "on", "adjacent", "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected", or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section; for example, a first doped type could be termed a second doped type; and similarly, a second doped type could be termed a first doped type; a first doped type and a second doped type are different doped types, e.g., a first doped type can be p-type and a second doped type can be n-type, or the first doped type can be n-type and the second doped type can be p-type.

[0039] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can also be oriented in the other direction (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0040] The singular forms "a", "an", and "the" used herein include plural referents unless the context clearly dictates otherwise. It will be further understood that the terms "comprises", "comprising", "includes" and / or "including", or the like, when used herein, specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

[0041] Figure 1 Figure 1 is a schematic diagram of a three-dimensional structure of a concave photoresist. Referring to Figure 1, a silicon substrate 100 is provided with a gate oxide layer 101, and a concave photoresist 110 is disposed on the gate oxide layer 101. The concave photoresist 110 includes a concave opening 111 exposing a portion of the gate oxide layer 101. The cross section of the concave opening 111 is rectangular along a direction perpendicular to the surface of the silicon substrate 100. Figure 1

[0042] During a wet etching process based on the concave photoresist 110, an etchant (e.g., hydrofluoric acid) will gather in the concave opening 111 and etch the exposed portion of the gate oxide layer 101. However, after the wet etching process is completed, the etchant will remain in the bottom corner area A of the concave opening 111 due to the blocking of the sidewall of the concave opening 111, and the remaining etchant will continue to corrode the gate oxide layer 101, and even further damage the silicon substrate 100 in severe cases, thereby damaging the silicon substrate 100 and affecting the performance of the final semiconductor device.

[0043] Therefore, it is necessary to provide a semiconductor structure and a manufacturing method thereof to reduce or avoid the probability of liquid remaining in the opening of the photoresist structure, thereby helping to improve the yield of the semiconductor device.

[0044] Figure 2 Figure 2 is a schematic diagram of a semiconductor structure according to an embodiment of the present application. Referring to Figure 2, the semiconductor structure includes a substrate 200 and a photoresist structure 210 disposed on the substrate 200. The photoresist structure 210 includes an opening 211 exposing the substrate 200. The opening 211 includes a first portion 211a near one side of the substrate 200 and a second portion 211b away from the other side of the substrate 200. The width W1 of the first portion 211a is constant along a direction perpendicular to the surface of the substrate 200, and the width W2 of the second portion 211b gradually decreases along the direction perpendicular to the surface of the substrate 200. The minimum width W2 of the second portion 211b is equal to the width W1 of the first portion 211a. min The width W2 of the second portion 211b is less than the width W1 of the first portion 211a. min The width W2 of the second portion 211b is less than the width W1 of the first portion 211a. Figure 2 It should be noted that by providing the opening with the first portion and the second portion, and by providing the first portion with a constant width, the photoresist structure has sufficient thickness to protect the substrate, and ensures that the substrate covered by the photoresist structure on both sides of the first portion will not be damaged in subsequent process procedures. At the same time, by gradually decreasing the width of the second portion along the direction perpendicular to the surface of the substrate, and by making the minimum width of the second portion equal to the width of the first portion, the etchant in the subsequent wet etching process can flow out along the sidewall of the opening.

[0045]

[0046] ​​It can be seen that, by arranging the photoresist structure with the opening on the substrate, and keeping the width of the first part of the opening near the substrate unchanged along the direction perpendicular to the surface of the substrate, and gradually reducing the width of the second part of the opening away from the substrate along the direction, and the minimum width of the second part being equal to the width of the first part, the photoresist structure can reduce or avoid the problem of etchant residue in the subsequent wet etching process, thereby effectively reducing or avoiding the probability of pollution or damage of the exposed substrate surface of the opening, and further helping to improve the performance and stability of the semiconductor device.

[0047] With reference to Figure 2 In one of the embodiments, the ratio between the height H1 of the first part 211a and the height H2 of the second part 211b ranges from 1:15 to 5:32. Optionally, the height H1 of the first part 211a ranges from 2kÅ to 6kÅ. Optionally, the inclination angle a of the sidewall of the second part 211b ranges from 15° to 30°.

[0048] It should be noted that the height, width, inclination angle and other parameters of the first part and the second part in the opening can be adjusted according to actual needs, as long as the topography of the opening can meet the two conditions that the height of the first part is greater than or equal to the minimum thickness of the photoresist structure that can protect the substrate from damage, and the etchant in the subsequent wet etching process can flow out along the sidewall of the opening, and the present application does not limit this.

[0049] With reference to Figure 2 In one of the embodiments, the cross-sectional shape of the first part 211a is rectangular, and the cross-sectional shape of the second part 211b is inverted trapezoidal. In other embodiments of the present application, since the width of the first part is unchanged in the direction perpendicular to the substrate surface, the cross-sectional shape of the first part is always rectangular, and the cross-sectional shape of the second part can be adjusted according to actual needs, as long as the width of the second part gradually decreases in the direction close to the substrate, and the present application does not limit this.

[0050] With reference to Figure 2 In one of the embodiments, the substrate 200 includes a substrate 201 and a gate oxide layer 202 arranged in layers, the photoresist structure 210 is arranged on the gate oxide layer 202, and the opening 211 exposes the gate oxide layer 202. Optionally, the substrate 201 is a silicon substrate, and the gate oxide layer 202 is a silicon oxide layer.

[0051] Correspondingly, with reference to Figure 3 One of the embodiments of the present application further provides a manufacturing method of a semiconductor structure, including the following steps S01 to S04.

[0052] Step S01: providing a substrate, and forming a photoresist layer on the substrate.

[0053] Step S02: performing a first exposure process to form a first exposure region in the photoresist layer.

[0054] Step S03: performing a second exposure process to form a second exposure region in the photoresist layer, and the orthographic projection of the first exposure region towards the substrate falls into the orthographic projection of the second exposure region towards the substrate.

[0055] Step S04: developing the photoresist layer to remove the part of the photoresist layer located in the first exposure region and the second exposure region, to form a photoresist structure with an opening, the opening exposes the substrate; wherein the opening includes a first part close to the substrate side and a second part away from the substrate side, along the direction perpendicular to the surface of the substrate, the width of the first part is constant, the width of the second part gradually decreases, and the minimum width of the second part is equal to the width of the first part.

[0056] It should be noted that the part of the first exposure region close to the substrate forms the first part of the opening after the developing process in step S04, and the part of the second exposure region away from the substrate forms the second part of the opening after the developing process in step S04, so the morphology of the finally formed opening can be adjusted by adjusting the process parameters of the first exposure process and the second exposure process.

[0057] In addition, it should be emphasized that the above process changes the one-time exposure process commonly used in general process into two exposure processes, forming the partially overlapped first exposure region and the second exposure region, forming the opening with the first part and the second part without changing the original characteristic dimension (CD) of the photoresist structure, and making the opening have a morphology similar to a “slide”, so that the etchant in the subsequent wet etching process can flow out along the sidewall of the opening.

[0058] As described above, the manufacturing method of the semiconductor structure forms a photoresist layer on the substrate, defines the morphology of the opening through the first exposure process and the second exposure process, and forms a photoresist structure with an opening through the developing process, to reduce or avoid the problem of etchant residue in the subsequent wet etching process, thereby effectively reducing or avoiding the probability of pollution or damage to the substrate surface exposed by the opening, and further helping to improve the performance and stability of the semiconductor device.

[0059] Reference Figure 4In one of the embodiments, the process of providing the substrate 200 includes: providing a substrate 201; forming a gate oxide layer 202 on the substrate 201 to form the substrate 200 including the substrate 201 and the gate oxide layer 202. Optionally, the substrate 201 can be a silicon substrate, and the gate oxide layer 202 can be a silicon oxide layer. In other embodiments of the present application, the specific structure of the substrate can be adjusted according to actual needs, which is not limited in the present application.

[0060] Referring to Figure 5 In one of the embodiments, the photoresist layer 212 is formed on the substrate 200. In the case that the substrate 200 includes the substrate 201 and the gate oxide layer 202, the photoresist layer 212 is formed on the gate oxide layer 202.

[0061] Referring to Figure 6 In one of the embodiments, a first exposure process is performed to form a first exposure region 212a in the photoresist layer 212. Optionally, the width of the first exposure region 212a is constant along the direction perpendicular to the surface of the substrate 200, and preferably, the cross-sectional shape of the first exposure region 212a is rectangular.

[0062] In one of the embodiments, the focus range of the first exposure process includes 150nm-250nm, and the exposure dose range includes 200J / m 2 ~300J / m 2 In other embodiments of the present application, the specific process parameters of the first exposure process can be adjusted according to actual needs, which is not limited in the present application.

[0063] Referring to Figure 7 In one of the embodiments, a second exposure process is performed to form a second exposure region 212b in the photoresist layer 212, and the orthographic projection of the first exposure region 212a towards the substrate 200 falls into the orthographic projection of the second exposure region 212b towards the substrate 200. Optionally, the width of the second exposure region 212b gradually increases along the direction away from the substrate 200. Preferably, the cross-sectional shape of the second exposure region 212b is inverted trapezoidal.

[0064] In one of the embodiments, the focus of the second exposure process is greater than the focus of the first exposure process, and the implantation dose of the second exposure process is greater than the implantation dose of the first exposure process. Optionally, the focus range of the second exposure process includes 250nm-350nm, and the exposure dose range includes 300J / m 2 ~500J / m 2In other embodiments of the present application, the specific process parameters of the second exposure process can be adjusted as needed, as long as the condition of "the focal length of the second exposure process is greater than the focal length of the first exposure process, and the implantation dose of the second exposure process is greater than the implantation dose of the first exposure process" is met, which is not limited in the present application.

[0065] Referring to Figure 7 and Figure 8 In one embodiment, the photoresist layer 212 is developed to remove the portions of the photoresist layer 212 within the first exposure area 212a and the second exposure area 212b, to form a photoresist structure 210 having an opening 211 exposing the substrate 200; wherein the opening 211 includes a first portion 211a near the substrate 200 and a second portion 211b away from the substrate 200, the width W1 of the first portion 211a is constant along a direction perpendicular to the surface of the substrate 200, the width W2 of the second portion 211b gradually decreases along the direction, and the minimum width W2 of the second portion 211b is equal to the width W1 of the first portion 211a. min The width W1 of the first portion 211a is equal to the width W2 of the second portion 211b.

[0066] Continuing to refer to Figure 8 In the case where the substrate 200 includes a substrate 201 and a gate oxide layer 202, the photoresist structure 210 is formed on the gate oxide layer 202, and the opening 211 exposes the gate oxide layer 202.

[0067] It should be noted that by forming the opening having the first portion and the second portion, and keeping the width of the first portion constant, the photoresist structure can have sufficient thickness to protect the substrate, and ensure that the substrate covered by the photoresist structure on both sides of the first portion will not be damaged in subsequent process procedures. At the same time, by gradually reducing the width of the second portion along the direction perpendicular to the surface of the substrate, and keeping the minimum width of the second portion equal to the width of the first portion, the etchant in the subsequent wet etching process can flow out along the sidewall of the opening, thereby effectively reducing or avoiding the probability of contamination or damage of the substrate surface exposed by the opening, and thus helping to improve the performance and stability of the semiconductor device.

[0068] The unexpected effect of the present application is that by providing the photoresist structure having the opening on the substrate, and keeping the width of the first portion near the substrate along the direction perpendicular to the surface of the substrate constant, and gradually reducing the width of the second portion away from the substrate along the direction, and keeping the minimum width of the second portion equal to the width of the first portion, the problem of etchant residue in the subsequent wet etching process is reduced or avoided, thereby effectively reducing or avoiding the probability of contamination or damage of the substrate surface exposed by the opening, and thus helping to improve the performance and stability of the semiconductor device.

[0069] In the description of the present specification, the description referring to the terms "some embodiments", "other embodiments", "ideal embodiments", and the like means that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0070] The technical features of the above-described embodiments can be combined in any manner. In order to make the description simple, all possible combinations of the technical features of the above-described embodiments are not described, however, as long as the combinations of the technical features do not contradict each other, they should be considered within the scope of the present specification.

[0071] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the application. It should be noted that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.

Claims

1. A semiconductor structure, characterized in that, include: Base; A photoresist structure is located on the substrate. The photoresist structure includes an opening exposing the substrate. The opening includes a first portion near the substrate and a second portion away from the substrate. Along a direction perpendicular to the surface of the substrate, the width of the first portion remains constant, while the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion. The ratio between the height of the first portion and the height of the second portion ranges from 1:15 to 5:32, and the height of the first portion ranges from 2kÅ to 6kÅ. The tilt angle of the sidewall of the second portion ranges from 15° to 30°, and the tilt angle is the angle between the sidewall of the second portion and the direction parallel to the surface of the substrate. The substrate includes a substrate and a gate oxide layer stacked together, the photoresist structure is disposed on the gate oxide layer, and the opening exposes the gate oxide layer. The photoresist structure is used for wet etching process of the gate oxide layer.

2. The semiconductor structure according to claim 1, characterized in that, The first part has a rectangular cross-sectional shape, and the second part has an inverted trapezoidal cross-sectional shape.

3. A method for manufacturing a semiconductor structure, characterized in that, include: A substrate is provided, and a photoresist layer is formed on the substrate; The first exposure process is performed to form a first exposure area within the photoresist layer; A second exposure process is performed to form a second exposure area within the photoresist layer, and the orthographic projection of the first exposure area toward the substrate falls within the orthographic projection of the second exposure area toward the substrate; The photoresist layer is developed to remove portions of the photoresist layer located within the first exposure area and the second exposure area, thereby forming a photoresist structure with an opening that exposes the substrate. The opening includes a first portion near the substrate and a second portion away from the substrate. Along the direction perpendicular to the surface of the substrate, the width of the first portion remains constant, while the width of the second portion gradually decreases, and the minimum width of the second portion is equal to the width of the first portion. The ratio between the height of the first portion and the height of the second portion ranges from 1:15 to 5:32, and the height of the first portion ranges from 2kÅ to 6kÅ. The tilt angle of the sidewall of the second portion ranges from 15° to 30°, where the tilt angle is the angle between the sidewall of the second portion and the direction parallel to the surface of the substrate, so that the etchant of the wet etching process of the gate oxide layer flows out along the sidewall of the opening. The process of providing the substrate includes: Provide substrate; The gate oxide layer is formed on the substrate to form the substrate including the substrate and the gate oxide layer; The photoresist structure is formed on the gate oxide layer, and the opening exposes the gate oxide layer.

4. The method for manufacturing a semiconductor structure according to claim 3, characterized in that, The focal length of the first exposure process is smaller than that of the second exposure process, and the injection dose of the first exposure process is smaller than that of the second exposure process.

5. The method for manufacturing a semiconductor structure according to claim 4, characterized in that, The focal length range of the first exposure process includes 150nm~250nm, and the exposure dose ranges from 200J / m. 2 ~300J / m 2 ; The focal length range of the second exposure process includes 250nm~350nm, and the exposure dose ranges from 300J / m. 2 ~500J / m 2 .

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