Wafer bonding method

Abstract

The invention relates to a wafer bonding method, which comprises the following steps: providing a first wafer and a second wafer, and spin-coating a mixed solution of silicate ester and an alcohol solvent on to-be-bonded surfaces of the first wafer and the second wafer by adopting a spin-coating process; after the spin-coating process is carried out, the first wafer and the second wafer are respectively subjected to standing treatment, the mixed solution of the silicate ester and the alcohol solvent reacts, a first silica sol layer is formed on the to-be-bonded surface of the first wafer, and a second silica sol layer is formed on the to-be-bonded surface of the second wafer; performing UV curing treatment on the first silica sol layer and the second silica sol layer, forming a first silicon oxide layer on the to-be-bonded surface of the first wafer, and forming a second silicon oxide layer on the to-be-bonded surface of the second wafer; and bonding the second silicon oxide layer of the second wafer to the first silicon oxide layer of the first wafer. According to the method, the wafer bonding strength is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a wafer bonding method. Background Technology

[0002] Wafer bonding technology is a key step in the field of microelectronics and microsystems. It enables the vertical stacking of two or more wafers or chips, realizing three-dimensional integrated circuits, which greatly improves integration, enhances functionality, and thus improves device performance.

[0003] Existing wafer bonding processes generally include surface treatment, alignment, pre-bonding, main bonding, and post-processing. However, the bonding strength of bonded structures formed using existing wafer bonding processes still needs improvement. Summary of the Invention

[0004] Based on this, this application provides a wafer bonding method to improve the bonding strength of the wafer.

[0005] In a first aspect, embodiments of this application provide a wafer bonding method, including...

[0006] A first wafer and a second wafer are provided, both of which include a bonding surface;

[0007] A mixture comprising silicate ester and alcohol solvent is spin-coated onto the bonding surfaces of the first and second wafers, respectively, using a spin-coating process.

[0008] After spin coating, the first wafer and the second wafer are left to stand for treatment. The mixture of silicate ester and alcohol solvent reacts to form a first silica sol layer on the bonding surface of the first wafer and a second silica sol layer on the bonding surface of the second wafer.

[0009] The first silica sol layer and the second silica sol layer are subjected to UV curing treatment respectively to form a first silicon oxide layer on the bonding surface of the first wafer and a second silicon oxide layer on the bonding surface of the second wafer.

[0010] The second silicon oxide layer of the second wafer is bonded to the first silicon oxide layer of the first wafer.

[0011] In some embodiments of this application, after the settling process and before the UV curing process, the method further includes: treating the surfaces of the first silica sol layer and the second silica sol layer with an alkaline solution; and after the alkaline solution treatment, performing UV curing treatment on the first silica sol layer and the second silica sol layer respectively.

[0012] In some embodiments of this application, the alkaline solution includes a sodium hydroxide solution or a potassium hydroxide solution.

[0013] In some embodiments of this application, the time interval between alkaline solution treatment and standing treatment is greater than 20 minutes.

[0014] In some embodiments of this application, the volume percentage of silicate ester and alcohol solvent in the mixture ranges from 1:10 to 1:20.

[0015] In some embodiments of this application, the silicate ester includes methyl silicate or ethyl silicate, and the alcohol solvent includes an ethanol solution or an ethylene glycol solution.

[0016] In some embodiments of this application, during the spin coating process, the rotation speed of the first wafer and the second wafer is 200 rpm to 400 rpm, the flow rate of the mixture is 1.7 L / min to 1.9 L / min, and the temperature is 20°C to 25°C.

[0017] In some embodiments of this application, the wavelength of the UV light during UV curing is 150 nm to 300 nm, the temperature is 150 °C to 300 °C, and the time is 5 seconds to 30 seconds.

[0018] In some embodiments of this application, the bonding surface of the first wafer includes a dicing region with a recess, a first silica sol layer fills the recess, and the surface of the first silica sol layer away from the bonding surface of the first wafer is a flat surface.

[0019] In some embodiments of this application, the spin coating process is performed by a spin coating apparatus, which includes a first supply pipe, a second supply pipe, a mixing tank, a delivery pipe, and a nozzle. The first and second supply pipes are connected to the mixing tank. The first supply pipe is used to supply silicate ester to the mixing tank, and the second supply pipe is used to supply alcohol solvent to the mixing tank. The silicate ester and alcohol solvent are mixed in the mixing tank to form a mixture of silicate ester and alcohol solvent. The delivery pipe is connected to the mixing tank and is used to deliver the mixture of silicate ester and alcohol solvent in the mixing tank to the nozzle. During the spin coating process, the mixture of silicate ester and alcohol solvent is sprayed onto the bonding surfaces of the first wafer and the second wafer respectively through the nozzle.

[0020] The embodiments of this application can produce the following unexpected technical effects:

[0021] The wafer bonding method in this application embodiment involves providing a first wafer and a second wafer, then spin-coating a mixture of silicate ester and alcohol solvent onto the bonding surfaces of the first and second wafers respectively. After spin-coating, the first and second wafers are left to stand, allowing the mixture of silicate ester and alcohol solvent to react and form a first silica sol layer on the bonding surface of the first wafer and a second silica sol layer on the bonding surface of the second wafer. The first and second silica sol layers are then UV-cured to form a first silicon oxide layer on the bonding surface of the first wafer and a second silicon oxide layer on the bonding surface of the second wafer. Finally, the second silicon oxide layer of the second wafer is bonded to the first silicon oxide layer of the first wafer. This application utilizes a spin-coating process to uniformly coat a mixture of silicate ester and alcohol solvent onto the bonding surfaces of a first and second wafer. After spin-coating, the first and second wafers are left to stand, allowing the mixture of silicate ester and alcohol solvent to react (including hydrolysis and condensation reactions). This forms a flat first silica sol layer on the bonding surface of the first wafer and a flat second silica sol layer on the bonding surface of the second wafer. The first and second silica sol layers are then UV-cured to form a first silicon oxide layer on the bonding surface of the first wafer and a second silicon oxide layer on the bonding surface of the second wafer. Both the first and second silicon oxide layers have flat surfaces, which improves bonding strength. Therefore, the bonding strength between the first and second wafers when bonded through the first and second silicon oxide layers is increased.

[0022] Furthermore, the mixture of silicate ester and alcohol solvent used in the spin coating process forms silica sol (SiO2·nH2O) through hydrolysis and condensation reactions of the silicate ester in the mixture. This results in a first silica sol layer formed on the bonding surface of the first wafer and a second silica sol layer formed on the bonding surface of the second wafer. The alcohol solvent in the mixture is used to adjust the viscosity of the mixture and the uniformity of the silicate ester distribution, so that the mixture can be coated more evenly on the bonding surfaces of the first and second wafers. This results in higher flatness of the first silica sol layer formed on the bonding surface of the first wafer and the second silica sol layer formed on the bonding surface of the second wafer.

[0023] On the other hand, the alcohol solvent can also improve the coverage and filling ability of the mixture, allowing it to better fill the depressions that may exist on the bonding surfaces of the first and second wafers. Furthermore, the alcohol solvent can also act as a catalyst to provide "-OH". Some of the "-OH" participates in the hydrolysis reaction of silicate esters, and some of the "-OH" can improve the coverage and hydrophilicity of the "-OH" on the surface of the first silicon oxide layer after the first silica sol layer is converted into the first silicon oxide layer, as well as the coverage and hydrophilicity of the "-OH" on the surface of the second silicon oxide layer after the second silica sol layer is converted into the second silicon oxide layer. The improved coverage and hydrophilicity of "-OH" on the bonding surface can further improve the bonding strength between the first and second wafers.

[0024] On the other hand, alcohol solvents can also reduce the temperature during UV curing (the temperature range of UV curing is 150℃~300℃, which is lower than the temperature of existing annealing processes (310℃-380℃)).

[0025] Details of one or more embodiments of this application are set forth in the following drawings and description. Other features, objects, and advantages of this application will become apparent from the specification, drawings, and claims. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a flowchart illustrating the wafer bonding method provided in some embodiments of this application;

[0028] Figure 2 A schematic diagram of a structure for forming a mixture of silicate ester and alcohol solvent on the bonding surface of a first wafer using a spin-coating process;

[0029] Figure 3 A schematic diagram showing the structure of forming a mixture of silicate ester and alcohol solvent onto the bonding surface of a second wafer using a spin-coating process;

[0030] Figure 4 for Figure 2 A schematic diagram of the structure after the first silica sol is formed on the cross-sectional structure obtained along the cutting line AA1.

[0031] Figure 5 for Figure 3 A schematic diagram of the structure after the second silica sol is formed on the cross-sectional structure obtained along the cutting line BB1.

[0032] Figure 6 A schematic diagram of the structure after the first silicon oxide layer is formed on the bonding surface of the first wafer for UV curing of the first silica sol layer.

[0033] Figure 7 A schematic diagram of the structure after the second silicon oxide layer is formed on the bonding surface of the second wafer, in order to perform UV curing treatment on the second silicon sol layer;

[0034] Figure 8 This is a schematic diagram of the structure after the second silicon oxide layer of the second wafer is bonded to the first silicon oxide layer of the first wafer.

[0035] Explanation of reference numerals in the attached figures:

[0036] 201-First wafer; 202-Second wafer; 203-First silica sol layer; 204-Second silica sol layer; 205-First silicon oxide layer; 206-Second silicon oxide layer; 301-Nozzle; 302-Infusion tube; 21-Mixed solution; 22-UV curing treatment. Detailed Implementation

[0037] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be more thorough and complete.

[0038] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this application's specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0039] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0040] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0041] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0042] The structure of embodiments of the present invention should not be limited to the specific shape shown in the accompanying drawings, but includes shape deviations due to, for example, manufacturing techniques.

[0043] It is understood that in the accompanying drawings of this application, some adjacent membrane layers with the same processed membrane material are drawn as connected to make them resemble the actual structure.

[0044] In existing wafer bonding processes, silicon oxide is generally used as the bonding layer. The typical process for forming the bonding layer includes: depositing a silicon oxide bonding layer on the bonding surface of the wafer; and planarizing the surface of the silicon oxide bonding layer using a chemical mechanical polishing (CMP) process. However, to ensure that the final bonding layer surface is sufficiently flat, multiple deposition and CMP processes are usually required, increasing the cost of the process. Furthermore, since wafers typically include dicing areas with grooves, the presence of these grooves can easily cause butterfly-shaped depressions on the surface of the silicon oxide bonding layer during CMP planarization after the silicon oxide bonding layer is formed on the bonding surface. This affects the flatness of the silicon oxide bonding layer surface and thus the bonding strength.

[0045] Therefore, embodiments of this application provide a wafer bonding method. Figure 1 This is a flowchart illustrating the wafer bonding method provided in some embodiments of this application; Figures 2-8 This is a schematic diagram of the structure of each stage in the wafer bonding method provided in some embodiments of this application.

[0046] refer to Figure 1 This application provides a wafer bonding method in some embodiments, including the following steps:

[0047] Step S101: Provide a first wafer and a second wafer, both of which include a bonding surface;

[0048] Step S102: The mixture including silicate ester and alcohol solvent is spin-coated onto the bonding surfaces of the first wafer and the second wafer respectively using a spin-coating process.

[0049] In step S103, after spin coating, the first wafer and the second wafer are left to stand for treatment. The mixture of silicate ester and alcohol solvent reacts to form a first silica sol layer on the bonding surface of the first wafer and a second silica sol layer on the bonding surface of the second wafer.

[0050] Step S104: UV curing is performed on the first silica sol layer and the second silica sol layer respectively to form a first silicon oxide layer on the bonding surface of the first wafer and a second silicon oxide layer on the bonding surface of the second wafer.

[0051] Step S105: Bond the second silicon oxide layer of the second wafer to the first silicon oxide layer of the first wafer.

[0052] The following is combined with Figures 2-8The specific process of the aforementioned wafer bonding method is described in detail.

[0053] First, refer to Figure 1 In conjunction with references Figure 2 and Figure 3 In step S101, a first wafer 201 and a second wafer 202 are provided, both of which include a bonding surface.

[0054] The first wafer 201 includes a first semiconductor substrate. The material of the first semiconductor substrate in the first wafer 201 may include silicon (Si), germanium (Ge), or silicon-germanium (GeSi), silicon carbide (SiC); it may also be silicon-on-insulator (SOI), germanium-on-insulator (GOI); or it may include other materials, such as gallium arsenide or other III-V compounds. The bonding surface of the first wafer 201 may be one surface of the first semiconductor substrate. In some other embodiments, the first wafer 201 may include the first semiconductor substrate and a first dielectric layer located on the first semiconductor substrate. The bonding surface of the first wafer 201 may be the surface of the first dielectric layer away from the first semiconductor substrate.

[0055] In some embodiments, the first wafer 201 includes a plurality of die regions and dicing regions located between the die regions. Each die region can form an integrated circuit with a specific function. Subsequently, after the first wafer 201 and the second wafer 202 are bonded together, the bonded structure is divided along the dicing regions to form a plurality of discrete semiconductor functional structures.

[0056] In some embodiments, the integrated circuit for a specific function in each die region of the first wafer 201 may include a first semiconductor device and a first wiring layer electrically connected to the first semiconductor device. The first semiconductor device may be formed on the active surface of the first semiconductor substrate of the first wafer 201 (the first semiconductor substrate may include an opposing active surface and a back surface). The first semiconductor device may include one or more of transistors, sensors (e.g., image sensors), memory cells, and passive devices (e.g., capacitors, inductors, resistors). The first wiring layer is located on the active surface of the first semiconductor substrate of the first wafer 201. The first wiring layer may include a first dielectric layer covering the first semiconductor device and a first metal wiring located in the first dielectric layer. The first metal wiring is electrically connected to the first semiconductor device. The first dielectric layer also covers the dicing area of ​​the first wafer 201. In some embodiments, the first dielectric layer includes a single-layer or multi-layer stacked structure. In some embodiments, the material of the first dielectric layer includes silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, FSG (fluorine-doped silicon dioxide), BSG (boron-doped silicon dioxide), PSG (phosphorus-doped silicon dioxide), or BPSG (boron-phosphorus-doped silicon dioxide), a low dielectric constant (K less than 2.5) material, or a combination thereof. The metal wiring includes one or more of the following: a metal layer, a connector plug, a through-silicon via (TSV), a via connection structure, and a redistribution layer (RDL). The material of the metal wiring includes one or more of the following: aluminum, copper, nickel, tin, titanium, tungsten, platinum, chromium, tantalum, gold, and silver. In some embodiments, the bonding surface of the first wafer 201 is the surface of the first dielectric layer that is away from the first semiconductor substrate. In some embodiments, the surface of the first interlayer dielectric layer in the dicing region of the first wafer 201 has a depression, which is a butterfly-shaped depression, that is, the bonding surface of the first wafer 201 has a depression, the position of which corresponds to the dicing position. When a mixture including silicate ester and alcohol solvent is spin-coated onto the bonding surface of the first wafer using a spin-coating process, the mixture can fill the depression well during spin-coating. The spin-coated mixture has a flat surface, thereby allowing the first wafer to stand for treatment. When the mixture of silicate ester and alcohol solvent reacts and forms a first silica sol layer on the bonding surface of the first wafer, the surface of the first silica sol layer away from the bonding surface of the first wafer is also a flat surface.

[0057] The second wafer 202 includes a second semiconductor substrate. The material of the second semiconductor substrate may include silicon (Si), germanium (Ge), or silicon-germanium (GeSi), silicon carbide (SiC); it may also be silicon-on-insulator (SOI), germanium-on-insulator (GOI); or it may include other materials, such as gallium arsenide or other III-V compounds. The bonding surface of the second wafer 202 is one surface of the second semiconductor substrate. In some other embodiments, the second wafer 202 may include a second semiconductor substrate and a second dielectric layer located on one surface of the second semiconductor substrate. The bonding surface of the second wafer 202 is the surface of the second dielectric layer away from the second semiconductor substrate. In some embodiments, the material of the second dielectric layer includes silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, FSG (fluorine-doped silicon dioxide), BSG (boron-doped silicon dioxide), PSG (phosphorus-doped silicon dioxide), or BPSG (boron-phosphorus-doped silicon dioxide), a low dielectric constant (K less than 2.5) material, or a combination thereof.

[0058] In some embodiments, the material of the second semiconductor substrate in the second wafer 202 may be the same as or different from the material of the first semiconductor substrate in the first wafer 201. Therefore, when the first wafer 201 and the second wafer 202 are bonded, bonding of homogeneous wafers or bonding of heterogeneous wafers can be achieved to meet the requirements of process and device performance.

[0059] In some embodiments, before bonding the second wafer 202 to the first wafer 201, no semiconductor device, such as a second semiconductor device, is formed in the second semiconductor substrate of the second wafer 202. After the first wafer 201 and the second wafer 202 are subsequently bonded, the second semiconductor device and a second wiring layer electrically connected to the second semiconductor device are formed on the surface of the second semiconductor substrate away from the first wafer 201 (or the first semiconductor substrate). A via connection structure can be formed penetrating the first wafer 201 (or the first semiconductor substrate) and the bonding layer between the first wafer 201 and the second wafer 202. Through the via connection structure, corresponding structures in the first wafer 201 (such as the first wiring layer and / or the first semiconductor device) can be electrically connected to corresponding structures in the second wafer 202 (such as the second wiring layer and / or the second semiconductor device). In some embodiments, before bonding the second wafer 202 to the first wafer 201, a second semiconductor substrate and a second wiring layer electrically connected to the second semiconductor device can be formed on the surface of the second wafer 202 away from the bonding surface.

[0060] Next, continue to refer to Figure 1 In conjunction with references Figures 2-5 (in, Figure 4 for Figure 2A schematic diagram of the structure after the first silica sol is formed on the cross-sectional structure obtained along the cutting line AA1. Figure 5 for Figure 3 (A schematic diagram of the structure after forming the second silica sol on the cross-sectional structure obtained along the cutting line BB1) In step S102, the mixture 21 including silicate ester and alcohol solvent is spin-coated onto the bonding surfaces of the first wafer 201 and the second wafer 202 respectively using a spin-coating process; In step S103, after the spin-coating process, the first wafer 201 and the second wafer 202 are respectively left to stand for treatment, and the mixture of silicate ester and alcohol solvent reacts to form a first silica sol layer 203 on the bonding surface of the first wafer 201 and a second silica sol layer 204 on the bonding surface of the second wafer 202.

[0061] Spin coating is performed using a spin coating apparatus. In some embodiments, refer to Figure 2 or Figure 3 The spin coating apparatus includes a first supply pipe (not shown in the figure), a second supply pipe (not shown in the figure), a mixing tank (not shown in the figure), a delivery pipe 302, and a nozzle 301. The first and second supply pipes are connected to the mixing tank. The first supply pipe supplies silicate ester to the mixing tank, and the second supply pipe supplies alcohol solvent to the mixing tank. The silicate ester and alcohol solvent are mixed in the mixing tank to form a mixture 21 of silicate ester and alcohol solvent. The delivery pipe 302 is connected to the mixing tank and is used to deliver the mixture 21 of silicate ester and alcohol solvent in the mixing tank to the nozzle 301 for spin coating. During the spin coating process, the mixture 21 of silicate ester and alcohol solvent is sprayed onto the bonding surfaces of the first wafer 201 and the second wafer 202 through nozzles 301, respectively. In some embodiments, a first control switch is provided on the first supply pipe to control the on / off state of the silicate ester in the first supply pipe, a second control switch is provided on the second supply pipe to control the on / off state of the alcohol solvent in the second supply pipe, and a third control switch is provided on the infusion pipe 302 to control the on / off state of the mixture 21 of silicate ester and alcohol solvent in the infusion pipe 302.

[0062] The process of spin-coating the mixture 21 of silicate ester and alcohol solvent onto the bonding surfaces of the first wafer 201 and the second wafer 202 can be performed in the same spin-coating apparatus or in different spin-coating apparatuses. In some embodiments, when the process of spin-coating the mixture 21 of silicate ester and alcohol solvent onto the bonding surfaces of the first wafer 201 and the second wafer 202 onto the bonding surfaces of the first wafer 201 and the second wafer 202 onto the bonding surfaces of the first wafer 201 and the second wafer 202 onto the same spin-coating apparatus includes: sequentially forming the mixture 21 of silicate ester and alcohol solvent onto the bonding surfaces of the first wafer 201 and the second wafer 202 onto the same spin-coating apparatus in the same spin-coating chamber of the spin-coating apparatus; or forming the mixture 21 of silicate ester and alcohol solvent onto the bonding surfaces of the first wafer 201 and the second wafer 202 onto the same spin-coating apparatus onto the different spin-coating chambers of the spin-coating apparatus.

[0063] This application produces the following unexpected technical effects: In this application, the spin-coating process allows a mixture 21 of silicate ester and alcohol solvent to be uniformly coated on the bonding surfaces of the first wafer 201 and the second wafer 202. After spin-coating, the first wafer 201 and the second wafer 202 are left to stand, allowing the mixture of silicate ester and alcohol solvent to react (including hydrolysis and condensation reactions). A first, flat silica sol layer 203 is formed on the bonding surface of the first wafer 201, and a second, flat silica sol layer 204 is formed on the bonding surface of the second wafer 202. Subsequently, the first silica sol layer 203 and the second silica sol layer 204 are UV-cured to form a first silicon oxide layer 205 on the bonding surface of the first wafer 201 (see reference). Figure 6 A second silicon oxide layer 206 is formed on the bonding surface of the second wafer 202 (reference). Figure 7 When the first silicon oxide layer 205 and the second silicon oxide layer 206 are formed, they will also have flat surfaces. Flat surfaces can improve the bonding strength, thus improving the bonding strength when the first wafer 201 and the second wafer 202 are bonded through the first silicon oxide layer 205 and the second silicon oxide layer 206.

[0064] Furthermore, due to the use of a mixture 21 of silicate ester and alcohol solvent in the spin coating process, the silicate ester in the mixture 21 forms silica sol (SiO2·nH2O) through hydrolysis and condensation reactions, which forms a first silica sol layer 203 on the bonding surface of the first wafer 201 and a second silica sol layer 204 on the bonding surface of the second wafer 202. The alcohol solvent in the mixture 21 is used to adjust the viscosity of the mixture 21 and the uniformity of the distribution of silicate ester in the mixture, so that the mixture 21 can be coated more uniformly on the bonding surfaces of the first wafer 201 and the second wafer 202, resulting in higher flatness of the first silica sol layer 203 on the bonding surface of the first wafer 201 and the second silica sol layer 204 on the bonding surface of the second wafer 202.

[0065] On the other hand, the alcohol solvent can also improve the coverage and filling ability of the mixture 21, allowing the mixture to better fill the depressions that may exist on the bonding surfaces of the first wafer 201 and the second wafer 202. Furthermore, the alcohol solvent can also act as a catalyst to provide "-OH". Some of the "-OH" participates in the hydrolysis reaction of silicate esters, and some of the "-OH" can improve the coverage and hydrophilicity of the "-OH" on the surface of the first silicon oxide layer after the first silica sol layer 203 is converted into the first silicon oxide layer, as well as improve the coverage and hydrophilicity of the "-OH" on the surface of the second silicon oxide layer after the second silica sol layer 204 is converted into the second silicon oxide layer. The improved coverage and hydrophilicity of the "-OH" on the bonding surface can further improve the bonding strength between the first wafer 201 and the second wafer 202.

[0066] On the other hand, alcohol solvents can also reduce the temperature during subsequent UV curing (the temperature range of subsequent UV curing is 150℃~300℃, which is lower than the temperature during existing annealing (310℃-380℃)).

[0067] In some embodiments, the volume percentage of silicate ester and alcohol solvent in the mixture 21 ranges from 1:10 to 1:20, specifically 1:10, 1:11, 1:12, 1:13, 1:14, 1:15, 1:16, 1:17, 1:18, 1:19, and 1:20. At this specific ratio, the viscosity of the mixture 21 is better, and the silicate ester distribution in the mixture 21 is more uniform. Therefore, the mixture 21 of silicate ester and alcohol solvent can be coated more uniformly and more easily on the bonding surfaces of the first wafer 201 and the second wafer 202, thereby further improving the surface flatness of the first silica sol layer 203 formed on the bonding surface of the first wafer 201 and the second silica sol layer 204 formed on the bonding surface of the second wafer 202.

[0068] In some embodiments, the silicate ester includes methyl silicate or ethyl silicate, and the alcohol solvent includes an ethanol solution or an ethylene glycol solution.

[0069] In some embodiments, during the spin coating process, the rotation speed of the first and second wafers is 200 rpm to 400 rpm, specifically 200 rpm, 250 rpm, 300 rpm, 350 rpm, or 400 rpm, and the flow rate of the mixture is 1.7 L / min to 1.9 L / min, specifically 1.7 L / min, 1.75 L / min, 1.8 L / min, 1.85 L / min, or 1.9 L / min. The speed is liters per minute, and the temperature is 20°C-25°C, specifically 20°C, 21°C, 22°C, 23°C, 24°C, and 25°C. Under these specific spin-coating process parameters, the mixture 21 of silicate ester and alcohol solvent can be coated more uniformly and more easily on the bonding surfaces of the first wafer 201 and the second wafer 202, thereby further improving the surface flatness of the first silica sol layer 203 formed on the bonding surface of the first wafer 201 and the second silica sol layer 204 formed on the bonding surface of the second wafer 202.

[0070] In some embodiments, after the settling process and before the UV curing process, the method further includes: treating the surfaces of the first silica sol layer 203 and the second silica sol layer 204 with an alkaline solution; after the alkaline solution treatment, performing subsequent UV curing processes on the first silica sol layer 203 and the second silica sol layer 204 respectively. The purpose of treating the surfaces of the first silica sol layer 203 and the second silica sol layer 204 with an alkaline solution is to further improve the coverage and hydrophilicity of the "-OH" groups on the surfaces of the first silica sol layer 203 and the second silica sol layer 204, thereby facilitating the subsequent conversion of the first silica sol layer 203 and the second silica sol layer 204 into the first silicon oxide layer 205 (see reference). Figure 6 ) and the second silicon oxide layer 206 (reference) Figure 7 After that, the coverage and hydrophilicity of the "-OH" on the surface of the first silicon oxide layer 205 and the second silicon oxide layer 206 are further improved, thereby further improving the bonding strength when the first wafer 201 and the second wafer 202 are bonded.

[0071] In some embodiments, the alkaline solution includes a sodium hydroxide solution or a potassium hydroxide solution; the time interval between the alkaline solution treatment and the standing treatment is greater than 20 minutes, so that the mixture of silicate ester and alcohol solvent spin-coated on the bonding surfaces of the first wafer 201 and the second wafer 202 can fully react to form a first silica sol layer 203 and a second silica sol layer 204 with better quality and more uniformity.

[0072] Next, continue to refer to Figure 1 In conjunction with references Figure 6 and Figure 7 Step S104 is performed on the first silica sol layer 203 (reference). Figure 4) and the second silica sol layer 204 (reference) Figure 5 ) are subjected to UV curing treatment 22, and a first silicon oxide layer 205 is formed on the bonding surface of the first wafer 201 (reference) Figure 6 A second silicon oxide layer 206 is formed on the bonding surface of the second wafer 202 (reference). Figure 7 ).

[0073] The purpose of UV (Ultraviolet) curing treatment 22 is to transform the first silica sol layer 203 into the first silica oxide layer 205 and the second silica sol layer 204 into the second silica oxide layer 206. Specifically, during UV curing treatment 22, the solvent and water in the first silica sol layer 203 and the second silica sol layer 204 evaporate. Furthermore, during UV curing treatment 22, the first silica sol layer 203 and the second silica sol layer 204 absorb UV light energy and decompose into free radicals / cations. These free radicals / cations undergo polymerization reactions with monomers or oligomers in the silica sol to form a cross-linked network structure, causing the first silica sol layer 203 and the second silica sol layer 204 to rapidly transform from a liquid state into a solid state, namely the first silica oxide layer 205 and the second silica oxide layer 206.

[0074] In some embodiments, the wavelength of the UV light during UV curing is 150 nm to 300 nm, the temperature is 150 °C to 300 °C, and the time is 5 to 30 seconds, which improves the conversion efficiency while maintaining a low thermal budget.

[0075] Finally, continue to refer to Figure 1 and in conjunction with references Figure 8 In step S105, the second silicon oxide layer 206 of the second wafer 202 is bonded to the first silicon oxide layer 205 of the first wafer 201 to form a bonding structure.

[0076] In some embodiments, the process of bonding the second silicon oxide layer 206 of the second wafer 202 to the first silicon oxide layer 205 of the first wafer 201 includes: first fixing the first wafer 201 on a stage in the bonding chamber of a bonding apparatus; aligning the second wafer 202 with the first wafer 201; then placing the second wafer 202 onto the first wafer 201, so that the second silicon oxide layer 206 on the bonding surface of the second wafer 202 contacts and bonds with the first silicon oxide layer 205 on the bonding surface of the first wafer 201. During the bonding process, a moving pressure can be applied to the surface of the second wafer 202 away from the second silicon oxide layer 206, and a certain bonding temperature can be maintained in the bonding chamber. During bonding, the "-OH" groups on the surfaces of the first silicon oxide layer 205 and the second silicon oxide layer 206 participate in the bonding process to improve the bonding strength.

[0077] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0078] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0079] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A wafer bonding method, characterized in that, include: A first wafer and a second wafer are provided, both of which include a bonding surface; A mixture comprising silicate ester and alcohol solvent is spin-coated onto the bonding surfaces of the first and second wafers respectively using a spin-coating process. After the spin coating process, the first wafer and the second wafer are left to stand for treatment. The mixture of silicate ester and alcohol solvent reacts to form a first silica sol layer on the bonding surface of the first wafer and a second silica sol layer on the bonding surface of the second wafer. The first silica sol layer and the second silica sol layer are respectively subjected to UV curing treatment to form a first silicon oxide layer on the bonding surface of the first wafer and a second silicon oxide layer on the bonding surface of the second wafer. The second silicon oxide layer of the second wafer is bonded to the first silicon oxide layer of the first wafer.

2. The wafer bonding method according to claim 1, characterized in that, After the settling process and before the UV curing process, the method further includes: treating the surfaces of the first silica sol layer and the second silica sol layer with an alkaline solution; and after the alkaline solution treatment, performing UV curing on the first silica sol layer and the second silica sol layer respectively.

3. The wafer bonding method according to claim 2, characterized in that, The alkaline solution includes sodium hydroxide solution or potassium hydroxide solution.

4. The wafer bonding method according to claim 2, characterized in that, The time interval between the alkaline solution treatment and the standing treatment is greater than 20 minutes.

5. The wafer bonding method according to claim 1 or 2, characterized in that, In the mixture of silicate ester and alcohol solvent, the volume percentage of silicate ester and alcohol solvent ranges from 1:10 to 1:

20.

6. The wafer bonding method according to claim 5, characterized in that, The silicate ester includes methyl silicate or ethyl silicate, and the alcohol solvent includes an ethanol solution or an ethylene glycol solution.

7. The wafer bonding method according to claim 5, characterized in that, During the spin coating process, the rotation speed of the first wafer and the second wafer is 200 rpm to 400 rpm, the flow rate of the mixture is 1.7 L / min to 1.9 L / min, and the temperature is 20°C to 25°C.

8. The wafer bonding method according to claim 7, characterized in that, The UV light used in the UV curing process has a wavelength of 150 nm to 300 nm, a temperature of 150 °C to 300 °C, and a duration of 5 to 30 seconds.

9. The wafer bonding method according to claim 1, characterized in that, The bonding surface of the first wafer includes a dicing region with a recess, the first silica sol layer fills the recess, and the surface of the first silica sol layer away from the bonding surface of the first wafer is a flat surface.

10. The wafer bonding method according to claim 1, characterized in that, The spin coating process is performed using a spin coating device, which includes a first supply pipe, a second supply pipe, a mixing tank, a delivery pipe, and a nozzle. The first and second supply pipes are connected to the mixing tank. The first supply pipe supplies silicate ester to the mixing tank, and the second supply pipe supplies alcohol solvent to the mixing tank. The silicate ester and the alcohol solvent are mixed in the mixing tank to form a mixture of silicate ester and alcohol solvent. The delivery pipe is connected to the mixing tank and is used to deliver the mixture of silicate ester and alcohol solvent in the mixing tank to the nozzle. During the spin coating process, the mixture of silicate ester and alcohol solvent is sprayed onto the bonding surfaces of the first and second wafers through the nozzle.

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