Device for suppressing voltage attenuation of switching power supply under high-temperature working condition and control method

Abstract

The invention discloses a device for suppressing voltage attenuation of a switching power supply under a high-temperature working condition and a control method. The device comprises a master control module, a capacitance value compensation execution module and a capacitance value compensation module, the master control module receives a bus capacitor temperature detection signal in the power factor correction booster circuit sent by the temperature detection device; a voltage detection signal at a middle connection point of the two series resistors connected in parallel with the bus capacitor is collected; whether capacitance compensation is started or not is judged according to the temperature and the voltage detection signal, the capacitance compensation amount is calculated according to the voltage detection signal during starting, a corresponding execution instruction is generated and issued to the capacitance value compensation execution module, and the compensation value of the capacitance value compensation module is adjusted by the capacitance value compensation execution module; and the capacitance value compensation execution module adjusts the capacitance value compensated by the capacitance value compensation module according to the execution instruction. Normal operation of the air conditioner under the high-temperature severe working condition within a short time can be guaranteed, and the problem that a switching power supply cannot support load work under the short-time over-limit working condition is effectively solved.

Description

Technical Field

[0001] This invention belongs to the field of switching power supply technology, specifically relating to a device and control method for suppressing voltage decay in switching power supplies under high-temperature conditions. Background Technology

[0002] As various industries develop, the requirements for the operating conditions of commercial air conditioners are becoming increasingly stringent, especially for high-power air conditioners that are required to operate in high-temperature conditions and outdoors. These air conditioners are often used in harsh environments and may inevitably operate under conditions exceeding the temperature limit for short periods of time. At this time, the actual temperature of the internal components of the high-power switching power supply will be very high, especially the bus capacitors used in the power factor correction boost circuit PFC-Boost topology. The capacitor temperature will often approach or even exceed the rated value. After several hours of operation, there will be a significant decrease in capacitance, which will lead to a decrease in the output voltage of the switching power supply, thus causing the air conditioner to fail to operate normally. If this condition is maintained for a long time, the internal bus capacitors will also suffer irreversible damage, which may cause them to fail to operate normally even under normal conditions.

[0003] To address this capacitance decay issue, simply increasing the capacitor value drastically is not feasible. The capacitance value must be matched to the current switching power supply design parameters. An excessively large capacitance value will cause the following phenomena:

[0004] 1. It will significantly increase the inrush current when powered on, which may lead to overcurrent damage to the device;

[0005] 2. The inability to quickly respond to load changes leads to unstable operation of the switching power supply;

[0006] 3. Large capacitance values ​​generally result in a larger equivalent series resistance (ESR), which can exacerbate heat generation, generate additional power losses, and reduce the efficiency of the switching power supply.

[0007] The prior art document CN119597089A describes an LDO circuit with dynamic load compensation. Its key feature is that the dynamic load compensation circuit dynamically adjusts the output current of the power transistor, thereby adjusting the output voltage. Furthermore, through transient response simulation, the dynamic load compensation circuit effectively reduces the output voltage recovery time during transient load changes, thus enabling the LDO circuit to operate stably and efficiently. The circuit, detection scheme, and countermeasures involved in this patent are all different from those in this patent, and they address different technical problems. Summary of the Invention

[0008] To address the shortcomings of existing technologies, such as voltage attenuation of switching power supplies under harsh high-temperature conditions and operational instability under short-term over-limit conditions, this invention provides a device and control method for suppressing voltage attenuation of switching power supplies under high-temperature conditions.

[0009] The present invention adopts the following technical solution.

[0010] This invention discloses a device for suppressing voltage attenuation in a switching power supply under high-temperature operating conditions, comprising a main control module, a capacitance compensation execution module, and a capacitance compensation module:

[0011] The main control module receives the temperature detection signal of the bus capacitor in the power factor correction boost circuit from the temperature detection device; and collects the voltage detection signal at the midpoint of the connection point of the two series resistors connected in parallel with the bus capacitor; it determines whether to start capacitor compensation based on the temperature detection signal and the voltage detection signal. If so, it calculates the capacitor compensation amount based on the voltage detection signal, generates a corresponding execution instruction, and then sends the execution instruction to the capacitance compensation execution module through the instruction sending pin, so that the capacitance compensation execution module can adjust the compensation value of the capacitance compensation module.

[0012] The capacitance compensation execution module and the capacitance compensation module are connected in series to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor.

[0013] The capacitance compensation execution module adjusts the capacitance value compensated by the capacitance compensation module according to the received execution instructions.

[0014] More preferably,

[0015] The capacitance compensation execution module includes multiple switches;

[0016] The capacitance compensation module includes multiple individual capacitors;

[0017] Each switch controls the compensation or decommissioning of a single capacitor.

[0018] More preferably,

[0019] In the main control module, the determination of whether to start capacitor compensation is based on the temperature detection signal and the voltage detection signal is that capacitor compensation is started when the temperature of the bus capacitor is greater than the set temperature threshold and the voltage fluctuation collected per unit time is greater than the set maximum allowable voltage fluctuation.

[0020] More preferably,

[0021] The capacitor compensation amount is determined based on the voltage fluctuation collected per unit time, the maximum allowable voltage fluctuation, the average bus current, and the off-time of the power factor correction boost circuit switching transistor, as shown in the following formula:

[0022]

[0023] Where Δc is the capacitance compensation amount; I av It is the average bus current; T huVs is the off-time of the power factor correction boost circuit switching transistor; Vs is the maximum allowable voltage fluctuation; ΔV is the voltage fluctuation collected per unit time.

[0024] More preferably,

[0025] The execution instructions include the number of switches that the capacitance compensation execution module needs to close;

[0026] The number of switches to be closed by the capacitance compensation execution module is determined based on the current number of closed switches, the value of a single capacitor in the capacitance compensation module, and the capacitance compensation amount, as shown in the following formula:

[0027]

[0028] Where m1 is the number of switches to be closed by the capacitance compensation execution module; Δc is the capacitance compensation amount; δc is the value of a single capacitor; [·] indicates rounding up.

[0029] More preferably,

[0030] The capacitance compensation execution module and the capacitance compensation module are connected in series to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor, including:

[0031] Connect the first terminal of each switch in the capacitance compensation execution module to the positive terminal of the bus in the power factor correction boost circuit; connect the second terminal of each switch to the first terminal of each individual capacitor in the capacitance compensation module.

[0032] The second terminal of each individual capacitor in the capacitance compensation module is grounded.

[0033] More preferably,

[0034] The device also includes a load control module;

[0035] After the main control module sends an execution command to the capacitance compensation execution module, the load control module controls the load to reduce the set unit power.

[0036] Another aspect of the present invention discloses a control method for suppressing voltage decay of a switching power supply based on a device for suppressing voltage decay under high-temperature operating conditions, comprising:

[0037] When the power factor correction boost circuit starts working, it closes each switch to charge each capacitor. After the first set time, it opens each switch to complete the charging.

[0038] The main control module collects the voltage at the midpoint of the two series resistors connected in parallel with the bus capacitor and the temperature of the bus capacitor in real time.

[0039] Based on the voltage and bus capacitor temperature, a capacitor compensation criterion is set. When the sampled value meets the capacitor compensation criterion, the main control module calculates the capacitor compensation amount, calculates the number of switches to be closed based on the capacitor compensation amount, and generates an execution command to control the capacitor compensation execution module to close the specified number of switches; and controls the load to reduce power.

[0040] The main control module continues to determine whether the sampled value meets the capacitance compensation criterion. If it does, the main control module continues to calculate the number of switches to be closed and controls the capacitance compensation execution module to close the specified number of switches; then it controls the load to reduce power; until the capacitance compensation criterion is no longer met.

[0041] If the capacitor compensation criterion is not met, the current switching state and load power will be maintained until the power factor correction boost circuit is turned off, or until the bus capacitor temperature is lower than the set temperature threshold. The main control module will then control the capacitance compensation execution module to disconnect all switches and restore the load to its rated power.

[0042] More preferably,

[0043] The set capacitor compensation criterion is: the temperature of the bus capacitor is greater than the set temperature threshold, and the voltage fluctuation collected per unit time is greater than the set maximum allowable voltage fluctuation.

[0044] More preferably,

[0045] When the sum of the number of switches to be closed and the number of switches already closed exceeds the maximum allowable switching capacity, the main control module controls the load to stop and reports a high temperature over-limit operation fault.

[0046] Another aspect of this application discloses an air conditioner, including a switching power supply, characterized in that: the switching power supply is configured with a device for suppressing voltage attenuation of the switching power supply.

[0047] This application also discloses a computer-readable storage medium having a computer program stored thereon, characterized in that the program, when executed by a processor, implements the control method for suppressing voltage attenuation of the switching power supply.

[0048] The beneficial effects of this invention are compared with those of the prior art:

[0049] This invention can monitor the temperature of the power devices inside the switching power supply in real time, and accurately control the load power based on the temperature, effectively extending the service life of the devices.

[0050] This invention can monitor bus voltage fluctuations in real time, perform real-time capacitance compensation based on the magnitude of the fluctuations, respond promptly to emergencies, and ensure the working stability of the switching power supply while meeting minimum performance requirements and preventing irreversible capacitor damage; it also ensures the normal operation of air conditioners under high-temperature and harsh conditions for a short period of time.

[0051] This invention solves the problem of voltage attenuation in switching power supplies under high-temperature and over-limit conditions in air conditioners, improves the reliability of air conditioners under harsh high-temperature conditions, and effectively solves the problem that switching power supplies cannot support the load under short-term over-limit conditions. Attached Figure Description

[0052] Figure 1 This is a schematic diagram of a device for suppressing voltage attenuation in a switching power supply under high-temperature operating conditions.

[0053] Figure 2 This is a schematic diagram of the circuit connection relationship of the device for suppressing voltage attenuation of switching power supply under high temperature conditions;

[0054] Figure 3 This is a schematic diagram of a control method for suppressing voltage decay in a switching power supply under high-temperature operating conditions. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of this invention. The embodiments described in this application are merely some embodiments of this invention, and not all embodiments. Based on the spirit of this invention, other embodiments obtained by those skilled in the art without creative effort are all within the protection scope of this invention.

[0056] This application discloses a device for suppressing voltage decay of a switching power supply under high-temperature operating conditions, see attached document. Figure 1 ,include:

[0057] The main control module receives the temperature detection signal of the bus capacitor in the power factor correction boost circuit from the temperature detection device; and collects the voltage detection signal at the midpoint of the two series resistors connected in parallel with the bus capacitor; the two series resistors are the first resistor R1 and the second resistor R2 connected in series; when the temperature of the bus capacitor does not exceed the set temperature threshold, that is, when the power supply is running normally, the preferred value range of the voltage at the midpoint of the two series resistors connected in parallel with the bus capacitor collected by the voltage detection pin is 2.2 to 5V.

[0058] Those skilled in the art can set the first resistor R1 and the second resistor R2 for voltage division according to the actual situation, which will not be elaborated here.

[0059] The system determines whether to activate capacitor compensation based on the temperature and voltage detection signals. If so, the capacitor compensation amount is calculated based on the voltage detection signal. Specifically, capacitor compensation is activated when the temperature of the bus capacitor exceeds a set temperature threshold and the voltage fluctuation collected per unit time exceeds the set maximum allowable voltage fluctuation; otherwise, capacitor compensation is not activated. The capacitor compensation amount is determined based on the voltage fluctuation collected per unit time, the maximum allowable voltage fluctuation, the average bus current, and the off-time of the power factor correction boost circuit switch, as shown in the following formula:

[0060]

[0061] Where Δc is the capacitance compensation amount; I av It is the average bus current; T hu Vs is the off-time of the switching transistor in the power factor correction boost circuit; Vs is the maximum allowable voltage fluctuation; ΔV is the voltage fluctuation collected per unit time.

[0062] The corresponding execution instructions are generated based on the capacitance compensation amount, and the execution instructions include the number of switches to be closed by the capacitance compensation execution module;

[0063] The number of switches to be closed by the capacitance compensation execution module is determined based on the current number of closed switches, the capacitance value of a single capacitor in the capacitance compensation module, and the capacitance compensation amount, as shown in the following formula:

[0064]

[0065] Where m1 is the number of switches to be closed by the capacitance compensation execution module; Δc is the capacitance compensation amount; δc is the capacitance value of a single capacitor; [·] indicates rounding up.

[0066] Then, the execution command is sent to the capacitance compensation execution module via the command sending pin, and the capacitance compensation execution module adjusts the compensation value of the capacitance compensation module.

[0067] The capacitance compensation execution module is connected in series with the capacitance compensation module to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor; the capacitance compensation execution module includes multiple switches;

[0068] The capacitance compensation module includes multiple individual capacitors;

[0069] Each switch controls the compensation or decompensation of a single capacitor. The method for setting the capacitance value of a single capacitor is as follows:

[0070] The maximum tolerable attenuation capacitance value is set based on the capacitance value of the bus capacitor C6; those skilled in the art should know how to set the bus capacitor in the power factor correction boost circuit, and can also determine the maximum tolerable attenuation capacitance value and the total number of capacitors according to the actual situation; the maximum tolerable attenuation capacitance value is evenly distributed according to the total number of capacitors, so the capacitance value of a single capacitor can be determined; preferably, the maximum tolerable capacitance value is 100μF, the preferred value for the total number of capacitors is 50, and the preferred value for the capacitance value of a single capacitor is 2μF.

[0071] The capacitance compensation execution module and the capacitance compensation module are connected in series to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor, including:

[0072] Connect the first terminal of each switch in the capacitance compensation execution module to the positive terminal of the bus in the power factor correction boost circuit; connect the second terminal of each switch to the first terminal of each individual capacitor in the capacitance compensation module.

[0073] The second terminal of each individual capacitor in the capacitance compensation module is grounded.

[0074] The capacitance compensation execution module adjusts the capacitance value compensated by the capacitance compensation module according to the received execution instruction. Specifically, the capacitance compensation execution module closes a corresponding number of switches according to the received execution instruction, so that the capacitors connected to the closed switches in the capacitance compensation module are connected in parallel with the bus capacitor. The equivalent capacitance of the capacitors connected in parallel with the closed switches in the compensation module is the compensation capacitance value.

[0075] The device also includes a load control module;

[0076] After the main control module issues an execution command to the capacitance compensation execution module, the load control module controls the load to reduce the set unit power. Preferably, the unit power is 10W.

[0077] Example 1

[0078] A device for suppressing voltage decay of a switching power supply under high-temperature conditions.

[0079] This example provides a specific structure and usage method of the circuit device, such as... Figure 1As shown, the circuit device has 5 pins, which are divided into a capacitor compensation pin (CAP), a voltage detection pin (VS), a load control pin (LOAD), a temperature detection pin (TEM), and a power ground. The circuit device mainly consists of several unit capacitors (C1, C2...CN), a capacitance compensation execution circuit (U1), and a main control module (U2). The CAP pin of the circuit device includes multiple equivalent switches in the internal capacitance compensation execution circuit U1, which can control the on / off state of each equivalent switch. The second pin 2 of each equivalent switch is connected. Each equivalent switch includes a first switch S1, a second switch S2...Nth switch SN, and the first pin 1 of each equivalent switch is connected to the positive terminal of each individual capacitor. Each individual capacitor includes a first capacitor C1, a second capacitor C2...Nth capacitor CN, where N is the total number of capacitors. The negative terminal of each individual capacitor is connected to the GND pin of the device, forming a current loop. The maximum tolerable attenuation capacitance value is set based on the capacitance value of the bus capacitor C6; those skilled in the art should know how to set the bus capacitor in the power factor correction boost circuit, and can also determine the maximum tolerable attenuation capacitance value and the total number of capacitors according to the actual situation; the maximum tolerable attenuation capacitance value is evenly distributed according to the total number of capacitors, so the capacitance value of a single capacitor can be determined; preferably, the maximum tolerable capacitance value is set to 100μF, the preferred value for the total number of capacitors is 50, and the preferred value for the capacitance value of a single capacitor is 2μF.

[0080] The fifth pin 5 of the main control module U2 is connected to the first pin 1 of the capacitance compensation execution circuit U1, and outputs execution commands to the capacitance compensation execution circuit; the capacitance compensation execution module adjusts the compensation value of the capacitance compensation module by controlling the on and off of each switch;

[0081] The execution instructions include the number of switches that the capacitance compensation execution module needs to close;

[0082] The number of switches to be closed by the capacitance compensation execution module is determined based on the current number of closed switches, the capacitance value of a single capacitor in the capacitance compensation module, and the capacitance compensation amount, as shown in the following formula:

[0083]

[0084] Where m1 is the number of switches to be closed by the capacitance compensation execution module; Δc is the capacitance compensation amount; δc is the capacitance value of a single capacitor; [·] indicates rounding up. The capacitance compensation amount is determined based on the voltage fluctuation collected per unit time, the maximum allowable voltage fluctuation, the average bus current, and the off-time of the power factor correction boost circuit switch, as shown in the following formula:

[0085]

[0086] Among them, I av It is the average bus current; T hu Vs is the off-time of the switching transistor in the power factor correction boost circuit; Vs is the maximum allowable voltage fluctuation; ΔV is the voltage fluctuation collected per unit time.

[0087] This forms the switching control circuit for U1. The voltage detection pin 1, load control pin 2, and temperature detection pin 4 of U2 are used as the external voltage detection pin (VS), load control pin (LOAD), and temperature detection pin (TEM), respectively. Pins 3 and 6 of U2 are the ground pin and power supply pin of the main control module, respectively. The power supply pin is led out to the external pin VCC, and the ground is connected to the negative terminal of a single capacitor, forming the functional detection and control circuit of the device.

[0088] Regarding the usage of this circuit device, as follows: Figure 2 In this embodiment, the PFC control circuit is a power factor correction boost circuit (Boost topology PFC, also written as Boost PFC). Since the circuit is relatively complex, and those skilled in the art should know how to construct a power factor correction boost circuit and its function, they should know how to simplify the circuit in the power factor correction boost circuit, except for the bus capacitor and the load, into a module U3, denoted as the PFC control circuit. The live wire and neutral wire first pass through the PFC control circuit U3, and the output pins 3 and 4 are the positive and negative terminals of the bus, V+ and V-, respectively. Specifically, the PFC control circuit corrects the input current (improves the power factor and total harmonic distortion (THD)) and simultaneously performs rectification and boosting. The output serves as the positive and negative terminals of the DC bus. Preferably, the voltage output of the PFC control circuit of this invention is 400V.

[0089] V+ is connected to the positive terminal of bus capacitor C6, the capacitor compensation pin CAP of the circuit device, and the positive terminal of the load; V- is connected to the negative terminal of bus capacitor C6, the ground pin of the circuit device, and the negative terminal of the load, forming a basic load loop; the VCC pin of the circuit device is connected to the external power supply output to power the main control module; a temperature sensor T2 is fitted onto the bus capacitor C6 used in the PFC-Boost topology of the power factor correction circuit. The level signal output by the sensor is transmitted to the main control module U2 of the device to realize real-time monitoring of the operating temperature of C6; the front end of the load is connected in parallel with... Two resistors, namely R1 and R2, are connected in series and connected to the VS pin of the device. This pin monitors the bus voltage fluctuation in real time by detecting the voltage drop across the resistor group using R2. In addition, the LOAD pin of the circuit device is connected to the load control module U6, enabling the main control module U2 to control the load power in real time. The bus capacitor temperature does not exceed the set temperature threshold. That is, when the power supply is operating normally, the preferred value range for the voltage at the midpoint of the two series resistors connected in parallel with the bus capacitor, collected by the voltage detection pin, is 2.2 to 5V.

[0090] Those skilled in the art can set the first resistor R1 and the second resistor R2 for voltage division according to the actual situation, which will not be elaborated here.

[0091] This application also discloses a control method for suppressing voltage decay in a switching power supply based on a device for suppressing voltage decay in switching power supplies, comprising:

[0092] When the power factor correction boost circuit starts working, it closes each switch to charge each capacitor. After the first set time, it opens each switch to complete the charging.

[0093] The main control module collects the voltage at the midpoint of the two series resistors connected in parallel with the bus capacitor and the temperature of the bus capacitor in real time.

[0094] Based on the voltage and bus capacitor temperature, a capacitor compensation criterion is set. When the sampled value meets the criterion, the main control module calculates the capacitor compensation amount. The set capacitor compensation criterion is: the bus capacitor temperature is greater than a set temperature threshold, and the voltage fluctuation collected per unit time is greater than the set maximum allowable voltage fluctuation. Preferably, the unit time is set to 1 / 10 of the power frequency time, i.e., 0.02s; preferably, the set temperature threshold is T0 of 110℃; the preferred value for the maximum allowable voltage fluctuation is 60V. The voltage fluctuation is the change in voltage monitored per unit time.

[0095] The system calculates the number of switches to be closed based on the capacitance compensation amount and generates an execution command to control the capacitance compensation execution module to close a specified number of switches; and controls the load to reduce power; in particular, when the sum of the number of switches to be closed and the number of switches already closed is greater than the maximum allowable number of switches, the main control module controls the load to stop and reports a high temperature over-limit operation fault.

[0096] The main control module continues to determine whether the sampled value meets the capacitance compensation criterion. If it does, the main control module continues to calculate the number of switches to be closed and controls the capacitance compensation execution module to close the specified number of switches; then it controls the load to reduce power; until the capacitance compensation criterion is no longer met.

[0097] If the capacitor compensation criterion is not met, the current switching state and load power will be maintained until the power factor correction boost circuit is turned off, or until the bus capacitor temperature is lower than the set temperature threshold. The main control module will then control the capacitance compensation execution module to disconnect all switches and restore the load to its rated power.

[0098] Example 2

[0099] A control method for suppressing voltage decay in switching power supplies under high-temperature conditions, see appendix. Figure 3 ,include:

[0100] When the power factor correction boost circuit starts working, the device loads the preset maximum allowable switching quantity N, and then controls U1 to close S1, S2...SN step by step. A preset number of switches are closed at unit time intervals τ to prevent excessive inrush current. After all switches are closed, the circuit continues to run for a preset first time, and then the switches are opened to complete charging. This prevents subsequent switching from causing sudden changes in bus voltage and abnormal load operation. Preferably, the preset first time is 1 minute; the preferred value for the unit time is 1 / 10 of the power frequency time, i.e., 0.02s. The preferred value for the preset number of switches is 10 to 50.

[0101] Set the U1 switch state s = 0 (switch state includes open and closed; switch state s = 0 indicates no switch closed; switch state s = 1 indicates a switch closed), and the number of switches m0 = 0 and m1 = 0, to enable subsequent program judgments. The program starts monitoring the temperature T of capacitor C6 until T is greater than the set temperature threshold T0, then it starts monitoring the voltage fluctuation ΔV of the bus per unit time. Preferably, the set temperature threshold T0 is 110℃. If ΔV is still less than the set maximum allowable voltage fluctuation VS, it returns to the temperature monitoring step, and so on. When ΔV > VS, it combines the working mechanism of the Boost circuit and the relationship of the capacitors. The capacitance compensation amount can be calculated as shown in the following formula:

[0102]

[0103] Among them, I av It is the average bus current; T hu Vs is the off-time of the switching transistor in the power factor correction boost circuit; Vs is the maximum allowable voltage fluctuation, preferably set to 60V; ΔV is the voltage fluctuation collected per unit time. The voltage fluctuation is the change in voltage monitored per unit time.

[0104] After calculating ΔC, the switching quantity is calculated based on the capacitance value δC of a single capacitor in the device, as shown in the following formula:

[0105]

[0106] Where m1 is the number of switches to be closed by the capacitance compensation execution module; Δc is the capacitance compensation amount; δc is the capacitance value of a single capacitor; [·] indicates rounding up.

[0107] Set m1 = a; then compare m1 with the maximum switching quantity n; if m1 > n, it means that the capacitor decay has exceeded the maximum allowable limit. At this time, control the load to stop and report a high temperature over-limit operation fault.

[0108] If m1≤n, then m0=a, switch state s=1; the main control module U2 sends an execution command to control U1 to close switch S1…Sm0, and controls the load to reduce by one unit power ΔP to reduce device heating, and then returns to continue monitoring the temperature of device C6; preferably, the unit power is 10W;

[0109] If the temperature T is still greater than T0, continue to monitor the voltage fluctuation ΔV to determine whether further compensation is needed. If there is no abnormality, return to continue monitoring the temperature T.

[0110] If ΔV is still greater than Vs, then continue to calculate ΔC and the switching quantity m1 through the capacitance compensation relationship. At this time, since switches S1, S2...Sm0 are closed in U1, it is necessary to compare the compensated switching quantity m0+m1 with the maximum switching quantity n. If m0+m1>n, then control the load to stop and report a high temperature over-limit fault. If m0+m1≤n, then control U1 to close switches S(m0+1)...S(m0+m1), and update m0 to m0=m0+m1. Then control the load to reduce one unit power. ΔP, return to continue monitoring the temperature of device C6, and continue entering the temperature monitoring-voltage fluctuation monitoring-capacity compensation-power reduction cycle; in this cycle, if the temperature T≤T0, it means that device C6 has been reduced to a safe operating temperature. At this time, the device control U1 opens all closed switches S1, S2...Sm0 and restores the load to the normal set power P, and then continues to enter the temperature monitoring-voltage fluctuation monitoring-capacity compensation-power reduction cycle, continuously monitoring; until the power factor correction boost circuit is turned off.

[0111] This disclosure can be a system, method, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for causing a processor to implement various aspects of this disclosure.

[0112] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example—but not limited to—electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0113] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.

[0114] Computer program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing the status information of the computer-readable program instructions to implement various aspects of this disclosure.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. A device for suppressing voltage attenuation in a switching power supply under high-temperature operating conditions, comprising a main control module, a capacitance compensation execution module, and a capacitance compensation module, characterized in that: The main control module receives the temperature detection signal of the bus capacitor in the power factor correction boost circuit from the temperature detection device; and collects the voltage detection signal at the midpoint of the connection point of the two series resistors connected in parallel with the bus capacitor; it determines whether to start capacitor compensation based on the temperature detection signal and the voltage detection signal. If so, it calculates the capacitor compensation amount based on the voltage detection signal, generates a corresponding execution instruction, and then sends the execution instruction to the capacitance compensation execution module through the instruction sending pin, so that the capacitance compensation execution module can adjust the compensation value of the capacitance compensation module. The capacitance compensation execution module and the capacitance compensation module are connected in series to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor. The capacitance compensation execution module adjusts the capacitance value compensated by the capacitance compensation module according to the received execution instructions.

2. The device for suppressing voltage attenuation in a switching power supply according to claim 1, characterized in that: The capacitance compensation execution module includes multiple switches; The capacitance compensation module includes multiple individual capacitors; Each switch controls the compensation or decommissioning of a single capacitor.

3. The device for suppressing voltage attenuation in a switching power supply according to claim 1 or 2, characterized in that: In the main control module, the determination of whether to start capacitor compensation is based on the temperature detection signal and the voltage detection signal is that capacitor compensation is started when the temperature of the bus capacitor is greater than the set temperature threshold and the voltage fluctuation collected per unit time is greater than the set maximum allowable voltage fluctuation.

4. The device for suppressing voltage attenuation in a switching power supply according to claim 1, characterized in that: The capacitor compensation amount is determined based on the voltage fluctuation collected per unit time, the maximum allowable voltage fluctuation, the average bus current, and the off-time of the power factor correction boost circuit switching transistor, as shown in the following formula: Where Δc is the capacitance compensation amount; I av It is the average bus current; T hu Vs is the off-time of the power factor correction boost circuit switching transistor; Vs is the maximum allowable voltage fluctuation; ΔV is the voltage fluctuation collected per unit time.

5. The device for suppressing voltage attenuation in a switching power supply according to claim 1 or 2, characterized in that: The execution instructions include the number of switches that the capacitance compensation execution module needs to close; The number of switches to be closed by the capacitance compensation execution module is determined based on the current number of closed switches, the value of a single capacitor in the capacitance compensation module, and the capacitance compensation amount, as shown in the following formula: Where m1 is the number of switches to be closed by the capacitance compensation execution module; Δc is the capacitance compensation amount; δc is the value of a single capacitor; [·] indicates rounding up.

6. The device for suppressing voltage attenuation in a switching power supply according to claim 1 or 2, characterized in that: The capacitance compensation execution module and the capacitance compensation module are connected in series to form a total capacitance compensation circuit, which is connected in parallel with the bus capacitor, including: Connect the first terminal of each switch in the capacitance compensation execution module to the positive terminal of the bus in the power factor correction boost circuit; connect the second terminal of each switch to the first terminal of each individual capacitor in the capacitance compensation module. The second terminal of each individual capacitor in the capacitance compensation module is grounded.

7. The device for suppressing voltage attenuation in a switching power supply according to claim 1, characterized in that: The device also includes a load control module; After the main control module sends an execution command to the capacitance compensation execution module, the load control module controls the load to reduce the set unit power.

8. A control method for suppressing voltage decay of a switching power supply using the device for suppressing voltage decay according to any one of claims 1-7, characterized in that: When the power factor correction boost circuit starts working, it closes each switch to charge each capacitor. After the first set time, it opens each switch to complete the charging. The main control module collects the voltage at the midpoint of the two series resistors connected in parallel with the bus capacitor and the temperature of the bus capacitor in real time. Based on the voltage and bus capacitor temperature, a capacitor compensation criterion is set. When the sampled value meets the capacitor compensation criterion, the main control module calculates the capacitor compensation amount, calculates the number of switches to be closed based on the capacitor compensation amount, and generates an execution command to control the capacitor compensation execution module to close the specified number of switches; and controls the load to reduce power. The main control module continues to determine whether the sampled value meets the capacitance compensation criterion. If it does, the main control module continues to calculate the number of switches to be closed and controls the capacitance compensation execution module to close the specified number of switches; then it controls the load to reduce power; until the capacitance compensation criterion is no longer met. If the capacitor compensation criterion is not met, the current switching state and load power will be maintained until the power factor correction boost circuit is turned off, or until the bus capacitor temperature is lower than the set temperature threshold. The main control module will then control the capacitance compensation execution module to disconnect all switches and restore the load to its rated power.

9. The control method for suppressing voltage attenuation in a switching power supply according to claim 8, characterized in that: The set capacitor compensation criterion is: the temperature of the bus capacitor is greater than the set temperature threshold, and the voltage fluctuation collected per unit time is greater than the set maximum allowable voltage fluctuation.

10. The control method for suppressing voltage attenuation in a switching power supply according to claim 8, characterized in that: When the sum of the number of switches to be closed and the number of switches already closed exceeds the maximum allowable switching capacity, the main control module controls the load to stop and reports a high temperature over-limit operation fault.

11. An air conditioner, comprising a switching power supply, characterized in that: The switching power supply is equipped with the device for suppressing voltage attenuation of the switching power supply as described in any one of claims 1-7.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the steps of the control method for suppressing voltage decay of a switching power supply as described in any one of claims 8-10.

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