Mode switching circuit, switching power supply chip and electronic equipment

By working together with the control module and the threshold switching module, the preset threshold voltage is slowly adjusted, which solves the glitches when switching from FCCM mode to DCM mode and achieves linear rise and smooth switching of the output voltage.

CN120956055AActive Publication Date: 2025-11-14SHENZHEN LOWPOWER SEMICON CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202511480548.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-16
Publication Date
2025-11-14
Estimated Expiration
2045-10-16

AI Technical Summary

Technical Problem

During the slow start-up phase, when switching from FCCM mode to DCM mode, the output voltage experiences spikes near the switching point, preventing a smooth transition.

Method used

By outputting regularly changing logic control signals through the control module, and combining the threshold switching module and the logic module, the preset threshold voltage is slowly adjusted so that the switching circuit operates in FCCM mode during the soft start-up phase and smoothly switches to DCM mode during the soft start-up process.

Benefits of technology

This achieves a linear rise in output voltage, avoiding glitches when switching directly from FCCM mode to DCM mode, and ensuring smooth voltage switching.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120956055A_ABST
    Figure CN120956055A_ABST
Patent Text Reader

Abstract

The invention belongs to the field of electronic circuits, and provides a mode switching circuit, a switching power supply chip and electronic equipment. The circuit comprises a control module, a threshold switching module and a logic module. The threshold switching module is respectively connected with the control module and the logic module, and the logic module is also connected with a control end of a lower tube in the switch conversion circuit. The control module outputs a logic control signal which has a fixed time interval and changes regularly when the slow start time reaches a preset time; the threshold switching module adjusts the preset threshold voltage every time when receiving a logic control signal, and adjusts the preset threshold voltage to zero-cross detection threshold voltage until the slow start is finished; and the logic module outputs a first driving signal according to the preset threshold voltage after each adjustment and the first voltage so as to drive the lower tube to be closed when the first voltage reaches the preset threshold voltage after each adjustment. According to the invention, by slowly adjusting the threshold voltage, smooth switching from the FCCM mode to the DCM mode is realized.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application belongs to the field of electronic circuit technology, and in particular relates to a mode switching circuit, a switching power supply chip, and an electronic device. Background Technology

[0002] To limit inrush current during startup, switching power supplies employ a soft-start mechanism to control the output voltage and achieve a manageable power-up process. If the switching power supply uses FCCM (Force Continuous Conduction Mode), the output voltage can rise linearly during the soft-start phase. However, for DCM (Discontinuous Conduction Mode), which includes zero-current sensing, the initial output voltage is zero and the inductor current cannot be negative, leading to a significant overshoot and a small step-down phenomenon during the early stages of the soft-start phase. Therefore, a non-linear component exists throughout the soft-start process. Furthermore, if FCCM mode is used during the soft-start phase, switching back to DCM mode at the end of normal operation results in glitches in the output voltage near the switching point due to the difference in peak control current between the two modes, preventing a smooth transition. Summary of the Invention

[0003] This application provides a mode switching circuit, a switching power supply chip, and an electronic device, which can solve the problem that when using FCCM mode during the soft start phase and switching to DCM mode under normal operating conditions at the end of the soft start phase, the difference in the peak current of the two modes causes the output voltage to glitches near the switching point, making smooth switching impossible.

[0004] In a first aspect, embodiments of this application provide a mode switching circuit, including a control module, a threshold switching module, and a logic module; the threshold switching module is connected to the control module and the logic module respectively, and the logic module is also used to connect to the control terminal of the lower transistor in the switching circuit; The control module outputs a logic control signal with a fixed time interval and a regular variation when the soft start time reaches a preset time. The threshold switching module adjusts the preset threshold voltage each time a logic control signal is received, until the preset threshold voltage is adjusted to a zero-crossing detection threshold voltage at the end of the soft start. The logic module outputs a first drive signal based on the preset threshold voltage after each adjustment and a first voltage, so as to drive the lower transistor to turn off when the first voltage reaches the preset threshold voltage after each adjustment. The preset threshold voltage indicates that the switching circuit operates in a forced continuous conduction mode. The first voltage is a voltage generated based on the current flowing through the lower transistor.

[0005] In one possible implementation of the first aspect, the control module includes a counter, the n-bit output of which is connected to the threshold switching module; wherein n is a natural number greater than zero. The counter is used to receive a first clock signal and output an n-bit logic control signal with a fixed time interval and a regular change according to the first clock signal.

[0006] In one possible implementation of the first aspect, the threshold switching module includes a current source, a first resistor, n second resistors, and n transistors. The input terminal of the current source receives a power supply voltage, and the output terminal of the current source is connected to the first terminal of the first resistor. The n second resistors are connected in series, and the weights of the n second resistors are 2 in sequence. n-1 2 n -2 、……、2 0 Each second resistor is connected in parallel with a transistor. The second end of the first resistor is connected to the first end of the nth second resistor. The second end of the first second resistor is grounded. The gates of the n transistors receive n-bit logic control signals.

[0007] In one possible implementation of the first aspect, the logic module includes a comparison unit and a logic unit, the comparison unit being connected to the threshold switching module and the logic unit respectively, and the logic unit being further configured to be connected to the control terminal of the lower tube; The comparison unit is used to receive a first voltage and output a first comparison signal according to the preset threshold voltage adjusted each time and the first voltage; the logic unit is used to receive a second clock signal and output a first drive signal according to the second clock signal and the changing first comparison signal, so as to drive the lower transistor to turn off when the first voltage reaches the preset threshold voltage adjusted each time.

[0008] In one possible implementation of the first aspect, the comparison unit includes a first comparator, a first input terminal of the first comparator receiving a first voltage, a second input terminal of the first comparator receiving a preset threshold voltage after each adjustment, and an output terminal of the first comparator connected to the logic unit.

[0009] In one possible implementation of the first aspect, the comparison unit further includes a first current sampling subunit, which is connected to a first input terminal of the first comparator, and the first current sampling subunit is also used to connect to a switching node of the switching conversion circuit. The first current sampling subunit is used to collect the current flowing through the lower transistor and output a first voltage based on the current flowing through the lower transistor.

[0010] In one possible implementation of the first aspect, the logic unit includes an error amplifier, a second comparator, and a logic control subunit. The first input terminal of the error amplifier is connected to a feedback node in the switching circuit to receive a feedback voltage. The second input terminal of the error amplifier receives a reference voltage. The output terminal of the error amplifier is connected to the first input terminal of the second comparator, and the second input terminal of the second comparator receives a second voltage. The logic control subunit is connected to both the comparator unit and the output terminal of the second comparator. The logic control subunit is also connected to the control terminals of the upper and lower transistors in the switching circuit. The second voltage is generated based on the current flowing through the upper transistor. The logic control subunit is configured to receive a second clock signal and output a first drive signal based on the second clock signal and a changing first comparison signal, so as to drive the lower transistor to turn off when the first voltage reaches a preset threshold voltage after each adjustment; the error amplifier is configured to output an error voltage based on the feedback voltage and the reference voltage; the second comparator is configured to output a second comparison signal based on the second voltage and the error voltage; the logic control subunit is further configured to output a second drive signal based on the second clock signal and the second comparison signal, so as to drive the upper transistor to turn off when the second voltage reaches the error voltage.

[0011] In one possible implementation of the first aspect, the logic unit further includes a second current sampling subunit, which is connected to the second input terminal of the second comparator, and the second current sampling subunit is also used to connect to the switching node of the switching conversion circuit; The second current sampling subunit is used to sample the current flowing through the upper tube and output a second voltage based on the current flowing through the upper tube.

[0012] Secondly, embodiments of this application provide a switching power supply chip, including the mode switching circuit described in any one of the first aspects.

[0013] Thirdly, embodiments of this application provide an electronic device including the switching power supply chip described in any one of the second aspects.

[0014] The beneficial effects of the embodiments in this application compared with the prior art are: This application provides a mode switching circuit, including a control module, a threshold switching module, and a logic module; the threshold switching module is connected to the control module and the logic module respectively, and the logic module is also used to connect to the control terminal of the lower transistor in the switching circuit.

[0015] When the soft start time reaches the preset time, it indicates that the soft start has started for a period of time, which also means that this application starts the threshold switching mechanism during the soft start process. At this time, the control module outputs a logic control signal with a fixed time interval and a regular change.

[0016] The threshold switching module adjusts the preset threshold voltage upon receiving each logic control signal until it reaches the zero-crossing detection threshold voltage at the end of the soft start phase. The preset threshold voltage indicates that the switching circuit operates in a forced continuous conduction mode. Therefore, the threshold switching module gradually adjusts the preset threshold voltage by receiving regularly changing logic control signals, ultimately switching it to the zero-crossing detection threshold voltage at the end of the soft start phase. This ensures that the switching circuit operates in FCCM mode during the soft start phase and smoothly switches to DCM mode during the soft start process.

[0017] The logic module outputs a first drive signal based on the preset threshold voltage and the first voltage after each adjustment, so as to drive the lower transistor to turn off when the first voltage reaches the preset threshold voltage after each adjustment, thus achieving a linear rise in the output voltage. The first voltage is generated based on the current flowing through the lower transistor.

[0018] In summary, this application, through the collaboration between the control module, the threshold switching module, and the logic module, slowly adjusts the preset threshold voltage, ensuring that the switching conversion circuit operates in FCCM mode during the soft start-up phase and smoothly switches to DCM mode during the soft start-up process, ultimately achieving a linear increase in the output voltage.

[0019] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a topology diagram of a buck switching power supply; Figure 2 This is a waveform diagram of a step-down switching power supply; Figure 3 This is a waveform diagram of the output voltage of a step-down switching power supply using DCM mode during the soft start phase. Figure 4This is a waveform diagram of the output voltage of a step-down switching power supply that uses FCCM mode during the soft start-up phase and then directly switches to DCM mode. Figure 5 This is a schematic diagram of a mode switching circuit provided in an embodiment of this application; Figure 6 This is a schematic diagram of a mode switching circuit provided in another embodiment of this application; Figure 7 This is a circuit connection diagram of a mode switching circuit provided in an embodiment of this application; Figure 8 This is a circuit connection diagram of a mode switching circuit provided in another embodiment of this application; Figure 9 This is a waveform diagram illustrating mode switching without using the mode switching circuit provided in the embodiments of this application. Figure 10 This is a waveform diagram of mode switching completed using the mode switching circuit provided in the embodiment of this application.

[0022] In the diagram: 10. Mode switching circuit; 11. Control module; 111. Counter; 12. Threshold switching module; 13. Logic module; 131. Comparison unit; 1311. First current sampling subunit; 132. Logic unit; 1321. Logic control subunit; 1322. Second current sampling subunit; 20. Switching circuit. Detailed Implementation

[0023] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.

[0024] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0025] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0026] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0027] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0028] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0029] To limit inrush current during startup, switching power supplies employ a soft-start mechanism to control the output voltage. If the power supply uses FCCM (Forward Current Management) mode, the output voltage can rise linearly during the soft-start phase. However, for DCM (Distributed Current Management) mode with zero-current sensing, the initial output voltage of zero and the inductor current's inability to be negative during the soft-start phase lead to a significant overshoot, resulting in a small voltage step. Therefore, the entire soft-start phase exhibits a non-linear component. Furthermore, if FCCM mode is used during the soft-start phase, switching back to DCM mode at the end of normal operation causes spikes in the output voltage near the switching point due to the difference in peak current between the two modes, preventing a smooth transition.

[0030] The following example uses a buck switching power supply with peak current mode control to illustrate the switching logic of a buck switching power supply. Figure 1 The topology of a buck switching power supply is shown, such as... Figure 1 As shown, the step-down switching power supply includes an upper transistor S1, a lower transistor S2, an inductor L, a capacitor C, and a first feedback resistor R. FB1 Second feedback resistor R FB2The circuit consists of an error amplifier EA, a comparator CMP, a logic control section, and a current sampling section. The upper transistor S1 and the lower transistor S2 are called power transistors; the voltage VIN is the input voltage; the inductor current is represented by I_LX; clock is the clock signal for the logic control section; the common terminal of the upper transistor S1, the lower transistor S2, and the inductor L is called the switching node LX; and the first feedback resistor R... FB1 Second feedback resistor R FB2 The common terminal is called the feedback node FB, and the voltage at this node is the feedback voltage VFB; the inductor L, capacitor C, and first feedback resistor R FB1 The common terminal is called the output node, and the voltage at this node is the output voltage VOUT.

[0031] The waveform of a step-down switching power supply is as follows: Figure 2 As shown, the rising edge of the clock signal triggers the switching transistor S1 to turn on, and the voltage level at the switching node LX becomes high. Simultaneously, the sampled signal of the inductor current I_LX is converted into a voltage signal VSUM, which is then compared with the error voltage V output by the error amplifier EA. EA By comparing the two, the upper transistor S1 is turned off at the point where they overlap, and then the lower transistor S2 is turned on. The level at the switching node LX becomes low, and the upper transistor S1 is turned on again by the next clock edge, thus forming a complete switching cycle control. Figure 2 The VSUM DC value in the figure represents the voltage value of the voltage signal VSUM during the conduction of the lower transistor S2.

[0032] In the initial stage of soft start, since the initial value of the output voltage VOUT is 0, the inductor current I_LX decreases at a relatively small rate. Furthermore, due to the current limiting effect of soft start, the switching power supply operates with a minimum duty cycle. During this period, the inductor current I_LX continuously rises, and the output voltage VOUT is charged and exceeds the preset voltage for the soft start phase. Only when the average current of the inductor current I_LX approaches the average charging current of the soft start phase can the linear soft start phase begin.

[0033] Due to the minimum pulse width limitation, the inductor current I_LX continuously increases, and the loop feedback mechanism requires response time. Consequently, the output voltage VOUT overshoots and then returns to the slow-start ramp-up rate (i.e., a small step appears). Therefore, similar phenomena occur in the initial stage of slow start. Figure 3 The nonlinear interval shown is more pronounced as the loop response speed decreases. Figure 3 In this context, I_inrush represents the overrush current.

[0034] In FCCM mode, since the inductor current I_LX can be reversed, it can change continuously. When the output voltage VOUT is slightly overshooted, the feedback loop maintains the smooth rise of the output voltage VOUT by controlling the reverse discharge of the output.

[0035] However, if FCCM mode is used to address the nonlinearity caused by the loop response during the initial stage of soft start, and then switched to DCM mode during or at the end of the soft start, the FCCM mode, due to the presence of negative current, achieves the same output voltage rise rate (i.e., the same average output current) as the DCM mode. However, the peak current of the FCCM mode is higher than that of the DCM mode. Therefore, at the moment of switching, due to control mechanism issues and loop response rate limitations, the output voltage VOUT may overcharge, causing glitches, such as... Figure 4 As shown.

[0036] To address the issue of output voltage glitches caused by switching directly to DCM mode after the soft start phase, this application provides a mode switching circuit, such as... Figure 5 As shown, the mode switching circuit 10 includes a control module 11, a threshold switching module 12, and a logic module 13; the threshold switching module 12 is connected to the control module 11 and the logic module 13 respectively, and the logic module 13 is also used to connect to the control terminal of the lower transistor S2 in the switching circuit 20.

[0037] Specifically, when the soft-start time reaches the preset time, it indicates that soft-start has been underway for some time, meaning that this application initiates the threshold switching mechanism during the soft-start process. At this time, the control module 11 outputs a logic control signal with a fixed time interval and a regular variation. It should be noted that in this application, the preset time can be set to the time when entering the middle of the soft-start phase; of course, it can also be flexibly adjusted according to the actual application scenario. The fixed time interval should match the loop response speed of the system and can be adjusted according to the actual situation, but it must be ensured to be greater than the switching cycle of the switching circuit 20.

[0038] The threshold switching module 12 adjusts the preset threshold voltage upon receiving each logic control signal until it reaches the zero-crossing detection threshold voltage at the end of the soft start-up. The preset threshold voltage indicates that the switching circuit 20 operates in forced continuous conduction mode, and its specific value can be flexibly set according to the actual application scenario. Thus, the threshold switching module 12 slowly adjusts the preset threshold voltage by receiving regularly changing logic control signals, ultimately switching the preset threshold voltage to the zero-crossing detection threshold voltage at the end of the soft start-up. This ensures that the switching circuit 20 operates in FCCM mode during the soft start-up phase and smoothly switches to DCM mode during the soft start-up process. It should be noted that the adjustment of the preset threshold voltage corresponds to the adjustment of the current limit value. For example, in FCCM mode, the current limit value is -1A, which corresponds to the preset threshold voltage when converted to voltage; in DCM mode, the current limit value is 0A, which corresponds to the zero-crossing detection threshold voltage when converted to voltage. By slowly adjusting the current limit value from -1A to 0A through regularly changing logic control signals, the duty cycle of the power transistor is gradually changed, achieving a smooth switch from FCCM mode to DCM mode.

[0039] Logic module 13 is used to output a first drive signal based on the preset threshold voltage and the first voltage V1 after each adjustment, so as to drive the lower transistor S2 to turn off when the first voltage V1 reaches the preset threshold voltage after each adjustment, and finally realize the linear rise of the output voltage VOUT. The first voltage V1 is the voltage generated based on the current flowing through the lower transistor S2.

[0040] In summary, this application, through the cooperation between the control module 11, the threshold switching module 12, and the logic module 13, slowly adjusts the preset threshold voltage, ensuring that the switching circuit 20 operates in FCCM mode during the soft start-up phase and smoothly switches to DCM mode during the soft start-up process. This avoids the problem of glitches in the output voltage VOUT when switching directly from FCCM mode to DCM mode, and ultimately achieves a linear rise in the output voltage VOUT.

[0041] It should be noted that this application is not only applicable to the switching from FCCM mode to DCM mode during the soft start process, but also to other operating processes. When switching from FCCM mode to DCM mode, the circuit proposed in this application can still be used. It should be noted that the logic control signal needs to be generated separately. Since this application is in the soft start stage, the relevant counting bits of the soft start circuit can be reused, so it will not increase the related circuit size.

[0042] like Figure 6 As shown, the logic module 13 includes a comparison unit 131 and a logic unit 132. The comparison unit 131 is connected to the threshold switching module 12 and the logic unit 132 respectively. The logic unit 132 is also used to connect to the control terminal of the lower tube S2.

[0043] Specifically, the comparison unit 131 is used to receive the first voltage V1 and output a first comparison signal ZCD according to the preset threshold voltage after each adjustment and the first voltage V1. The logic unit 132 is used to receive the second clock signal clk2 and output a first drive signal according to the second clock signal clk2 and the changing first comparison signal ZCD, so as to drive the lower transistor S2 to turn off when the first voltage V1 reaches the preset threshold voltage after each adjustment.

[0044] like Figure 7 As shown, the control module 11 includes a counter 111, and the n-bit output terminal of the counter is connected to the threshold switching module 12; where n is a natural number greater than zero.

[0045] Specifically, counter 111 receives the first clock signal clk1 and outputs n-bit logic control signals Qn-1, Qn-2, ..., Q0 with fixed time intervals and regular changes according to the first clock signal clk1. The n-bit logic control signals Qn-1, Qn-2, ..., Q0 are binary encoded signals and change regularly, for example, from 0, 0, ..., 0 to 0, 0, ..., 1, and so on, eventually becoming 1, 1, ..., 1. Each logic control signal Qn-1, Qn-2, ..., Q0 is output at a fixed interval. The more bits in the logic control signals Qn-1, Qn-2, ..., Q0, the smoother the threshold adjustment process. Therefore, in practical applications, the number of bits in counter 111 can be set according to requirements.

[0046] It should be noted that the first clock signal clk1 is the clock signal for the soft-start phase. Counter 111 directly uses the existing counter in the soft-start circuit, without the need for additional resetting, effectively reducing the design complexity, area, and cost of the circuit.

[0047] like Figure 7 As shown, the comparison unit 131 includes a first comparator CMP1. The first input terminal of the first comparator CMP1 receives a first voltage, the second input terminal of the first comparator CMP1 receives a preset threshold voltage after each adjustment, and the output terminal of the first comparator CMP1 is connected to the logic unit 132.

[0048] like Figure 8 As shown, the comparison unit 131 also includes a first current sampling subunit 1311, which is connected to the first input terminal of the first comparator CMP1. The first current sampling subunit 1311 is also used to connect to the switching node LX of the switching conversion circuit 20.

[0049] Specifically, the first current sampling subunit 1311 is used to collect the current flowing through the lower transistor S2 and output the first voltage V1 based on the current flowing through the lower transistor S2.

[0050] like Figure 7 As shown, the threshold switching module 12 includes a current source, a first resistor R1, n second resistors R2, and n transistors. The input terminal of the current source receives the power supply voltage VDD, and the output terminal of the current source is connected to the first terminal of the first resistor R1. The n second resistors R2 are connected in series, and the weights of the n second resistors R2 are 2. n-1 ,2 n-2 , ..., 2 0 Each second resistor R2 is connected in parallel with a transistor. The second end of the first resistor R1 is connected to the first end of the nth second resistor R2. The second end of the first second resistor R2 is grounded. The gates of the n transistors receive n-bit logic control signals Qn-1, Qn-2, ..., Q0.

[0051] Specifically, the threshold switching module 12 slowly changes the resistance value of the n-bit logic control signals Qn-1, Qn-2, ..., Q0, which change in a regular pattern, thereby slowly adjusting the preset threshold voltage. At the end of the soft start, the preset threshold voltage is adjusted to the zero-crossing detection threshold voltage VZCD. For example: assuming the resistance of the second resistor R2 is r, when the logic control signals Qn-1, Qn-2, ..., Q0 are 0, 0, ..., 0, all n transistors are off, so all n second resistors R2 are connected, and the resistance is at its maximum. When the logic control signals Qn-1, Qn-2, ..., Q0 are 0, 0, ..., 1, the transistor connected in parallel with the first second resistor R2 is turned on, so the first second resistor R2 is short-circuited, and the resistance decreases by r*2. 0 That is, r; when the logic control signals Qn-1, Qn-2, ..., Q0 are 0, 0, ..., 1, 0, the transistor connected in parallel with the second resistor R2 is turned on, then the second resistor R2 is short-circuited, and the resistance value decreases by r*2. 1 That is, 2r; when the logic control signals Qn-1, Qn-2, ..., Q0 are 0, 0, ..., 1, 1, the transistor connected in parallel with the first second resistor R2 and the transistor connected in parallel with the second second resistor R2 are both turned on. Therefore, both the first and second second resistors R2 are short-circuited, and the resistance decreases by r*2. 0 +r*2 1 That is, 3r, and so on. It can be seen that when the threshold switching module 12 receives a logic control signal Qn-1, Qn-2, ..., Q0, its resistance value decreases by r, so as to achieve a smooth and slow adjustment of the preset threshold voltage.

[0052] The adjustment direction of the preset threshold voltage (from small to large or from large to small) depends on the polarity of the preset threshold voltage connected to the first comparator CMP1, and the relationship between the first voltage V1 and the current flowing through the lower transistor S2. For example, if the first voltage V1 is directly proportional to the current flowing through the lower transistor S2, and the preset threshold voltage is connected to the positive input terminal of the first comparator CMP1, then the adjustment direction of the preset threshold voltage is from small to large, and the corresponding current limit value also gradually increases. If the first voltage V1 is inversely proportional to the current flowing through the lower transistor S2, and the preset threshold voltage is connected to the negative input terminal of the first comparator CMP1, then the adjustment direction of the preset threshold voltage is from large to small, and the corresponding current limit value gradually increases. In practical applications, the adjustment direction of the preset threshold voltage can be determined according to the specific scenario requirements; this application does not impose any limitations on this.

[0053] like Figure 7 As shown, logic unit 132 includes an error amplifier EA, a second comparator CMP2, and a logic control subunit 1321. The first input terminal of the error amplifier EA is connected to the feedback node FB in the switching circuit 20 to receive the feedback voltage VFB. The second input terminal of the error amplifier EA receives the reference voltage VREF. The output terminal of the error amplifier EA is connected to the first input terminal of the second comparator CMP2, and the second input terminal of the second comparator CMP2 receives the second voltage V2. The logic control subunit 1321 is connected to the output terminals of the comparator unit 131 and the second comparator CMP2, respectively. The logic control subunit 1321 is also used to connect to the control terminals of the upper transistor S1 and the lower transistor S2 in the switching circuit 20. The second voltage V2 is a voltage generated based on the current flowing through the upper transistor S1.

[0054] Specifically, the logic control subunit 1321 is used to receive the second clock signal clk2 and output the first drive signal according to the second clock signal clk2 and the changing first comparison signal ZCD, so as to drive the lower transistor S2 to turn off when the first voltage V1 reaches the preset threshold voltage after each adjustment.

[0055] Error amplifier EA is used to output error voltage V based on feedback voltage VFB and reference voltage VREF. EA The second comparator CMP2 is used to determine the voltage based on the second voltage V2 and the error voltage V. EA Output a second comparison signal; the logic control subunit 1321 is also used to output a second drive signal according to the second clock signal clk2 and the second comparison signal, so as to achieve the error voltage V at the second voltage V2. EA When the drive tube S1 is turned off.

[0056] like Figure 8As shown, the logic unit 132 also includes a second current sampling subunit 1322, which is connected to the second input terminal of the second comparator CMP2. The second current sampling subunit 1322 is also used to connect to the switching node LX of the switching conversion circuit 20.

[0057] Specifically, the second current sampling subunit 1322 is used to sample the current flowing through the upper tube S1 and output the second voltage V2 based on the current flowing through the upper tube S1.

[0058] Figure 9 The diagram shows a waveform of mode switching performed without the mode switching circuit 10 provided in the embodiments of this application. From... Figure 9 It can be seen that the rectangular area represents the non-linear region resulting from mode switching; it should be noted that... Figure 9 The waveforms shown are all idealized results. In reality, the switching process will have multiple cycles and over-adjustment stages depending on the actual circuit's response speed and phase margin.

[0059] Figure 10 The waveform of mode switching performed by the mode switching circuit 10 provided in the embodiment of this application is shown. From Figure 10 As can be seen, the rectangular area represents the gradual transition of the first comparison signal ZCD, i.e., the switching process from FCCM mode to DCM mode. This application achieves a smooth switching from FCCM mode to DCM mode by slowly adjusting the threshold, ultimately realizing a linear increase in the output voltage VOUT. By adjusting the fixed time interval according to the system's loop response speed, the step size and duration of the first comparison signal ZCD are adjusted to achieve a linear increase in the output voltage VOUT during the soft-start phase.

[0060] In summary, the mode switching circuit 10 provided in this application embodiment, through the cooperation between the control module 11, the threshold switching module 12 and the logic module 13, slowly adjusts the preset threshold voltage, ensuring that the switching circuit 20 operates in FCCM mode during the soft start-up phase and smoothly switches to DCM mode during the soft start-up process. This avoids the problem of glitches in the output voltage VOUT when directly switching from FCCM mode to DCM mode, and ultimately achieves a linear rise in the output voltage VOUT.

[0061] It should be noted that this application uses peak current mode control as an example for illustration. For other controls, such as voltage mode control, adaptive modifications can be made, and this application will not elaborate further.

[0062] This application also provides a switching power supply chip, including the mode switching circuit described above. Since the switching power supply chip provided in this application adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated further here.

[0063] This application also provides an electronic device including the aforementioned switching power supply chip. Since the electronic device provided in this application employs all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be elaborated upon further here. The electronic device provided in this application can be any electronic device containing the aforementioned switching power supply chip.

[0064] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0065] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A mode switching circuit, characterized in that, It includes a control module, a threshold switching module, and a logic module; the threshold switching module is connected to the control module and the logic module respectively, and the logic module is also used to connect to the control terminal of the lower transistor in the switching circuit; The control module outputs a logic control signal with a fixed time interval and a regular variation when the soft start time reaches a preset time. The threshold switching module adjusts the preset threshold voltage each time a logic control signal is received, until the preset threshold voltage is adjusted to a zero-crossing detection threshold voltage at the end of the soft start. The logic module outputs a first drive signal based on the preset threshold voltage after each adjustment and a first voltage, so as to drive the lower transistor to turn off when the first voltage reaches the preset threshold voltage after each adjustment. The preset threshold voltage indicates that the switching circuit operates in a forced continuous conduction mode. The first voltage is a voltage generated based on the current flowing through the lower transistor.

2. The mode switching circuit according to claim 1, characterized in that, The control module includes a counter, and the n-bit output of the counter is connected to the threshold switching module; where n is a natural number greater than zero. The counter is used to receive a first clock signal and output an n-bit logic control signal with a fixed time interval and a regular change according to the first clock signal.

3. The mode switching circuit according to claim 2, characterized in that, The threshold switching module includes a current source, a first resistor, n second resistors, and n transistors. The input terminal of the current source receives the power supply voltage, and the output terminal of the current source is connected to the first terminal of the first resistor. The n second resistors are connected in series, and the weights of the n second resistors are 2 in each order. n -1 2 n-2 、……、2 0 Each second resistor is connected in parallel with a transistor. The second end of the first resistor is connected to the first end of the nth second resistor. The second end of the first second resistor is grounded. The gates of the n transistors receive n-bit logic control signals.

4. The mode switching circuit according to claim 1 or 2, characterized in that, The logic module includes a comparison unit and a logic unit. The comparison unit is connected to the threshold switching module and the logic unit respectively. The logic unit is also used to connect to the control terminal of the lower tube. The comparison unit is used to receive a first voltage and output a first comparison signal according to the preset threshold voltage adjusted each time and the first voltage; the logic unit is used to receive a second clock signal and output a first drive signal according to the second clock signal and the changing first comparison signal, so as to drive the lower transistor to turn off when the first voltage reaches the preset threshold voltage adjusted each time.

5. The mode switching circuit according to claim 4, characterized in that, The comparison unit includes a first comparator, a first input terminal of which receives a first voltage, a second input terminal of which receives a preset threshold voltage after each adjustment, and an output terminal of which is connected to the logic unit.

6. The mode switching circuit according to claim 5, characterized in that, The comparison unit further includes a first current sampling subunit, which is connected to the first input terminal of the first comparator and is also used to connect to the switching node of the switching conversion circuit. The first current sampling subunit is used to collect the current flowing through the lower transistor and output a first voltage based on the current flowing through the lower transistor.

7. The mode switching circuit according to claim 4, characterized in that, The logic unit includes an error amplifier, a second comparator, and a logic control subunit. The first input terminal of the error amplifier is connected to the feedback node in the switching circuit to receive a feedback voltage. The second input terminal of the error amplifier receives a reference voltage. The output terminal of the error amplifier is connected to the first input terminal of the second comparator, and the second input terminal of the second comparator receives a second voltage. The logic control subunit is connected to both the comparator and the output terminal of the second comparator. The logic control subunit is also connected to the control terminals of the upper and lower transistors in the switching circuit. The second voltage is generated based on the current flowing through the upper transistor. The logic control subunit is configured to receive a second clock signal and output a first drive signal based on the second clock signal and a changing first comparison signal, so as to drive the lower transistor to turn off when the first voltage reaches a preset threshold voltage after each adjustment; the error amplifier is configured to output an error voltage based on the feedback voltage and the reference voltage; the second comparator is configured to output a second comparison signal based on the second voltage and the error voltage; the logic control subunit is further configured to output a second drive signal based on the second clock signal and the second comparison signal, so as to drive the upper transistor to turn off when the second voltage reaches the error voltage.

8. The mode switching circuit according to claim 7, characterized in that, The logic unit further includes a second current sampling subunit, which is connected to the second input terminal of the second comparator and is also used to connect to the switching node of the switching conversion circuit. The second current sampling subunit is used to sample the current flowing through the upper tube and output a second voltage based on the current flowing through the upper tube.

9. A switching power supply chip, characterized in that, Includes the mode switching circuit as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes the switching power supply chip as described in claim 9.

Citation Information

Patent Citations

  • Switching converter, control method thereof and controller

    CN108964439A

  • DC converter, control method, switching power supply, chip and electronic equipment

    CN116207983A

  • Control circuit, control chip, control system and voltage converter

    CN119171743A

  • Synchronous rectifier circuit and its control method

    JP2008048468A

  • Circuit and system with soft-start functionality

    US20120126765A1