Mode switching circuit, switching power supply chip and electronic device

Abstract

The application belongs to the field of electronic circuits and provides a mode switching circuit, a switching power supply chip and an electronic device. The circuit comprises a control module, a threshold switching module and a logic module; the threshold switching module is connected with the control module and the logic module respectively, and the logic module is further connected with the control end of a lower tube in a switching conversion circuit. The control module outputs a logic control signal with a fixed time interval and regular variation when the buffer start time reaches a preset time; the threshold switching module adjusts the preset threshold voltage every time a logic control signal is received, until the preset threshold voltage is adjusted to a zero-crossing detection threshold voltage at the end of the buffer start; and the logic module outputs a first driving signal according to the adjusted preset threshold voltage and a first voltage each time, so as to drive the lower tube to close when the first voltage reaches the adjusted preset threshold voltage each time. The application realizes smooth switching from the FCCM mode to the DCM mode through slow adjustment of the threshold voltage.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electronic circuits, and particularly relates to a mode switching circuit, a switching power supply chip and electronic equipment. BACKGROUND

[0002] In order to limit the inrush current of the switching power supply during startup, the switching power supply is provided with a soft start to limit the inrush current, so as to realize a controllable power-on process of the output voltage. If the switching power supply adopts an FCCM (Force Continuous Conduction Mode) mode, the soft start phase can realize a linear rising process of the output voltage. However, for a DCM (Discontinuous Conduction Mode) mode with zero current detection, due to the limitation of the DCM mode, the output voltage will have a large overshoot in the early stage of the soft start phase because the initial value of the output voltage is 0 and the inductor current cannot be negative, and thus a small step phenomenon occurs, so that there is a nonlinear part in the entire soft start phase. If the FCCM mode is adopted in the soft start phase, the DCM mode in the normal working state is switched at the end of the soft start phase, and due to the difference in the control of the peak current in the two modes, a glitch will be generated near the switching point of the output voltage, so that the switching cannot be smoothly switched. SUMMARY

[0003] The embodiments of the application provide a mode switching circuit, a switching power supply chip and electronic equipment, which can solve the problem that if the FCCM mode is adopted in the soft start phase, the DCM mode in the normal working state is switched at the end of the soft start phase, and due to the difference in the control of the peak current in the two modes, a glitch will be generated near the switching point of the output voltage, so that the switching cannot be smoothly switched.

[0004] In a first aspect, the embodiments of the application provide a mode switching circuit, which comprises a control module, a threshold switching module and a logic module; the threshold switching module is connected with the control module and the logic module respectively, and the logic module is further used for being connected with a control end of a lower transistor in a switching conversion circuit.

[0005] The control module is configured to output a logic control signal with a fixed time interval and regular change when the soft start time reaches a preset time; the threshold switching module is configured to adjust a preset threshold voltage every time a logic control signal is received until the preset threshold voltage is adjusted to a zero-crossing detection threshold voltage at the end of the soft start; and the logic module is configured to output a first driving signal according to the preset threshold voltage adjusted each time and the first voltage to drive the lower tube to be closed when the first voltage reaches the preset threshold voltage adjusted each time, wherein the preset threshold voltage represents that the switching conversion circuit works in a forced continuous conduction mode, and the first voltage is a voltage generated according to a current flowing through the lower tube.

[0006] In a possible implementation of the first aspect, the control module comprises a counter, and an n-bit output end of the counter is connected to the threshold switching module, wherein n is a natural number greater than zero.

[0007] The counter is configured to receive a first clock signal and output an n-bit logic control signal with a fixed time interval and regular change according to the first clock signal.

[0008] In a possible implementation of the first aspect, the threshold switching module comprises a current source, a first resistor, n second resistors and n transistors, an input end of the current source receives a power supply voltage, an output end of the current source is connected to a first end of the first resistor, the n second resistors are connected in series in turn, and weights of the n second resistors are 2 n-1 , 2 n -2 , …, 2 0 in turn, each second resistor is connected in parallel with a transistor, a second end of the first resistor is connected to a first end of an nth second resistor, a second end of a first second resistor is grounded, and gates of the n transistors receive n-bit logic control signals.

[0009] In a possible implementation of the first aspect, the logic module comprises a comparison unit and a logic unit, the comparison unit is connected to the threshold switching module and the logic unit respectively, and the logic unit is further connected to a control end of the lower tube.

[0010] The comparison unit is configured to receive a first voltage and output a first comparison signal according to the preset threshold voltage adjusted each time and the first voltage; and the logic unit is configured to receive a second clock signal and output a first driving signal according to the second clock signal and the first comparison signal changing to drive the lower tube to be closed when the first voltage reaches the preset threshold voltage adjusted each time.

[0011] In a possible implementation manner of the first aspect, the comparison unit comprises a first comparator, a first input end of the first comparator receives the first voltage, a second input end of the first comparator receives the preset threshold voltage adjusted each time, and an output end of the first comparator is connected with the logic unit.

[0012] In a possible implementation manner of the first aspect, the comparison unit further comprises a first current sampling subunit, the first current sampling subunit is connected with the first input end of the first comparator, and the first current sampling subunit is further used to be connected with a switching node of the switching conversion circuit.

[0013] The first current sampling subunit is used to collect the current flowing through the lower tube and output the first voltage according to the current flowing through the lower tube.

[0014] In a possible implementation manner of the first aspect, the logic unit comprises an error amplifier, a second comparator and a logic control subunit, a first input end of the error amplifier is used to be connected with a feedback node in the switching conversion circuit to receive a feedback voltage, a second input end of the error amplifier receives a reference voltage, an output end of the error amplifier is connected with a first input end of the second comparator, a second input end of the second comparator receives a second voltage, and the logic control subunit is connected with output ends of the comparison unit and the second comparator respectively, and the logic control subunit is further used to be connected with a control end of the upper tube and a control end of the lower tube in the switching conversion circuit; wherein the second voltage is a voltage generated according to the current flowing through the upper tube.

[0015] The logic control subunit is used to receive a second clock signal and output a first driving signal according to the second clock signal and a changing first comparison signal, so as to drive the lower tube to be closed when the first voltage reaches the preset threshold voltage adjusted each time; the error amplifier is used to output an error voltage according to the feedback voltage and the reference voltage; the second comparator is used to output a second comparison signal according to the second voltage and the error voltage; and the logic control subunit is further used to output a second driving signal according to the second clock signal and the second comparison signal, so as to drive the upper tube to be closed when the second voltage reaches the error voltage.

[0016] In a possible implementation manner of the first aspect, the logic unit further comprises a second current sampling subunit, the second current sampling subunit is connected with the second input end of the second comparator, and the second current sampling subunit is further used to be connected with the switching node of the switching conversion circuit.

[0017] The second current sampling subunit is used to sample the current flowing through the upper tube and output the second voltage according to the current flowing through the upper tube.

[0018] In a second aspect, the embodiments of the present application provide a switching power supply chip, comprising the mode switching circuit according to any one of the first aspect.

[0019] In a third aspect, the embodiments of the present application provide an electronic device, comprising the switching power supply chip according to any one of the second aspect.

[0020] Compared with the prior art, the embodiments of the present application have the following beneficial effects:

[0021] The embodiments of the present application provide a mode switching circuit, comprising a control module, a threshold switching module and a logic module; the threshold switching module is connected with the control module and the logic module respectively, and the logic module is further connected with a control end of a lower tube in a switching conversion circuit.

[0022] When the slow start time reaches the preset time, it indicates that the slow start has started for a period of time, which also means that the threshold switching mechanism is started in the slow start process. At this time, the control module outputs a logic control signal with a fixed time interval and a regular change.

[0023] The threshold switching module is configured to adjust the preset threshold voltage each time a logic control signal is received, until the preset threshold voltage is adjusted to the zero-crossing detection threshold voltage at the end of the slow start. The preset threshold voltage indicates that the switching conversion circuit operates in the forced continuous conduction mode (FCCM). As can be seen, the threshold switching module slowly adjusts the preset threshold voltage by receiving the logic control signal with a regular change, and finally switches the preset threshold voltage to the zero-crossing detection threshold voltage at the end of the slow start, thereby ensuring that the switching conversion circuit operates in the FCCM mode during the slow start phase and smoothly switches to the DCM mode during the slow start process.

[0024] The logic module is configured to output a first driving signal according to the adjusted preset threshold voltage and a first voltage each time, so as to drive the lower tube to close when the first voltage reaches the adjusted preset threshold voltage each time, and finally realize a linear rising process of an output voltage. The first voltage is a voltage generated according to a current flowing through the lower tube.

[0025] In summary, through the cooperation between the control module, the threshold switching module and the logic module, the preset threshold voltage is slowly adjusted, which ensures that the switching conversion circuit operates in the FCCM mode during the slow start phase and smoothly switches to the DCM mode during the slow start process, and finally realizes the linear rising process of the output voltage.

[0026] It can be understood that the beneficial effects of the above-mentioned second aspect to the third aspect can be referred to the related description in the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor based on these drawings.

[0028] Figure 1 is a topological structure diagram of a buck switching power supply (BUCK);

[0029] Figure 2 is a waveform schematic diagram of a buck switching power supply;

[0030] Figure 3 is a waveform schematic diagram of an output voltage of a buck switching power supply in a DCM mode in a soft-start stage;

[0031] Figure 4 is a waveform schematic diagram of an output voltage of a buck switching power supply in a FCCM mode in a soft-start stage and directly switched to a DCM mode subsequently;

[0032] Figure 5 is a principle diagram of a mode switching circuit provided by an embodiment of the present application;

[0033] Figure 6 is a principle diagram of a mode switching circuit provided by another embodiment of the present application;

[0034] Figure 7 is a circuit connection schematic diagram of a mode switching circuit provided by an embodiment of the present application;

[0035] Figure 8 is a circuit connection schematic diagram of a mode switching circuit provided by another embodiment of the present application;

[0036] Figure 9 is a waveform schematic diagram of a buck switching power supply without completing mode switching by using a mode switching circuit provided by an embodiment of the present application;

[0037] Figure 10 is a waveform schematic diagram of a buck switching power supply completing mode switching by using a mode switching circuit provided by an embodiment of the present application.

[0038] In the figure: 10, mode switching circuit; 11, control module; 111, counter; 12, threshold switching module; 13, logic module; 131, comparison unit; 1311, first current sampling subunit; 132, logic unit; 1321, logic control subunit; 1322, second current sampling subunit; 20, switching conversion circuit. DETAILED DESCRIPTION

[0039] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known methods, devices, circuits, and

[0040] It is to be understood that the terminology "includes", "has", "holds", "contains" or "comprising", "including", "having" and the like, when used in the present specification and in the accompanying claims, are used in the sense of "including but not limited to", "including but not limited to", "including but not limited to" and "including but not limited to" respectively, and should be construed as specifically setting forth the stated features, integers, steps or components but not precluding one or more additional features, integers, steps, components and / or groups thereof.

[0041] It is also to be understood that the terminology "and / or" when used in the present specification and in the accompanying claims, refers to one and / or all possible combinations of one or more of the associated listed items.

[0042] As used in the present specification and in the accompanying claims, the term "if" can be interpreted as meaning "when" or "once" or "in response to a determination" or "in response to detecting" depending on the context. Similarly, the phrase "if it is determined" or "if [a described condition or event] is detected" can be interpreted to mean "once it is determined" or "in response to a determination" or "once [the described condition or event] is detected" or "in response to detecting [the described condition or event]" depending on the context.

[0043] In addition, the terms "first", "second", "third", etc. in the description of the present specification and the accompanying claims are only used to distinguish descriptions, and cannot be understood as indicating or implying relative importance.

[0044] Reference in the specification to "one embodiment" or "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment" or "in some embodiments" in various places in the specification are not necessarily all referring to the same embodiment, although it can. The terms "comprising", "including", "having" and the like are meant to be interpreted as "including but not limited to" unless otherwise specifically noted.

[0045] In order to limit the inrush current of the switching power supply at the start, the switching power supply will set the soft start to limit the inrush current, so as to realize the controllable power-on process of the output voltage. If the switching power supply adopts the FCCM mode, the soft start stage can realize the linear rising process of the output voltage. However, for the DCM mode with zero current detection, due to the limitation of the DCM mode, the output voltage will have a large overshoot in the early stage of the soft start because the initial value of the output voltage is 0 and the inductance current cannot be negative, and then a small step phenomenon will occur, so there is a nonlinear part in the whole soft start stage. If the FCCM mode is adopted in the soft start stage, and the DCM mode under the normal working state is switched at the end of the soft start, the difference in the peak current control of the two modes will cause the output voltage to have a glitch near the switching point and cannot be smoothly switched.

[0046] The switching logic of the buck switching power supply will be described below taking the peak current mode controlled buck switching power supply as an example. Figure 1 The topology structure of the buck switching power supply (BUCK) is shown in FIG. 1. Figure 1 As shown in FIG. 1, the buck switching power supply comprises an upper tube S1, a lower tube S2, an inductor L, a capacitor C, a first feedback resistor R FB1 , a second feedback resistor R FB2 , an error amplifier EA, a comparator CMP, a logic control part and a current sampling part. Among them, the upper tube S1 and the lower tube S2 are called power tubes; the voltage VIN is the input voltage; the inductance current is represented by I_LX; the clock is the clock signal of the logic control part; the common end of the upper tube S1, the lower tube S2 and the inductor L is called the switching node LX; the common end of the first feedback resistor R FB1 and the second feedback resistor R FB2 is called the feedback node FB, and the voltage at this node is the feedback voltage VFB; the common end of the inductor L, the capacitor C and the first feedback resistor R FB1 is called the output node, and the voltage at this node is the output voltage VOUT.

[0047] The waveform of the buck switching power supply is shown in FIG. 2. Figure 2 As shown in FIG. 2, the rising edge of the clock signal clock triggers the opening of the upper tube S1, and the level at the switching node LX becomes high; at the same time, the sampling signal of the inductance current I_LX is converted into a voltage signal VSUM, which is compared with the error voltage V EA output by the error amplifier EA, and the upper tube S1 is closed at the intersection of the two, and then the lower tube S2 is controlled to be turned on, and the level at the switching node LX becomes low, and the upper tube S1 is triggered to be opened again by the next clock edge, thereby forming a complete switching period control. Figure 2 VSUM DC value in FIG. 2 represents the voltage value of the voltage signal VSUM during the conduction of the lower tube S2.

[0048] At the initial stage of the soft start, the initial value of the output voltage VOUT is 0, resulting in a small slope of the inductor current I_LX, and the switch power supply performs switching operation with the minimum duty cycle due to the current limiting effect of the soft start. During this period, the inductor current I_LX continuously rises, the output voltage VOUT is charged and is higher than the preset voltage in the soft start stage, until the average current of the inductor current I_LX approaches the average charging current in the soft start stage, and then the linear soft start stage can be entered.

[0049] Due to the minimum pulse width limitation, the inductor current I_LX continuously rises, and the loop feedback mechanism needs response time, thereby causing the output voltage VOUT to overshoot and then recover to the soft start climbing rate (i.e., a small step occurs), so that the initial stage of the soft start appears a similar non-linear interval as shown in Figure 3 I_inrush in the figure is the overshoot current. Figure 3

[0050] In the FCCM mode, the inductor current I_LX can be reversed, so it can continuously change; when the output voltage VOUT is slightly overshoot, the feedback loop maintains the smooth rise of the output voltage VOUT by controlling the output reverse discharge.

[0051] But if the FCCM mode is used to solve the non-linear interval caused by the loop response at the initial stage of the soft start, and the DCM mode is switched at the middle or end of the soft start, since the FCCM mode has negative current, to reach the same output voltage rising rate (i.e., the same average output current) as the DCM mode, the peak current of the FCCM mode is higher than that of the DCM mode. Then, due to the control mechanism and the response rate limitation of the loop, the output voltage VOUT is overcharged to generate a glitch at the switching moment, as shown in Figure 4 .

[0052] In view of the problem that the FCCM mode is used in the soft start stage, and the DCM mode is directly switched subsequently, resulting in the glitch of the output voltage, an embodiment of the present application provides a mode switching circuit, as shown in Figure 5 The mode switching circuit 10 includes a control module 11, a threshold switching module 12 and a logic module 13; the threshold switching module 12 is connected with the control module 11 and the logic module 13, and the logic module 13 is further connected with the control end of the lower tube S2 in the switch conversion circuit 20.

[0053] ​Specifically, when the slow start time reaches the preset time, it indicates that the slow start has started for a period of time, and also means that the application starts the threshold switching mechanism in the slow start process. At this time, the control module 11 outputs a logic control signal with a fixed time interval and a regular change. It should be noted that in the present application, the preset time can be set to the time when the slow start is in the middle stage. Of course, it can also be flexibly adjusted according to the actual application scene. The fixed time interval should match the loop response speed of the system, and can be adjusted according to the actual situation, but it needs to be ensured that it is greater than the switching period of the switching conversion circuit 20.

[0054] The threshold switching module 12 is used to adjust the preset threshold voltage every time a logic control signal is received, until the preset threshold voltage is adjusted to the zero-crossing detection threshold voltage at the end of the slow start. Wherein, the preset threshold voltage represents that the switching conversion circuit 20 works in the forced continuous conduction mode, and its specific value can be flexibly set according to the actual application scene. As can be seen, the threshold switching module 12 slowly adjusts the preset threshold voltage by receiving the logic control signal with a regular change, and finally realizes the switching of the preset threshold voltage to the zero-crossing detection threshold voltage at the end of the slow start, thereby ensuring that the switching conversion circuit 20 works in the FCCM mode during the slow start stage, and smoothly switches to the DCM mode during the slow start process. It should be noted that the adjustment of the preset threshold voltage corresponds to the adjustment of the current limit value. For example, the current limit value is -1A in the FCCM mode, which is converted to the preset threshold voltage; the current limit value is 0A in the DCM mode, which is converted to the zero-crossing detection threshold voltage; the current limit value is slowly adjusted from -1A to 0A through the logic control signal with a regular change, thereby slowly changing the duty cycle of the power tube, and realizing the smooth switching from FCCM mode to DCM mode.

[0055] The logic module 13 is used to output a first drive signal according to the preset threshold voltage adjusted each time and the first voltage V1, so as to drive the lower tube S2 to close when the first voltage V1 reaches the preset threshold voltage adjusted each time, and finally realize the linear rising process of the output voltage VOUT. Wherein, the first voltage V1 is a voltage generated according to the current flowing through the lower tube S2.

[0056] In summary, through the cooperation between the control module 11, the threshold switching module 12 and the logic module 13, the preset threshold voltage is slowly adjusted, which ensures that the switching conversion circuit 20 works in the FCCM mode during the slow start stage, and smoothly switches to the DCM mode during the slow start process, avoids the problem of output voltage VOUT appearing burr when switching from FCCM mode to DCM mode directly, and finally realizes the linear rising process of the output voltage VOUT.

[0057] It should be noted that the application is not only applicable to the switching from the FCCM mode to the DCM mode in the soft-start process, but also applicable to other working processes. The circuit proposed in the application can still be used when the FCCM mode is switched to the DCM mode. It should be noted that the logic control signal needs to be generated separately. Since the application is in the soft-start stage, the related counting bits of the soft-start circuit can be reused, so the related circuit size will not be increased.

[0058] As shown in Figure 6 , the logic module 13 includes a comparison unit 131 and a logic unit 132, the comparison unit 131 is connected with the threshold switching module 12 and the logic unit 132 respectively, and the logic unit 132 is further connected with the control end of the lower tube S2.

[0059] Specifically, the comparison unit 131 is configured to receive the first voltage V1, and output a first comparison signal ZCD according to the preset threshold voltage after each adjustment and the first voltage V1. The logic unit 132 is configured to receive the second clock signal clk2, and output a first driving signal according to the second clock signal clk2 and the first comparison signal ZCD, so as to drive the lower tube S2 to be closed when the first voltage V1 reaches the preset threshold voltage after each adjustment.

[0060] As shown in Figure 7 , the control module 11 includes a counter 111, and an n-bit output end of the counter is connected with the threshold switching module 12; wherein n is a natural number greater than zero.

[0061] Specifically, the counter 111 is configured to receive the first clock signal clk1, and output n-bit logic control signals Qn-1, Qn-2, …, Q0 with fixed time intervals and regular changes according to the first clock signal clk1. The n-bit logic control signals Qn-1, Qn-2, …, Q0 are binary coded signals, and they change regularly, for example: from 0, 0, …, 0 to 0, 0, …, 1, and so on, eventually to 1, 1, …, 1, and each logic control signal Qn-1, Qn-2, …, Q0 is output at a fixed interval. The more bits of the logic control signals Qn-1, Qn-2, …, Q0, the more stable the threshold adjustment process, so in actual application, the number of bits of the counter 111 can be set according to the demand.

[0062] It should be noted that the first clock signal clk1 is the clock signal in the soft-start stage. The counter 111 directly uses the existing counter in the soft-start circuit, without the need for additional reconfiguration, effectively reducing the design complexity, area and cost of the circuit.

[0063] As shown in Figure 7As shown, the comparison unit 131 includes a first comparator CMP1, a first input end of the first comparator CMP1 receives the first voltage, a second input end of the first comparator CMP1 receives the preset threshold voltage after each adjustment, and an output end of the first comparator CMP1 is connected with the logic unit 132.

[0064] As shown in the figure, Figure 8 the comparison unit 131 further includes a first current sampling sub-unit 1311, the first current sampling sub-unit 1311 is connected with the first input end of the first comparator CMP1, and the first current sampling sub-unit 1311 is further used for being connected with the switching node LX of the switching conversion circuit 20.

[0065] Specifically, the first current sampling sub-unit 1311 is used for collecting the current flowing through the lower tube S2 and outputting the first voltage V1 according to the current flowing through the lower tube S2.

[0066] As shown in the figure, Figure 7 the threshold switching module 12 includes a current source, a first resistor R1, n second resistors R2 and n transistors, an input end of the current source receives the power supply voltage VDD, an output end of the current source is connected with a first end of the first resistor R1, the n second resistors R2 are connected in series in turn, and the weights of the n second resistors R2 are 2 n-1 , 2 n-2 , …, 2 0 respectively, each second resistor R2 is connected in parallel with a transistor, a second end of the first resistor R1 is connected with a first end of the nth second resistor R2, a second end of the first second resistor R2 is grounded, and the gates of the n transistors receive n-bit logic control signals Qn-1, Qn-2, …, Q0.

[0067] Specifically, the threshold switching module 12 slowly changes the resistance value according to the n-bit logic control signals Qn-1, Qn-2, …, Q0 which change regularly, thereby slowly adjusts the preset threshold voltage, and adjusts the preset threshold voltage to the zero-crossing detection threshold voltage VZCD at the end of the slow start. For example: assuming that the resistance value of the second resistor R2 is r, when the logic control signals Qn-1, Qn-2, …, Q0 are 0, 0, …, 0, the n transistors are all in the off state, so that the n second resistors R2 are all connected, and at this time the resistance value is the largest; when the logic control signals Qn-1, Qn-2, …, Q0 are 0, 0, …, 1, the transistor connected in parallel with the first second resistor R2 is turned on, so that the first second resistor R2 is short-circuited, and the resistance value is reduced by r*2 0 , that is, r; when the logic control signals Qn-1, Qn-2, …, Q0 are 0, 0, …, 1, 0, the transistor connected in parallel with the second second resistor R2 is turned on, so that the second second resistor R2 is short-circuited, and the resistance value is reduced by r*2 1, i.e. 2r; when the logic control signals Qn-1, Qn-2, …, Q0 are 0, 0, …, 1, 1, the transistor in parallel with the first second resistor R2 and the transistor in parallel with the second second resistor R2 are both turned on, so the first second resistor R2 and the second second resistor R2 are both short-circuited, and the resistance is reduced by r*2 0 + r*2 1 , i.e. 3r, and so on. Thus, the threshold switching module 12 reduces the resistance by r for each received logic control signal Qn-1, Qn-2, …, Q0, so that the preset threshold voltage can be smoothly and slowly adjusted.

[0068] The adjustment direction of the preset threshold voltage (from small to large or from large to small) depends on the polarity of the preset threshold voltage input into the first comparator CMP1 and the relationship between the first voltage V1 and the current flowing through the lower transistor S2. For example, if the first voltage V1 is proportional to the current flowing through the lower transistor S2, and the preset threshold voltage is input into the positive input terminal of the first comparator CMP1, then the adjustment direction of the preset threshold voltage is from small to large, and the corresponding current limit value also gradually increases. If the first voltage V1 is inversely proportional to the current flowing through the lower transistor S2, and the preset threshold voltage is input into the negative input terminal of the first comparator CMP1, then the adjustment direction of the preset threshold voltage is from large to small, and the corresponding current limit value gradually increases. In actual application, the adjustment direction of the preset threshold voltage can be determined according to specific scene requirements, which is not limited in the present application.

[0069] As shown in Figure 7 , the logic unit 132 includes an error amplifier EA, a second comparator CMP2, and a logic control subunit 1321. The first input terminal of the error amplifier EA is connected with the feedback node FB in the switching conversion circuit 20 to receive the feedback voltage VFB, the second input terminal of the error amplifier EA receives the reference voltage VREF, the output terminal of the error amplifier EA is connected with the first input terminal of the second comparator CMP2, the second input terminal of the second comparator CMP2 receives the second voltage V2, and the logic control subunit 1321 is connected with the output terminals of the comparison unit 131 and the second comparator CMP2. The logic control subunit 1321 is also connected with the control terminals of the upper transistor S1 and the lower transistor S2 in the switching conversion circuit 20. The second voltage V2 is a voltage generated according to the current flowing through the upper transistor S1.

[0070] Specifically, the logic control subunit 1321 is configured to receive the second clock signal clk2, and output a first driving signal according to the second clock signal clk2 and the changed first comparison signal ZCD, so as to drive the lower transistor S2 to be closed when the first voltage V1 reaches the preset threshold voltage after each adjustment.

[0071] Error amplifier EA is used to output error voltage V based on feedback voltage VFB and reference voltage VREF. EA The second comparator CMP2 is used to determine the voltage based on the second voltage V2 and the error voltage V. EA Output a second comparison signal; the logic control subunit 1321 is also used to output a second drive signal according to the second clock signal clk2 and the second comparison signal, so as to achieve the error voltage V at the second voltage V2. EA When the drive tube S1 is turned off.

[0072] like Figure 8 As shown, the logic unit 132 also includes a second current sampling subunit 1322, which is connected to the second input terminal of the second comparator CMP2. The second current sampling subunit 1322 is also used to connect to the switching node LX of the switching conversion circuit 20.

[0073] Specifically, the second current sampling subunit 1322 is used to sample the current flowing through the upper tube S1 and output the second voltage V2 based on the current flowing through the upper tube S1.

[0074] Figure 9 The diagram shows a waveform of mode switching performed without the mode switching circuit 10 provided in the embodiments of this application. From... Figure 9 It can be seen that the rectangular area represents the non-linear region resulting from mode switching; it should be noted that... Figure 9 The waveforms shown are all idealized results. In reality, the switching process will have multiple cycles and over-adjustment stages depending on the response speed and phase margin of the actual circuit.

[0075] Figure 10 The diagram shows the waveform of mode switching performed using the mode switching circuit 10 provided in the embodiment of this application. From... Figure 10 As can be seen, the rectangular area represents the gradual transition of the first comparison signal ZCD, i.e., the switching process from FCCM mode to DCM mode. This application achieves a smooth switching from FCCM mode to DCM mode by slowly adjusting the threshold, ultimately realizing a linear increase in the output voltage VOUT. By adjusting the fixed time interval according to the system's loop response speed, the step size and duration of the first comparison signal ZCD are adjusted to achieve a linear increase in the output voltage VOUT during the soft-start phase.

[0076] In summary, the mode switching circuit 10 provided by the embodiment of the present application adjusts the preset threshold voltage slowly by cooperation between the control module 11, the threshold switching module 12 and the logic module 13, ensures that the switching conversion circuit 20 works in the FCCM mode in the slow start stage, and smoothly switches to the DCM mode in the slow start process, avoids the problem of output voltage VOUT glitch when switching from the FCCM mode to the DCM mode directly, and finally realizes the linear rising process of the output voltage VOUT.

[0077] It should be noted that the peak current mode control is taken as an example for description, and adaptive modification can be made for other controls, such as voltage mode control, and the present application will not be described again.

[0078] The embodiment of the present application also provides a switching power supply chip, which comprises the mode switching circuit described above. Since the switching power supply chip provided by the embodiment of the present application adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described again one by one.

[0079] The embodiment of the present application also provides an electronic device, which comprises the switching power supply chip described above. Since the electronic device provided by the embodiment of the present application adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described again one by one. The electronic device provided by the embodiment of the present application can be any electronic device comprising the switching power supply chip described above.

[0080] In the above embodiments, the description of each embodiment has its own focus, and the parts not described or recorded in a certain embodiment can be referred to the related description of other embodiments.

[0081] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A mode switching circuit, characterized by comprising: The control module, the threshold switching module and the logic module are included; the threshold switching module is connected with the control module and the logic module respectively; the logic module is further connected with the control end of the lower tube in the switching circuit; The control module is used for outputting the logic control signal with fixed time interval and regular change when the soft start time reaches the preset time; the threshold switching module is used for adjusting the preset threshold voltage every time a logic control signal is received, until the preset threshold voltage is adjusted to the zero-crossing detection threshold voltage at the end of the soft start; the logic module is used for outputting the first drive signal according to the adjusted preset threshold voltage and the first voltage, so as to drive the lower tube to close when the first voltage reaches the adjusted preset threshold voltage; wherein, the preset threshold voltage represents that the switching circuit works in the forced continuous conduction mode; the first voltage is the voltage generated according to the current flowing through the lower tube.

2. The mode switching circuit of claim 1, wherein, The control module includes a counter, and an n-bit output end of the counter is connected with the threshold switching module; wherein, n is a natural number greater than zero; The counter is used for receiving a first clock signal and outputting an n-bit logic control signal with fixed time interval and regular change according to the first clock signal.

3. The mode switching circuit of claim 2, wherein, The threshold switching module includes a current source, a first resistor, n second resistors, and n transistors. The input terminal of the current source receives the power supply voltage, and the output terminal of the current source is connected to the first terminal of the first resistor. The n second resistors are connected in series, and the weights of the n second resistors are 2 in each order. n -1 2 n-2 、……、2 0 Each second resistor is connected in parallel with a transistor. The second end of the first resistor is connected to the first end of the nth second resistor. The second end of the first second resistor is grounded. The gates of the n transistors receive n-bit logic control signals.

4. The mode switching circuit according to claim 1 or 2, characterized by The logic module includes a comparison unit and a logic unit, the comparison unit is connected with the threshold switching module and the logic unit respectively, and the logic unit is further connected with the control end of the lower tube; The comparison unit is used for receiving the first voltage and outputting the first comparison signal according to the adjusted preset threshold voltage and the first voltage; the logic unit is used for receiving a second clock signal and outputting the first drive signal according to the second clock signal and the changed first comparison signal, so as to drive the lower tube to close when the first voltage reaches the adjusted preset threshold voltage.

5. The mode switching circuit of claim 4, wherein, The comparison unit includes a first comparator, a first input end of the first comparator receives the first voltage, a second input end of the first comparator receives the adjusted preset threshold voltage, and an output end of the first comparator is connected with the logic unit.

6. The mode switching circuit of claim 5, wherein, The comparison unit further includes a first current sampling subunit, the first current sampling subunit is connected with the first input end of the first comparator, and the first current sampling subunit is further connected with the switching node of the switching circuit; The first current sampling subunit is used for sampling the current flowing through the lower tube and outputting the first voltage according to the current flowing through the lower tube.

7. The mode switching circuit of claim 4, wherein, The logic unit comprises an error amplifier, a second comparator and a logic control subunit, a first input end of the error amplifier is connected with a feedback node in the switching conversion circuit to receive a feedback voltage, a second input end of the error amplifier receives a reference voltage, an output end of the error amplifier is connected with a first input end of the second comparator, a second input end of the second comparator receives a second voltage, the logic control subunit is connected with outputs of the comparison unit and the second comparator respectively, and the logic control subunit is also connected with control ends of an upper tube and a lower tube in the switching conversion circuit; wherein the second voltage is a voltage generated according to a current flowing through the upper tube. The logic control subunit is configured to receive a second clock signal and output a first driving signal according to the second clock signal and a changed first comparison signal, so as to drive the lower tube to be closed when the first voltage reaches a preset threshold voltage after each adjustment; the error amplifier is configured to output an error voltage according to the feedback voltage and the reference voltage; the second comparator is configured to output a second comparison signal according to the second voltage and the error voltage; and the logic control subunit is further configured to output a second driving signal according to the second clock signal and the second comparison signal, so as to drive the upper tube to be closed when the second voltage reaches the error voltage.

8. The mode switching circuit of claim 7, wherein, The logic unit further comprises a second current sampling subunit, the second current sampling subunit is connected with the second input end of the second comparator, and the second current sampling subunit is also connected with a switching node of the switching conversion circuit. The second current sampling subunit is configured to sample a current flowing through the upper tube and output the second voltage according to the current flowing through the upper tube.

9. A switching power supply chip, characterized by comprising: The mode switching circuit comprises any one of claims 1-8.

10. An electronic device, comprising: The switching power supply chip comprises claim 9.

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