Video signal processing method and device

Abstract

The invention provides a video signal processing method and equipment. A video signal decoding apparatus includes a processor that: decodes a general constraint information (GCI) syntax included in a bitstream of a video signal; and decoding the bitstream based on a result of decoding the GCI syntax, where the GCI syntax includes a GCI syntax element for configuring a value of an SPS syntax element indicating whether a palette mode included in a sequence parameter set (SPS) original byte sequence payload (RBSP) syntax is likely to be used.

Description

[0001] This application is a divisional application of patent application No. 202080052114.4 (PCT / KR2020 / 009562), filed on January 8, 2022, with a filing date of July 20, 2020, entitled "Video Signal Processing Method and Apparatus". Technical Field

[0002] This disclosure relates to a video signal processing method and apparatus, and more specifically, to a video signal processing method and apparatus for encoding or decoding video signals. Background Technology

[0003] Compression encoding refers to a series of signal processing techniques used to transmit digitized information over communication lines or to store information in a form suitable for storage media. The objects of compression encoding include objects such as speech, video, and text, and in particular, techniques used to perform compression encoding on images are called video compression. Compression encoding of video signals is performed by removing excess information, taking into account spatial, temporal, and random correlations. However, with the recent development of various media and data transmission media, there is a need for more efficient video signal processing methods and devices. Summary of the Invention

[0004] Technical issues

[0005] The purpose of this invention is to increase the compilation efficiency of video signals.

[0006] The purpose of this invention is to increase the efficiency of video signal compilation by configuring general constraint information.

[0007] Technical solution

[0008] This specification provides a method for processing video signals using a quadratic transform.

[0009] Specifically, the video signal decoding device includes a processor that decodes a General Constraint Information (GCI) syntax included in a bitstream of a video signal, and decodes the bitstream based on the decoding result of the GCI syntax. The GCI syntax is included in at least one of a Decoding Parameter Set (DPS) Raw Byte Sequence Payload (RBSP) syntax, a Sequence Parameter Set (SPS) RBSP syntax, and a Video Parameter Set (VPS) RBSP syntax. The DPS RBSP syntax and the VPS RBSP syntax are higher-level syntaxes than the GCI syntax and include syntax elements for video decoding. The SPS RBSP syntax is a higher-level syntax than the GCI syntax and includes syntax elements associated with the sequence as a set of pictures. The GCI syntax includes GCI syntax elements for configuring the value of an SPS syntax element indicating whether a palette mode included in the SPS RBSP syntax is possible, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that the palette mode is not used.

[0010] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-frame prediction with multiple reference lines, included in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-frame prediction with multiple reference lines is not used.

[0011] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-prediction with sub-partitions included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-prediction with sub-partitions is not used.

[0012] Furthermore, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether matrix-based intra-prediction may be used in the SPS RBSP syntax, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that matrix-based intra-prediction is not used.

[0013] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether the low-frequency inseparable transform included in the SPS RBSP syntax is possible, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that the low-frequency inseparable transform is not used.

[0014] Furthermore, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether a merge mode with motion vector difference, included in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that a merge mode with motion vector difference is not used.

[0015] Similarly, in this specification, the GCI syntax element configuration included in the GCI syntax indicates whether the value of the SPS syntax element, which includes the symmetric motion vector difference in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that the symmetric motion vector difference is not used.

[0016] Similarly, in this specification, the GCI syntax element configuration included in the GCI syntax indicates whether the value of the SPS syntax element with chroma scaling luminance mapping included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that chroma scaling luminance mapping is not used.

[0017] Additionally, a video signal encoding device includes a processor that obtains a General Constraint Information (GCI) syntax and encodes a bitstream including the GCI syntax. The GCI syntax is included in at least one of a Decoding Parameter Set (DPS) Raw Byte Sequence Payload (RBSP) syntax, a Sequence Parameter Set (SPS) RBSP syntax, and a Video Parameter Set (VPS) RBSP syntax. The DPS RBSP and VPS RBSP syntaxes are higher-level syntaxes than the GCI syntax and include syntax elements for video decoding. The SPS RBSP syntax is also a higher-level syntax than the GCI syntax and includes syntax elements associated with the sequence as a set of pictures. The GCI syntax includes GCI syntax elements for configuring the value of an SPS syntax element indicating whether a palette mode included in the SPS RBSP syntax is possible. When the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that a palette mode is not used.

[0018] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-frame prediction with multiple reference lines, included in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-frame prediction with multiple reference lines is not used.

[0019] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-prediction with sub-partitions included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-prediction with sub-partitions is not used.

[0020] Furthermore, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether matrix-based intra-prediction may be used in the SPS RBSP syntax, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that matrix-based intra-prediction is not used.

[0021] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether the low-frequency inseparable transform included in the SPS RBSP syntax is possible, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that the low-frequency inseparable transform is not used.

[0022] Furthermore, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether a merge mode with motion vector difference, included in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that a merge mode with motion vector difference is not used.

[0023] Similarly, in this specification, the GCI syntax element configuration included in the GCI syntax indicates whether the value of the SPS syntax element, which includes the symmetric motion vector difference in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that the symmetric motion vector difference is not used.

[0024] Similarly, in this specification, the GCI syntax element configuration included in the GCI syntax indicates whether the value of the SPS syntax element with chroma scaling luminance mapping included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that chroma scaling luminance mapping is not used.

[0025] Similarly, in this specification, a non-transitory computer-readable medium for storing bitstreams encodes the bitstreams using an encoding method comprising the steps of: obtaining a General Constraint Information (GCI) syntax and encoding the bitstream including the GCI syntax, wherein the GCI syntax is included in at least one of a Decoding Parameter Set (DPS) Raw Byte Sequence Payload (RBSP) syntax, a Sequence Parameter Set (SPS) RBSP syntax, and a Video Parameter Set (VPS) RBSP syntax, wherein the DPS RBSP syntax and the VPS RBSP syntax are higher-level syntaxes than the GCI syntax and include syntax elements for video decoding, the SPS RBSP syntax is a higher-level syntax than the GCI syntax and includes syntax elements associated with the sequence as a set of pictures, the GCI syntax includes GCI syntax elements for configuring the values ​​of SPS syntax elements that indicate whether a palette mode included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that a palette mode is not used.

[0026] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-frame prediction with multiple reference lines, included in the SPS RBSP syntax, may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-frame prediction with multiple reference lines is not used.

[0027] Similarly, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether intra-prediction with sub-partitions included in the SPS RBSP syntax may be used, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that intra-prediction with sub-partitions is not used.

[0028] Furthermore, in this specification, the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element that indicates whether matrix-based intra-prediction may be used in the SPS RBSP syntax, and when the value of the GCI syntax element is 1, the value of the SPS syntax element is set to 0, which is a value indicating that matrix-based intra-prediction is not used.

[0029] Function of the present invention

[0030] Embodiments of the present invention provide a video signal processing method and apparatus using general constraint information. Attached Figure Description

[0031] Figure 1 This is a schematic block diagram of a video signal encoding apparatus according to an embodiment of the present invention.

[0032] Figure 2 This is a schematic block diagram of a video signal decoding apparatus according to an embodiment of the present invention.

[0033] Figure 3 This illustrates an example where the compiler tree unit is divided into compiler units in the image.

[0034] Figure 4 An embodiment of a method for sending partitions of quadtrees and multi-type trees using signals is shown.

[0035] Figure 5 and Figure 6 The intra-frame prediction method is illustrated in more detail according to embodiments of the present disclosure.

[0036] Figure 7 This is a diagram illustrating a network abstraction layer unit according to an embodiment of the present invention, which is a basic unit for configuring bit streams.

[0037] Figure 8 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0038] Figures 9 to 11 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0039] Figure 12 This is a diagram illustrating the sequence parameter set RBSP syntax according to an embodiment of the present invention.

[0040] Figures 13 to 16 This is a diagram illustrating the general constraint information syntax according to an embodiment of the present invention.

[0041] Figure 17 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0042] Figures 18 to 21 This is a diagram illustrating the general constraint information syntax according to an embodiment of the present invention.

[0043] Figure 22 This is a diagram illustrating the compiler tree unit syntax according to an embodiment of the present invention.

[0044] Figure 23 This is a diagram illustrating the positional relationships of the most probable modes (MPMs) required for deriving intra-frame prediction modes according to an embodiment of the present invention.

[0045] Figure 24 This is a diagram illustrating the relationship between the corresponding luminance blocks required for deriving the chromaticity DM mode according to an embodiment of the present invention. Detailed Implementation

[0046] Considering the functions of this disclosure, the terminology used in this specification may be currently widely used and common, but may change according to the intent, practice, or emergence of new technologies of those skilled in the art. Additionally, in some cases, terms may be arbitrarily chosen by the applicant, and in such cases, their meanings are described in the corresponding descriptive sections of this disclosure. Therefore, the terminology used in this specification should be interpreted based on its substantive meaning throughout the specification.

[0047] In this specification, some terms may be interpreted as follows. In some cases, compilation can be interpreted as encoding or decoding. In this specification, an apparatus that generates a video signal bitstream by performing encoding (compilation) of a video signal is called an encoding apparatus or encoder, and an apparatus that performs decoding (decoding) of a video signal bitstream to reconstruct a video signal is called a decoding apparatus or decoder. Additionally, in this specification, video signal processing apparatus is used as a term encompassing both the concepts of encoder and decoder. Information is a term that includes all values, parameters, coefficients, elements, etc. In some cases, the meaning is interpreted differently, therefore this disclosure is not limited thereto. "Unit" is used to refer to the basic unit of image processing or a specific location in an image, and refers to an image region that includes both luminance and chrominance components. Additionally, "block" refers to an image region that includes a specific component among the luminance and chrominance components (i.e., Cb and Cr). However, depending on the embodiment, terms such as "unit," "block," "partition," and "region" may be used interchangeably. Furthermore, in this specification, "unit" can be used as a concept encompassing all compilation units, prediction units, and transformation units. The image refers to a field or frame, and according to embodiments, these terms may be used interchangeably.

[0048] Figure 1 This is a schematic block diagram of a video signal encoding apparatus according to an embodiment of the present invention. (Reference) Figure 1 The encoding device 100 of the present invention includes a transformation unit 110, a quantization unit 115, an inverse quantization unit 120, an inverse transformation unit 125, a filtering unit 130, a prediction unit 150, and an entropy compilation unit 160.

[0049] Transform unit 110 obtains the values ​​of transform coefficients by transforming the residual signal, which is the difference between the input video signal and the prediction signal generated by prediction unit 150. For example, discrete cosine transform (DCT), discrete sine transform (DST), or wavelet transform can be used. DCT and DST perform the transform by dividing the input image signal into multiple blocks. During the transform, the compilation efficiency can vary depending on the distribution and characteristics of the values ​​in the transform region. Quantization unit 115 quantizes the values ​​of the transform coefficients output from transform unit 110.

[0050] To improve compilation efficiency, instead of compiling the image signal as is, a method is used that predicts the image using the region already encoded by prediction unit 150, and obtains the reconstructed image by adding the residual value between the original image and the predicted image to the predicted image. To prevent mismatches in the encoder and decoder, information that can be used in the decoder should be used when performing prediction in the encoder. For this purpose, the encoder performs the processing of the current block of reconstruction encoding again. Inverse quantization unit 120 inverse quantizes the values ​​of the transform coefficients, and inverse transform unit 125 uses the inverse quantized transform coefficient values ​​to reconstruct the residual values. Simultaneously, filtering unit 130 performs filtering operations to improve the quality of the reconstructed image and improve compilation efficiency. For example, it may include a deblocking filter, sample adaptive offset (SAO), and adaptive loop filter. The filtered image is output or stored in decoded image buffer (DPB) 156 for use as a reference image.

[0051] To improve compilation efficiency, instead of compiling the image signal as is, a method is used to predict the image via prediction unit 150 by using a compiled region and adding the residual value between the original image and the predicted image to the predicted image, thereby obtaining a reconstructed image. Intra-frame prediction unit 152 performs intra-frame prediction within the current image, and inter-frame prediction unit 154 predicts the current image using a reference image stored in decoded image buffer 156. Intra-frame prediction unit 152 performs intra-frame prediction from the reconstructed region in the current image and transmits intra-frame compilation information to entropy compilation unit 160. Inter-frame prediction unit 154 may include motion estimation unit 154a and motion compensation unit 154b. Motion estimation unit 154a obtains the motion vector value of the current region by referencing a specific reconstructed region. Motion estimation unit 154a transmits the position information of the reference region (reference frame, motion vector, etc.) to entropy compilation unit 160 so that the position information is included in the bitstream. Motion compensation unit 154b performs inter-frame motion compensation using the motion vector value transmitted from motion estimation unit 154a.

[0052] Prediction unit 150 includes intra-frame prediction unit 152 and inter-frame prediction unit 154. Intra-frame prediction unit 152 performs intra-frame prediction within the current image, and inter-frame prediction unit 154 performs inter-frame prediction to predict the current image using a reference image stored in DBP 156. Intra-frame prediction unit 152 performs intra-frame prediction from reconstructed samples in the current image and transmits intra-frame coding information to entropy compilation unit 160. Intra-frame coding information may include at least one of intra-frame prediction mode, most probable mode (MPM) flag, and MPM index. Intra-frame coding information may include information about the reference sample. Inter-frame prediction unit 154 may include motion estimation unit 154a and motion compensation unit 154b. Motion estimation unit 154a obtains motion vector values ​​for the current region by referencing a specific region of the reconstructed reference image. Motion estimation unit 154a transmits a set of motion information (reference image index, motion vector information, etc.) for the reference region to entropy compilation unit 160. The motion compensation unit 154b performs motion compensation by using motion vector values ​​passed from the motion estimation unit 154a. The inter-frame prediction unit 154 passes inter-frame coding information, including motion information about the reference region, to the entropy compilation unit 160.

[0053] According to another embodiment, prediction unit 150 may include an intra-block copy (BC) prediction unit (not shown). The intra-BC prediction unit performs intra-BC prediction based on reconstructed samples in the current image and transmits intra-BC coding information to entropy compilation unit 160. The intra-BC prediction unit obtains a specific region in the reference current image, indicating the block vector values ​​of the reference region used to predict the current region. The intra-BC prediction unit can use the obtained block vector values ​​to perform intra-BC prediction. The intra-BC prediction unit transmits intra-BC coding information to entropy compilation unit 160. The intra-BC coding information may include block vector information.

[0054] When performing the image prediction described above, the transformation unit 110 transforms the residual values ​​between the original image and the predicted image to obtain transformation coefficient values. In this case, the transformation can be performed on a unit of specific blocks within the image, and the size of the specific blocks can be changed within a preset range. The quantization unit 115 quantizes the transformation coefficient values ​​generated in the transformation unit 110 and sends them to the entropy compilation unit 160.

[0055] Entropy compilation unit 160 performs entropy compilation on information indicating quantized transform coefficients, intra-frame coding information, inter-frame coding information, etc., to generate a video signal bitstream. In entropy compilation unit 160, variable-length compilation (VLC) schemes, arithmetic compilation schemes, etc., can be used. Variable-length compilation (VLC) schemes involve transforming input symbols into continuous codewords, and the length of the codewords can be variable. For example, frequently occurring symbols are represented by short codewords, while rarely occurring symbols are represented by long codewords. Context-based adaptive variable-length compilation (CAVLC) can be used as a variable-length compilation scheme. Arithmetic compilation transforms continuous data symbols into single prime numbers, where arithmetic compilation obtains the optimal number of bits required to represent each symbol. Context-based adaptive binary arithmetic compilation (CABAC) can be used as arithmetic compilation. For example, entropy compilation unit 160 can binarize information indicating quantized transform coefficients. Entropy compilation unit 160 can generate a bitstream by arithmetically compiling binary information.

[0056] The generated bitstream is encapsulated using Network Abstraction Layer (NAL) units as the basic unit. Each NAL unit comprises an integer number of compiled tree units. To decode the bitstream in the video decoder, the bitstream must first be separated into NAL units, and then each separated NAL unit must be decoded. Simultaneously, the information required for decoding the video signal bitstream can be transmitted via a raw byte sequence payload (RBSP) of higher-level sets such as Picture Parameter Set (PPS), Sequence Parameter Set (SPS), and Video Parameter Set (VPS), along with Decoding Capability Information (DCI).

[0057] at the same time, Figure 1 The block diagram illustrates an encoding device 100 according to an embodiment of the present invention, and the separately displayed blocks logically distinguish and illustrate the elements of the encoding device 100. Therefore, depending on the device design, the elements of the encoding device 100 can be mounted as one or more chips. According to an embodiment, the operation of each element of the encoding device 100 can be performed by a processor (not shown).

[0058] Figure 2 This is a schematic block diagram of a video signal decoding apparatus 200 according to an embodiment of the present invention. (See reference) Figure 2 The decoding device 200 of the present invention includes an entropy decoding unit 210, an inverse quantization unit 220, an inverse transform unit 225, a filtering unit 230, and a prediction unit 250.

[0059] Entropy decoding unit 210 performs entropy decoding on the video signal bitstream to extract transform coefficient information, intra-frame coding information, inter-frame coding information, etc., for each region. For example, entropy decoding unit 210 can obtain binary codes for transform coefficient information for a specific region from the video signal bitstream. Entropy decoding unit 210 obtains quantized transform coefficients by inverse binarizing the binary codes. Inverse quantization unit 220 inverse quantizes the quantized transform coefficients, and inverse transform unit 225 recovers the residual values ​​using the inverse quantized transform coefficients. Video signal processing device 200 recovers the original pixel values ​​by adding the residual values ​​obtained by inverse transform unit 225 to the predicted values ​​obtained by prediction unit 250.

[0060] Simultaneously, the filtering unit 230 performs filtering on the image to improve image quality. This may include a deblocking filter to reduce block distortion and / or an adaptive loop filter to remove distortion from the entire image. The filtered image is output or stored in the DPB 256 as a reference image for the next image.

[0061] Prediction unit 250 includes intra-frame prediction unit 252 and inter-frame prediction unit 254. Prediction unit 250 generates a prediction picture using the coding type decoded by the entropy decoding unit 210 described above, the transform coefficients of each region, and the intra / inter-frame coding information. To reconstruct the current block in which decoding is performed, the current picture or the decoded region of other pictures including the current block can be used. In reconstruction, only the current picture, i.e., the picture (or tile / slice) that only performs intra-frame prediction or intra-frame BC prediction, is referred to as an intra-frame picture or I picture (or tile / slice), and the picture (or tile / slice) that can perform all intra-frame prediction, inter-frame prediction, and intra-frame BC prediction is referred to as an inter-frame picture (or tile / slice). To predict the sample value of each block in an inter-frame image (or patch / slice), an image (or patch / slice) using at most one motion vector and a reference image index is called a prediction image or P-image (or patch / slice), and an image (or patch / slice) using at most two motion vectors and a reference image index is called a bidirectional prediction image or B-image (or patch / slice). In other words, a P-image (or patch / slice) uses at most one set of motion information to predict each block, and a B-image (or patch / slice) uses at most two sets of motion information to predict each block. Here, the set of motion information includes one or more motion vectors and a reference image index.

[0062] Intra-prediction unit 252 generates prediction blocks using intra-coding information and reconstructed samples in the current image. As described above, the intra-coding information may include at least one of intra-prediction mode, most probable mode (MPM) flag, and MPM index. Intra-prediction unit 252 predicts sample values ​​for the current block by using reconstructed samples located to the left and / or above the current block as reference samples. In this disclosure, the reconstructed samples, reference samples, and samples of the current block can represent pixels. Moreover, sample values ​​can represent pixel values.

[0063] According to an embodiment, the reference sample may be a sample included in the adjacent blocks of the current block. For example, the reference sample may be a sample adjacent to the left boundary of the current block and / or a sample adjacent to the top boundary. Moreover, the reference sample may be a sample located on a line within a predetermined distance from the left boundary of the current block and / or a sample located on a line within a predetermined distance from the top boundary of the current block among the samples of the adjacent blocks of the current block. In this case, the adjacent blocks of the current block may include the left (L) block, the top (A) block, the bottom left (BL) block, the top right (AR) block, or the top left (AL) block.

[0064] Inter-frame prediction unit 254 generates prediction blocks using reference images and inter-frame coding information stored in DPB 256. The inter-frame coding information may include a set of motion information (reference image index, motion vector information, etc.) for the current block used as the reference block. Inter-frame prediction may include L0 prediction, L1 prediction, and bidirectional prediction. L0 prediction means predicting using a reference image included in the L0 image list, while L1 prediction means predicting using a reference image included in the L1 image list. For this purpose, a set of motion information (e.g., motion vectors and reference image index) may be required. In the bidirectional prediction method, up to two reference regions can be used, and the two reference regions may exist in the same reference image or in different images. That is, in the bidirectional prediction method, up to two sets of motion information (e.g., motion vectors and reference image indexes) can be used, and the two motion vectors may correspond to the same reference image index or different reference image indices. In this case, in terms of time, reference images can be displayed (or output) before and after the current image. According to an embodiment, the two reference regions used in the bidirectional prediction scheme may be regions selected from image list L0 and image list L1, respectively.

[0065] Inter-frame prediction unit 254 can obtain a reference block for the current block using motion vectors and a reference image index. The reference block is located in the reference image corresponding to the reference image index. Furthermore, the sample value of the block specified by the motion vector, or its interpolated value, can be used as a predictor for the current block. For motion prediction with sub-pellet unit pixel accuracy, for example, an 8-tap interpolation filter for the luma signal and a 4-tap interpolation filter for the chroma signal can be used. However, the interpolation filter for motion prediction at the sub-pellet level is not limited to this. In this way, inter-frame prediction unit 254 performs motion compensation to predict the texture of the current unit based on a motion image previously reconstructed using motion information. In such a case, the inter-frame prediction unit can use a set of motion information.

[0066] According to another embodiment, prediction unit 250 may include an intra-frame BC prediction unit (not shown). The intra-frame BC prediction unit can reconstruct a current region by referencing a specific region including reconstructed samples within the current image. The intra-frame BC prediction unit obtains intra-frame BC coding information of the current region from entropy decoding unit 210. The intra-frame BC prediction unit obtains block vector values ​​indicating a specific region in the current image. The intra-frame BC prediction unit can perform intra-frame BC prediction using the obtained block vector values. The intra-frame BC coding information may include block vector information.

[0067] The reconstructed video image is generated by adding the predicted value output from the intra-frame prediction unit 252 or the inter-frame prediction unit 254 to the residual value output from the inverse transform unit 225. That is, the video signal decoding device 200 uses the predicted block generated by the prediction unit 250 and the residual obtained from the inverse transform unit 225 to reconstruct the current block.

[0068] at the same time, Figure 2 The block diagram illustrates a decoding device 200 according to an embodiment of the present invention, and the separately displayed blocks logically distinguish and illustrate the elements of the decoding device 200. Therefore, depending on the device design, the elements of the decoding device 200 can be mounted as one or more chips. According to an embodiment, the operation of each element of the decoding device 200 can be performed by a processor (not shown).

[0069] Figure 3The illustration shows an embodiment where a Compiler Tree Unit (CTU) in an image is segmented into Compiler Units (CUs). During the encoding of a video signal, an image can be segmented into a series of Compiler Tree Units (CTUs). A Compiler Tree Unit consists of N×N blocks of luminance samples and two blocks of corresponding chrominance samples. A Compiler Tree Unit can be segmented into multiple Compiler Units. A Compiler Tree Unit may not be segmented and may be a leaf node. In this case, the Compiler Tree Unit itself can be a Compiler Unit. A Compiler Unit refers to the basic unit used to process images during the aforementioned video signal processing, i.e., intra / inter-frame prediction, transform, quantization, and / or entropy compilation. The size and shape of a Compiler Unit in an image may not be constant. A Compiler Unit can have a square or rectangular shape. A rectangular Compiler Unit (or rectangular block) includes vertical Compiler Units (or vertical blocks) and horizontal Compiler Units (or horizontal blocks). In this specification, a vertical block is a block whose height is greater than its width, and a horizontal block is a block whose width is greater than its height. Furthermore, in this specification, a non-square block may refer to a rectangular block, but this disclosure is not limited thereto.

[0070] refer to Figure 3 First, the compiler tree unit is divided into a quadtree (QT) structure. That is, in a quadtree structure, a node of size 2×2N can be divided into four nodes of size N×N. In this specification, a quadtree can also be referred to as a quaternion tree. Quadtree partitioning can be performed recursively, and not all nodes need to be partitioned at the same depth.

[0071] Simultaneously, the leaf nodes of the aforementioned quadtree can be further divided into a multi-type tree (MTT) structure. According to embodiments of the present invention, in the MTT structure, a node can be divided into a horizontally or vertically partitioned binary or ternary tree structure. That is, in the MTT structure, there are four partitioning structures, such as vertical binary partitioning, horizontal binary partitioning, vertical ternary partitioning, and horizontal ternary partitioning. According to embodiments of the present invention, in each tree structure, the width and height of the node can both be powers of 2. For example, in a binary tree (BT) structure, a node of size 2×2N can be partitioned into two NX2N nodes through vertical binary partitioning, and further partitioned into two 2NXN nodes through horizontal binary partitioning. Additionally, in a ternary tree (TT) structure, a node of size 2×2N is partitioned into (N / 2)×2N, NX2N, and (N / 2)×2N nodes through vertical ternary partitioning, and further partitioned into 2NX(N / 2), 2NXN, and 2NX(N / 2) nodes through horizontal ternary partitioning. This multi-type tree split can be performed recursively.

[0072] Leaf nodes of multi-type trees can be compilation units. When a compilation unit is not greater than the maximum transform length, it can be used as a unit for prediction and / or transformation without further segmentation. As an example, when the width or height of the current compilation unit is greater than the maximum transform length, the current compilation unit can be segmented into multiple transform units without explicit signaling regarding segmentation. Alternatively, at least one of the following parameters for the aforementioned quadtrees and multi-type trees can be predefined or sent via an RBSP of a high-level set such as PPS, SPS, VPS, etc. 1) CTU size: Size of the root node of the quadtree; 2) Minimum QT size MinQtSize: Minimum allowed QT leaf node size; 3) Maximum BT size MaxBtSize: Maximum allowed BT root node size; 4) Maximum TT size MaxTtSize: Maximum allowed TT root node size; 5) Maximum MTT depth MaxMttDepth: Maximum allowed MTT depth derived from the leaf nodes of the QT; 6) Minimum BT size MinBtSize: Minimum allowed BT leaf node size; 7) Minimum TT size MinTtSize: Minimum allowed TT leaf node size.

[0073] Figure 4 The illustration shows an embodiment of a method for signaling the segmentation of quadtrees and multi-type trees. Preset flags can be used to signal the segmentation of the aforementioned quadtrees and multi-type trees. (Reference) Figure 4 At least one of the following flags can be used: "split_cu_flag" indicating whether to split a node, "split_qt_flag" indicating whether to split a quadtree node, "mtt_split_cu_vertical_flag" indicating the splitting direction of a multi-type tree node, or "mtt_split_cu_binary_flag" indicating the splitting shape of a multi-type tree node.

[0074] According to an embodiment of the present invention, a "split_cu_flag" signal can be sent first as an indication of whether the current node is split. When the value of "split_cu_flag" is 0, it indicates that the current node has not been split, and the current node becomes a compilation unit. When the current node is a compilation tree unit, the compilation tree unit includes an unsplit compilation unit. When the current node is a quadtree node "QT node", the current node is a leaf node of the quadtree "QT leaf node" and becomes a compilation unit. When the current node is a multi-class tree node "MTT node", the current node is a leaf node of the multi-class tree "MTT leaf node" and becomes a compilation unit.

[0075] When the value of "split_cu_flag" is 1, the current node can be split into a quadtree or a multi-type tree node based on the value of "split_qt_flag". The compiler tree unit is the root node of the quadtree and can be initially split into a quadtree structure. In the quadtree structure, "split_qt_flag" is sent as a signal for each node, the "QT node". When the value of "split_qt_flag" is 1, the corresponding node is split into four square nodes, and when the value of "qt_split_flag" is 0, the corresponding node becomes a "QT leaf node" of the quadtree, and the corresponding node is split into multiple types of nodes. According to an embodiment of the present invention, the splitting of the quadtree can be restricted based on the type of the current node. Quadtree splitting is allowed when the current node is a compiler tree unit (the root node of the quadtree) or a quadtree node, and quadtree splitting is not allowed when the current node is a multi-type tree node. Each quadtree leaf node, the "QT leaf node", can be further split into a multi-type tree structure. As described above, when "split_qt_flag" is 0, the current node can be split into multiple types of nodes. To indicate the splitting direction and shape, "mtt_split_cu_vertical_flag" and "mtt_split_cu_binary_flag" can be sent using signals. When the value of "mtt_split_cu_vertical_flag" is 1, it indicates a vertical split of the "MTT node," and when the value of "mtt_split_cu_vertical_flag" is 0, it indicates a horizontal split of the "MTT node." Additionally, when the value of "mtt_split_cu_binary_flag" is 1, the "MTT node" is split into two rectangular nodes, and when the value of "mtt_split_cu_binary_flag" is 0, the "MTT node" is split into three rectangular nodes.

[0076] Image prediction (motion compensation) for encoding is performed on compilation units that are no longer divided (i.e., leaf nodes of the compilation unit tree). In the following text, the basic unit used to perform the prediction will be referred to as a "prediction unit" or "prediction block".

[0077] In the following text, the term "unit" as used herein may be used in place of a prediction unit, which is the basic unit used to perform prediction. However, this disclosure is not limited thereto, and "unit" may be understood to broadly encompass the concept of a compilation unit.

[0078] Figure 5 and Figure 6The intra-frame prediction method according to an embodiment of the present invention is illustrated in more detail. As described above, the intra-frame prediction unit predicts the sample value of the current block by using reconstructed samples located to the left and / or above the current block as reference samples.

[0079] first, Figure 5 An embodiment of reference samples for prediction of the current block in intra-frame prediction mode is shown. According to the embodiment, the reference samples may be samples adjacent to the left boundary and / or the top boundary of the current block. Figure 5 As shown, when the size of the current block is WXH and a single reference line adjacent to the current block is used for intra-frame prediction, the reference samples can be configured using the maximum 2W+2H+1 neighboring samples located to the left and above the current block.

[0080] When at least some samples to be used as reference samples have not yet been recovered, the intra-prediction unit can obtain reference samples by performing a reference sample padding process. The intra-prediction unit can perform a reference sample filtering process to reduce errors in intra-prediction. That is, filtering can be performed on neighboring samples and / or reference samples obtained through the reference sample padding process to obtain filtered reference samples. The intra-prediction unit predicts samples for the current block using the reference samples obtained as described above. The intra-prediction unit predicts samples for the current block using either unfiltered or filtered reference samples. In this disclosure, neighboring samples can include samples on at least one reference line. For example, neighboring samples can include neighboring samples on lines adjacent to the boundary of the current block.

[0081] Next, Figure 6 An embodiment of a prediction mode for intra-frame prediction is illustrated. For intra-frame prediction, intra-frame prediction mode information indicating the direction of intra-frame prediction can be transmitted via signaling. The intra-frame prediction mode information indicates one of a plurality of intra-frame prediction modes included in the set of intra-frame prediction modes. When the current block is an intra-frame prediction block, the decoder receives the intra-frame prediction mode information of the current block from the bitstream. The decoder's intra-frame prediction unit performs intra-frame prediction on the current block based on the extracted intra-frame prediction mode information.

[0082] According to embodiments of the present invention, the intra-prediction mode set may include all intra-prediction modes used in intra-prediction (e.g., a total of 67 intra-prediction modes). More specifically, the intra-prediction mode set may include planar modes, DC modes, and multiple (e.g., 65) angle modes (i.e., orientation modes). Each intra-prediction mode can be indicated by a preset index (i.e., an intra-prediction mode index). For example, as... Figure 6As shown, intra-prediction mode index 0 indicates a planar mode, while intra-prediction mode index 1 indicates a DC mode. Furthermore, intra-prediction mode indices 2 through 66 can each indicate different angle modes. Each angle mode indicates an angle that differs from the others within a preset angle range. For example, an angle mode can indicate an angle within a clockwise angle range of 45 degrees and -135 degrees (i.e., a first angle range). An angle mode can be defined based on the 12 o'clock direction. In this case, intra-prediction mode index 2 indicates a horizontal diagonal (HDIA) mode, intra-prediction mode index 18 indicates a horizontal (horizontal, HOR) mode, intra-prediction mode index 34 indicates a diagonal (DIA) mode, intra-prediction mode index 50 indicates a vertical (VER) mode, and intra-prediction mode index 66 indicates a vertical diagonal (VDIA) mode.

[0083] Simultaneously, the preset angle range can be set differently depending on the shape of the current block. For example, if the current block is a rectangular block, a wide-angle mode indicating an angle exceeding 45 degrees or less than -135 degrees in the clockwise direction can be additionally used. When the current block is a horizontal block, the angle mode can indicate an angle within the clockwise direction between (45 + offset1) degrees and (-135 + offset1) degrees (i.e., the second angle range). In this case, angle modes 67 to 76, outside the first angle range, can be additionally used. Furthermore, if the current block is a vertical block, the angle mode can indicate an angle within the clockwise direction between (45 - offset2) degrees and (-135 - offset2) degrees (i.e., the third angle range). In this case, angle modes -10 to -1, outside the first angle range, can be additionally used. According to embodiments of this disclosure, the values ​​of offset1 and offset2 can be determined differently depending on the ratio between the width and height of the rectangular block. Furthermore, offset1 and offset2 can be positive numbers.

[0084] According to another embodiment of the present invention, configuring multiple angle modes of the intra-frame prediction mode set may include a basic angle mode and an extended angle mode. In this case, the extended angle mode can be determined based on the basic angle mode.

[0085] According to an embodiment, the basic angle pattern is a pattern corresponding to the angle used in intra-frame prediction of the existing High Efficiency Video Coding (HEVC) standard, and the extended angle pattern can be a pattern corresponding to the angle newly added in intra-frame prediction of the next-generation video codec standard. More specifically, the basic angle pattern can be an angle pattern corresponding to any one of the intra-frame prediction patterns {2,4,6,...,66}, and the extended angle pattern can be an angle pattern corresponding to any one of the intra-frame prediction patterns {3,5,7,...,65}. That is, the extended angle pattern can be an angle pattern within the first angle range that falls between the basic angle patterns. Therefore, the angle indicated by the extended angle pattern can be determined based on the angle indicated by the basic angle pattern.

[0086] According to another embodiment, the basic angle mode can be a mode corresponding to an angle within a preset first angle range, and the extended angle mode can be a wide-angle mode outside the first angle range. That is, the basic angle mode can be an angle mode corresponding to any one of the intra-prediction modes {2,3,4,...,66}, and the extended angle mode can be an angle mode corresponding to any one of the intra-prediction modes {-10,-9,...,-1} and {67,68,...,76}. The angle indicated by the extended angle mode can be determined as the angle on the opposite side to the angle indicated by the corresponding basic angle mode. Therefore, the angle indicated by the extended angle mode can be determined based on the angle indicated by the basic angle mode. Meanwhile, the number of extended angle modes is not limited to this, and additional extended angles can be defined according to the size and / or shape of the current block. For example, the extended angle mode can be defined as an angle mode corresponding to any one of the intra-prediction modes {-14,-13,...,-1} and {67,68,...,80}. Furthermore, the total number of intra-prediction modes included in the intra-prediction mode set can vary depending on the configuration of the basic angle mode and the extended angle mode described above.

[0087] In the above embodiments, the interval between extended angle modes can be set based on the interval between corresponding basic angle modes. For example, the interval between extended angle modes {3,5,7,...,65} can be determined based on the interval between corresponding basic angle modes {2,4,6,...,66}. Additionally, the interval between extended angle modes {-10,-9,...,-1} can be determined based on the interval between corresponding basic angle modes {56,57,...,65} on the opposite side, and the interval between extended angle modes {67,68,...,76} can be determined based on the interval between corresponding basic angle modes {3,4,...,12} on the opposite side. The angular interval between extended angle modes can be set to be the same as the angular interval between corresponding basic angle modes. Furthermore, the number of extended angle modes in the intra-frame prediction mode set can be set to be less than or equal to the number of basic angle modes.

[0088] According to embodiments of the present invention, extended angle modes can be signaled based on a basic angle mode. For example, a wide-angle mode (i.e., an extended angle mode) can replace at least one angle mode (i.e., a basic angle mode) within a first angle range. The basic angle mode to be replaced can be a corresponding angle mode on the side opposite to the wide-angle mode. That is, the basic angle mode to be replaced is an angle mode corresponding to an angle in the opposite direction to the angle indicated by the wide-angle mode, or an angle mode corresponding to an angle differing from the angle in the opposite direction by a preset offset index. According to one embodiment of the present invention, the preset offset index is 1. The intra-frame prediction mode index corresponding to the basic angle mode to be replaced can be remapped to the wide-angle mode to signal the corresponding wide-angle mode. For example, wide-angle modes {-10, -9, ..., -1} can be signaled by intra-frame prediction mode indices {57, 58, ..., 66}, and wide-angle modes {67, 68, ..., 76} can be signaled by intra-frame prediction mode indices {2, 3, ..., 11}, respectively. In this way, the intra-prediction mode index used for the basic angle mode is used to signal the extended angle mode, and therefore, even if the configurations of the angle modes used for intra-prediction in each block are different, the same set of intra-prediction mode indexes can be used to signal the intra-prediction modes. Thus, signaling overhead caused by changes in the intra-prediction mode configuration can be minimized.

[0089] Simultaneously, the use of the extended angle mode can be determined based on at least one of the shape and size of the current block. According to an embodiment, when the size of the current block is greater than a preset size, the extended angle mode can be used for intra-frame prediction of the current block; otherwise, the basic angle mode can be used only for intra-frame prediction of the current block. According to another embodiment, when the current block is a block other than a square, the extended angle mode can be used for intra-frame prediction of the current block, and when the current block is a square block, only the basic angle mode can be used for intra-frame prediction of the current block.

[0090] Figure 7 This diagram illustrates a Network Abstraction Layer (NAL) unit according to an embodiment of the present invention, which is a basic unit for configuring a bitstream. When a video image is encoded and stored as a bitstream by an encoder, the bitstream can be configured at the NAL level. NAL units can be defined in various forms depending on their purpose and can be distinguished by a unique ID. A NAL unit can be broadly divided into a portion containing the actual video image data information and a portion containing the information required to decode such video images. Figure 7 This is a diagram illustrating some of the various types of NAL units. NAL units are configured according to a predefined order, and the information included within each NAL unit can also be configured according to a preset order. NAL units can be cross-referenced with each other. For example... Figure 7 As illustrated, the NAL unit DPS represents the Decoding Parameter Set (DPS) RBSP syntax. The NAL unit VPS (NAL unit VPS) represents the Video Parameter Set (VPS) RBSP syntax. The NAL unit SPS represents the Sequence Parameter Set (SPS) RBSP syntax. The NAL unit PPS represents the Picture Parameter Set (PPS) RBSP syntax. The DPS RBSP syntax is a syntax that includes the information (syntax elements) required by the decoder to perform video decoding. The DPS RBSP syntax can be described as the Decoding Capability Information (DCI) RBSP syntax. The VPS RBSP syntax is a syntax that includes information (syntax elements) typically used for decoding base layer and enhancement layer encoded data. The SPS RBSP syntax is a syntax that includes syntax elements sent at the sequence unit level. The SPS RBSP syntax can include information (syntax elements) typically used to reference the VPS for decoding pictures. In this case, a sequence refers to a set of one or more pictures. The PPS RBSP syntax is a syntax that includes information (syntax elements) typically used for decoding one or more pictures. The RBSP described above is the Raw Byte Sequence Payload (RBSP) and can refer to a byte-aligned syntax encapsulated within a NAL unit. The above syntax will be described below.

[0091] Figure 8 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0092] Figure 8 (a) is a diagram illustrating the RBSP syntax of the Decoding Parameter Set (DPS). Figure 8 (b) is a graph illustrating the Sequence Parameter Set (SPS) RBSP syntax, and Figure 8 (c) is a diagram illustrating the profile tier level syntax "profile_tier_level()".

[0093] like Figure 8 As illustrated in (a) and (b), profile-tier syntax can be included (called) in both DPS RBSP and SPS RBSP syntax. Profile-tier syntax can include information related to profiles, tiers, and levels. In this case, profile-tier syntax can include the syntax "general_constraint_info()" for General Constraint Information (GCI). The syntax for GCI (hereinafter referred to as GCI syntax) can control the disabling of tools and / or functions included in GCI syntax and / or other syntaxes (e.g., DPS RBSP syntax, VPS RBSP syntax, SPS RBSP syntax, PPS RBSP syntax, Sliceheader syntax, etc.) for interoperability. When GCI syntax indicates the disabling of tools and / or functions, tools and / or functions declared in lower syntax can be disabled. In this case, the application of tools and / or functions disabled by GCI syntax to the entire bitstream or a portion of the bitstream can be determined based on the location of the NAL unit parsed by the decoder. For example, the profile-tier syntax "profile_tier_level()" can be included in DPS RBSP syntax and / or SPS RBSP syntax. When profile-level syntax is included in DPS RBSP syntax, the GCI syntax included in the profile-level syntax can be applied to the entire bitstream. As another example, when profile-level syntax is included in SPS RBSP syntax, the GCI syntax included in the profile-level syntax can be applied to Compiled Layer Video Sequences (CLVS).

[0094] Figures 9 to 11 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0095] Figure 9 (a) is a diagram illustrating the Video Parameter Set (VPS) RBSP syntax according to an embodiment of the present invention, and Figure 9 (b) is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 9 As illustrated in (a), the GCI syntax "general_constraint_info()" can be included in VPS syntax. Furthermore, although... Figure 9(a) Not illustrated, the above profile hierarchy syntax can be included in the VPS syntax, and the GCI syntax can be included in the profile hierarchy syntax included in the VPS syntax. The GCI syntax can include one or more syntax elements. Figure 10 and Figure 11 This is a diagram illustrating the Sequence Parameter Set (SPS) RBSP syntax according to an embodiment of the present invention. In the following text, reference will be made to... Figures 9 to 11 Describes the constraint flags as syntactic elements included in GCI grammar.

[0096] -no_qtbtt_dual_tree_intra_constraint_flag

[0097] `no_qtbtt_dual_tree_intra_constraint_flag` is a flag that controls `qtbtt_dual_tree_intra_flag`. For example, if `no_qtbtt_dual_tree_intra_constraint_flag` is 1, then `qtbtt_dual_tree_intra_flag` can be set to 0. On the other hand, if `no_qtbtt_dual_tree_intra_constraint_flag` is 0, then there is no constraint on the value of `qtbtt_dual_tree_intra_flag`. That is, the value of `qtbtt_dual_tree_intra_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0098] In this context, `qtbtt_dual_tree_intra_flag` is a flag indicating whether I-slices are used in the `coding_tree` syntax structure. For example, if `qtbtt_dual_tree_intra_flag` is 1, then for I-slices, each compilation tree unit (CTU) can be partitioned into compilation units with 64×64 luma samples using implicit quadtree partitioning. In this case, the compilation unit is indicated as the root node (highest-level compilation unit) of a separate `coding_tree` syntax structure for two luma and two chroma samples. If `qtbtt_dual_tree_intra_flag` is 0, then the `coding_tree` syntax structure is not used for I-slices. The aforementioned `qtbtt_dual_tree_intra_flag` can be referred to as `sps_qtbtt_dual_tree_intra_flag`.

[0099] refer to Figure 10`log2_ctu_size_minus5` is a syntax element indicating the size of the luma compendium block for each compendium unit. If 5 is added to `log2_ctu_size_minus5`, the size of the luma compendium block, `CtbLog2SizeY`, in log2 units, can be calculated. This can be expressed as a formula, as shown in Equation 1 below. In Equation 1, `CtbSizeY` refers to the size of each luma compendium block.

[0100] [Formula 1]

[0101] CtbLog2SizeY=log2_ctu_size_minus5+5

[0102] CtbSizeY = 1 <CtbLog2SizeY

[0103] -no_partition_constraints_override_constraint_flag

[0104] `no_partition_constraints_override_constraint_flag` is a flag that controls `partition_constraints_override_enabled_flag`. For example, if the value of `no_partition_constraints_override_constraint_flag` is 1, then the value of `partition_constraints_override_enabled_flag` can be set to 0. On the other hand, if the value of `no_partition_constraints_override_constraint_flag` is 0, then there is no restriction on the value of `partition_constraints_override_enabled_flag`. That is, the value of `partition_constraints_override_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0105] In this context, `partition_constraints_override_enabled_flag` is a flag indicating the presence of `ph_partition_constraints_override_flag` in the image header (PH). A value of 1 indicates the presence of `ph_partition_constraints_override_flag`, while a value of 0 indicates its absence. This `partition_constraints_override_enabled_flag` can be referred to as `sps_partition_constraints_override_enabled_flag`.

[0106] -no_sao_constraint_flag

[0107] `no_sao_constraint_flag` is a flag that controls `sps_sao_enabled_flag`. For example, if `no_sao_constraint_flag` is 1, then `sps_sao_enabled_flag` can be set to 0. On the other hand, if `no_sao_constraint_flag` is 0, there is no restriction on the value of `sps_sao_enabled_flag`. That is, the value of `sps_sao_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0108] In this context, `sps_sao_enabled_flag` is a flag indicating whether sample adaptive offset processing is applied to the reconstructed images after deblocking filtering of the Compiled Layer Video Sequence (CLVS). For example, if `sps_sao_enabled_flag` is 1, it indicates that sample adaptive offset processing is enabled for the reconstructed images after CLVS deblocking filtering, and that sample adaptive offset processing is applied to the reconstructed images after CLVS deblocking filtering. If `sps_sao_enabled_flag` is 0, it indicates that sample adaptive offset processing is disabled for the reconstructed images after CLVS deblocking filtering, and that sample adaptive offset processing is not applied to the reconstructed images after CLVS deblocking filtering.

[0109] -no_alf_constraint_flag

[0110] `no_alf_constraint_flag` is a flag that controls `sps_alf_enabled_flag`. For example, if `no_alf_constraint_flag` is 1, then `sps_alf_enabled_flag` can be set to 0. On the other hand, if `no_alf_constraint_flag` is 0, there is no restriction on the value of `sps_alf_enabled_flag`. That is, the value of `sps_alf_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0111] In this context, `sps_alf_enabled_flag` is a flag indicating whether the adaptive loop filter is enabled for decoding images in CLVS. For example, if `sps_alf_enabled_flag` is 1, it indicates that the adaptive loop filter is enabled and can be applied to decoding images in CLVS. If `sps_alf_enabled_flag` is 0, it indicates that the adaptive loop filter is disabled and is not applied to decoding images in CLVS.

[0112] -no_joint_cbcr_constraint_flag

[0113] `no_joint_cbcr_constraint_flag` is a flag that controls `sps_joint_cbcr_enabled_flag`. For example, if `no_joint_cbcr_constraint_flag` is 1, then `sps_joint_cbcr_enabled_flag` can be set to 0. On the other hand, if `no_joint_cbcr_constraint_flag` is 0, there is no restriction on the value of `sps_joint_cbcr_enabled_flag`. That is, the value of `sps_joint_cbcr_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0114] In this context, `sps_joint_cbcr_enabled_flag` is a flag indicating whether chroma residual joint compilation is enabled for decoding images in CLVS. For example, a value of 1 for `sps_joint_cbcr_enabled_flag` indicates that chroma residual joint compilation is enabled and can be used to decode images in CLVS. A value of 0 for `sps_joint_cbcr_enabled_flag` indicates that chroma residual joint compilation is disabled and is not used for decoding images in CLVS. Furthermore, `sps_joint_cbcr_enabled_flag` may not exist, and in such cases, it can be inferred that its value is 0.

[0115] -no_ref_wraparound_constraint_flag

[0116] `no_ref_wraparound_constraint_flag` is a flag that controls `sps_ref_wraparound_enabled_flag`. For example, if `no_ref_wraparound_constraint_flag` is 1, then `sps_ref_wraparound_enabled_flag` can be set to 0. Conversely, if `no_ref_wraparound_constraint_flag` is 0, there is no restriction on the value of `sps_ref_wraparound_enabled_flag`. That is, the value of `sps_ref_wraparound_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0117] In this context, `sps_ref_wraparound_enabled_flag` is a flag indicating whether horizontal wraparound motion compensation is enabled when decoding images in CLVS. For example, if `sps_ref_wraparound_enabled_flag` is 1, it indicates that horizontal wraparound motion compensation is enabled and can be applied to images in CLVS. If `sps_ref_wraparound_enabled_flag` is 0, it indicates that horizontal wraparound motion compensation is disabled and is not applied to images in CLVS.

[0118] -no_temporal_mvp_constraint_flag

[0119] `no_temporal_mvp_constraint_flag` is a flag that controls `sps_temporal_mvp_enabled_flag`. For example, if `no_temporal_mvp_constraint_flag` is 1, then `sps_temporal_mvp_enabled_flag` can be set to 0. Conversely, if `no_temporal_mvp_constraint_flag` is 0, there is no constraint on the value of `sps_temporal_mvp_enabled_flag`. That is, the value of `sps_temporal_mvp_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0120] In this context, `sps_temporal_mvp_enabled_flag` is a flag indicating whether temporal predicted motion vectors are enabled for decoding images in CLVS. For example, if `sps_temporal_mvp_enabled_flag` is 1, it indicates that the temporal predicted motion vector predictor is enabled and can be used to decode images in CLVS. If `sps_temporal_mvp_enabled_flag` is 0, it indicates that the temporal predicted motion vector predictor is disabled and is not used for decoding images in CLVS.

[0121] -no_sbtmvp_constraint_flag

[0122] `no_sbtmvp_constraint_flag` is a flag that controls `sps_sbtmvp_enabled_flag`. For example, if `no_sbtmvp_constraint_flag` is 1, then `sps_sbtmvp_enabled_flag` can be set to 0. Conversely, if `no_sbtmvp_constraint_flag` is 0, there is no restriction on the value of `sps_sbtmvp_enabled_flag`. That is, the value of `sps_sbtmvp_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0123] In this context, `sps_sbtmvp_enabled_flag` is a flag indicating whether sub-block-based temporal motion vector predictors are enabled for decoding images in CLVS. For example, if `sps_sbtmvp_enabled_flag` is 1, it indicates that sub-block-based temporal motion vector predictors are enabled and can be used to decode images in CLVS. In this case, the image slice type can be any type other than I-slices (e.g., B-slices and P-slices). If `sps_sbtmvp_enabled_flag` is 0, it indicates that sub-block-based temporal motion vector predictors are disabled and are not used for decoding images in CLVS.

[0124] -no_amvr_constraint_flag

[0125] `no_amvr_constraint_flag` is a flag that controls `sps_amvr_enabled_flag`. For example, if `no_amvr_constraint_flag` is 1, then `sps_amvr_enabled_flag` can be set to 0. On the other hand, if `no_amvr_constraint_flag` is 0, there is no restriction on the value of `sps_amvr_enabled_flag`. That is, the value of `sps_amvr_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0126] In this context, `sps_amvr_enabled_flag` is a flag indicating whether motion vector differential resolution is enabled for decoding images in CLVS. For example, if `sps_amvr_enabled_flag` is 1, it indicates that motion vector differential resolution is enabled and can be used to decode images in CLVS. If `sps_amvr_enabled_flag` is 0, it indicates that motion vector differential resolution is disabled and is not used for decoding images in CLVS.

[0127] -no_bdof_constraint_flag

[0128] `no_bdof_constraint_flag` is a flag that controls `sps_bdof_enabled_flag`. For example, if `no_bdof_constraint_flag` is 1, then `sps_bdof_enabled_flag` can be set to 0. On the other hand, if `no_bdof_constraint_flag` is 0, there is no restriction on the value of `sps_bdof_enabled_flag`. That is, the value of `sps_bdof_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0129] In this context, `sps_bdof_enabled_flag` is a flag indicating whether bidirectional optical flow inter-frame prediction is enabled for decoding images in CLVS. For example, if `sps_bdof_enabled_flag` is 1, it indicates that bidirectional optical flow inter-frame prediction is enabled and can be used to decode images in CLVS. If `sps_bdof_enabled_flag` is 0, it indicates that bidirectional optical flow inter-frame prediction is disabled and is not used for decoding images in CLVS.

[0130] -no_dmvr_constraint_flag

[0131] `no_dmvr_constraint_flag` is a flag that controls `sps_dmvr_enabled_flag`. For example, if `no_dmvr_constraint_flag` is 1, then `sps_dmvr_enabled_flag` can be set to 0. On the other hand, if `no_dmvr_constraint_flag` is 0, there is no restriction on the value of `sps_dmvr_enabled_flag`. That is, the value of `sps_dmvr_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0132] In this context, `sps_dmvr_enabled_flag` is a flag indicating whether bidirectional prediction based on decoder motion vector refinement is enabled for decoding images in CLVS. For example, if `sps_dmvr_enabled_flag` is 1, it indicates that bidirectional prediction based on decoder motion vector refinement is enabled, and this prediction can be used to decode images in CLVS. If `sps_dmvr_enabled_flag` is 0, it indicates that bidirectional prediction based on decoder motion vector refinement is disabled, and this prediction is not used for decoding images in CLVS.

[0133] -no_cclm_constraint_flag

[0134] `no_cclm_constraint_flag` is a flag that controls `sps_cclm_enabled_flag`. For example, if `no_cclm_constraint_flag` is 1, then `sps_cclm_enabled_flag` can be set to 0. On the other hand, if `no_cclm_constraint_flag` is 0, there is no restriction on the value of `sps_cclm_enabled_flag`. That is, the value of `sps_cclm_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0135] In this context, `sps_cclm_enabled_flag` is a flag indicating whether cross-component linear model intra-prediction from the luma component to the chroma component is enabled for decoding images in CLVS. For example, if `sps_cclm_enabled_flag` is 1, it indicates that cross-component linear model intra-prediction from the luma component to the chroma component is enabled, and it can be used to decode images in CLVS. If `sps_cclm_enabled_flag` is 0, it indicates that cross-component linear model intra-prediction from the luma component to the chroma component is disabled, and it is not used for decoding images in CLVS. Also, `sps_cclm_enabled_flag` may not exist, and in this case, it can be inferred that its value is equal to 0.

[0136] -no_mts_constraint_flag

[0137] `no_mts_constraint_flag` is a flag that controls `sps_mts_enabled_flag`. For example, if `no_mts_constraint_flag` is 1, then `sps_mts_enabled_flag` can be set to 0. On the other hand, if `no_mts_constraint_flag` is 0, there is no restriction on the value of `sps_mts_enabled_flag`. That is, the value of `sps_mts_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0138] In this context, `sps_mts_enabled_flag` is a flag indicating whether `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` exist in the Sequence Parameter Set (SPS). For example, if the value of `sps_mts_enabled_flag` is 1, it indicates that `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` exist in the SPS. If the value of `sps_mts_enabled_flag` is 0, it indicates that `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` do not exist in the SPS.

[0139] In this context, `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` are flags indicating the presence of `mts_idx` in the CLVS intra-frame compiler unit syntax. For example, if the value of `sps_explicit_mts_intra_enabled_flag` / `sps_explicit_mts_inter_enabled_flag` is 1, it indicates that `mts_idx` can exist in the CLVS intra / inter-frame compiler unit syntax. If the value of `sps_explicit_mts_intra_enabled_flag` / `sps_explicit_mts_inter_enabled_flag` is 0, it indicates that `mts_idx` does not exist in the CLVS intra / inter-frame compiler unit syntax. Furthermore, `sps_explicit_mts_intra_enabled_flag` / `sps_explicit_mts_inter_enabled_flag` may not exist. In this case, the values ​​of sps_explicit_mts_intra_enabled_flag / sps_explicit_mts_inter_enabled_flag can be inferred to be equal to 0.

[0140] The above mts_idx is a syntax element that indicates the transformation kernel applied along the horizontal and vertical directions of the associated brightness transformation block in the current compilation unit.

[0141] -no_sbt_constraint_flag

[0142] `no_sbt_constraint_flag` is a flag that controls `sps_sbt_enabled_flag`. For example, if `no_sbt_constraint_flag` is 1, then `sps_sbt_enabled_flag` can be set to 0. On the other hand, if `no_sbt_constraint_flag` is 0, there is no restriction on the value of `sps_sbt_enabled_flag`. That is, the value of `sps_sbt_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0143] In this context, `sps_sbt_enabled_flag` is a flag indicating whether the sub-block transforms of the inter-frame prediction coding unit (CU) are enabled for decoding images in CLVS. For example, if `sps_sbt_enabled_flag` is 1, it indicates that the sub-block transforms of the CU are enabled, and these sub-block transforms can be used to decode images in CLVS. If `sps_sbt_enabled_flag` is 0, it indicates that the sub-block transforms of the CU are disabled, and these sub-block transforms are not used for decoding images in CLVS.

[0144] -no_affine_motion_constraint_flag

[0145] `no_affine_motion_constraint_flag` is a flag that controls `sps_affine_enabled_flag`. For example, if `no_affine_motion_constraint_flag` is 1, then `sps_affine_enabled_flag` can be set to 0. On the other hand, if `no_affine_motion_constraint_flag` is 0, then there is no restriction on the value of `sps_affine_enabled_flag`. That is, the value of `sps_affine_enabled_flag` can be determined based on the parsing result of the SPSRBSP syntax.

[0146] In this context, `sps_affine_enabled_flag` is a flag indicating whether affine-based motion compensation is enabled for decoding images in CLVS. Additionally, `sps_affine_enabled_flag` indicates whether `inter_affine_flag` and `cu_affine_type_flag` exist in the CLVS compilation unit syntax. For example, if `sps_affine_enabled_flag` is 1, it indicates that affine-based motion compensation is enabled, and it can be used to decode images in CLVS. Conversely, if `sps_affine_enabled_flag` is 1, it indicates that `inter_affine_flag` and `cu_affine_type_flag` can exist in the CLVS compilation unit syntax. If `sps_affine_enabled_flag` is 0, it indicates that affine-based motion compensation is disabled, and it is not used for decoding images in CLVS. If the value of sps_affine_enabled_flag is 0, it indicates that inter_affine_flag and cu_affine_type_flag do not exist in the CLVS compilation unit syntax.

[0147] In this context, `inter_affine_flag` indicates whether affine-based motion compensation is used to generate prediction samples for the current compilation unit when decoding it. `cu_affine_type_flag` indicates whether either four-parameter or six-parameter affine-based motion compensation is used when decoding the current compilation unit.

[0148] -no_bcw_constraint_flag

[0149] `no_bcw_constraint_flag` is a flag that controls `sps_bcw_enabled_flag`. For example, if `no_bcw_constraint_flag` is 1, then `sps_bcw_enabled_flag` can be set to 0. On the other hand, if `no_bcw_constraint_flag` is 0, there is no restriction on the value of `sps_bcw_enabled_flag`. That is, the value of `sps_bcw_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0150] In this context, `sps_bcw_enabled_flag` is a flag indicating whether bidirectional prediction using compiler weights is enabled for decoding images in CLVS. Furthermore, `sps_bcw_enabled_flag` can indicate whether `bcw_idx` exists in the CLVS compiler syntax. For example, if `sps_bcw_enabled_flag` is 1, it indicates that bidirectional prediction using compiler weights is enabled, and bidirectional prediction using compiler weights can be used to decode images in CLVS. Alternatively, if `sps_bcw_enabled_flag` is 1, it indicates that `bcw_idx` can exist in the CLVS compiler syntax. If `sps_bcw_enabled_flag` is 0, it indicates that bidirectional prediction using compiler weights is disabled, and bidirectional prediction using compiler weights is not used for decoding images in CLVS. Additionally, when `sps_bcw_enabled_flag` is 0, it indicates that `bcw_idx` does not exist in the CLVS compiler syntax.

[0151] In this case, bcw_idx is a syntax element that indicates an index related to bidirectional prediction using compilation unit weights.

[0152] -no_ibc_constraint_flag

[0153] `no_ibc_constraint_flag` is a flag that controls `sps_ibc_enabled_flag`. For example, if `no_ibc_constraint_flag` is 1, then `sps_ibc_enabled_flag` can be set to 0. On the other hand, if `no_ibc_constraint_flag` is 0, there is no restriction on the value of `sps_ibc_enabled_flag`. That is, the value of `sps_ibc_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0154] In this context, `sps_ibc_enabled_flag` is a flag indicating whether Intra-Block Copy (IBC) prediction mode is enabled for decoding images in the CLVS. For example, if `sps_ibc_enabled_flag` is 1, it indicates that IBC prediction mode is enabled and can be used to decode images in the CLVS. If `sps_ibc_enabled_flag` is 0, it indicates that IBC prediction mode is disabled and is not used to decode images in the CLVS.

[0155] -no_ciip_constraint_flag

[0156] `no_ciip_constraint_flag` is a flag that controls `sps_ciip_enabled_flag`. For example, if `no_ciip_constraint_flag` is 1, then `sps_ciip_enabled_flag` can be set to 0. On the other hand, if `no_ciip_constraint_flag` is 0, there is no restriction on the value of `sps_ciip_enabled_flag`. That is, the value of `sps_ciip_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0157] In this context, `sps_ciip_enabled_flag` is a flag indicating whether the `ciip_flag` exists in the compiler unit syntax used for inter-frame compilation units. For example, a value of 0 for `sps_ciip_enabled_flag` indicates that the `ciip_flag` does not exist in the compiler unit syntax for inter-frame compilation units. A value of 1 for `sps_ciip_enabled_flag` indicates that the `ciip_flag` may exist in the compiler unit syntax for inter-frame compilation units.

[0158] ciip_flag is a flag indicating whether to apply inter-image merging and intra-image prediction to the current compilation unit.

[0159] -no_fpel_mmvd_constraint_flag

[0160] `no_fpel_mmvd_constraint_flag` is a flag that controls `sps_fpel_mmvd_enabled_flag`. For example, if `no_fpel_mmvd_constraint_flag` is 1, then `sps_fpel_mmvd_enabled_flag` can be set to 0. Conversely, if `no_fpel_mmvd_constraint_flag` is 0, there is no constraint on the value of `sps_fpel_mmvd_enabled_flag`. That is, the value of `sps_fpel_mmvd_enabled_flag` can be determined based on the parsing results of the SPSRBSP syntax.

[0161] In this context, `sps_fpel_mmvd_enabled_flag` is a flag indicating the type of sample precision used in the motion vector difference merge mode. For example, if `sps_fpel_mmvd_enabled_flag` is 1, it indicates that the sample precision used in the motion vector difference merge mode is integer sample precision. If `sps_fpel_mmvd_enabled_flag` is 0, it indicates that the sample precision used in the motion vector difference merge mode is fractional sample precision. `sps_fpel_mmvd_enabled_flag` may not exist, and in such cases, its value can be inferred to be 0. `sps_fpel_mmvd_enabled_flag` can also be called `sps_mmvd_fullpel_only_flag`.

[0162] -no_triangle_constraint_flag

[0163] `no_triangle_constraint_flag` is a flag that controls `sps_triangle_enabled_flag`. For example, if `no_triangle_constraint_flag` is 1, then `sps_triangle_enabled_flag` can be set to 0. On the other hand, if `no_triangle_constraint_flag` is 0, there is no restriction on the value of `sps_triangle_enabled_flag`. That is, the value of `sps_triangle_enabled_flag` can be determined based on the parsing result of the SPSRBSP syntax.

[0164] In this context, `sps_triangle_enabled_flag` is a flag indicating whether triangle-based motion compensation can be applied. Triangle-based motion compensation prediction methods can divide the inter-frame compilation unit into two triangular models based on its diagonal. Each triangular region can have a different set of motion information, and motion compensation is performed based on this to generate prediction samples.

[0165] -no_ladf_constraint_flag

[0166] `no_ladf_constraint_flag` is a flag that controls `sps_ladf_enabled_flag`. For example, if `no_ladf_constraint_flag` is 1, then `sps_ladf_enabled_flag` can be set to 0. On the other hand, if `no_ladf_constraint_flag` is 0, there is no restriction on the value of `sps_ladf_enabled_flag`. That is, the value of `sps_ladf_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0167] In this case, sps_ladf_enabled_flag is a flag indicating whether sps_num_ladf_intervals_minus2, sps_ladf_lowest_interval_qp_offset, sps_ladf_qp_offset[i], and sps_ladf_delta_threshold_minus1[i] exist in SPS. For example, if the value of sps_ladf_enabled_flag is 1, it indicates that sps_num_ladf_intervals_minus2, sps_ladf_lowest_interval_qp_offset, sps_ladf_qp_offset[i], and sps_ladf_delta_threshold_minus1[i] exist in SPS. If the value of sps_ladf_enabled_flag is 0, it indicates that sps_num_ladf_intervals_minus2, sps_ladf_lowest_interval_qp_offset, sps_ladf_qp_offset[i] and sps_ladf_delta_threshold_minus1[i] do not exist in SPS.

[0168] sps_num_ladf_intervals_minus2 is a syntax element that indicates the number of syntax elements sps_ladf_delta_threshold_minus1[i] and sps_ladf_qp_offset[i] present in SPS. The value of sps_num_ladf_intervals_minus2 can be between 0 and 3.

[0169] sps_ladf_lowest_interval_qp_offset is a syntax element that indicates the offset used to derive the quantization parameter (QP) as a variable. The value of sps_ladf_lowest_interval_qp_offset can be between -63 and 63.

[0170] sps_ladf_qp_offset[i] is a syntax element that indicates the array of offsets used to derive the quantization parameters as variables. The value of sps_ladf_qp_offset[i] can be between -63 and 63.

[0171] `sps_ladf_delta_threshold_minus1[i]` is a syntax element used to calculate the value of `SpsLadfIntervalLowerBound[i]`, which is a syntax element specifying the lower bound of the i-th brightness intensity level interval. The value of `sps_ladf_delta_threshold_minus1[i]` can be between 0 and (2...). BitDepth Between -3). BitDepth indicates the bit depth and means the number of bits required to represent the brightness of the image.

[0172] -no_transform_skip_constraint_flag

[0173] `no_transform_skip_constraint_flag` is a flag that controls `sps_transform_skip_enabled_flag`. For example, if `no_transform_skip_constraint_flag` is 1, then `sps_transform_skip_enabled_flag` can be set to 0. Conversely, if `no_transform_skip_constraint_flag` is 0, there is no restriction on the value of `sps_transform_skip_enabled_flag`. That is, the value of `sps_transform_skip_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0174] In this context, `sps_transform_skip_enabled_flag` is a flag indicating whether `transform_skip_flag` exists in the transform unit syntax. For example, if `sps_transform_skip_enabled_flag` is 1, it indicates that `transform_skip_flag` can exist in the transform unit syntax. If `sps_transform_skip_enabled_flag` is 0, it indicates that `transform_skip_flag` does not exist in the transform unit syntax.

[0175] The transform_skip_flag is a flag that indicates whether to apply a transformation to the transform block.

[0176] -no_bdpcm_constraint_flag

[0177] `no_bdpcm_constraint_flag` is a flag that controls `sps_bdpcm_enabled_flag`. For example, if `no_bdpcm_constraint_flag` is 1, then `sps_bdpcm_enabled_flag` can be set to 0. On the other hand, if `no_bdpcm_constraint_flag` is 0, then there is no restriction on the value of `sps_bdpcm_enabled_flag`. That is, the value of `sps_bdpcm_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0178] In this context, `sps_bdpcm_enabled_flag` is a flag indicating the presence of `intra_bdpcm_luma_flag` and `intra_bdpcm_chroma_flag` in the compiler unit syntax of the intra-component. For example, if `sps_bdpcm_enabled_flag` is 1, it indicates that `intra_bdpcm_luma_flag` and `intra_bdpcm_chroma_flag` can exist in the compiler unit syntax of the intra-component. If `sps_bdpcm_enabled_flag` is 0, it indicates that `intra_bdpcm_luma_flag` and `intra_bdpcm_chroma_flag` do not exist in the compiler unit syntax of the intra-component. Furthermore, `sps_bdpcm_enabled_flag` may not exist. In this case, the value of `sps_bdpcm_enabled_flag` can be inferred to be equal to 0.

[0179] The intra_bdpcm_luma_flag / intra_bdpcm_chroma_flag flags indicate whether block-based incremental pulse code modulation (bdpcm) is applied to the luma / chroma compilation block at a specific location (x0, y0).

[0180] -no_qp_delta_constraint_flag

[0181] `no_qp_delta_constraint_flag` is a flag that controls `cu_qp_delta_enabled_flag`. For example, if `no_qp_delta_constraint_flag` is 1, then `cu_qp_delta_enabled_flag` can be set to 0. On the other hand, if `no_qp_delta_constraint_flag` is 0, then there is no constraint on the value of `cu_qp_delta_enabled_flag`. That is, the value of `cu_qp_delta_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0182] In this case, `cu_qp_delta_enabled_flag` is a flag indicating whether `ph_cu_qp_delta_subdiv_intra_slice` and `ph_cu_qp_delta_subdiv_inter_slice`, as syntax elements, exist in the reference PPS's PH. Furthermore, `cu_qp_delta_enabled_flag` indicates whether `cu_qp_delta_abs` and `cu_qp_delta_sign_flag` exist as syntax elements included in the transform unit syntax and palette compilation syntax. For example, if the value of `cu_qp_delta_enabled_flag` is 1, it indicates that `ph_cu_qp_delta_subdiv_intra_slice` and `ph_cu_qp_delta_subdiv_inter_slice`, as syntax elements, can exist in the reference PPS's PH. Additionally, if the value of `cu_qp_delta_enabled_flag` is 1, it indicates that the syntax elements `cu_qp_delta_abs` and `cu_qp_delta_sign_flag` can exist in both the transform unit syntax and the palette compilation syntax. If the value of `cu_qp_delta_enabled_flag` is 0, it indicates that the syntax elements `ph_cu_qp_delta_subdiv_intra_slice` and `ph_cu_qp_delta_subdiv_inter_slice` do not exist in the PH of the reference PPS. Furthermore, if the value of `cu_qp_delta_enabled_flag` is 0, it indicates that the syntax elements `cu_qp_delta_abs` and `cu_qp_delta_sign_flag` do not exist in both the transform unit syntax and the palette compilation syntax.

[0183] `ph_cu_qp_delta_subdiv_intra_slice / ph_cu_qp_delta_subdiv_inter_slice` is a syntax element representing the maximum value "cbSubdiv" of the compilation unit in the intra / inter-frame slice that conveys `cu_qp_delta_abs` and `cu_qp_delta_sign_flag`. In this case, "cbSubdiv" indicates the subdivision value of the block.

[0184] cu_qp_delta_abs is a syntax element that indicates the absolute value of the difference "CuQpDeltaVal" between the quantization parameter of the current compilation unit and the predicted value of the quantization parameter of the current compilation unit.

[0185] cu_qp_delta_sign_flag is a flag indicating the symbol “CuQpDeltaVal”.

[0186] -no_dep_quant_constraint_flag

[0187] `no_dep_quant_constraint_flag` is a flag that controls `sps_dep_quant_enabled_flag`. For example, if `no_dep_quant_constraint_flag` is 1, then `sps_dep_quant_enabled_flag` can be set to 0. On the other hand, if `no_dep_quant_constraint_flag` is 0, then there is no restriction on the value of `sps_dep_quant_enabled_flag`. That is, the value of `sps_dep_quant_enabled_flag` can be determined based on the parsing result of the SPSRBSP syntax.

[0188] In this context, `sps_dep_quant_enabled_flag` is a flag indicating whether dependency quantization is enabled for the image used as a reference to the SPS. For example, if `sps_dep_quant_enabled_flag` is 1, it indicates that dependency quantization is enabled and can be used for the image used as a reference to the SPS. If `sps_dep_quant_enabled_flag` is 0, it indicates that dependency quantization is disabled and is not used for the image used as a reference to the SPS.

[0189] -no_sign_data_hiding_constraint_flag

[0190] `no_sign_data_hiding_constraint_flag` is a flag that controls `sps_sign_data_hiding_enabled_flag`. For example, if `no_sign_data_hiding_constraint_flag` is 1, then `sps_sign_data_hiding_enabled_flag` can be set to 0. Conversely, if `no_sign_data_hiding_constraint_flag` is 0, there is no restriction on the value of `sps_sign_data_hiding_enabled_flag`. That is, the value of `sps_sign_data_hiding_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0191] In this context, `sps_sign_data_hiding_enabled_flag` is a flag indicating whether sign bit hiding for the reference SPS image is enabled. For example, if `sps_sign_data_hiding_enabled_flag` is 1, it indicates that sign bit hiding for the reference SPS image is enabled and can be used for the reference SPS image. If `sps_sign_data_hiding_enabled_flag` is 0, it indicates that sign bit hiding for the reference SPS image is disabled, and sign bit hiding is not used for the reference SPS image.

[0192] Figure 12 This is a diagram illustrating the Sequence Parameter Set (SPS) RBSP syntax according to an embodiment of the present invention.

[0193] refer to Figure 12 The SPS RBSP syntax structure also includes parameter information related to the high dynamic range (HDR) including `sps_scaling_list_enabled_flag` and an extension space for adding SPS parameters, which will be described later. Figure 12 The if clause under hrd_parameters_present_flag, which is publicly available, can be parameter information related to hdr.

[0194] Figure 13 This is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 13 As illustrated in the diagram, the GCI syntax can include flags related to transform skipping and block-based incremental pulse code modulation (bdpcm), and these flags can be sent by signals.

[0195] Reference Figure 11 and Figure 13 A more detailed description of the above `no_transform_skip_constraint_flag` and `no_bdpcm_constraint_flag` is provided. For example... Figure 11 As illustrated in the diagram, when the value of `sps_transform_skip_enabled_flag` is 1, the SPS RBSP syntax has a structure for signaling `sps_bdpcm_enabled_flag`. This structure indicates that the enable condition for transform skipping should precede the signal to indicate whether bdpcm is enabled.

[0196] Therefore, the signaling structure in the GCI syntax also needs to follow the same approach as the SPS RBSP syntax. For example, if the value of no_transform_skip_coanstraint_flag is 1, then the value of sps_transform_skip_enabled_flag is 0, and thus transform skipping is disabled. In this case, setting no_bdpcm_constraint_flag to 1 or 0 without any meaning is equivalent to using 1 bit. In other words, when transform skipping is enabled (sps_transform_skip_enabled_flag == 1), since the syntax element sps_bdpcm_enabled_flag indicating whether bdpcm is enabled is signaled, it would be a waste of unnecessary bits to signal the bdpcm constraint flag no_bdpcm_constraint_flag when transform skipping is disabled.

[0197] Therefore, as Figure 13 As illustrated in the diagram, when the value of no_transform_skip_constraint_flag is 0, no_bdpcm_constraint_flag can be sent using a signal. This can be expressed as Equation 2 below.

[0198] [Formula 2]

[0199] If(!no_transform_skip_constraint_flag)

[0200] no_bdpcm_constraint_flag

[0201] Figure 14 This is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 14As illustrated in the diagram, the GCI syntax can include flags associated with temporal motion vector prediction (temporal MVP) and sub-block-based temporal motion vector prediction (sbtmvp), and these flags can be signaled.

[0202] Reference Figure 11 and Figure 14 A more detailed description of the above `no_temporal_mvp_constraint_flag` and `no_sbtmvp_constraint_flag` is provided. For example... Figure 11 As illustrated, when the value of sps_temporal_mvp_enabled_flag is 1, the SPS RBSP syntax has a structure for signaling sps_sbtmvp_enabled_flag. This structure indicates that the enabling condition for the temporal motion vector predictor (temporal MVP) should be prioritized to indicate the sub-block-based temporal motion vector predictor (sbtmvp).

[0203] Therefore, as in Figure 9 As described, if the value of `no_temporal_mvp_constraint_flag` is 1, then the value of `sps_temporal_mvp_enabled_flag` is set to 0 and disabled, and `sps_sbtmvp_enabled_flag` is not signaled. Therefore, it is not necessary to signal `no_sbtmvp_constraint_flag`, which controls `sps_sbtmvp_enabled_flag`. On the other hand, if the value of `no_temporal_mvp_constraint_flag` is 0, then since the value of `sps_temporal_mvp_enabled_flag` is unconstrained, `sps_sbtmvp_enabled_flag` can be signaled. Therefore, `no_sbtmvp_flag`, which indicates whether `sps_sbtmvp_enabled_flag` is enabled, can be signaled. This can be expressed as Equation 3 below.

[0204] Therefore, as Figure 14 As shown in the diagram, when the value of no_temporal_mvp_constraint_flag is 0, no_sbtmvp_constraint_flag can be sent using a signal. This can be expressed as Equation 3 below.

[0205] [Formula 3]

[0206] If(!no_temporal_mvp_constraint_flag)

[0207] no_sbtmvp_constraint_flag

[0208] Figure 15 This is a diagram illustrating the General Constraint Information (GCI) syntax. For example... Figure 15 As illustrated in the diagram, the GCI syntax can include flags related to merging with motion vector difference (mmvd) and full pixel (fpel) mmvd using motion vector difference, and these flags can be sent by signals.

[0209] Reference Figure 11 and Figure 15 A more detailed description of no_mmvd_constraint_flag and no_fpel_mmvd_constraint_flag is provided. Specifically, as... Figure 11 As illustrated in the diagram, when the value of `sps_mmvd_enabled_flag` is 1, the SPS RBSP syntax has a structure for signaling `sps_fpel_mmvd_enabled_flag`. This structure indicates that it should be placed before the mmvd enabling condition to indicate full-pixel mmvd.

[0210] The `sps_mmvd_enabled_flag` option indicates whether a merging mode using motion vector difference (MMVD) is enabled in inter-frame prediction. For example, if `sps_mmvd_enabled_flag` is 1, it indicates that the merging mode using motion vector difference is enabled and can be used for image decoding in CLVS. If `sps_mmvd_enabled_flag` is 0, it indicates that the merging mode using motion vector difference is disabled and is not used for image decoding in CLVS.

[0211] Additionally, as mentioned above, sps_fpel_mmvd_enabled_flag can indicate whether motion vector differences with integer sample precision are used when mmvd is used.

[0212] In this context, `no_mmvd_constraint_flag` controls the value of `sps_mmvd_enabled_flag`. For example, if `no_mmvd_constraint_flag` is 1, then `sps_mmvd_enabled_flag` can be set to 0. Conversely, if `no_mmvd_constraint_flag` is 0, there is no restriction on the value of `sps_mmvd_enabled_flag`. That is, the value of `sps_mmvd_enabled_flag` can be determined based on the parsing results of the SPS RBSP syntax.

[0213] Therefore, if the value of `no_mmvd_constraint_flag` is 1, then the value of `sps_mmvd_enabled_flag` is set to 0 and disabled, and `sps_fpel_mmvd_enabled_flag` is not signaled. Therefore, it is also unnecessary to signal `no_fpel_mmvd_constraint_flag`, which controls `sps_fpel_mmvd_enabled_flag`. On the other hand, if the value of `no_mmvd_constraint_flag` is 0, since the value of `sps_mmvd_enabled_flag` is unconstrained, `sps_fpel_mmvd_enabled_flag` can be signaled. Therefore, `no_fpel_mmvd_constraint_flag`, indicating whether `sps_fpel_mmvd_enabled_flag` is enabled, can be signaled. This can be expressed as Equation 4 below.

[0214] [Formula 4]

[0215] If(!no_mmvd_constraint_flag)

[0216] no_fpel_mmvd_constraint_flag

[0217] Figure 16 This is a diagram illustrating the General Constraint Information (GCI) syntax. For example... Figure 16As illustrated in the diagram, the GCI syntax can include flags related to motion compensation based on affine models, and these flags can be sent by signals. Examples of flags related to motion compensation based on affine models include sps_affine_enabled_flag, sps_affine_type_flag, sps_affine_amvr_enabled_flag, and sps_affine_prof_enabled_flag.

[0218] Specifically, such as Figure 11 As illustrated in the diagram, when the value of `sps_affine_enabled_flag` is 1, the SPS RBSP syntax has structures for signaling `sps_affine_type_flag`, `sps_affine_amvr_enabled_flag`, and `sps_affine_prof_enabled_flag`. This structure implies that for `sps_affine_type_flag`, `sps_affine_amvr_enabled_flag`, and `sps_affine_prof_enabled_flag` to be signaled, the affine model-based motion compensation enablement condition should precede it.

[0219] `sps_affine_type_flag` is a flag indicating whether six-parameter affine-based motion compensation is used. If `sps_affine_type_flag` is 0, six-parameter affine-based motion compensation is not used. If `sps_affine_type_flag` is 1, it indicates that six-parameter affine-based motion compensation can be used.

[0220] sps_affine_amvr_enabled_flag is a flag indicating whether to use adaptive motion vector resolution for motion compensation based on affine models.

[0221] sps_affine_prof_enabled_flag is a flag indicating whether to perform corrections that apply optical flow to motion compensation based on an affine model.

[0222] Therefore, as Figure 9As illustrated in the diagram, if the value of the flag is 1, the value of sps_affine_enabled_flag is set to 0 and disabled, and sps_affine_type_flag, sps_affine_amvr_enabled_flag, and sps_affine_prof_enabled_flag are not signaled. Therefore, it is not necessary to signal no_affine_type_constraint_flag, no_affine_amvr_constraint_flag, and no_affine_prof_constraint_flag, which are used to control sps_affine_type_flag, sps_affine_amvr_enabled_flag, and sps_affine_prof_enabled_flag, respectively. On the other hand, if the value of no_affine_motion_constraint_flag is 0, then because the value of sps_affine_enabled_flag is unconstrained, sps_affine_type_flag, sps_affine_amvr_enabled_flag, and sps_affine_prof_enabled_flag can be sent using signals. Therefore, signaling can be used to indicate whether sps_affine_type_flag, sps_affine_amvr_enabled_flag, and sps_affine_prof_enabled_flag are sent with signals. This can be expressed as Equation 5 below.

[0223] [Formula 5]

[0224] If(!no_affine_motion_constraint_flag){

[0225] no_affine_type_constraint_flag

[0226] no_affine_amvr_constraint_flag

[0227] no_affine_prof_constraint_flag

[0228] }

[0229] Figure 17 This is a diagram illustrating the syntax according to an embodiment of the present invention.

[0230] Figure 17 (a) is a diagram indicating the slice header syntax, and Figure 17 (b) is a diagram illustrating the General Constraint Information (GCI) syntax. (See reference) Figure 17 (b) The GCI syntax may include flags related to dependency quantization and flags related to symbolic data hiding, and these flags may be signaled. Figure 17 (a) is a diagram illustrating the structure used to signal the flags dep_quant_enabled_flag related to dependent quantization and sign_data_hiding_enabled_flag related to symbolic data hiding in the slice header syntax. Figure 17 As shown in (a), the sign_data_hiding_enabled_flag can only be signaled when dep_quant_enabled_flag is disabled (not used).

[0231] Therefore, as Figure 9 As stated above, if the value of `no_dep_quant_constraint_flag` is 1, then the value of `dep_quant_enabled_flag` is set to 0 and disabled, and `sign_data_hiding_enabled_flag` can be signaled. If the value of `no_dep_quant_constraint_flag` is 0, since the value of `dep_quant_enabled_flag` is not constrained, it is necessary to signal `no_sign_data_hiding_constraint_flag` indicating whether `sign_data_hiding_enabled_flag` is enabled. This can be expressed as Equation 6 below. The above `sps_dep_quant_enabled_flag` can be the same as `dep_quant_enabled_flag`, and `sps_sign_data_hiding_enabled_flag` can be the same as `sign_data_hiding_enabled_flag`.

[0232] [Formula 6]

[0233] lf(!no_dep_quant_constraint_flag)

[0234] no_sign_data_hiding_constraint_flag

[0235] Figure 18 This is a diagram illustrating the General Constraint Information (GCI) syntax. For example... Figure 18 As illustrated in the diagram, GCI syntax can include flags associated with multiple transform sets (MTS), and these flags can be signaled. Examples of flags associated with multiple transform sets include sps_mts_enabled_flag, sps_explicit_mts_intra_enabled_flag, and sps_explicit_mts_inter_enabled_flag.

[0236] Reference Figure 11 and Figure 18 The above-mentioned `no_mts_constraint_flag`, `sps_explicit_mts_intra_enabled_flag`, and `sps_explicit_mts_inter_enabled_flag` are described in more detail. When the value of `sps_mts_enabled_flag` is 1, the SPS RBSP syntax has structures for signaling `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag`. For example, if the value of `sps_mts_enabled_flag` is 0, only DCT2-DCT2 can be used as the transform kernel. If the value of `sps_mts_enabled_flag` is 1, it indicates that kernels other than DCT2 are implicitly used. Additionally, if the value of sps_mts_enabled_flag is 1 and the values ​​of sps_explicit_mts_intra_enabled_flag and sps_explicit_mts_inter_enabled_flag are both 1, multiple transform sets can be implicitly indicated, as well as multiple transform sets for intra-frame mode and multiple transform sets for inter-frame mode.

[0237] Therefore, as Figure 9As described, when the value of `no_mts_constraint_flag` is 1, the value of `sps_mts_enabled_flag` is set to 0 and disabled, and `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` are not sent by signals. On the other hand, if the value of `no_mts_constraint_flag` is 0, because the value of `sps_mts_enabled_flag` is unconstrained, `sps_explicit_mts_intra_enabled_flag` and `sps_explicit_mts_inter_enabled_flag` can be sent by signals. This can be expressed by Equation 7 below.

[0238] [Formula 7]

[0239] If(!no_mts_constraint_flag){

[0240] sps_explicit_mts_intra_enabled_flag

[0241] sps_explicit_mts_inter_enabled_flag

[0242] }

[0243] Figure 19 This is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 19 The diagram shows the control and... Figure 11 Some of the tool / function-related syntax elements defined in the Sequence Parameter Set (SPS) RBSP syntax illustrated in the diagram can be added to the GCI syntax to extend its functionality. The syntax elements to be added are as follows.

[0244] -no_smvd_constraint_flag

[0245] `no_smvd_constraint_flag` is a flag that controls `sps_smvd_enabled_flag`. For example, if `no_smvd_constraint_flag` is 1, then `sps_smvd_enabled_flag` can be set to 0. On the other hand, if `no_smvd_constraint_flag` is 0, there is no restriction on the value of `sps_smvd_enabled_flag`. That is, the value of `sps_smvd_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0246] In this context, `sps_smvd_enabled_flag` is a flag indicating whether symmetric motion vector difference (SMP) is enabled for decoding images in CLVS. For example, if `sps_smvd_enabled_flag` is 1, it indicates that symmetric motion vector difference is enabled for decoding images in CLVS, and symmetric motion vector difference can be used to decode images in CLVS. If `sps_smvd_enabled_flag` is 0, it indicates that symmetric motion vector difference is disabled for decoding images in CLVS, and symmetric motion vector difference is not used for decoding images in CLVS.

[0247] -no_isp_constraint_flag

[0248] `no_isp_constraint_flag` is a flag that controls `sps_isp_enabled_flag`. For example, if `no_isp_constraint_flag` is 1, then `sps_isp_enabled_flag` can be set to 0. On the other hand, if `no_isp_constraint_flag` is 0, there is no restriction on the value of `sps_isp_enabled_flag`. That is, the value of `sps_isp_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0249] In this context, `sps_isp_enabled_flag` is a flag indicating whether intra-prediction using sub-partitions for decoding images in CLVS is enabled. For example, if `sps_isp_enabled_flag` is 1, it indicates that intra-prediction using sub-partitions for decoding images in CLVS is enabled and can be used. If `sps_isp_enabled_flag` is 0, it indicates that intra-prediction using sub-partitions for decoding images in CLVS is disabled and not used.

[0250] -no_mrl_constraint_flag

[0251] `no_mrl_constraint_flag` is a flag that controls `sps_mrl_enabled_flag`. For example, if `no_mrl_constraint_flag` is 1, then `sps_mrl_enabled_flag` can be set to 0. On the other hand, if `no_mrl_constraint_flag` is 0, there is no restriction on the value of `sps_mrl_enabled_flag`. That is, the value of `sps_mrl_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0252] In this context, `sps_mrl_enabled_flag` is a flag indicating whether intra-frame prediction using multi-reference lines for decoding images in CLVS is enabled. For example, if `sps_mrl_enabled_flag` is 1, it indicates that intra-frame prediction using multi-reference lines for decoding images in CLVS is enabled, and intra-frame prediction using multi-reference lines for decoding images in CLVS is used. If `sps_mrl_enabled_flag` is 0, it indicates that intra-frame prediction using multi-reference lines for decoding images in CLVS is disabled, and intra-frame prediction using multi-reference lines for decoding images in CLVS is not used.

[0253] -no_mip_constraint_flag

[0254] `no_mip_constraint_flag` is a flag that controls `sps_mip_enabled_flag`. For example, if `no_mip_constraint_flag` is 1, then `sps_mip_enabled_flag` can be set to 0. On the other hand, if `no_mip_constraint_flag` is 0, there is no restriction on the value of `sps_mip_enabled_flag`. That is, the value of `sps_mip_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0255] In this context, `sps_mip_enabled_flag` is a flag indicating whether matrix-based intra-prediction is enabled for decoding images in CLVS. For example, if `sps_mip_enabled_flag` is 1, it indicates that matrix-based intra-prediction is enabled for decoding images in CLVS, and matrix-based intra-prediction can be used to decode images in CLVS. If `sps_mip_enabled_flag` is 0, it indicates that matrix-based intra-prediction is disabled for decoding images in CLVS, and matrix-based intra-prediction is not used for decoding images in CLVS.

[0256] -no_lfnst_constraint_flag

[0257] `no_lfnst_constraint_flag` is a flag that controls `sps_lfnst_enabled_flag`. For example, if `no_lfnst_constraint_flag` is 1, then `sps_lfnst_enabled_flag` can be set to 0. On the other hand, if `no_lfnst_constraint_flag` is 0, there is no restriction on the value of `sps_lfnst_enabled_flag`. That is, the value of `sps_lfnst_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0258] In this case, `sps_lfnst_enabled_flag` is a flag indicating whether `lfnst_idx` exists in the intra-compilation unit syntax. For example, if `sps_lfnst_enabled_flag` is 1, it indicates that `lfnst_idx` can exist in the intra-compilation unit syntax. If `sps_lfnst_enabled_flag` is 0, it indicates that `lfnst_idx` does not exist in the intra-compilation unit syntax.

[0259] In this case, lfnst_idx is a syntax element that indicates whether to apply the low-frequency inseparable transformation to the current block.

[0260] -no_lmcs_constraint_flag

[0261] `no_lmcs_constraint_flag` is a flag that controls `sps_lmcs_enabled_flag`. For example, if `no_lmcs_constraint_flag` is 1, then `sps_lmcs_enabled_flag` can be set to 0. On the other hand, if `no_lmcs_constraint_flag` is 0, there is no restriction on the value of `sps_lmcs_enabled_flag`. That is, the value of `sps_lmcs_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0262] In this context, `sps_lmcs_enabled_flag` is a flag indicating whether chroma scaling and luma mapping are enabled for decoding images in CLVS. For example, if `sps_lmcs_enabled_flag` is 1, it indicates that chroma scaling and luma mapping are enabled for decoding images in CLVS, and they can be used to decode images in CLVS. If `sps_lmcs_enabled_flag` is 0, it indicates that chroma scaling and luma mapping are disabled for decoding images in CLVS, and they are not used for decoding images in CLVS.

[0263] -no_palette_constraint_flag

[0264] `no_palette_constraint_flag` is a flag that controls `sps_palette_enabled_flag`. For example, if `no_palette_constraint_flag` is 1, then `sps_palette_enabled_flag` can be set to 0. On the other hand, if `no_palette_constraint_flag` is 0, there is no constraint on the value of `sps_palette_enabled_flag`. That is, the value of `sps_palette_enabled_flag` can be determined based on the parsing result of the SPS RBSP syntax.

[0265] In this context, `sps_palette_enabled_flag` is a flag indicating whether `pred_mode_plt_flag` exists in the CLVS compilation unit syntax. For example, if `sps_palette_enabled_flag` is 1, it indicates that `pred_mode_plt_flag` can exist in the CLVS compilation unit syntax. If `sps_palette_enabled_flag` is 0, it indicates that `pred_mode_plt_flag` does not exist in the CLVS compilation unit syntax.

[0266] In this case, pred_mode_plt_flag is a flag indicating whether the palette mode is applied to the current compilation unit.

[0267] More specifically, referring to `no_palette_constraint_flag`, in order to signal `no_palette_constraint_flag`, the variable value of `chroma_format_idc` should be obtained beforehand. `chroma_format_idc` indicates the chroma sample relative to the luminance sample. Therefore, it is necessary to include the syntax element `chroma_format_idc` in `general_constraint_info()`, which is the GCI syntax. In this case, it is a necessary structure in both DPS and VPS syntaxes. In another case, when the profile-tier-level syntax included in the SPS syntax includes GCI syntax, the GCI syntax included in the profile-tier-level syntax can be parsed, and then the `chroma_format_idc` syntax element can be parsed again, thus `chroma_format_idc` can be redundantly called. In other words, the GCI syntax included in the DPS or VPS syntax includes `chroma_format_idc`, and `chroma_format_idc` is included in the GCI syntax included in the profile-tier-level syntax, thus `chroma_format_idc` can be redundantly parsed. Therefore, when GCI syntax is included in the profile-level syntax, the chroma_format_idx syntax element can be omitted from signaling. Alternatively, in systems where the decoder always parses GCI syntax, the chroma_format_idc syntax element can be configured not to be included in the SPS RBSP syntax.

[0268] exist Figure 19Each constraint flag described in the document can control the SPS enable flag sps_x_enabled_flag corresponding to the constraint flag no_x_constraint_flag.

[0269] Figure 20 This is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 20 As illustrated in the diagram, GCI syntax can include syntactic elements related to CCLM. (Reference) Figure 20 A more detailed description will be provided for reference. Figure 9 The description is no_cclm_constraint_flag.

[0270] The `no_cclm_constraint_flag` signal can be sent when the value of the variable `ChromaArrayType` is not equal to 0 (`ChromaArrayType != 0`). `ChromaArrayType` specifies the format values ​​of the luminance and chrominance components of the decoded video data. As mentioned above, `no_cclm_constraint_flag` can be used to control `sps_cclm_enabled_flag`.

[0271] When the value of no_cclm_constraint_flag is equal to 0 or the value of chroma_format_idc is equal to 1, no_cclm_colocated_chroma_constraint_flag can be sent using a signal. In this case, no_cclm_colocated_chroma_constraint_flag is a flag used to control sps_cclm_colocated_chroma_flag.

[0272] As above Figure 9 As described above, sps_cclm_enabled_flag is a flag indicating whether cross-component linear model intra-frame prediction from the luma component to the chroma component is enabled for decoding images in CLVS.

[0273] `sps_cclm_colocated_chroma_flag` is a flag indicating whether the left and right sampled luminance samples in the intra-frame prediction of the cross-component linear model are at the same position as the top-left luminance sample or a specified different position. To send `sps_cclm_colocated_chroma_flag` via a signal, information about the variable `ChromaArrayType` is required. The value of the variable `ChromaArrayType` can be obtained by combining information about `chroma_format_idc` and information about `separate_colour_plane_flag`. Therefore, the syntax elements `chroma_format_idc` and `separate_colour_plane_flag` can be defined and included in the SPS RBSP syntax.

[0274] The separate_colour_plane_flag is a flag that indicates whether the three individual components Y, Cb, and Cr should be compiled separately when compiling an image.

[0275] Figure 21 This is a diagram illustrating the General Constraint Information (GCI) syntax according to an embodiment of the present invention. Figure 21 As shown, GCI syntax can include the syntax element no_palette_constraint_flag.

[0276] The following text will refer to Figure 21 For a more detailed description, please refer to the reference. Figure 19 The syntax element described is no_palette_constraint_flag. For example... Figure 11 As shown in the diagram, if the value of chroma_format_idc is 3 (chroma_format_idc == 3), the sps_palette_enabled_flag can be sent.

[0277] The `sps_palette_enabled_flag`, which relates to whether palette mode can be applied to the current compilation unit, is a syntax element controlled by `no_palette_constraint_flag` and can be included in the SPS RBSP syntax. Palette mode is a method of mapping actual pixel values ​​to table index values ​​after pre-configuring color information in a table. If the value of `chroma_format_idc` is equal to 3, the chroma format can be 4:4:4. When parsing GCI syntax, the syntax elements included in the GCI syntax can individually control the functionality associated with the corresponding syntax element. For example, in... Figure 19In the GCI syntax, the `no_palette_constraint_flag` corresponding to `sps_palette_enabled_flag`, i.e., the flag controlling `sps_palette_enabled_flag`, can be included in the GCI syntax. As mentioned above, if the GCI syntax is parsed and the value of `no_palette_constraint_flag` included in the GCI syntax is 1, then `sps_palette_enabled_flag` can be set to 0. That is, even if `sps_palette_enabled_flag` is set to 1 and enabled, if the value of `no_palette_constraint_flag` is 1, the value of `sps_palette_enabled_flag` can be set to 0. On the other hand, if the value of `no_palette_constraint_flag` is 0, then `sps_palette_enabled_flag` can have a set value, and therefore decoding operations can be performed. Additionally, the condition that allows `sps_palette_enabled_flag` to be sent or parsed by signal can be the case where the value of `chroma_format_idc` is 3 (`chroma_format_idc == 3`).

[0278] Figure 22 This is a diagram illustrating the compiler tree unit syntax according to an embodiment of the present invention.

[0279] like Figure 22 As illustrated, palette compilation syntax can be included in the compilation tree unit syntax. If `pred_mode_plt_flag` is true, the decoder can parse the palette compilation syntax "palette_coding()". In other words, if the value of `pred_mode_plt_flag` is 1, it indicates that the current compilation block is compiled in palette mode. If the current block is not an IBC-compiled block and `sps_plt_enabled_flag` is true (if its value is 1), `pred_mode_plt_flag` can be signaled / parsed. In this case, `sps_plt_enabled_flag` is related to... Figure 9 The `sps_palette_enabled_flag` described in [the original text] is the same. Palette mode is a method that pre-configures color information into a table and then maps actual pixel values ​​to the table's index values, unlike general intra-frame prediction methods. For example... Figure 19As shown in the diagram, when the value of chroma_format_idc is 3 (when chroma_format_idc == 3), that is, when the chroma format is 4:4:4, the sps_plt_enabled_flag can be sent / resolved using signals.

[0280] Figure 23 This is a diagram illustrating the positional relationships of the most probable modes (MPMs) required for deriving intra-frame prediction modes according to an embodiment of the present invention.

[0281] Based on Figure 23 The MPM is derived from the brightness prediction patterns at L and A positions surrounding the current compiled block. When palette mode is enabled, blocks compiled in palette mode can exist in neighboring blocks of the current compiled block. Figure 23 As illustrated, when the value of `pred_mode_plt_flag` of the neighboring block at position A is equal to 1, the neighboring block at position A refers to a block compiled in palette mode. However, because the neighboring block at position A is not compiled in the general prediction mode, a stored intra-prediction mode value may not exist. In this case, the intra-prediction mode value can be set to a preset prediction mode. For example, the preset prediction mode could be a planar mode. However, the invention is not limited to this and can be set to any of the DC, vertical, horizontal, and angle modes.

[0282] The following will describe an example of the MPM(IntraPredModeY[xCb][yCb]) output.

[0283] – If the value of intra_luma_not_planar_flag[xCb][yCb] is 0, then

[0284] IntraPredModeY[xCb][yCb] sets the mode to planar.

[0285] – If the value of BdpcmFlag[xCb][yCb] is 1, then

[0286] IntraPredModeY[xCb][yCb] can be set as shown in Formula 8 below.

[0287] [Formula 8]

[0288] BdpcmDir[xCb][yCb]? INTRA_ANGULAR50: INTRA_ANGULAR18 – If the value of intra_luma_not_planar_flag[xCb][yCb] is 1, the mode of intra_luma_not_planar_flag[xCb][yCb] can be set according to the steps described later.

[0289] (Step 1) The positions of the neighboring blocks (xNbA, yNbA) and (xNbB, yNbB) can be set to (xCb-1, yCb+cbHeight-1) and (xCb+cbWidth-1, yCb-1), respectively. In this case, xCb is the x-coordinate of the current block, yCb is the y-coordinate of the current block, cbHeight is the height of the current block, and cbWidth is the width of the current block.

[0290] (Step 2) When X is replaced with A or B, candIntraPredModeX can be set according to the steps described later.

[0291] (Step 2-1) During the block availability derivation process, the input position (xCurr, yCurr) is set to (xCb, yCb), and the neighboring block position (xNbY, yNbY) is set to (xNbX, yNbX) and assigned as available output.

[0292] (Step 2-2) The candidate candIntraPredModeX for intra-prediction mode can be set as follows.

[0293] (Step 2-2-1) If one or more of the following conditions are true, candIntraPredModeX can be set to planar mode.

[0294] (Condition 1) The variable availableX is set to false.

[0295] (Condition 2) CupredMode[xNbX][yNbX] is not set to intra-frame mode.

[0296] (Condition 3) The value of intra_mip_flag[xNbX][yNbX] is equal to 1.

[0297] (Condition 4) The value of pred_mode_plt_flag[xNbX][yNbX] is equal to 1.

[0298] (Condition 5) X equals B, and yCb-1 is less than ((yCb>>CtbLog2SizeY)< <CtbLog2SizeY)。

[0299] (Step 2-2-2) Otherwise, candIntraPredModeX can be set to equalIntraPredModeY[xNbX][yNbX].

[0300] Figure 24 This is a diagram illustrating the relationship between the corresponding luminance blocks required for deriving the chromaticity DM mode according to an embodiment of the present invention. Figure 24 (a) is a diagram illustrating the segmentation of a brightness block with a dual-tree structure, and Figure 24 (b) is a diagram illustrating the segmentation of chroma blocks with a dual-tree structure. (Reference) Figure 24 (a) and Figure 24 (b) allows for different segmentation of luma and chroma blocks with a dual-tree structure. In the chroma format 4:4:4, samples are configured with luma and chroma in a 1:1 ratio. Therefore, the luma and chroma blocks have the same block size. For example, with... Figure 24 In the chromaticity block structure of (a), the luminance block corresponding to block A can be corresponding to... Figure 24 (a) of block A. Figure 24 (a) and Figure 24 (b) Block A has a width x length of W / 2 x H. In a dual-tree structure, the chroma prediction method and the luma prediction method can be different. When the chroma prediction method uses the intra-frame prediction mode (DM) of luma as is, the chroma mode signaling can be determined based on the luma mode at a preset position of the corresponding luma block. In this case, the preset position can be [xCb+cbWidth / 2][yCb+cbHeight / 2] or (xCb,yCb). (xCb,yCb) can be the position of the upper left corner of the corresponding luma. cbWidth and cbHeight refer to the width and height of the corresponding luma. Therefore, if the pred_mode_plt_flag value corresponds to... Figure 24 (a) The preset position of position C in the luminance block is 1, and the chroma block prediction method can be set to the preset mode. In this case, the preset mode can be any of the planar, DC, vertical, horizontal, and angular modes.

[0301] The DM mode export process for chroma blocks will be described below. Additionally, the position of the block used to check the mip and ibc flags can be set to the default [xCb+cbWidth / 2][yCb+cbHeight / 2].

[0302] Exporting IntraPredModeC[xCb][yCb] chromaticity prediction mode:

[0303] The variable CclmEnabled can be derived by invoking the cross-component chromaticity intra-frame prediction check procedure using the luminance position (xCb, yCb) as input.

[0304] Exporting the lumaIntraPredMode of the luma block corresponding to the chroma block:

[0305] (Step 1) If the value of intra_mip_flag[xCb+cbWidth / 2][yCb+cbHeight / 2] is 1, then lumaIntraPredMode is set to planar mode.

[0306] (Step 2) Otherwise, if the value of pred_mode_plt_flag[xCb+cbWidth / 2][yCb+cbHeight / 2] is 1, then set lumaIntraPredMode to the preset mode PRE_DEFINED_MODE.

[0307] (Step 3) Otherwise, if CuprdMode[xCb+cbWidth / 2][yCb+cbHeight / 2] is IBC mode, then set lumaIntraPredMode to DC mode.

[0308] (Step 4) Otherwise, set lumaIntraPredMode to equal IntraPredModeY[xCb+cbWidth / 2][yCb+cbHeight / 2].

[0309] Although this specification has been primarily described in terms of the decoder, it can also be applied to the encoder. While the terminology parsing in this specification has been described as focusing on the process of obtaining information from the bitstream, from the encoder's perspective, it can be interpreted as configuring the corresponding information in the bitstream. Therefore, terminology parsing is not limited to decoder operations but can also be understood as the behavior of configuring the bitstream in the encoder. That is, the encoder can obtain the flags (syntax elements) included in the aforementioned GCI syntax and configure the bitstream including the flags. Furthermore, the bitstream can be configured by storing it on a computer-readable recording medium.

[0310] The above embodiments of the present invention can be implemented by various means. For example, the embodiments of the present invention can be implemented by hardware, firmware, software, or a combination thereof.

[0311] In the case of hardware implementation, the method according to the embodiments of the present invention can be implemented by one or more of the following: application-specific integrated circuit (ASIC), digital signal processor (DSP), digital signal processing device (DSPD), programmable logic device (PLD), field-programmable gate array (FPGA), processor, controller, microcontroller, microprocessor, etc.

[0312] When implemented via firmware or software, the method according to embodiments of the invention can be implemented in the form of modules, processes, or functions that perform the above-described functions or operations. Software code can be stored in memory and driven by a processor. The memory can be located inside or outside the processor and can exchange data with the processor in various known ways.

[0313] Some embodiments may also be implemented in the form of a recording medium including computer-executable instructions, such as a program module executed by a computer. A computer-readable medium can be any available medium accessible to a computer and can include all volatile, non-volatile, removable, and non-removable media. Additionally, a computer-readable medium can include computer storage media and communication media. Computer storage media includes all volatile, non-volatile, removable, and non-removable media implemented in any method or technique for storing information such as computer-readable instructions, data structures, program modules, or other data. Typically, communication media includes computer-readable instructions, other data modulated data signals (such as data structures or program modules), or other transmission mechanisms, and includes any information transmission medium.

[0314] The above description of the present invention is for illustrative purposes only, and it will be understood that those skilled in the art to which this invention pertains can make changes to the invention without altering its technical concept or essential characteristics, and that the invention can be readily modified in other specific forms. Therefore, the above embodiments are illustrative and not limiting in any way. For example, each component described as a single entity can be distributed and implemented, and similarly, components described as distributed can also be implemented in an associated manner.

[0315] The scope of this invention is defined by the appended claims rather than the foregoing detailed description, and all changes or modifications derived from the meaning and scope of the appended claims and their equivalents shall be construed as being included within the scope of this invention.

Claims

1. A video signal decoding device, comprising a processor, in, The processor is configured to: Decode the General Constraint Information (GCI) syntax structure included in the bitstream of the video signal. Based on the result of decoding the GCI syntax structure, the bitstream is decoded. The GCI syntax structure is included in the profile, layer, and level syntax. The profile, layer, and level syntax are included in the Sequence Parameter Set (SPS) Raw Byte Sequence Payload (RBSP) syntax structure. The GCI syntax structure includes a first GCI syntax element that constrains the value of a first SPS syntax element included in the SPS RBSP syntax structure, wherein the first SPS syntax element indicates whether palette mode is enabled. The GCI syntax structure includes a second GCI syntax element that constrains the value of a second SPS syntax element included in the SPS RBSP syntax structure. This second SPS syntax element indicates whether intra-frame prediction with multiple reference lines is enabled. Wherein, when the value of the first GCI syntax element indicates that the value of the first SPS syntax element is constrained, the value of the first SPS syntax element is constrained to a value indicating that the palette mode is disabled, and Wherein, when the value of the second GCI syntax element indicates that the value of the second SPS syntax element is constrained, the value of the second SPS syntax element is constrained to a value indicating that the intra-prediction with multiple reference lines is disabled.

2. The video signal decoding device according to claim 1, in, The GCI syntax structure includes a third GCI syntax element that constrains the value of a third SPS syntax element included in the SPS RBSP syntax structure. This third SPS syntax element indicates whether intra-frame prediction with sub-partitions is enabled. Wherein, when the value of the third GCI syntax element indicates that the value of the third SPS syntax element is constrained, the value of the third SPS syntax element is constrained to a value indicating that the intra-prediction with sub-partitions is disabled.

3. The video signal decoding device according to claim 1, in, The GCI syntax structure includes a fourth GCI syntax element that constrains the value of a fourth SPS syntax element included in the SPS RBSP syntax structure, the fourth SPS syntax element indicating whether matrix-based intra-frame prediction is enabled, and Wherein, when the value of the fourth GCI syntax element indicates that the value of the fourth SPS syntax element is constrained, the value of the fourth SPS syntax element is constrained to a value indicating that matrix-based intra-frame prediction is disabled.

4. The video signal decoding device according to claim 1, in, The GCI syntax structure includes a fifth GCI syntax element that constrains the value of the fifth SPS syntax element included in the SPS RBSP syntax structure, the fifth SPS syntax element indicating whether low-frequency inseparable transform is enabled, and Wherein, when the value of the fifth GCI syntax element indicates that the value of the fifth SPS syntax element is constrained, the value of the fifth SPS syntax element is constrained to a value indicating that the low-frequency inseparable transform is disabled.

5. The video signal decoding device according to claim 1, in, The GCI syntax structure includes a sixth GCI syntax element that constrains the value of the sixth SPS syntax element included in the SPS RBSP syntax structure. This sixth SPS syntax element indicates whether a merging mode with motion vector differences is enabled. Wherein, when the value of the sixth GCI syntax element indicates that the value of the sixth SPS syntax element is constrained, the value of the sixth SPS syntax element is constrained to a value indicating that the merge mode with motion vector difference is disabled.

6. The video signal decoding device according to claim 1, in, The GCI syntax structure includes a seventh GCI syntax element that constrains the value of the seventh SPS syntax element included in the SPS RBSP syntax structure, the seventh SPS syntax element indicating whether symmetric motion vector difference is enabled, and Wherein, when the value of the seventh GCI syntax element indicates that the value of the seventh SPS syntax element is constrained, the value of the seventh SPS syntax element is constrained to a value indicating that the symmetric motion vector difference is disabled.

7. The video signal decoding device according to claim 1, in, The GCI syntax structure includes an eighth GCI syntax element that constrains the value of the eighth SPS syntax element included in the SPS RBSP syntax structure. This eighth SPS syntax element indicates whether luminance mapping with chroma scaling is enabled. Wherein, when the value of the eighth GCI syntax element indicates that the value of the eighth SPS syntax element is constrained, the value of the eighth SPS syntax element is constrained to a value indicating that the luminance mapping with chroma scaling is disabled.

8. A video signal encoding device, comprising a processor, in, The processor is configured to: Obtain the General Constraint Information (GCI) syntax structure, and Encode the bitstream including the GCI syntax structure, and The GCI syntax structure is included in the profile, layer, and level syntax. The profile, layer, and level syntax are included in the Sequence Parameter Set (SPS) Raw Byte Sequence Payload (RBSP) syntax structure. The GCI syntax structure includes a first GCI syntax element that constrains the value of a first SPS syntax element included in the SPS RBSP syntax structure, wherein the first SPS syntax element indicates whether palette mode is enabled. The GCI syntax structure includes a second GCI syntax element that constrains the value of a second SPS syntax element included in the SPS RBSP syntax structure. This second SPS syntax element indicates whether intra-frame prediction with multiple reference lines is enabled. Wherein, when the value of the first GCI syntax element indicates that the value of the first SPS syntax element is constrained, the value of the first SPS syntax element is constrained to a value indicating that the palette mode is disabled, and Wherein, when the value of the second GCI syntax element indicates that the value of the second SPS syntax element is constrained, the value of the second SPS syntax element is constrained to a value indicating that the intra-prediction with multiple reference lines is disabled.

9. The video signal encoding device according to claim 8, in, The GCI syntax structure includes a third GCI syntax element that constrains the value of a third SPS syntax element included in the SPS RBSP syntax structure. This third SPS syntax element indicates whether intra-frame prediction with sub-partitions is enabled. Wherein, when the value of the third GCI syntax element indicates that the value of the third SPS syntax element is constrained, the value of the third SPS syntax element is constrained to a value indicating that the intra-prediction with sub-partitions is disabled.

10. The video signal encoding device according to claim 8, in, The GCI syntax structure includes a fourth GCI syntax element that constrains the value of a fourth SPS syntax element included in the SPS RBSP syntax structure, the fourth SPS syntax element indicating whether matrix-based intra-frame prediction is enabled, and Wherein, when the value of the fourth GCI syntax element indicates that the value of the fourth SPS syntax element is constrained, the value of the fourth SPS syntax element is constrained to a value indicating that matrix-based intra-frame prediction is disabled.

11. The video signal encoding device according to claim 8, in, The GCI syntax structure includes a fifth GCI syntax element that constrains the value of the fifth SPS syntax element included in the SPS RBSP syntax structure, the fifth SPS syntax element indicating whether low-frequency inseparable transform is enabled, and Wherein, when the value of the fifth GCI syntax element indicates that the value of the fifth SPS syntax element is constrained, the value of the fifth SPS syntax element is constrained to a value indicating that the low-frequency inseparable transform is disabled.

12. The video signal encoding device according to claim 8, in, The GCI syntax structure includes a sixth GCI syntax element that constrains the value of the sixth SPS syntax element included in the SPS RBSP syntax structure. This sixth SPS syntax element indicates whether a merging mode with motion vector differences is enabled. Wherein, when the value of the sixth GCI syntax element indicates that the value of the sixth SPS syntax element is constrained, the value of the sixth SPS syntax element is constrained to a value indicating that the merge mode with motion vector difference is disabled.

13. The video signal encoding device according to claim 8, in, The GCI syntax structure includes a seventh GCI syntax element that constrains the value of the seventh SPS syntax element included in the SPS RBSP syntax structure, the seventh SPS syntax element indicating whether symmetric motion vector difference is enabled, and Wherein, when the value of the seventh GCI syntax element indicates that the value of the seventh SPS syntax element is constrained, the value of the seventh SPS syntax element is constrained to a value indicating that the symmetric motion vector difference is disabled.

14. The video signal encoding device according to claim 8, in, The GCI syntax structure includes an eighth GCI syntax element that constrains the value of the eighth SPS syntax element included in the SPS RBSP syntax structure. This eighth SPS syntax element indicates whether luminance mapping with chroma scaling is enabled. Wherein, when the value of the eighth GCI syntax element indicates that the value of the eighth SPS syntax element is constrained, the value of the eighth SPS syntax element is constrained to a value indicating that the luminance mapping with chroma scaling is disabled.

15. A method for obtaining a bitstream, the method comprising: Obtain the general constraint information (GCI) syntax structure; as well as A bitstream is obtained by encoding the GCI syntax structure, and The GCI syntax structure is included in the profile, layer, and level syntax. The profile, layer, and level syntax are included in the Sequence Parameter Set (SPS) Raw Byte Sequence Payload (RBSP) syntax structure. The GCI syntax structure includes a first GCI syntax element that constrains the value of a first SPS syntax element included in the SPS RBSP syntax structure, wherein the first SPS syntax element indicates whether palette mode is enabled. The GCI syntax structure includes a second GCI syntax element that constrains the value of a second SPS syntax element included in the SPS RBSP syntax structure. This second SPS syntax element indicates whether intra-frame prediction with multiple reference lines is enabled. Specifically, when the value of the first GCI syntax element indicates that the value of the first SPS syntax element is constrained, the value of the first SPS syntax element is constrained to a value indicating that the palette mode is disabled, and Wherein, when the value of the second GCI syntax element indicates that the value of the second SPS syntax element is constrained, the value of the second SPS syntax element is constrained to a value indicating that the intra-prediction with multiple reference lines is disabled.

16. The method according to claim 15, in, The GCI syntax structure includes a third GCI syntax element that constrains the value of a third SPS syntax element included in the SPS RBSP syntax structure. This third SPS syntax element indicates whether intra-frame prediction with sub-partitions is enabled. Wherein, when the value of the third GCI syntax element is 1, the value of the third SPS syntax element is set to 0, which is a value indicating that the intra-prediction with sub-partitions is disabled.

17. The method according to claim 15, in, The GCI syntax structure includes a fourth GCI syntax element that constrains the value of a fourth SPS syntax element included in the SPS RBSP syntax structure, the fourth SPS syntax element indicating whether matrix-based intra-frame prediction is enabled, and Wherein, when the value of the fourth GCI syntax element indicates that the value of the fourth SPS syntax element is constrained, the value of the fourth SPS syntax element is constrained to a value indicating that matrix-based intra-frame prediction is disabled.

18. The method according to claim 15, in, The GCI syntax structure includes a fourth GCI syntax element that constrains the value of a fourth SPS syntax element included in the SPS RBSP syntax structure, the fourth SPS syntax element indicating whether matrix-based intra-frame prediction is enabled, and Wherein, when the value of the fourth GCI syntax element indicates that the value of the fourth SPS syntax element is constrained, the value of the fourth SPS syntax element is constrained to a value indicating that matrix-based intra-frame prediction is disabled.

19. The method according to claim 15, in, The GCI syntax structure includes a fifth GCI syntax element that constrains the value of the fifth SPS syntax element included in the SPS RBSP syntax structure, the fifth SPS syntax element indicating whether low-frequency inseparable transform is enabled, and Wherein, when the value of the fifth GCI syntax element indicates that the value of the fifth SPS syntax element is constrained, the value of the fifth SPS syntax element is constrained to a value indicating that the low-frequency inseparable transform is disabled.

20. The method according to claim 15, in, The GCI syntax structure includes a sixth GCI syntax element that constrains the value of the sixth SPS syntax element included in the SPS RBSP syntax structure. This sixth SPS syntax element indicates whether a merging mode with motion vector differences is enabled. Wherein, when the value of the sixth GCI syntax element indicates that the value of the sixth SPS syntax element is constrained, the value of the sixth SPS syntax element is constrained to a value indicating that the merge mode with motion vector difference is disabled.

21. A method for processing a video signal, the method comprising: Decode the General Constraint Information (GCI) syntax structure included in the bitstream of the video signal; as well as Based on the result of decoding the GCI syntax structure, the bitstream is decoded. The GCI syntax structure is included in the profile, layer, and level syntax. The profile, layer, and level syntax are included in the Sequence Parameter Set (SPS) Raw Byte Sequence Payload (RBSP) syntax structure. The GCI syntax structure includes a first GCI syntax element that constrains the value of a first SPS syntax element included in the SPS RBSP syntax structure, wherein the first SPS syntax element indicates whether palette mode is enabled. The GCI syntax structure includes a second GCI syntax element that constrains the value of a second SPS syntax element included in the SPS RBSP syntax structure. This second SPS syntax element indicates whether intra-frame prediction with multiple reference lines is enabled. Wherein, when the value of the first GCI syntax element indicates that the value of the first SPS syntax element is constrained, the value of the first SPS syntax element is constrained to a value indicating that the palette mode is disabled, and Wherein, when the value of the second GCI syntax element indicates that the value of the second SPS syntax element is constrained, the value of the second SPS syntax element is constrained to a value indicating that the intra-prediction with multiple reference lines is disabled.

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