Electronic device

Abstract

An electronic device is provided. The electronic device may include a sensor layer defining a sensing area and a peripheral area adjacent to the sensing area, and the sensor layer includes: first electrodes in the sensing area and arranged in a first direction; a second electrode in the sensing area and arranged in a second direction crossing the first direction; a third electrode in the sensing area and arranged in the first direction; first traces electrically connected to the first electrodes in a one-to-one correspondence manner; second traces electrically connected to the second electrodes in a one-to-one correspondence manner; a first loop trace electrically connected to the third electrode; a second loop trace electrically connected to the third electrode; and a third loop trace electrically connected to one of the third electrodes.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0064476, filed on May 17, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] One or more embodiments of this disclosure described herein relate to electronic devices with improved pen charging performance. Background Technology

[0004] Multimedia electronic devices such as televisions (TVs), mobile phones, tablet computers, laptop computers, navigation systems, and / or game consoles include display devices for displaying images. In addition to general input methods such as buttons, keyboards, and / or mice, electronic devices may include a sensor layer (or input sensor) capable of providing touch-based input methods that allow users to input information or commands appropriately and intuitively. The sensor layer can sense the user's touch and / or pressure. Meanwhile, for users accustomed to using writing instruments to input information and / or for specific applications (e.g., applications for sketching or drawing), the need for more precise input using a pen is constantly increasing. Summary of the Invention

[0005] One or more embodiments of this disclosure provide electronic devices with improved pen charging performance.

[0006] According to one or more embodiments, an electronic device includes a sensor layer defining a sensing region and a peripheral region adjacent to the sensing region, and the sensor layer includes: a first electrode in the sensing region and arranged in a first direction; a second electrode in the sensing region and arranged in a second direction intersecting the first direction; a third electrode in the sensing region and arranged in the first direction; a first trace electrically connected to the first electrode in a one-to-one correspondence; a second trace electrically connected to the second electrode in a one-to-one correspondence; a first loop trace electrically connected to the third electrode; a second loop trace electrically connected to the third electrode; and a third loop trace electrically connected to one of the third electrodes.

[0007] In the third electrode, one of the third electrodes can be closest to the peripheral region and can be electrically connected to a second loop trace and a first loop trace in the second loop trace.

[0008] The electronic device can further include a sensor driver configured to drive the sensor layer and configured to selectively operate in a first mode for sensing a touch input or a second mode for sensing a pen input, the second mode including a charging driving mode and a pen sensing driving mode.

[0009] In the charging driving mode, the sensor driver can be configured to provide a signal to the first pad connected to one of the second loop traces and the second pad connected to the third loop trace, without providing a signal to the other of the first pad and the second pad.

[0010] In the charging driving mode, the sensor driver can be configured to provide a signal to the first pad connected to one of the second loop traces and the second pad connected to the third loop trace.

[0011] The sensor layer can further include a fourth loop trace electrically connected to one of the third electrodes.

[0012] In the charging driving mode, the sensor driver can be configured to provide a signal to at least one of the first pad connected to one of the second loop traces, the second pad connected to the third loop trace, and the third pad connected to the fourth loop trace.

[0013] The sensor layer can further include a fourth loop trace electrically connected to another of the third electrodes.

[0014] The first portion of the third loop trace can be at the sensing area, and the second portion of the third loop trace can be at the peripheral area.

[0015] The first portion of the third loop trace can overlap at least one of the first electrodes.

[0016] The second portion of the third loop trace can be between the sensing area and the first loop trace in a plan view.

[0017] The sensor layer can further include a fourth electrode in the sensing area and arranged in the second direction, and an auxiliary trace electrically connected to the fourth electrode.

[0018] The third loop trace can be between at least one of the second traces and the auxiliary trace in a plan view.

[0019] A width of the sensing area in the first direction can be greater than a width of the sensing area in the second direction, wherein the third loop trace is separated from the sensing area in the first direction.

[0020] According to one or more embodiments, an electronic device includes a sensor layer defining a sensing area and a peripheral area adjacent to the sensing area, and the sensor layer includes: first electrodes in the sensing area and arranged in a first direction; second electrodes in the sensing area and arranged in a second direction crossing the first direction; third electrodes in the sensing area and arranged in the first direction; and a trace electrically connected to the first electrodes, the second electrodes, and the third electrodes, and including: a first loop trace connected to one end of one of the third electrodes; a second loop trace connected to the other end of the one of the third electrodes; and a third loop trace connected to the one of the third electrodes.

[0021] The trace can further include a fourth loop trace connected to another one of the third electrodes.

[0022] The electronic device can further include a sensor driver configured to drive the sensor layer, and configured to selectively operate in a first mode of sensing a touch input or a second mode of sensing a pen input, the second mode including a charging driving mode and a pen sensing driving mode.

[0023] In the charging driving mode, the sensor driver can be configured to provide a signal to one of a first pad connected to the second loop trace and a second pad connected to the third loop trace, without providing a signal to the other one of the first pad and the second pad.

[0024] In the charging driving mode, the sensor driver can be configured to provide a signal to the first pad connected to the second loop trace, and to provide a signal to the second pad connected to the third loop trace.

[0025] The trace can further include a fourth loop trace connected to another one of the third electrodes, wherein the third loop trace is separated from the fourth loop trace in a plan view, and the sensing area is interposed between the third loop trace and the fourth loop trace. BRIEF DESCRIPTION OF DRAWINGS

[0026] The above and other aspects of the present disclosure will become apparent by describing in detail embodiments thereof with reference to the attached drawings.

[0027] FIG. 1A is a perspective view of an electronic device according to one or more embodiments of the present disclosure.

[0028] FIG. 1B is a rear view of an electronic device according to one or more embodiments of the present disclosure.

[0029] FIG. 2 is a perspective view of an electronic device according to one or more embodiments of the present disclosure.

[0030] FIG. 3 is a perspective view of an electronic device according to one or more embodiments of the disclosure.

[0031] FIG. 4 is a schematic cross-sectional view of a display panel according to one or more embodiments of the disclosure.

[0032] FIG. 5 is a view for describing an operation of an electronic device according to one or more embodiments of the disclosure.

[0033] FIG. 6A is a cross-sectional view of a display panel according to one or more embodiments of the disclosure.

[0034] FIG. 6B is a cross-sectional view of a sensor layer according to one or more embodiments of the disclosure.

[0035] FIG. 7 is a plan view of a display panel according to one or more embodiments of the disclosure.

[0036] FIG. 8A is a plan view illustrating a first conductive layer of two sensors according to one or more embodiments of the disclosure.

[0037] FIG. 8B is a plan view illustrating a second conductive layer of two sensors according to one or more embodiments of the disclosure.

[0038] FIG. 9 is a cross-sectional view of a sensor layer according to one or more embodiments of the disclosure, along FIG. 8A and FIG. 8B line I-I' shown in FIG. 1A.

[0039] FIG. 10A is an enlarged plan view of area AA' shown in FIG. 8A

[0040] FIG. 10B is an enlarged plan view of area BB' shown in FIG. 8B

[0041] FIG. 11A is a view illustrating an operation of a sensor driver according to one or more embodiments of the disclosure.

[0042] FIG. 11B is a view illustrating an operation of a sensor driver according to one or more embodiments of the disclosure.

[0043] FIG. 12 is a view for describing a first mode according to one or more embodiments of the disclosure. ​​

[0044] FIG. 13 is a view for describing a second mode according to one or more embodiments of the present disclosure.

[0045] FIG. 14A is a graph depicting a waveform of a first signal according to one or more embodiments of the present disclosure.

[0046] FIG. 14B is a graph depicting a waveform of a second signal according to one or more embodiments of the present disclosure.

[0047] FIG. 15A is a table representing a signal provided to a sensor layer according to one or more embodiments of the present disclosure.

[0048] FIG. 15B is a table representing a signal provided to a sensor layer according to one or more embodiments of the present disclosure.

[0049] FIG. 16 is a view for describing a second mode according to one or more embodiments of the present disclosure.

[0050] FIG. 17 is a view for describing a second mode based on a sensor according to one or more embodiments of the present disclosure.

[0051] FIG. 18A is a plan view showing a first conductive layer of two sensors according to one or more embodiments of the present disclosure.

[0052] FIG. 18B is a plan view showing a second conductive layer of two sensors according to one or more embodiments of the present disclosure.

[0053] FIG. 19 is a plan view of a display panel according to one or more embodiments of the present disclosure.

[0054] FIG. 20A is a table representing a signal provided to a sensor layer according to one or more embodiments of the present disclosure.

[0055] FIG. 20B is a table representing a signal provided to a sensor layer according to one or more embodiments of the present disclosure.

[0056] FIG. 21 is a plan view of a display panel according to one or more embodiments of the present disclosure.

[0057] FIG. 22 is a table representing a signal provided to a sensor layer according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0058] Aspects of implementations of the present disclosure and methods implementing them can be more readily understood by reference to the detailed description of the implementations and the drawings. In the following, aspects of some implementations will be described in more detail with reference to the drawings. However, the described implementations can be implemented in one or more suitable different forms, and should not be construed as being limited to the implementations shown herein. Rather, these implementations are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the aspects of the present disclosure to those skilled in the art. Therefore, processes, elements, and techniques not necessary to an understanding of the aspects of the present disclosure by persons of ordinary skill in the art can not be described.

[0059] Unless otherwise noted, like reference characters, numerals, or combinations thereof in all drawings and the written description disclose similar or like elements and therefore the description will not be repeated for each. Additionally, portions that are not pertinent to the description of one or more implementations can not be shown so that the description is clear.

[0060] In the drawings, the relative sizes of elements, layers, and regions can be exaggerated for clarity. Further, the use of cross-hatching and / or shading in the drawings is generally provided to illustrate the boundaries, of the adjacent elements. As such, unless specified, the presence or absence of cross-hatching or shading is not intended to convey or imply any preference or requirement for particular material, material properties, dimensions, ratios, commonality of elements between illustrations, and / or any other characteristic, attribute, property, etc. of the elements shown.

[0061] One or more suitable implementations are described herein with reference to cross-sectional illustrations as schematic illustrations of implementations and / or intermediate structures. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Additionally, the particular structural and functional configurations shown in the illustrations disclosed herein are merely illustrative for the purposes of describing implementations according to the present disclosure. As such, implementations disclosed herein are not necessarily limited to the particular illustrated shapes of regions as other shapes of regions are possible and are contemplated herein.

[0062] For example, an implant region shown as rectangular can have a rounded or curved shape at its edges and / or a gradient of implant concentration instead of a binary change from the implant region to a non-implant region. Likewise, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which implantation occurs. Thus, the regions shown in the drawings are schematic in nature and their shapes are not intended to show the actual shape of the regions of the device and are not intended to be limiting. Additionally, as will be appreciated by those skilled in the art, the described implementations can be modified in one or more suitable different ways without departing from the spirit or scope of the present disclosure.

[0063] In the detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more suitable embodiments. It will be apparent, however, that one or more suitable embodiments can be practiced without limitation to these specific details, or with one or more equivalent arrangements. In other instances, well-known structures and devices are not shown in detail in order to avoid unnecessarily obscuring one or more suitable embodiments.

[0064] For ease of description, spatially relative terms, such as "below", "beneath", "lower", "under", "above", "upper", and the like, can be used herein for describing an element's relationship to another element(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" or "under" other elements would then be oriented "above" the other elements. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. Similarly, when a first part is described as being "on" a second part, it can mean that the first part is arranged on either the upper side or the lower side of the second part, without being limited to the upper side of the second part based on a gravitational direction.

[0065] In addition, in this specification, the phrase "on plane" or "in plan view" means to view a target portion from the top, and the phrase "on section" means to view a section formed by vertically cutting the target portion from the side.

[0066] It will be understood that when an element, region, layer, portion, section, component, or part is referred to as being "formed on", "set on", "on", "connected to", or "coupled to" another element, region, layer, portion, section, component, or part, it can be directly formed on, directly set on, directly on, directly connected to, directly coupled to, or directly linked to the other element, region, layer, portion, section, component, or part, or it can be indirectly formed on, indirectly set on, indirectly on, indirectly connected to, indirectly coupled to, or indirectly linked to the other element, region, layer, portion, section, component, or part such that one or more intervening elements, regions, layers, portions, sections, components, or parts can be present. For example, when an element, layer, portion, section, component, or part is referred to as being "electrically connected" or "electrically coupled" to another element, layer, portion, section, component, or part, it can be directly electrically connected or directly electrically coupled to the other element, layer, portion, section, component, or part, or there can be intervening elements, layers, portions, sections, components, or parts. However, "directly connected / directly coupled" refers to a component directly connected or directly coupled to another component without an intervening component. Meanwhile, other expressions describing the relationship between components, such as "between", "directly between", or "adjacent to", and "directly adjacent to", can be similarly interpreted. Also, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can be one or more intervening elements or layers.

[0067] For purposes of this disclosure, expressions such as "at least one of," "one of," and "selected from the group of" modifying a list of elements are to be understood as open-ended, meaning that the nomenclature specifically permits that the term "one of" can be more than one and permit the selected element or elements can be included more than one time in the list of elements. For example, "at least one of X, Y, and Z" and "one or more of X, Y, and Z" can be interpreted to include X alone, Y alone, Z alone, or a combination of these, such as XYZ, XY, XZ, and YZ or any variations thereof. Similarly, expressions such as "at least one of A and B" can include at least one of A, at least one of B, or at least one of A and at least one of B. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, expressions such as "A and / or B" can include A, B, or A and B. In addition, use of "may" in describing the embodiments of the present disclosure indicates that one or more embodiments of the present disclosure.

[0068] The same reference numbers are used throughout the drawings to refer to the same or like parts. Also, in the drawings, the thickness, ratio, and size of components are exaggerated for effective description of the technical content. The expression "and / or" includes one or more combinations of the associated components that can be defined.

[0069] It will be understood that, although the terms "first," "second," etc. can be used herein to describe one or more appropriate components, these components should not be limited by these terms. These terms are only used to distinguish one component from another. For example, a first component could be termed a second component, and, similarly, a second component could be called a first component without departing from the true scope of the present disclosure. The singular expression includes the plural expression unless clearly indicated otherwise in the context.

[0070] In examples, the x-axis, y-axis, and / or z-axis are not limited to the three axes of a rectangular coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction, and / or the third direction.

[0071] In addition, the terms "under," "below," "on," "above," and the like are used to describe the relative relationship of the components shown in the drawings. Conceptually relative terms are described based on the direction shown in the drawings.

[0072] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be understood that the terms "comprise", "comprises", "comprising", "has", "have", "having", "include", "includes" and "including" specify the presence of stated features, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0073] As used herein, the terms "substantially", "about", "approximately", and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art. In view of the discussed measurement and the error associated with measuring a particular quantity (i.e., the limitations of the measurement system), "about" or "approximately," as used herein, includes the recited value and means within an acceptable range of deviation of the particular value as determined by one of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ± 30%, ± 20%, ± 10%, ± 5% of the recited value. Additionally, the use of "may" when describing embodiments of the present disclosure refers to one or more embodiments of the present disclosure.

[0074] When one or more embodiments can be implemented differently, a particular process sequence can be performed differently from the described sequence. For example, two consecutively described processes can be performed substantially simultaneously, or in the reverse order of the described sequence.

[0075] Further, any numerical ranges recited herein are intended to include all sub-ranges of the same numerical precision subsumed within the recited range. For example, a range of "1.0 to 10.0" is intended to include all sub-ranges, e.g., 2.4 to 7.6, within the same precision used in the recited range, e.g., 2.5 to 7.5. Any maximum numerical limitation recited herein is intended to include all lower numerical limitations subsumed therein and any minimum numerical limitation recited in this specification is intended to include all higher numerical limitations subsumed therein. Accordingly, the applicant reserves the right to amend this specification, including the claims, to expressly recite any sub-range subsumed within the ranges expressly recited in this specification.

[0076] The electronic or electric devices and / or any other related devices or components according to one or more embodiments of the present disclosure described herein can be implemented using any suitable hardware, firmware (for example, an application specific integrated circuit), software, or a combination of software, firmware, and hardware. For example, one or more suitable components of the devices can be formed on one integrated circuit (IC) chip, or can be formed on separate IC chips. In addition, one or more suitable components of the devices can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or can be formed on one substrate.

[0077] In the present disclosure, it will be understood that the terms "include", "includes" or "including", "comprise", "comprises" or "comprising", or "have", "has" or "having" specify the presence of stated features, integers, numbers, steps, operations, elements, components, and / or groups thereof but do not preclude the presence or addition of one or more other features, integers, numbers, steps, operations, elements, components, and / or groups thereof. In addition, the terms "include", "includes" or "including", "comprise", "comprises" or "comprising", or similar terms include or support the term "consist of" and "consist essentially of" indicating the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof without the presence or addition of other features, integers, steps, operations, elements, components, and / or groups thereof.

[0078] Unless otherwise defined, all terms used in the specification, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. In addition, terms such as those defined in a generally used dictionary should be interpreted as having a meaning consistent with the meaning in the context of the relevant art and should not be interpreted in an overly idealized or formalized manner unless explicitly defined herein.

[0079] The terms "part" and "unit" mean a software component or a hardware component that performs a certain function. The hardware component can include, for example, a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC). The software component can refer to executable code in an addressable storage medium and / or data used by the executable code. Thus, the software component can be, for example, an object-oriented software component, a class component, and a task component, and can include a process, a function, an attribute, a procedure, a subroutine, a program code segment, a driver, firmware, microcode, data, a database, a data structure, a table, an array, or a variable.

[0080] Hereinafter, one or more embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0081] FIG. 1A is a perspective view of an electronic device 1000 according to one or more embodiments of the present disclosure. FIG. 1B is a rear view of an electronic device 1000 according to one or more embodiments of the present disclosure.

[0082] Referring to FIG. 1A and FIG. 1B The electronic device 1000 can be a device activated according to an electrical signal. For example, the electronic device 1000 can display an image and sense an input (e.g., an external input) applied from the outside. The external input can be an input of a user. The input of the user can include one or more suitable types of external input such as a part of a user's body, a pen PN, light, heat, and / or pressure.

[0083] The electronic device 1000 can include a first display panel DP1 and a second display panel DP2. The first display panel DP1 and the second display panel DP2 can be separate panels from each other (e.g., the first display panel DP1 can be separated from the second display panel DP2). The first display panel DP1 can be referred to as a main display panel, and the second display panel DP2 can be referred to as an auxiliary display panel or an external display panel.

[0084] The first display panel DP1 can include a first display (e.g., a display unit) DA1-F, and the second display panel DP2 can include a second display DA2-F. The area of the second display panel DP2 can be smaller than the area of the first display panel DP1. To correspond to the sizes of the first display panel DP1 and the second display panel DP2, the area of the first display DA1-F can be greater than the area of the second display DA2-F.

[0085] In a state in which the electronic device 1000 is in the unfolded state, the first display DA1-F can have a plane substantially parallel to the first direction DR1 and the second direction DR2. A thickness direction of the electronic device 1000 can be parallel to a third direction DR3 that intersects the first direction DR1 and the second direction DR2. Accordingly, a front surface (or an upper surface) and a rear surface (or a lower surface) of components constituting the electronic device 1000 can be defined based on the third direction DR3.

[0086] The first display panel DP1 or the first display DA1-F can include a folding area FA that is folded or unfolded, and a plurality of non-folding areas NFA1 and NFA2 that are separated from each other (e.g., spaced apart from each other) with the folding area FA interposed therebetween (e.g., the folding area FA is interposed between the first non-folding area NFA1 and the second non-folding area NFA2). The second display panel DP2 can overlap one of the plurality of non-folding areas NFA1 and NFA2. For example, the second display panel DP2 can overlap the first non-folding area NFA1.

[0087] A display direction of the first image IM1a displayed on a portion of the first display panel DP1 can be opposite to a display direction of the second image IM2a displayed on the second display panel DP2. For example, a display direction of the first image IM1a displayed in the first non-folding area NFA1 can be opposite to a display direction of the second image IM2a displayed on the second display panel DP2. For example, the first image IM1a can be displayed in the third direction DR3, and the second image IM2a can be displayed in a fourth direction DR4 opposite to the third direction DR3.

[0088] In one or more embodiments of the disclosure, the folding area FA can be curved with respect to a folding axis extending in a direction parallel to a long side of the electronic device 1000 (e.g., a direction parallel to the second direction DR2). In a state in which the electronic device 1000 is folded, the folding area FA has a set curvature (e.g., a predetermined curvature) and a set radius of curvature (e.g., a predetermined radius of curvature).

[0089] The first non-folding area NFA1 and the second non-folding area NFA2 can face each other, and the electronic device 1000 is folded inwardly, thereby reducing or preventing the first display DA1-F from being exposed to the outside. Alternatively, in one or more embodiments of the disclosure, the electronic device 1000 can be folded outwardly such that the first display DA1-F is exposed to the outside. Alternatively, in one or more embodiments of the disclosure, the electronic device 1000 can be folded inwardly or outwardly in the unfolded state.

[0090] FIG. 1AOne folding area FA defined (provided or included) in the electronic device 1000 is schematically illustrated, but the present disclosure is not limited thereto. For example, a plurality of folding axes and a plurality of folding areas corresponding thereto can be defined in the electronic device 1000, and the electronic device 1000 can be folded inwardly or outwardly in a state in which each of the plurality of folding areas is unfolded.

[0091] According to one or more embodiments of the present disclosure, even if at least one of the first display panel DP1 and the second display panel DP2 does not include a digitizer (e.g., when at least one of the first display panel DP1 and the second display panel DP2 does not include a digitizer), at least one of the first display panel DP1 and the second display panel DP2 can sense an input of the pen PN. Accordingly, because the digitizer for sensing the pen PN is omitted, an increase in thickness, an increase in weight, and a decrease in flexibility of the electronic device 1000 caused by the addition of the digitizer can not occur. Accordingly, the second display panel DP2, as well as the first display panel DP1, can be designed to sense the pen PN.

[0092] FIG. 2 FIG. 1A is a perspective view of an electronic device 1000-1 according to one or more embodiments of the present disclosure. FIG. 3 FIG. 1B is a perspective view of an electronic device 1000-2 according to one or more embodiments of the present disclosure.

[0093] FIG. 2 It is schematically illustrated that the electronic device 1000-1 is a tablet, and the electronic device 1000-1 can include a display panel DP. FIG. 3 It is schematically illustrated that the electronic device 1000-2 is a laptop computer, and the electronic device 1000-2 can include a display panel DP. Although FIG. 3 FIG. 1C is a perspective view of the electronic device 1000-2, but includes a coordinate axis in FIG. 1B. FIG. 3 The coordinate axis in FIG. 1B is displayed based on the display panel DP within the electronic device 1000-2.

[0094] In one or more embodiments of the present disclosure, the display panel DP can sense an input (e.g., an external input) applied from the outside. The external input can be an input of a user. The input of the user can include one or more suitable types of external input, such as a part of a human body of a user, a pen PN (see FIG. 2), light, heat, and / or pressure. FIG. 1A

[0095] ​According to one or more embodiments of the disclosure, the display panel DP can sense an input of the pen PN even though the display panel DP does not include a digitizer (e.g., when the display panel DP does not include a digitizer). Accordingly, since the digitizer for sensing the pen PN is omitted, an increase in thickness and weight of the electronic device 1000-1 or 1000-2 due to the addition of the digitizer can not occur.

[0096] FIG. 1A A foldable electronic device 1000 is schematically illustrated, and FIG. 2 A bar-type electronic device 1000-1 is schematically illustrated, but the disclosure described below is not limited thereto. For example, the following description can be applied to a curved-type electronic device, a rollable-type electronic device, a slidable-type electronic device, and / or a stretchable-type electronic device.

[0097] FIG. 4 is a schematic cross-sectional view of a display panel DP according to one or more embodiments of the disclosure.

[0098] Referring to FIG. 4 , the display panel DP can include a display layer 100 and a sensor layer 200.

[0099] The display layer 100 can be a component that substantially generates an image. A display area 100A and a non-display area 100NA adjacent to the display area 100A can be defined in the display layer 100. An image can be displayed in the display area 100A.

[0100] The display layer 100 can be a light-emitting display layer. For example, the display layer 100 can be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic light-emitting display layer, a quantum dot display layer, a micro light-emitting diode (LED) display layer, and / or a nano LED display layer. The display layer 100 can include a base layer 110, a circuit layer 120, a light-emitting element layer 130, and an encapsulation layer 140.

[0101] The base layer 110 can be a member that provides a base surface on which the circuit layer 120 is disposed. The base layer 110 can have a multi-layer structure or a single-layer structure. The base layer 110 can be a glass substrate, a metal substrate, a silicon substrate, a polymer substrate, etc., but the disclosure is not limited thereto.

[0102] The circuit layer 120 can be disposed on the base layer 110. The circuit layer 120 can include an insulating layer, a semiconductor pattern, a conductive pattern, a signal line, etc. The insulating layer, the semiconductor layer, and the conductive layer can be formed on the base layer 110 in a manner such as coating and deposition, and can be selectively patterned through a plurality of photolithography processes.

[0103] The light emitting element layer 130 can be disposed on the circuit layer 120. The light emitting element layer 130 can include a light emitting element. For example, the light emitting element layer 130 can include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro-LED, and / or a nano-LED.

[0104] The encapsulation layer 140 can be disposed on the light emitting element layer 130. The encapsulation layer 140 can protect the light emitting element layer 130 from moisture, oxygen, and / or foreign substances such as dust particles.

[0105] The sensor layer 200 can be disposed on the display layer 100. A sensing area 200A and a peripheral area 200NA adjacent to the sensing area 200A can be defined in the sensor layer 200. The sensing area 200A can overlap the display area 100A, and the peripheral area 200NA can overlap the non-display area 100NA.

[0106] In one or more embodiments of the disclosure, a boundary BD between the display area 100A and the non-display area 100NA and a boundary BD between the sensing area 200A and the peripheral area 200NA can overlap each other. However, this is merely an example, and the disclosure is not particularly limited thereto. For example, an area of the sensing area 200A can be greater than an area of the display area 100A, or an area of the display area 100A can be greater than an area of the sensing area 200A.

[0107] The sensor layer 200 can sense an external input applied from an external unit. The sensor layer 200 can be an integrated sensor that is continuously disposed (e.g., formed) during a process of manufacturing the display layer 100, or the sensor layer 200 can be an external sensor attached to the display layer 100. The sensor layer 200 can be referred to as a sensor, an input sensing layer, an input sensing panel, an electronic device for sensing an input coordinate, etc.

[0108] According to one or more embodiments of the disclosure, the sensor layer 200 can sense both an input of a passive input method (such as a human body of a user) and an input of an input device that generates a magnetic field having a set resonance frequency (e.g., a predetermined resonance frequency). The input device can be referred to as a pen, an input pen, a magnetic pen, a stylus, and / or an electromagnetic resonance pen.

[0109] FIG. 5 is a view for describing an operation of the electronic device 1000 according to one or more embodiments of the disclosure.

[0110] Referring to FIG. 5 , the electronic device 1000 can include the display layer 100, the sensor layer 200, a display driver 100C, a sensor driver 200C, a main driver 1000C, and a power supply circuit 1000P.

[0111] The sensor layer 200 can sense a first input 2000 or a second input 3000 applied from an external unit. The first input 2000 and the second input 3000 can be an input method that can provide a change in capacitance of the sensor layer 200, or can be an input method that can induce an induced current in the sensor layer 200. For example, the first input 2000 can be a passive input method such as a human body of a user. The second input 3000 can be an input of a pen PN or an input of a radio frequency integrated circuit (RFIC) tag. For example, the pen PN can be a passive pen or an active pen.

[0112] In one or more embodiments of the disclosure, the pen PN can be a device that generates a magnetic field having a set resonance frequency (e.g., a predetermined resonance frequency). The pen PN can be configured to transmit an output signal based on an electromagnetic resonance method. The pen PN can be referred to as an input device, an input pen, a magnetic pen, a stylus, and / or an electromagnetic resonance pen.

[0113] The pen PN can include an RLC resonance circuit, and the RLC resonance circuit can include a resistor (not shown), an inductor L, and a capacitor C. In one or more embodiments of the disclosure, the RLC resonance circuit can be a variable resonance circuit having a variable resonance frequency. In this case, the inductor L can be a variable inductor and / or the capacitor C can be a variable capacitor, but the disclosure is not limited thereto.

[0114] The inductor L generates a current through a magnetic field (e.g., formed in) in the electronic device 1000 (e.g., the sensor layer 200 or a coil included in the electronic device 1000). However, the disclosure is not particularly limited thereto. For example, if the pen PN operates as an active type (e.g., when the pen PN operates as an active type), even if a magnetic field is not provided from the outside (e.g., when a magnetic field is not provided from the outside), the pen PN itself can internally generate a current. The generated current is transmitted to the capacitor C. The capacitor C charges the current input from the inductor L and discharges the charged current to the inductor L. Thereafter, the inductor L can emit a magnetic field having a resonance frequency. An induced current can flow in the sensor layer 200 through the magnetic field emitted by the pen PN, and the induced current can be transmitted to the sensor driver 200C as a reception signal (or a sensing signal).

[0115] The main driver 1000C can control the overall operation of the electronic device 1000. For example, the main driver 1000C can control the operation of the display driver 100C and the sensor driver 200C. The main driver 1000C can include at least one microprocessor, and can further include a graphic controller. The main driver 1000C can be referred to as an application processor, a central processing unit, and / or a main processor.

[0116] The display driver 100C can drive the display layer 100. The display driver 100C can receive image data and control signals from the main driver 1000C. The control signals can include one or more suitable signals. For example, the control signals can include an input vertical synchronization signal, an input horizontal synchronization signal, a main clock signal, a data enable signal, etc.

[0117] The sensor driver 200C can drive the sensor layer 200. The sensor driver 200C can receive control signals from the main driver 1000C. The control signals can include a clock signal of the sensor driver 200C. In addition, the control signals can further include a mode determination signal that determines a driving mode of the sensor driver 200C and the sensor layer 200.

[0118] The sensor driver 200C can be implemented as an integrated circuit (IC) and electrically connected to the sensor layer 200. For example, the sensor driver 200C can be directly mounted on a set region (e.g., a predetermined region) of the display panel, or can be mounted on a separate printed circuit board using a chip on film (COF) method and electrically connected to the sensor layer 200.

[0119] The sensor driver 200C and the sensor layer 200 can selectively operate in a first mode or a second mode. For example, the first mode can be a mode for sensing a touch input (e.g., the first input 2000). The second mode can be a mode for sensing an input of the pen PN (e.g., the second input 3000). The first mode can be referred to as a touch sensing mode, and the second mode can be referred to as a pen sensing mode.

[0120] Switching between the first mode and the second mode can be performed in one or more suitable ways. For example, the sensor driver 200C and the sensor layer 200 can be driven in the first mode and the second mode in a time-division manner, and can sense the first input 2000 and the second input 3000. Alternatively, switching between the first mode and the second mode can be generated by user selection or by a specific action (or input) of the user, the first mode or the second mode can be activated or deactivated by activating or deactivating a specific application, or the current mode can be switched from one of the first mode and the second mode to the other. Alternatively, while the sensor driver 200C and the sensor layer 200 are alternately operated in the first mode and the second mode, if the first input 2000 is sensed (e.g., when the first input 2000 is sensed), the first mode can be maintained, or if the second input 3000 is sensed (e.g., when the second input 3000 is sensed), the second mode can be maintained.

[0121] The sensor driver 200C can calculate input coordinate information based on a signal received from the sensor layer 200, and can provide a coordinate signal having the coordinate information to the main driver 1000C. The main driver 1000C performs an operation corresponding to the user's input based on the coordinate signal. For example, the main driver 1000C can operate the display driver 100C, thereby displaying a new application image on the display layer 100.

[0122] The power supply circuit 1000P can include a power management integrated circuit (PMIC). The power supply circuit 1000P can generate a plurality of driving voltages for driving the display layer 100, the sensor layer 200, the display driver 100C, and / or the sensor driver 200C. For example, the plurality of driving voltages can include a gate high voltage, a gate low voltage, a first driving voltage (e.g., an ELVSS voltage), a second driving voltage (e.g., an ELVDD voltage), an initialization voltage, etc., but the present disclosure is not particularly limited to the above examples.

[0123] FIG. 6A is a cross-sectional view of a display panel DP according to one or more embodiments of the present disclosure.

[0124] Referring to FIG. 6A At least one buffer layer BFL is disposed on an upper surface of the base layer 110. The buffer layer BFL can improve a coupling force between the base layer 110 and the semiconductor pattern. The buffer layer BFL can be disposed in multiple layers. Optionally, the display layer 100 can further include a barrier layer. The buffer layer BFL can include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL can include a structure in which a silicon oxide layer and a silicon nitride layer are alternately stacked.

[0125] The semiconductor patterns SC, AL, DR, and SCL can be disposed on the buffer layer BFL. The semiconductor patterns SC, AL, DR, and SCL can include polysilicon. However, the present disclosure is not limited thereto, and the semiconductor patterns SC, AL, DR, and SCL can also include amorphous silicon, low-temperature polysilicon, and / or an oxide semiconductor.

[0126] FIG. 6ASome of the semiconductor patterns SC, AL, DR, and SCL are shown, and the semiconductor patterns can be arranged in other areas. The semiconductor patterns SC, AL, DR, and SCL can be arranged across pixels in a certain rule. The semiconductor patterns SC, AL, DR, and SCL can have different electrical properties depending on whether the semiconductor patterns SC, AL, DR, and SCL are doped. The semiconductor patterns SC, AL, DR, and SCL can include a first area defined by the semiconductor patterns SC, DR, and SCL having a high electrical conductivity and a second area defined by the semiconductor pattern AL having a low electrical conductivity. The first area defined by the semiconductor patterns SC, DR, and SCL can be doped with an N-type dopant or a P-type dopant. A P-type transistor can include a doped area doped with a P-type dopant, and an N-type transistor can include a doped area doped with an N-type dopant. The second area defined by the semiconductor pattern AL can be an undoped area or an area doped at a lower concentration than the first area defined by the semiconductor patterns SC, DR, and SCL.

[0127] The electrical conductivity of the first area defined by the semiconductor patterns SC, DR, and SCL can be greater than the electrical conductivity of the second area defined by the semiconductor pattern AL, and the first area defined by the semiconductor patterns SC, DR, and SCL can substantially function as an electrode or a signal line. The second area defined by the semiconductor pattern AL can substantially correspond to an active area or a channel of the transistor 100PC (e.g., a partial semiconductor pattern AL). In other words, a partial semiconductor pattern AL of the semiconductor patterns SC, AL, DR, and SCL can be an active area of the transistor 100PC, other partial semiconductor patterns SC and DR can be a source area or a drain area of the transistor 100PC, and another partial semiconductor pattern SCL can be a connection electrode or a connection signal line.

[0128] Each of the pixels can have an equivalent circuit including a plurality of transistors, at least one capacitor, and at least one light emitting element, and the equivalent circuit of the pixel can be modified into one or more suitable forms. FIG. 6A One transistor 100PC and one light emitting element 100PE included in a pixel are schematically shown.

[0129] A source area (e.g., a partial semiconductor pattern SC), an active area (e.g., a partial semiconductor pattern AL), and a drain area (e.g., a partial semiconductor pattern DR) of the transistor 100PC can be defined (e.g., formed) by the semiconductor patterns SC, AL, DR, and SCL. The source area and the drain area can extend in opposite directions from the active area in a cross-section. FIG. 6APortions of the connection signal line defined by (e.g., formed by) the semiconductor patterns SC, AL, DR, and SCL are shown. Although not shown separately, the connection signal line can be connected to the drain region of the transistor 100PC on the plane.

[0130] A first insulating layer 10 can be disposed on the buffer layer BFL. The first insulating layer 10 can overlap the plurality of pixels in common and cover the semiconductor patterns SC, AL, DR, and SCL. The first insulating layer 10 can be an inorganic layer and / or an organic layer and can have a single-layer structure or a multi-layer structure. The first insulating layer 10 can include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In some embodiments, the first insulating layer 10 can be a single-layer silicon oxide layer. The first insulating layer 10 and the insulating layers of the circuit layer 120, which will be described below, can be inorganic layers and / or organic layers and can have a single-layer structure or a multi-layer structure. The inorganic layers can include at least one of the above-described materials, but the present disclosure is not limited thereto.

[0131] A gate GT of the transistor 100PC is disposed on the first insulating layer 10. The gate GT can be a portion of a metal pattern. The gate GT overlaps the active region of the transistor 100PC. The gate GT can be used as a mask in a process of doping or reducing the semiconductor patterns SC, AL, DR, and SCL.

[0132] A second insulating layer 20 can be disposed on the first insulating layer 10 and cover the gate GT. The second insulating layer 20 can overlap the pixels in common. The second insulating layer 20 can be an inorganic layer and / or an organic layer and can have a single-layer structure or a multi-layer structure. The second insulating layer 20 can include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In some embodiments, the second insulating layer 20 can have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0133] A third insulating layer 30 can be disposed on the second insulating layer 20. The third insulating layer 30 can have a single-layer structure or a multi-layer structure. For example, the third insulating layer 30 can have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0134] A first connection electrode CNE1 can be disposed on the third insulating layer 30. The first connection electrode CNE1 can be connected to the connection signal line through a contact hole CNT-1 that passes through the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30.

[0135] A fourth insulating layer 40 can be disposed on the third insulating layer 30. The fourth insulating layer 40 can be a single-layer silicon oxide layer. A fifth insulating layer 50 can be disposed on the fourth insulating layer 40. The fifth insulating layer 50 can be an organic layer.

[0136] The second connection electrode CNE2 can be provided on the fifth insulating layer 50. The second connection electrode CNE2 can be connected to the first connection electrode CNE1 through a contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0137] The sixth insulating layer 60 can be provided on the fifth insulating layer 50 to cover the second connection electrode CNE2. The sixth insulating layer 60 can be an organic layer.

[0138] The light emitting element layer 130 can be provided on the circuit layer 120. The light emitting element layer 130 can include the light emitting element 100PE. For example, the light emitting element layer 130 can include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro-LED, and / or a nano-LED. Hereinafter, it will be described that the light emitting element 100PE is an organic light emitting element, but the present disclosure is not particularly limited thereto.

[0139] The light emitting element 100PE can include a first electrode AE, a light emitting layer EL, and a second electrode CE.

[0140] The first electrode AE can be provided on the sixth insulating layer 60. The first electrode AE can be connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60.

[0141] The pixel defining film 70 can be provided on the sixth insulating layer 60 and cover a portion of the first electrode AE. An opening 70-OP is defined in the pixel defining film 70. The opening 70-OP of the pixel defining film 70 exposes at least a portion of the first electrode AE.

[0142] The first display DA1-F (see FIG. 1A ) can include a light emitting area PXA and a non-light emitting area NPXA adjacent to the light emitting area PXA. The non-light emitting area NPXA can surround the light emitting area PXA. In some embodiments, the light emitting area PXA can be defined to correspond to a portion area of the first electrode AE exposed by the opening 70-OP.

[0143] The light emitting layer EL can be provided on the first electrode AE. The light emitting layer EL can be provided in a region corresponding to the opening 70-OP. FIG. 6A It is schematically shown that the light emitting layer EL is provided inside the opening 70-OP, but the present disclosure is not limited thereto. For example, the light emitting layer EL can extend to cover a portion of a side surface of the pixel defining film 70 defining the opening 70-OP and an upper surface of the pixel defining film 70.

[0144] In one or more embodiments of the disclosure, the light emitting layer EL can be provided (e.g., formed) separately from each of the pixels. If the light emitting layer EL is provided separately from each of the pixels (e.g., when the light emitting layer EL is provided separately from each of the pixels), each of the light emitting layers EL can emit light having at least one of blue, red, and green. However, the disclosure is not limited thereto, and the light emitting layer EL can have an integrated shape and can be commonly included in a plurality of pixels. In some embodiments, the light emitting layer EL can also provide white light.

[0145] The second electrode CE can be provided on the light emitting layer EL. The second electrode CE can have an integrated shape and can be commonly included in a plurality of pixels.

[0146] In one or more embodiments of the disclosure, a hole control layer can be provided between the first electrode AE and the light emitting layer EL. The hole control layer can be commonly provided in the light emitting area PXA and the non-light emitting area NPXA. The hole control layer can include a hole transport layer, and can further include a hole injection layer. An electron control layer can be provided between the light emitting layer EL and the second electrode CE. The electron control layer can include an electron transport layer, and can further include an electron injection layer. The hole control layer and the electron control layer can be commonly provided in a plurality of pixels by using an opening mask or an inkjet process.

[0147] The encapsulation layer 140 can be provided on the light emitting element layer 130. The encapsulation layer 140 can include inorganic layers, organic layers, and inorganic layers which are sequentially stacked, and the layers constituting the encapsulation layer 140 are not limited thereto. The inorganic layer can protect the light emitting element layer 130 from moisture and oxygen, and the organic layer can protect the light emitting element layer 130 from foreign substances such as dust particles. The inorganic layer can include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, etc. The organic layer can include an acrylic-based organic layer, and the disclosure is not limited thereto.

[0148] The sensor layer 200 can include a base layer 201, a first conductive layer 202, an intermediate insulating layer 203, a second conductive layer 204, and a cover insulating layer 205.

[0149] The base layer 201 can be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 can be an organic layer including an epoxy resin, an acrylic-based resin, and / or an imide-based resin. The base layer 201 can have a single layer structure, or can have a multi-layer structure in which layers are stacked in a third direction DR3. In some embodiments of the disclosure, the sensor layer 200 can not include the base layer 201.

[0150] Each of the first conductive layer 202 and the second conductive layer 204 can have a single layer structure, or a multi-layer structure in which layers are stacked in a third direction DR3.

[0151] Each of the first conductive layer 202 and the second conductive layer 204 having a single layer structure can include a metal layer or a transparent conductive layer. The metal layer can include molybdenum, silver, titanium, copper, aluminum, and / or an alloy thereof. The transparent conductive layer can include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and / or indium zinc tin oxide (IZTO). In addition, the transparent conductive layer can include a conductive polymer such as poly(3,4-ethylenedioxythiophene) (PEDOT), a metal nanowire, graphene, etc.

[0152] Each of the first conductive layer 202 and the second conductive layer 204 having a multi-layer structure can include a metal layer. The metal layer can have a three-layer structure of titanium / aluminum / titanium, for example (e.g., one layer of titanium, one layer of aluminum, and one layer of titanium). The conductive layer having a multi-layer structure can include at least one metal layer and at least one transparent conductive layer.

[0153] In some embodiments of the disclosure, the thickness of the first conductive layer 202 can be greater than or equal to the thickness of the second conductive layer 204. If the thickness of the first conductive layer 202 is greater than the thickness of the second conductive layer 204 (e.g., when the thickness of the first conductive layer 202 is greater than the thickness of the second conductive layer 204), the resistance of components (e.g., electrodes, sensing patterns, bridging patterns, etc.) included in the first conductive layer 202 can be reduced. In addition, because the first conductive layer 202 is disposed under the second conductive layer 204, even if the thickness of the first conductive layer 202 increases (e.g., when the thickness of the first conductive layer 202 increases), the probability that components included in the first conductive layer 202 are visible due to reflection of external light can be less than the probability that components included in the second conductive layer 204 are visible due to reflection of external light.

[0154] At least one of the intermediate insulating layer 203 and the cover insulating layer 205 can include an inorganic film. The inorganic film can include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0155] At least one of the intermediate insulating layer 203 and the cover insulating layer 205 can include an organic film. The organic film can include at least one of an acrylic-based resin, a methacrylate-based resin, a polyisoprene-based resin, an ethylene-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyimide-based resin, a polyamide-based resin, and a perylene-based resin.

[0156] It has been described above that the sensor layer 200 includes the first conductive layer 202 and the second conductive layer 204 (e.g., a total of two conductive layers), but the present disclosure is not particularly limited thereto. For example, the sensor layer 200 can include three or more conductive layers.

[0157] FIG. 6B is a cross-sectional view of a sensor layer 200 according to one or more embodiments of the present disclosure.

[0158] Referring to FIG. 6A and FIG. 6B A second width 204wt of the second mesh line MS2 included in the second conductive layer 204 can be greater than or equal to a first width 202wt of the first mesh line MS1 included in the first conductive layer 202. If the user USR observes the first mesh line MS1 and the second mesh line MS2 from the side surface (e.g., when the user USR observes the first mesh line MS1 and the second mesh line MS2 from the side surface), the first mesh line MS1 has a smaller width than the width of the second mesh line MS2, and thus the probability that the first mesh line MS1 is visually recognized by the user USR can be reduced.

[0159] Each of the first mesh line MS1 and the second mesh line MS2 can include a first metal layer M1 and a second metal layer M2 disposed between the first metal layer M1. Illustratively, the first metal layer M1 can include titanium (Ti), and the second metal layer M2 can include aluminum (Al). However, this is an example, and the present disclosure is not particularly limited thereto.

[0160] In one or more embodiments of the present disclosure, a first thickness TK1 of the second metal layer M2 of the first mesh line MS1 can be substantially the same as a second thickness TK2 of the second metal layer M2 of the second mesh line MS2, but the present disclosure is not particularly limited thereto. For example, the first thickness TK1 can be greater than the second thickness TK2. Alternatively, the second thickness TK2 can be greater than the first thickness TK1. Since the first mesh line MS1 is disposed under the second mesh line MS2, even if the thickness of the first mesh line MS1 increases (e.g., when the thickness of the first mesh line MS1 increases), the probability that the first mesh line MS1 is visually recognized due to reflection of external light can be lower than the probability that the second mesh line MS2 is visually recognized due to reflection of external light. In some embodiments of the present disclosure, each of the first thickness TK1 and the second thickness TK2 can be or more, and for example, can be

[0161] FIG. 7 is a plan view of a display panel DP according to one or more embodiments of the present disclosure.

[0162] Referring to FIG. 7The display panel DP includes a sensor layer 200. A sensing area 200A and a peripheral area 200NA adjacent to the sensing area 200A can be defined in the sensor layer 200. The sensor layer 200 can include a plurality of first electrodes 210, a plurality of second electrodes 220, a plurality of third electrodes 230, and a plurality of fourth electrodes 240 arranged in the sensing area 200A.

[0163] The first electrodes 210 can cross the second electrodes 220. Each of the first electrodes 210 can extend in the second direction DR2, and the first electrodes 210 can be arranged to be separated (e.g., spaced apart) from each other in the first direction DR1. Each of the second electrodes 220 can extend in the first direction DR1, and the second electrodes 220 can be arranged to be separated (e.g., spaced apart) from each other in the second direction DR2. A sensing unit (e.g., a sensing node or a sensor) SU of the sensor layer 200 can include a region in which one of the first electrodes 210 and one of the second electrodes 220 cross each other.

[0164] FIG. 7 Eight first electrodes 210 and six second electrodes 220 are schematically shown, and 48 sensing units SU are schematically shown, but the number of the first electrodes 210 and the number of the second electrodes 220 are not limited thereto.

[0165] According to one or more embodiments of the disclosure, a width of the sensing area 200A in the first direction DR1 can be greater than or equal to a width of the sensing area 200A in the second direction DR2. Accordingly, the number of the first electrodes 210 arranged in the first direction DR1 can be greater than the number of the second electrodes 220 arranged in the second direction DR2. However, the disclosure is not limited thereto, and the width of the sensing area 200A in the second direction DR2 can be greater than or equal to the width of the sensing area 200A in the first direction DR1. In this case, the number of the first electrodes 210 arranged in the first direction DR1 can be less than the number of the second electrodes 220 arranged in the second direction DR2.

[0166] Each of the third electrodes 230 can extend in the second direction DR2, and the third electrodes 230 can be arranged to be separated (e.g., spaced apart) from each other in the first direction DR1. One third electrode 230 can overlap one first electrode 210. In the present specification, the expression "A and B overlap each other" can mean that a portion of "A" and a portion of "B" overlap each other, mean that all of "A" and a portion of "B" overlap each other, mean that all of "B" and a portion of "A" overlap each other, or mean that all of "A" and all of "B" overlap each other.

[0167] According to one or more embodiments of the present disclosure, an overlapping area between one first electrode 210 and one third electrode 230 can be adjusted to adjust a capacitance (or coupling capacitance) between one first electrode 210 and one third electrode 230. The third electrode 230 can also be referred to as a first auxiliary electrode or a charging electrode.

[0168] The fourth electrode 240 can be arranged in the second direction DR2, and the fourth electrode 240 can extend in the first direction DR1. One fourth electrode 240 can at least partially overlap with one second electrode 220.

[0169] According to one or more embodiments of the present disclosure, an overlapping area between one second electrode 220 and one fourth electrode 240 can be adjusted to adjust a capacitance (or coupling capacitance) between one second electrode 220 and one fourth electrode 240. The fourth electrode 240 can also be referred to as a second auxiliary electrode or a sensing auxiliary electrode.

[0170] In one or more embodiments of the present disclosure, both ends of at least some of the third electrodes 230 can be electrically connected to each other to constitute one first electrode group. For example, FIG. 7 Both ends of two third electrodes 230 are schematically shown as being electrically connected to each other to constitute one first electrode group. However, the present disclosure is not particularly limited thereto. For example, one first electrode group can include only one third electrode 230 or three or more third electrodes 230. As the number of third electrodes 230 connected in parallel and included in one first electrode group increases, the resistance of one first electrode group decreases, and thus power efficiency can be improved, and sensing sensitivity can be improved. Conversely, as the number of third electrodes 230 included in one first electrode group decreases, a coil pattern provided with one first electrode group can be implemented in a more suitable form.

[0171] In one or more embodiments of the present disclosure, at least some of the fourth electrodes 240 can be electrically connected to each other to constitute one second electrode group. For example, FIG. 7 Three fourth electrodes 240 are schematically shown as being connected to the same trace (e.g., an auxiliary trace 240t) to constitute one second electrode group. Accordingly, FIG. 7 Two second electrode groups are shown as being arranged in the second direction DR2. However, the number of fourth electrodes 240 constituting one second electrode group is not limited thereto. For example, the number of fourth electrodes 240 constituting one second electrode group can be six, and in this case, the sensor layer 200 can include one second electrode group.

[0172] The sensor layer 200 can further include a plurality of first traces 210t and a plurality of second traces 220t disposed in the peripheral area 200NA. The first traces 210t and the second traces 220t can be disposed to overlap the non-display area 100NA of the display layer 100 (see FIG. 4 ) in a one-to-one correspondence. The first traces 210t can be electrically connected to the first electrodes 210 in a one-to-one correspondence. The second traces 220t can be electrically connected to the second electrodes 220 in a one-to-one correspondence. Some of the second traces 220t can be separated (e.g., spaced apart) from other second traces 220t, with the sensing area 200A interposed therebetween.

[0173] The sensor layer 200 can further include a first return trace 230rt1, a plurality of second return traces 230rt2, a third return trace 230rt3, and an auxiliary trace 240t.

[0174] In one or more embodiments of the disclosure, the first return trace 230rt1 can be electrically connected to all of the third electrodes 230. For example, one end of the third electrodes 230 can be connected to the first return trace 230rt1. The first return trace 230rt1 can include a first line portion 231t extending in the first direction DR1 and electrically connected to the third electrodes 230, a second line portion 232t extending from a first end of the first line portion 231t in parallel with the second direction DR2, and a third line portion 233t extending from a second end of the first line portion 231t in parallel with the second direction DR2.

[0175] In one or more embodiments of the disclosure, the first return trace 230rt1 can have a shape surrounding at least a portion of the sensing area 200A. The second line portion 232t and the third line portion 233t can be separated (e.g., spaced apart) from each other and disposed in the peripheral area 200NA, with the sensing area 200A interposed therebetween. In the charging driving mode, a signal can be provided to at least one of the second line portion 232t and the third line portion 233t. For example, the first line portion 231t of the first return trace 230rt1 can function as a shorting bar electrically connecting all of the third electrodes 230, and the second line portion 232t and the third line portion 233t of the first return trace 230rt1 can function as the third electrodes 230 in the peripheral area 200NA. Accordingly, a pen PN (see FIG. 5 ) positioned in an area adjacent to the peripheral area 200NA can also be sufficiently charged by a current loop including the second line portion 232t or the third line portion 233t.

[0176] In one or more embodiments of the present disclosure, the first loop trace 230rt1 can include only the first line portion 231t, and can not include the second line portion 232t and the third line portion 233t. In this case, the first loop trace 230rt1 can function as a shorting bar electrically connecting all the third electrodes 230.

[0177] In one or more embodiments of the present disclosure, the second loop trace 230rt2 can be electrically connected to the third electrodes 230. For example, one second loop trace 230rt2 can be electrically connected to one first electrode group described above. For example, FIG. 7 Four first electrode groups are schematically shown. Each of the first electrode groups can include two third electrodes 230. Accordingly, four second loop traces 230rt2 can be provided.

[0178] In one or more embodiments of the present disclosure, the third loop trace 230rt3 can be electrically connected to one third electrode 230A among the third electrodes 230. One third electrode 230A among the third electrodes 230 can be closest to the peripheral area 200NA. FIG. 7 One third electrode 230A is schematically shown as an electrode provided on the rightmost side in the sensing area 200A, but the present disclosure is not particularly limited thereto. For example, one third electrode 230A can be an electrode provided on the leftmost side in the sensing area 200A.

[0179] One third electrode 230A can be electrically connected to all of the first loop trace 230rt1, one second loop trace 230rt2, and the third loop trace 230rt3.

[0180] According to one or more embodiments of the present disclosure, in the charging driving mode, a signal can also be provided to the third loop trace 230rt3. For example, a magnetic field can be additionally provided in the peripheral area 200NA through the third loop trace 230rt3 and one third electrode 230A electrically connected to the third loop trace 230rt3. Accordingly, a pen PN (see FIG. 5 ) positioned adjacent to the peripheral area 200NA can also be sufficiently charged by a current loop including the third loop trace 230rt3. In this case, when the sensor layer 200 is applied to a medium to large electronic device such as a tablet or a monitor, even if the area of the peripheral area 200NA increases (for example, when the area of the peripheral area 200NA increases), the pen PN (see FIG. 5 ) can be sufficiently charged in a space adjacent to the peripheral area 200NA by additionally using the third loop trace 230rt3. Accordingly, the pen charging performance of the electronic device 1000 (see FIG. 1A ) can be improved.

[0181] The first loop trace 230rt1 can be connected to one end of a third electrode 230A, and a second loop trace 230rt2 can be connected to the other end of the third electrode 230A. A third loop trace 230rt3 can be connected to a region between one end and the other end of the third electrode 230A.

[0182] FIG. 7 It is schematically shown that the third loop trace 230rt3 is connected to a region adjacent to a midpoint of the third electrode 230A, but the disclosure is not particularly limited thereto. For example, the third loop trace 230rt3 can also be connected in an upper region adjacent to one end of the third electrode 230A, or can also be connected to a lower region adjacent to the other end of the third electrode 230A. The upper region and the lower region mean an upper region and a lower region on a plane defined by the first direction DR1 and the second direction DR2. The auxiliary traces 240t can be separated from each other (e.g., spaced apart from each other), and the sensing region 200A is interposed between the auxiliary traces 240t. FIG. 7 It is schematically shown that two second electrode groups are arranged. The auxiliary traces 240t connected to the three fourth electrodes 240 arranged on the upper side and the auxiliary traces 240t connected to the three fourth electrodes 240 arranged on the lower side can be separated from each other (e.g., spaced apart from each other), and the sensing region 200A is interposed between the auxiliary traces 240t. However, the disclosure is not particularly limited thereto.

[0183] The sensor layer 200 can further include a plurality of protection lines 200tg arranged in the peripheral region 200NA. The protection lines 200tg can be grounded or floated, or can be applied with a set signal (e.g., a predetermined signal), according to an operation mode of the sensor layer 200. For example, if the sensor layer 200 operates in a mutual capacitance detection mode or a pen sensing driving mode (e.g., when the sensor layer 200 operates in the mutual capacitance detection mode or the pen sensing driving mode), the protection lines 200tg can be grounded.

[0184] If the sensor layer 200 is driven in a self-capacitance detection mode (e.g., when the sensor layer 200 is driven in the self-capacitance detection mode), the same signal as that provided to the adjacent traces can be provided to the protection lines 200tg. Accordingly, the parasitic capacitance provided between the traces can be reduced or eliminated by the protection lines 200tg. If the sensor layer 200 operates in a pen charging driving mode (e.g., when the sensor layer 200 operates in the pen charging driving mode), the protection lines 200tg can be floated. The floating can mean a state in which a signal is not provided to a pad connected to the protection lines 200tg.

[0185] The sensor layer 200 can further include a plurality of pads PD arranged in the peripheral region 200NA. FIG. 7The pads PD are schematically shown arranged in a row in the first direction DR1, but the present disclosure is not limited thereto. For example, the pads PD can be arranged in multiple rows. The pads PD can be electrically connected to the above-described first trace 210t, second trace 220t, both ends of the first return trace 230rt1, second return trace 230rt2, third return trace 230rt3, auxiliary trace 240t, and protection line 200tg in a one-to-one corresponding manner.

[0186] The pads PD can include charging drive pads 232tP, 230P1, 230P2, 230P3, 230P4, 230rt3P, and 233tP. The charging drive pads 232tP, 230P1, 230P2, 230P3, 230P4, 230rt3P, and 233tP can be electrically connected to both ends of the first return trace 230rt1, second return trace 230rt2, and third return trace 230rt3 in a one-to-one corresponding manner.

[0187] FIG. 8A is a plan view showing the first conductive layer 202SU of two sensors according to one or more embodiments of the present disclosure. FIG. 8B is a plan view showing the second conductive layer 204SU of two sensors according to one or more embodiments of the present disclosure. FIG. 9 is a cross-sectional view of the sensor layer 200 along the line I-I' shown in FIG. 8A and FIG. 8B in FIGS. 1-2.

[0188] FIG. 8A and FIG. 8B The shapes of the first conductive layer 202SU and the second conductive layer 204SU of two sensors adjacent to the peripheral area 200NA are schematically shown. However, the shapes shown are merely examples, and the shapes of the first conductive layer 202SU and the second conductive layer 204SU are not limited thereto.

[0189] Referring to FIG. 8A and FIG. 8B , a portion of one first electrode 210, portions of two second electrodes 220, a portion of one third electrode 230, and portions of two fourth electrodes 240 are shown.

[0190] According to one or more embodiments of the present disclosure, the first electrode 210 can include first patterns 210-sp and first bridge patterns 210-bp. The first patterns 210-sp and the first bridge patterns 210-bp can be electrically connected to each other through the first contact CNa. The second electrode 220 can be disposed on the same layer as the first patterns 210-sp. For example, the first patterns 210-sp can be separated from (e.g., spaced apart from) each other, and the second electrode 220 can be interposed between the first patterns 210-sp. The first bridge patterns 210-bp can be disposed on different layers from the second electrode 220, and can be insulated from and cross the second electrode 220.

[0191] The third electrode 230 can be disposed on the same layer as the first bridge patterns 210-bp. An opening around the first bridge patterns 210-bp can be defined in the third electrode 230. The third electrode 230 can overlap the first patterns 210-sp. Accordingly, a coupling capacitor can be defined between the first electrode 210 and the third electrode 230.

[0192] FIG. 8A It is schematically shown that one first bridge pattern 210-bp is disposed in one opening defined in the third electrode 230, but the present disclosure is not particularly limited thereto. For example, two first bridge patterns 210-bp can be arranged in one opening, and in this case, two first patterns 210-sp adjacent to each other can be electrically connected to each other through the two first bridge patterns 210-bp.

[0193] The fourth electrode 240 can include second patterns 240-sp and second bridge patterns 240-bp. The second patterns 240-sp and the second bridge patterns 240-bp can be electrically connected to each other through the second contact CNb. The third electrode 230 can be disposed on the same layer as the second patterns 240-sp. For example, the second patterns 240-sp can be separated from (e.g., spaced apart from) each other, and the third electrode 230 can be interposed between the second patterns 240-sp. The second bridge patterns 240-bp can be disposed on different layers from the third electrode 230, and can be insulated from and cross the third electrode 230.

[0194] In one or more embodiments of the present disclosure, the first conductive layer 202SU can include the first bridge patterns 210-bp, the third electrode 230, and the second patterns 240-sp. The second conductive layer 204SU can include the first patterns 210-sp, the second electrode 220, and the second bridge patterns 240-bp.

[0195] Referring to FIG. 8A , the third loop trace 230rt3 and the auxiliary trace 240t are schematically shown. Referring toFIG. 7 and FIG. 8A , FIG. 8A The third electrode 230 shown in FIGS. 1A and 1B can be one third electrode 230A. Accordingly, the third loop trace 230rt3 can be connected to one third electrode 230A.

[0196] The third loop trace 230rt3 can include a first portion 231rt3 disposed in the sensing area 200A and a second portion 232rt3 disposed in the peripheral area 200NA. The first portion 231rt3 can extend in the first direction DR1, and the second portion 232rt3 can extend in the second direction DR2. The first portion 231rt3 can overlap the first electrode 210. For example, the first portion 231rt3 can overlap the first pattern 210-sp included in the second conductive layer 204SU.

[0197] Referring to FIG. 7 and FIG. 8A The second portion 232rt3 of the third loop trace 230rt3 can be disposed between the third line portion 233t of the first loop trace 230rt1 and the sensing area 200A. Also, the second portion 232rt3 of the third loop trace 230rt3 can be disposed between at least some of the second traces 220t and the auxiliary trace 240t. Depending on the location of the third loop trace 230rt3, the third loop trace 230rt3 can also be disposed between the second traces 220t. Depending on the location of the third loop trace 230rt3, the third loop trace 230rt3 can be disposed between at least one of the second traces 220t and the auxiliary trace 240t.

[0198] According to one or more embodiments of the present disclosure, a width of the sensing area 200A in the first direction DR1 can be greater than a width of the sensing area 200A in the second direction DR2, and the third loop trace 230rt3 can be separated (e.g., spaced apart) from the sensing area 200A in the first direction DR1. A magnetic field can be additionally provided in the peripheral area 200NA by the third loop trace 230rt3 and one third electrode 230A electrically connected to the third loop trace 230rt3. Accordingly, a pen PN (see FIG. 5 ) positioned adjacent to the peripheral area 200NA can also be sufficiently charged by the current loop including the third loop trace 230rt3.

[0199] In one or more embodiments of the present disclosure, the first conductive layer 202SU can further include a dummy pattern DMP. Since the dummy pattern DMP is arranged in an empty space, the probability that a certain pattern is visually recognized by reflection of external light can be reduced. For example, an electronic device 1000 having improved visibility due to reflection of external light can be provided (seeFIG. 1A Each of the dummy patterns DMP can be electrically floated or electrically grounded. In one or more embodiments of the disclosure, the dummy patterns DMP can be omitted.

[0200] Referring to FIG. 7 , FIG. 8A and FIG. 8B , in the second conductive layer 204SU within one sensing unit SU, an area occupied by components included in the first and second electrodes 210 and 220 can be greater than an area occupied by components included in the third and fourth electrodes 230 and 240. A change in capacitance due to the first input 2000 (see FIG. 5 ) can become greater as a distance from the first input 2000 becomes shorter. Accordingly, components for sensing the first input 2000 (see FIG. 5 ) can be arranged in a relatively large area in a layer adjacent to a surface of the electronic device 1000 (see FIG. 1A ). As a result, touch performance can be improved.

[0201] In the above, FIG. 6A to FIG. 9 schematically shows a structure in which the first, second, third, and fourth electrodes 210, 220, 230, and 240 are divided and arranged into two conductive layers 202SU and 204SU, but the disclosure is not particularly limited thereto. For example, the first, second, third, and fourth electrodes 210, 220, 230, and 240 can be divided and arranged into three conductive layers or four conductive layers.

[0202] FIG. 10A is an enlarged plan view of the area AA' shown in FIG. 8A . FIG. 10B is an enlarged plan view of the area BB' shown in FIG. 8B .

[0203] Referring to FIG. 8A , FIG. 8B , FIG. 10A and FIG. 10B , each of the first, second, third, fourth, and dummy patterns DMP 210, 220, 230, 240, and DMP can have a mesh structure. Each of the mesh structures can include a plurality of mesh lines. Each of the plurality of mesh lines can have a shape extending in a set direction (e.g., a predetermined direction), and the mesh lines can be connected to each other. The shape can be one or more suitable shapes such as a straight line, a line with a protrusion, and a line that is not flat. An opening without a mesh structure can be defined (provided or formed) in each of the first, second, third, fourth, and dummy patterns DMP 210, 220, 230, 240, and DMP.

[0204] FIG. 10Aand FIG. 10B It is schematically shown that the grid structure includes grid lines extending in a first cross direction CDR1 intersecting the first direction DR1 and the second direction DR2 and grid lines extending in a second cross direction CDR2 intersecting the first cross direction CDR1. However, the extension direction of the grid lines constituting the grid structure is not particularly limited to FIG. 10A and FIG. 10B the illustration. For example, the grid structure can include only grid lines extending in the first direction DR1 and the second direction DR2, or can include grid lines extending in the first direction DR1, the second direction DR2, the first cross direction CDR1, and the second cross direction CDR2. In some embodiments, the grid structure can be changed to one or more suitable forms.

[0205] FIG. 11A is a view showing the operation of a sensor driver 200C (see FIG. 5 ) according to one or more embodiments of the disclosure.

[0206] Referring to FIG. 5 and FIG. 11A , the sensor driver 200C can selectively drive in one of a first operation mode DMD1, a second operation mode DMD2, and a third operation mode DMD3.

[0207] The first operation mode DMD1 can be referred to as a touch and pen standby mode, the second operation mode DMD2 can be referred to as a touch active and pen standby mode, and the third operation mode DMD3 can be referred to as a pen active mode. The first operation mode DMD1 can be a mode waiting for the first input 2000 and the second input 3000. The second operation mode DMD2 can be a mode sensing the first input 2000 and waiting for the second input 3000. The third operation mode DMD3 can be a mode sensing the second input 3000.

[0208] In one or more embodiments of the disclosure, the sensor driver 200C can first drive in the first operation mode DMD1. If the first input 2000 is sensed in the first operation mode DMD1 (for example, when the first input 2000 is sensed in the first operation mode DMD1), the sensor driver 200C can switch (or change) to the second operation mode DMD2. Alternatively, if the second input 3000 is sensed in the first operation mode DMD1 (for example, when the second input 3000 is sensed in the first operation mode DMD1), the sensor driver 200C can switch (or change) to the third operation mode DMD3.

[0209] In one or more embodiments of the disclosure, if the second input 3000 is sensed in the second operation mode DMD2 (e.g., when the second input 3000 is sensed in the second operation mode DMD2), the sensor driver 200C can switch to the third operation mode DMD3. If the first input 2000 is released (or not sensed) in the second operation mode DMD2 (e.g., when the first input 2000 is released (or not sensed) in the second operation mode DMD2), the sensor driver 200C can switch to the first operation mode DMD1. If the second input 3000 is released (or not sensed) in the third operation mode DMD3 (e.g., when the second input 3000 is released (or not sensed) in the third operation mode DMD3), the sensor driver 200C can switch to the first operation mode DMD1.

[0210] FIG. 11B FIG. 4 is a view illustrating an operation of the sensor driver 200C according to one or more embodiments of the disclosure.

[0211] Referring to FIG. 5 , FIG. 11A and FIG. 11B , the operations in the first operation mode DMD1, the second operation mode DMD2, and the third operation mode DMD3 are schematically illustrated in order of time "t".

[0212] In the first operation mode DMD1, the sensor driver 200C can repeatedly drive in the second mode MD2-d and the first mode MD1-d. During the second mode MD2-d, the sensor layer 200 can be scan-driven to detect the second input 3000. During the first mode MD1-d, the sensor layer 200 can be scan-driven to detect the first input 2000. FIG. 11B It is schematically illustrated that the sensor driver 200C continuously operates in the first mode MD1-d after the second mode MD2-d, but the order thereof is not limited thereto.

[0213] In the second operation mode DMD2, the sensor driver 200C can repeatedly drive in the second mode MD2-d and the first mode MD1. During the second mode MD2-d, the sensor layer 200 can be scan-driven to detect the second input 3000. During the first mode MD1, the sensor layer 200 can be scan-driven to detect the coordinates of the first input 2000.

[0214] In the third operation mode DMD3, the sensor driver 200C can be driven in the second mode MD2. During the second mode MD2, the sensor layer 200 can scan driving to detect coordinates of the second input 3000. In the third operation mode DMD3, the sensor driver 200C can not operate in the first mode MD1-d or MD1 until the second input 3000 is released (or not sensed).

[0215] FIG. 12 is a view for describing a first mode of the first operation mode DMD1.

[0216] Referring to FIG. 5 , FIG. 11B and FIG. 12 , the first mode MD1-d of the first operation mode DMD1 and the first mode MD1 of the second operation mode DMD2 can include a mutual capacitance detection mode. FIG. 12 is a view for describing a mutual capacitance detection mode in the first mode MD1-d of the first operation mode DMD1 and the first mode MD1 of the second operation mode DMD2.

[0217] In the mutual capacitance detection mode, the sensor driver 200C can sequentially provide a transmission signal TX to the first electrode 210 and detect coordinates of the first input 2000 using a reception signal RX detected through the second electrode 220. For example, the sensor driver 200C can calculate input coordinates by sensing a mutual capacitance change between the first electrode 210 and the second electrode 220.

[0218] FIG. 12 is a view for describing a mutual capacitance detection mode in the first mode MD1-d of the first operation mode DMD1 and the first mode MD1 of the second operation mode DMD2.

[0219] In the first mode MD1-d of the first operation mode DMD1 and the first mode MD1 of the second operation mode DMD2, all of the third electrode 230, the fourth electrode 240, and the guard line 200tg can be grounded. Accordingly, it is possible to reduce or prevent touch noise introduced through the third electrode 230 and the fourth electrode 240.

[0220] In one or more embodiments of the disclosure, at least one of the first mode MD1-d of the first operation mode DMD1 and the first mode MD1 of the second operation mode DMD2 can further include a self-capacitance detection mode. In the self-capacitance detection mode, the sensor driver 200C can output a driving signal to the first electrode 210 and the second electrode 220, and calculate an input coordinate by sensing a change in capacitance between the first electrode 210 and the second electrode 220.

[0221] In the self-capacitance detection mode, the third electrode 230 and the fourth electrode 240 can be grounded, and the same signal as a signal provided to an adjacent trace can be provided to the guard line 200tg. Accordingly, parasitic capacitance provided between the traces can be reduced or eliminated through the guard line 200tg.

[0222] FIG. 13 is a view for describing a second mode according to one or more embodiments of the disclosure. FIG. 14A is a graph depicting a waveform of a first signal SG1 according to one or more embodiments of the disclosure. FIG. 14B is a graph depicting a waveform of a second signal SG2 according to one or more embodiments of the disclosure.

[0223] Referring to FIG. 13 , FIG. 14A and FIG. 14B , the second mode MD2 can include a charge driving mode. The charge driving mode can include a search charge driving mode and a tracking charge driving mode.

[0224] The search charge driving mode can be a driving mode before a position of the pen PN (see FIG. 5 ) is sensed. Accordingly, the first signal SG1 or the second signal SG2 can be sequentially provided to all channels included in the sensor layer 200. For example, in the search charge driving mode, an entire area of the sensor layer 200 can be scanned. If the pen PN (see FIG. 5 ) is sensed in the search charge driving mode (for example, when the pen PN (see FIG. 5 ) is sensed in the search charge driving mode), the sensor layer 200 can be driven in the tracking charge driving mode. For example, in the tracking charge driving mode, the sensor driver 200C can sequentially output the first signal SG1 and the second signal SG2 to an area overlapping a point at which the pen PN (see FIG. 5 ) is sensed, instead of the entire sensor layer 200.

[0225] In the charging driving mode, the sensor driver 200C can apply a first signal SG1 to one pad and a second signal SG2 to another pad. The second signal SG2 can be an inverse signal of the first signal SG1. For example, the first signal SG1 can be a sine signal.

[0226] Because the first signal SG1 and the second signal SG2 are applied to at least two pads, the current RFS can have a current path flowing from one pad to another pad. Also, because the first signal SG1 and the second signal SG2 are sine signals having an inverse correlation, a direction of the current RFS can periodically change. In one or more embodiments of the present disclosure, the first signal SG1 and the second signal SG2 can be square wave signals having an inverse correlation.

[0227] If the first signal SG1 and the second signal SG2 have an inverse correlation (for example, when the first signal SG1 and the second signal SG2 have an inverse correlation), noise caused by the first signal SG1 in the display layer 100 (see FIG. 4 ) can be canceled out with noise caused by the second signal SG2. Accordingly, a flickering phenomenon does not occur in the display layer 100 (see FIG. 4 ), and display quality of the display layer 100 (see FIG. 4 ) can be improved.

[0228] In one or more embodiments of the present disclosure, the first signal SG1 can be a sine signal. However, the present disclosure is not limited thereto, and the first signal SG1 can be a square wave signal. Also, the second signal SG2 can have a set constant voltage (for example, a predetermined constant voltage). For example, the second signal SG2 can be a ground voltage. For example, a pad to which the second signal SG2 is applied can be considered to be grounded. Even in this case, the current RFS can flow from one pad to another pad. Also, even if the other pad is grounded (for example, when the other pad is grounded), but the first signal SG1 is a sine wave signal or a square wave signal, and thus a direction of the current RFS can periodically change.

[0229] Referring to FIG. 13 , it is shown that the first signal SG1 is provided to one pad 230P2 connected to one second return trace 230rt2, and the second signal SG2 is provided to one pad 232tP connected to the first return trace 230rt1. The current RFS can flow in a current path defined by a portion of the one second return trace 230rt2, one third electrode 230 connected to the one second return trace 230rt2, and the first return trace 230rt1. The current path can have a coil shape. Accordingly, in the charging driving mode of the second mode, the pen PN (see FIG. 5The resonant circuit of the pen (see

[0230] In one or more embodiments of the present disclosure, the sensor driver 200C can not provide a signal to a pad among the two pads connected to the first return trace 230rt1 and the pad connected to the second return trace 230rt2 to which the first signal SG1 and the second signal SG2 are not applied. For example, one end of some of the third electrodes 230 that do not receive the first signal SG1 or the second signal SG2 can be floating. The expression "one end floating" can mean that no signal is applied to the pad PD connected to one end of some of the third electrodes 230.

[0231] According to the present disclosure, the current path having the return coil pattern can be implemented by components included in the sensor layer 200. Accordingly, the electronic device 1000 (see FIG. 1A ) can charge the pen PN (see FIG. 5 ) using the sensor layer 200. Accordingly, since an additional component having a coil for charging the pen PN (see FIG. 5 ) is not separately required, an increase in thickness, an increase in weight, and a decrease in flexibility of the electronic device 1000 (see FIG. 1A ) can not occur.

[0232] In the charging driving mode, the first electrode 210, the second electrode 220, the fourth electrode 240, and the protection line 200tg can be grounded or electrically floating, or a constant voltage can be applied thereto. In particular, the first electrode 210, the second electrode 220, the fourth electrode 240, and the protection line 200tg can be floating. For example, a signal can not be provided to the pads PD connected to the first electrode 210, the second electrode 220, the fourth electrode 240, and the protection line 200tg. In this case, the current RFS can not flow through the first electrode 210, the second electrode 220, the fourth electrode 240, and the protection line 200tg.

[0233] FIG. 15A is a table representing signals provided to the sensor layer 200 according to one or more embodiments of the present disclosure.

[0234] Referring to FIG. 7 , FIG. 13 and FIG. 15A , the signals provided to the charging driving pads 232tP, 230P1, 230P2, 230P3, 230P4, 230rt3P, and 233tP in the first time period t1, the second time period t2, the third time period t3, the fourth time period t4, and the fifth time period t5 are schematically represented.

[0235] In FIG. 15AThe signals listed in the table shown in FIG. 5 are signals provided to the sensor layer 200 in the search charging drive mode. Thus, since the position of the pen PN (see

[0236] ) is not sensed, the first signal SG1 or the second signal SG2 can be sequentially provided to all channels included in the sensor layer 200. For example, in the search charging drive mode, the entire area of the sensor layer 200 can be scanned. FIG. 16 ) can be alternately repeated. For example, during the first time period t1, the sensor layer 200 can be driven for charging, and then can operate in the pen sensing drive mode. If the pen PN (see FIG. 5 ) is not sensed (e.g., when the pen PN (see FIG. 5 ) is not sensed), the sensor layer 200 can be driven for charging during the second time period t2. Optionally, if the pen PN is sensed (e.g., when the pen PN is sensed), the sensor layer 200 can provide the first signal SG1 or the second signal SG2 to some channels of the sensed position including the pen PN, which can be referred to as the tracking charging drive mode. For example, during the tracking charging drive mode, operations corresponding to at least some of the first time period t1, the second time period t2, the third time period t3, the fourth time period t4, and the fifth time period t5 shown in FIG. 15A can be performed according to the position of the pen PN.

[0237] The charging drive pads 232tP, 230P1, 230P2, 230P3, 230P4, 230rt3P, and 233tP can be referred to as the first charging pad 232tP, the second charging pad 230P1, the third charging pad 230P2, the fourth charging pad 230P3, the fifth charging pad 230P4, the sixth charging pad 230rt3P, and the seventh charging pad 233tP.

[0238] The first charging pad 232tP and the seventh charging pad 233tP can be respectively connected to both ends of the first loop trace line 230rt1. For example, the first charging pad 232tP can be connected to the second line portion 232t, and the seventh charging pad 233tP can be connected to the third line portion 233t.

[0239] The second charging pad 230P1, the third charging pad 230P2, the fourth charging pad 230P3, and the fifth charging pad 230P4 can be electrically connected to the second loop trace line 230rt2 in a one-to-one correspondence. The sixth charging pad 230rt3P can be connected to the third loop trace line 230rt3.

[0240] In a first time period tl, the second signal SG2 can be provided to the first charge pad 232tP, and the first signal SG1 can be provided to the third charge pad 230P2. No signal can be provided to other charge drive pads 230Pl, 230P3, 230P4, 230rt3P, and 233tP that are not provided with the first signal SG1 and the second signal SG2. In the first time period tl, a magnetic field can additionally be provided in the peripheral area 200NA. In a second time period t2, the second signal SG2 can be provided to the second charge pad 230Pl, and the first signal SG1 can be provided to the fourth charge pad 230P3.

[0241] In a third time period t3, the second signal SG2 can be provided to the third charge pad 230P2, and the first signal SG1 can be provided to the fifth charge pad 230P4. Thereafter, in a fourth time period t4, the second signal SG2 can be provided to the third charge pad 230P2, and the first signal SG1 can be provided to the sixth charge pad 230rt3P. The signals provided to the fifth charge pad 230P4 and the sixth charge pad 230rt3P can be provided to at least substantially the same third electrode 230A. For example, in the fourth time period t4, a magnetic field can additionally be provided in the peripheral area 200NA.

[0242] In one or more embodiments of the present disclosure, the fifth charge pad 230P4 can be connected to a second return trace 230rt2, and can be referred to as a first pad. The sixth charge pad 230rt3P can be connected to a third return trace 230rt3, and can be referred to as a second pad. In one or more embodiments of the present disclosure, in a charge drive mode, the sensor driver 200C can provide the first signal SG1 to one of the first pad and the second pad, and can not provide a signal to the other. In some embodiments, the other of the first pad and the second pad can be floating.

[0243] In a fifth time period t5, the second signal SG2 can be provided to the fourth charge pad 230P3, and the first signal SG1 can be provided to the seventh charge pad 233tP. The seventh charge pad 233tP can be electrically connected to the first return trace 230rtl disposed on the outermost side. Accordingly, in the fifth time period t5, a magnetic field can additionally be provided in the peripheral area 200NA.

[0244] When the sensor layer 200 is applied to a medium to large electronic device such as a tablet or a monitor, the area of the peripheral region 200NA can be relatively large. According to one or more embodiments of the present disclosure, a charging drive wiring such as the third loop trace 230rt3 can be further added to the sensor layer 200. Thus, when the third loop trace 230rt3 is utilized, the pen PN (see FIG. 5 ) can be sufficiently charged in a region adjacent to the peripheral region 200NA. As a result, the pen charging performance of the electronic device 1000 (see FIG. 1A ) can be improved.

[0245] FIG. 15B is a table indicating signals provided to the sensor layer 200 according to one or more embodiments of the present disclosure. In the description of FIG. 15B , the same components as described in FIG. 15A are denoted by the same reference numerals, and the description thereof will be omitted.

[0246] Referring to FIG. 13 and FIG. 15B , in the third time period t3, the second signal SG2 can be provided to the third charging pad 230P2, and the first signal SG1 can be provided to the fifth charging pad 230P4 and the sixth charging pad 230rt3P. The signals provided to the fifth charging pad 230P4 and the sixth charging pad 230rt3P can be provided to at least substantially the same one third electrode 230A. In some embodiments, in the third time period t3, a magnetic field can be additionally provided in the peripheral region 200NA.

[0247] In one or more embodiments of the present disclosure, the fifth charging pad 230P4 can be connected to one second loop trace 230rt2, and can be referred to as a first pad. The sixth charging pad 230rt3P can be connected to the third loop trace 230rt3, and can be referred to as a second pad. In some embodiments of the present disclosure, in the charging drive mode, the sensor driver 200C can provide the first signal SG1 to the first pad and the second pad.

[0248] According to one or more embodiments of the present disclosure, in the first time period t1, the second time period t2, the third time period t3, the fourth time period t4, and the fifth time period t5 of FIG. 15A , the operation of the fourth time period t4 can be replaced with the operation of the third time period t3 of FIG. 15B .

[0249] FIG. 16 is a view for describing a second mode according to one or more embodiments of the present disclosure. FIG. 17is a view for describing a second mode based on a sensor according to one or more embodiments of the disclosure.

[0250] Referring to FIG. 16 and FIG. 17 , the second mode can include a charge driving mode and a pen sensing driving mode. FIG. 16 and FIG. 17 is a view for describing the pen sensing driving mode. Referring to FIG. 16 , in the pen sensing driving mode, a first reception signal PRX1 can be output from the first electrode 210, and a second reception signal PRX2 can be output from the second electrode 220. FIG. 17 One sensing unit SU through which a first induced current Ia, a second induced current Ib, a third induced current Ic, and a fourth induced current Id generated by a pen PN (see FIG. 5 ) flow is illustrated.

[0251] In one or more embodiments of the disclosure, the wiring direction of one electrode and another electrode of the sensor layer 200 that overlap each other can be different from each other. For example, the wiring direction of the first electrode 210 and the wiring direction of the third electrode 230 can be different from each other. Also, the wiring direction of the second electrode 220 and the wiring direction of the fourth electrode 240 can be different from each other. For example, in FIG. 17 , the first electrode 210 and the first trace 210t can be connected to each other at the lower side of the sensing unit SU, and the third electrode 230 and the first return trace 230rt1 can be connected to each other at the upper side of the sensing unit SU. The second electrode 220 and the second trace 220t can be connected to each other at the right side of the sensing unit SU, and the fourth electrode 240 and the auxiliary trace 240t can be connected to each other at the left side of the sensing unit SU.

[0252] The RLC resonance circuit of the pen PN (see FIG. 5 ) can emit a magnetic field having a resonance frequency while discharging the charged charge. By the magnetic field provided in the pen PN, a first induced current Ia can be generated in the first electrode 210, and a second induced current Ib can be generated in the second electrode 220. Also, a third induced current Ic can be generated in the third electrode 230, and a fourth induced current Id can be generated in the fourth electrode 240.

[0253] A first coupling capacitor Ccp1 can be disposed between the third electrode 230 and the first electrode 210, and a second coupling capacitor Ccp2 can be disposed between the fourth electrode 240 and the second electrode 220. The third induced current Ic can be transmitted to the first electrode 210 through the first coupling capacitor Ccp1, and the fourth induced current Id can be transmitted to the second electrode 220 through the second coupling capacitor Ccp2.

[0254] The sensor driver 200C can receive a first reception signal PRX1a based on the first induced current Ia and the third induced current Ic from the first electrode 210, and can receive a second reception signal PRX2a based on the second induced current Ib and the fourth induced current Id from the second electrode 220. The sensor driver 200C can detect an input coordinate of the pen PN (see FIG. 1) based on the first reception signal PRX1a and the second reception signal PRX2a. FIG. 5 ) of the pen PN (see FIG. 1).

[0255] If the sensor driver 200C receives the first reception signal PRX1a from the first electrode 210 and the second reception signal PRX2a from the second electrode 220 (for example, when the sensor driver 200C receives the first reception signal PRX1a from the first electrode 210 and the second reception signal PRX2a from the second electrode 220), all of one ends of the third electrode 230 and the fourth electrode 240 can be floated. Accordingly, compensation of the sensing signal can be improved or maximized by coupling between the first electrode 210 and the third electrode 230 and coupling between the second electrode 220 and the fourth electrode 240.

[0256] In addition, the other ends of the third electrode 230 and the fourth electrode 240 can be grounded or floated. Accordingly, the third induced current Ic and the fourth induced current Id can be sufficiently transmitted to the first electrode 210 and the second electrode 220 by coupling between the first electrode 210 and the third electrode 230 and coupling between the second electrode 220 and the fourth electrode 240. If all of one ends and the other ends of the third electrode 230 and the fourth electrode 240 are floated (for example, when all of one ends and the other ends of the third electrode 230 and the fourth electrode 240 are floated), the third electrode 230 is floated during the pen sensing driving mode even if the third electrode 230 is charged in the charging driving mode (for example, when the third electrode 230 is charged in the charging driving mode), and thus the potential does not sharply change. Accordingly, noise caused by a change in the driving mode can be reduced or minimized.

[0257] FIG. 18A FIG. 2A is a plan view illustrating a first conductive layer 202SUa of two sensors according to one or more embodiments of the present disclosure. FIG. 18B FIG. 3A is a plan view illustrating a second conductive layer 204SUa of two sensors according to one or more embodiments of the present disclosure.

[0258] FIG. 18A and FIG. 18BThe shapes of the first conductive layer 202SUa and the second conductive layer 204SUa of the two sensors adjacent to the peripheral region 200NA are schematically shown. However, the shapes shown are examples, and the shapes of the first conductive layer 202SUa and the second conductive layer 204SUa are not limited thereto.

[0259] Referring to FIG. 7 , FIG. 18A and FIG. 18B , each of the first electrodes 210-a can include first division electrodes 210dv1 and 210dv2. The first division electrodes 210dv1 and 210dv2 can extend in the second direction DR2 and can be separated from each other (e.g., spaced apart from each other) in the first direction DR1. The first division electrodes 210dv1 and 210dv2 can have a line-line symmetry with respect to a line extending in the second direction DR2.

[0260] Each of the second electrodes 220-a can include second division electrodes 220dv1 and 220dv2. The second division electrodes 220dv1 and 220dv2 can extend in the first direction DR1 and can be separated from each other (e.g., spaced apart from each other) in the second direction DR2. The second division electrodes 220dv1 and 220dv2 can have a line-line symmetry with respect to a line extending in the first direction DR1.

[0261] Each of the second division electrodes 220dv1 and 220dv2 can include a sensing pattern 221 and a bridge pattern 222. The sensing pattern 221 and the bridge pattern 222 can be arranged in different layers, and the sensing pattern 221 and the bridge pattern 222 can be electrically connected to each other through a first contact CNa-a. For example, the bridge pattern 222 can be included in the first conductive layer 202SUa, and the sensing pattern 221 and the first division electrodes 210dv1 and 210dv2 can be included in the second conductive layer 204SUa.

[0262] Each of the third electrodes 230-a can include a (3-1)th pattern 231 and a (3-2)th pattern 232. The (3-1)th pattern 231 and the (3-2)th pattern 232 can be arranged on different layers, and the (3-1)th pattern 231 and the (3-2)th pattern 232 can be electrically connected to each other through a second contact CNb-a. The (3-1)th pattern 231 can be included in the first conductive layer 202SUa, and the (3-2)th pattern 232 can be included in the second conductive layer 204SUa.

[0263] Each of the fourth electrodes 240-a can include a (4-1)th pattern 241, a (4-2)th pattern 242, and a (4-3)th pattern 243. The (4-2)th pattern 242 and the (4-3)th pattern 243 can be arranged on the same layer, and the (4-1)th pattern 241 can be disposed on a different layer from the (4-2)th pattern 242 and the (4-3)th pattern 243. The (4-1)th pattern 241 and the (4-2)th pattern 242 can be electrically connected to each other by a third contact CNc-a, and the (4-1)th pattern 241 and the (4-3)th pattern 243 can be electrically connected to each other by a fourth contact CNd-a. The (4-2)th pattern 242 and the (4-3)th pattern 243 can be included in the first conductive layer 202SUa, and the (4-1)th pattern 241 can be included in the second conductive layer 204SUa.

[0264] In one or more embodiments of the disclosure, a portion of the (4-2)th pattern 242 can overlap the sensing pattern 221 of each of the second division electrodes 220dv1 and 220dv2. Accordingly, a coupling capacitor can be defined (or disposed or formed) between the second electrode 220-a and the fourth electrode 240-a.

[0265] In one or more embodiments of the disclosure, the first conductive layer 202SUa can further include dummy patterns DMP. Each of the dummy patterns DMP can be electrically floating or electrically grounded. In one or more embodiments of the disclosure, the dummy patterns DMP can be omitted. Since the dummy patterns DMP are arranged in empty spaces, the probability that a certain pattern is visually recognized by reflection of external light can be reduced. In some embodiments, an electronic device 1000 (see FIG. 1) having improved visibility due to reflection of external light can be provided. FIG. 1A

[0266] Referring to FIG. 18A , a third return trace 230rt3 and an auxiliary trace 240t are schematically shown. Referring to FIG. 7 , FIG. 18A and FIG. 18B , FIG. 18A and FIG. 18B , the third electrode 230-a can be one third electrode 230A. Accordingly, the third return trace 230rt3 can be connected to one third electrode 230A.

[0267] ​The third loop trace 230rt3 can include a first portion 231rt3 disposed in the sensing area 200A and a second portion 232rt3 disposed in the peripheral area 200NA. The first portion 231rt3 can overlap the first electrode 210-a. For example, the first portion 231rt3 can overlap the first division electrode 210dv2 included in the second conductive layer 204SUa.

[0268] In one or more embodiments of the disclosure, the dummy pattern DMP, which is separated from each other (e.g., spaced apart from each other) with the first portion 231rt3 of the third loop trace 230rt3 interposed therebetween, can be electrically connected to the first division electrode 210dv2.

[0269] FIG. 19 is a plan view of a display panel DPa according to one or more embodiments of the disclosure. In FIG. 19 the description of FIG. 7 the same components as described in , the description thereof will be omitted.

[0270] Referring to FIG. 19 , the display panel DPa includes a sensor layer 200-a. The sensor layer 200-a can further include a first loop trace 230rt1, a plurality of second loop traces 230rt2, a third loop trace 230rt3, a fourth loop trace 230rt4, and an auxiliary trace 240t. The third loop trace 230rt3 and the fourth loop trace 230rt4 can be separated from each other (e.g., spaced apart from each other) with the sensing area 200A interposed therebetween.

[0271] In one or more embodiments of the disclosure, the third loop trace 230rt3 can be electrically connected to one third electrode 230A among the third electrodes 230. Among the third electrodes 230, one third electrode 230A can be closest to the peripheral area 200NA. FIG. 19 It is schematically shown that one third electrode 230A is an electrode disposed on the rightmost side in the sensing area 200A.

[0272] In one or more embodiments of the disclosure, the fourth loop trace 230rt4 can be electrically connected to another third electrode 230B among the third electrodes 230. Among the third electrodes 230, another third electrode 230B can be closest to the peripheral area 200NA. FIG. 19 It is schematically shown that another third electrode 230B is an electrode disposed on the leftmost side in the sensing area 200A.

[0273] FIG. 20Ais a table representing signals provided to the sensor layer 200-a (see FIG. 19 ) according to one or more embodiments of the present disclosure.

[0274] Referring to FIG. 19 and FIG. 20A , in the charge drive mode, the sensor driver 200C can be configured to provide a signal SG to at least one of a second charge pad 230P1 (hereinafter referred to as a first pad) connected to one second return trace 230rt2 and a third pad 230rt4P connected to a fourth return trace 230rt4. The signal SG can be a first signal SG1 shown in FIG. 14A and a second signal SG2 shown in FIG. 14B .

[0275] Both the first pad 230P1 and the third pad 230rt4P can be electrically connected to another third electrode 230B. For example, in case 1, the sensor driver 200C can provide the signal SG to the third pad 230rt4P and not provide the signal SG to the first pad 230P1. Alternatively, in case 2, the sensor driver 200C can not provide the signal SG to the third pad 230rt4P and provide the signal SG to the first pad 230P1. Alternatively, in case 3, the sensor driver 200C can provide the signal SG to both the first pad 230P1 and the third pad 230rt4P.

[0276] FIG. 20B is a table representing signals provided to the sensor layer 200-a (see FIG. 19 ) according to one or more embodiments of the present disclosure.

[0277] Referring to FIG. 19 and FIG. 20B , in the charge drive mode, the sensor driver 200C can be configured to provide a signal SG to at least one of a fifth charge pad 230P4 (hereinafter referred to as a first pad) connected to one second return trace 230rt2 and a sixth charge pad 230rt3P (hereinafter referred to as a second pad) connected to a third return trace 230rt3. The signal SG can be a first signal SG1 shown in FIG. 14A and a second signal SG2 shown in FIG. 14B .

[0278] Both the first pad 230P4 and the second pad 230rt3P can be electrically connected to one third electrode 230A. For example, in case 1, the sensor driver 200C can provide the signal SG to the first pad 230P4 and not provide the signal SG to the second pad 230rt3P. Alternatively, in case 2, the sensor driver 200C can not provide the signal SG to the first pad 230P4 and provide the signal SG to the second pad 230rt3P. Alternatively, in case 3, the sensor driver 200C can provide the signal SG to both the first pad 230P4 and the second pad 230rt3P.

[0279] FIG. 21 is a plan view of a display panel DPb according to one or more embodiments of the present disclosure. In FIG. 21 the description, the same components as FIG. 7 described in the description of FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted.

[0280] Referring to FIG. 21 , the display panel DPb includes a sensor layer 200-b. The sensor layer 200-b can further include a first return trace 230rt1, a plurality of second return traces 230rt2, a third return trace 230rt3, a fourth return trace 230rt4a, and an auxiliary trace 240t.

[0281] In one or more embodiments of the present disclosure, the third return trace 230rt3 and the fourth return trace 230rt4a can be electrically connected to one third electrode 230Aa among the third electrodes 230. One third electrode 230Aa among the third electrodes 230 can be closest to the peripheral area 200NA. FIG. 21 It is schematically shown that one third electrode 230Aa is an electrode disposed on the rightmost side in the sensing area 200A, but the present disclosure is not particularly limited thereto.

[0282] FIG. 22 is a table representing signals provided to the sensor layer 200-b (see FIG. 21 ) according to one or more embodiments of the present disclosure.

[0283] Referring to FIG. 21 and FIG. 22 , in the charging driving mode, the sensor driver 200C can be configured to provide the signal SG to at least one of a first pad 230P4 connected to one second return trace 230rt2, a second pad 230rt3P connected to the third return trace 230rt3, and a third pad 230rt4Pa connected to the fourth return trace 230rt4a. The signal SG can be FIG. 14A the first signal SG1 and FIG. 14Bthe second signal SG2 shown in FIG. 2B.

[0284] All of the first pad 230P4, the second pad 230rt3P, and the third pad 230rt4Pa can be electrically connected to one third electrode 230Aa. In one or more embodiments of the present disclosure, the sensor driver 200C can provide the signal SG to one pad among the first pad 230P4, the second pad 230rt3P, and the third pad 230rt4Pa, and can not provide the signal SG to the other two pads. This is exemplarily represented in cases 1 to 3. The pads that do not receive the signal from the sensor driver 200C can be denoted as "floating".

[0285] In one or more embodiments of the present disclosure, the sensor driver 200C can provide the signal SG to two pads among the first pad 230P4, the second pad 230rt3P, and the third pad 230rt4Pa, and can not provide the signal SG to the other pad. This is exemplarily represented in cases 4 to 6. In one or more embodiments of the present disclosure, the sensor driver 200C can provide the signal SG to all of the first pad 230P4, the second pad 230rt3P, and the third pad 230rt4Pa. This is exemplarily represented in case 7.

[0286] According to the above description, the input of the pen as well as the touch input can be sensed with the sensor layer. Thus, since the electronic device does not need an additional separate component (e.g., a digitizer) for the pen sensing, an increase in thickness, weight, and flexibility reduction of the electronic device due to the addition of the digitizer can not occur. In addition, the first, second, and third return traces can be connected to at least one charging electrode of the sensor layer. In this case, when the sensor layer is applied to a medium to large electronic device such as a tablet or a monitor, even if the area of the peripheral region increases (e.g., when the area of the peripheral region increases), the pen can be sufficiently charged in the space adjacent to the peripheral region by additionally utilizing the third return trace. Thus, the pen charging performance of the electronic device can be improved.

[0287] In the context of the present disclosure, and unless otherwise limited, the terms "use", "using", and "used" can be considered synonymous with the terms "utilize", "utilizing", and "utilized", respectively.

[0288] It will be understood by those of ordinary skill in the art, in light of the entire disclosure, that each suitable feature of one or more suitable embodiments of the present disclosure can be combined, in part or in whole, or with each other, and can be technically interlocked and operated in one or more suitable ways, and each embodiment can be implemented independently of each other, or can be implemented in combination with each other in any suitable way, unless otherwise stated or implied.

[0289] Although the above has been described with reference to one or more embodiments of the present disclosure, it will be understood by those skilled in the art or those of ordinary skill in the art that the present disclosure can be appropriately modified and changed without departing from the spirit and technical scope of the present disclosure described in the appended claims and equivalents thereof. Therefore, the disclosed embodiments are used only in a general and descriptive sense and not for limiting purposes. Accordingly, the present disclosure is not limited to the detailed description of the specification, but should be defined by the appended claims and the functional equivalents included therein.

Claims

1. An electronic device comprising: a sensor layer defining a sensing area and a peripheral area adjacent to the sensing area, and including: first electrodes in the sensing area and arranged in a first direction; second electrodes in the sensing area and arranged in a second direction crossing the first direction; third electrodes in the sensing area and arranged in the first direction; first traces electrically connected to the first electrodes in a one-to-one manner; second traces electrically connected to the second electrodes in a one-to-one manner; first return traces electrically connected to the third electrodes; second return traces electrically connected to the third electrodes; and third return traces electrically connected to one of the third electrodes. 2.The electronic device of claim 1, wherein, Among the third electrodes, the one of the third electrodes is closest to the peripheral area and is electrically connected to one of the second return traces and the first return traces. 3.The electronic device of claim 2, further comprising a sensor driver configured to drive the sensor layer and configured to selectively operate in a first mode for sensing a touch input or a second mode for sensing a pen input, the second mode including a charging drive mode and a pen sensing drive mode. 4.The electronic device of claim 3, wherein, In the charging drive mode, the sensor driver is configured to provide a signal to a first pad connected to the one of the second return traces and one of second pads connected to the third return traces without providing the signal to the other of the first pad and the second pad. 5.The electronic device of claim 3, wherein In the charging drive mode, the sensor driver is configured to provide a signal to a first pad connected to the one of the second return traces and to a second pad connected to the third return traces. 6.The electronic device of claim 3, wherein The sensor layer further includes a fourth return trace electrically connected to the one of the third electrodes. 7.The electronic device of claim 6, wherein, In the charging drive mode, the sensor driver is configured to provide a signal to at least one of a first pad connected to the one of the second return traces, a second pad connected to the third return traces, and a third pad connected to the fourth return trace. 8.The electronic device of claim 1, wherein The sensor layer further includes a fourth return trace electrically connected to another of the third electrodes. 9.The electronic device of claim 1, wherein A first portion of the third return trace is at the sensing area and a second portion of the third return trace is at the peripheral area. 10.The electronic device of claim 9, wherein, The first portion of the third return trace overlaps at least one of the first electrodes. 11.The electronic device of claim 9, wherein The second portion of the third return trace is between the sensing area and the first return trace in a plan view. 12.The electronic device of claim 1, wherein, The sensor layer further includes: fourth electrodes in the sensing area and arranged in the second direction; and an auxiliary trace electrically connected to the fourth electrodes. 13.The electronic device of claim 12, wherein, The third return trace is between at least one of the second traces and the auxiliary trace in a plan view. 14.The electronic device of claim 1, wherein, a width of the sensing region in the first direction is greater than a width of the sensing region in the second direction, and wherein the third loop trace is separated from the sensing region in the first direction.

15. An electronic device, comprising: a sensor layer defining a sensing region and a peripheral region adjacent to the sensing region, and including: a first electrode in the sensing region and arranged in a first direction; a second electrode in the sensing region and arranged in a second direction that intersects the first direction; a third electrode in the sensing region and arranged in the first direction; and a trace electrically connected to the first electrode, the second electrode, and the third electrode, and including: a first loop trace connected to one end of one of the third electrodes; a second loop trace connected to another end of the one of the third electrodes; and a third loop trace connected to the one of the third electrodes. 16.The electronic device of claim 15, wherein, the trace further includes a fourth loop trace connected to the one of the third electrodes.

17. The electronic device of claim 15, further comprising a sensor driver configured to drive the sensor layer, and configured to selectively operate in a first mode of sensing touch input or a second mode of sensing pen input, the second mode including a charging drive mode and a pen sensing drive mode. 18.The electronic device of claim 17, wherein, in the charging drive mode, the sensor driver is configured to provide a signal to one of a first pad connected to the second loop trace and a second pad connected to the third loop trace, without providing the signal to the other of the first pad and the second pad. 19.The electronic device of claim 17, wherein, in the charging drive mode, the sensor driver is configured to provide a signal to a first pad connected to the second loop trace, and to provide the signal to a second pad connected to the third loop trace. 20.The electronic device of claim 15, wherein, the trace further includes a fourth loop trace connected to another one of the third electrodes, and wherein, in plan view, the third loop trace is separated from the fourth loop trace with the sensing region between the third loop trace and the fourth loop trace.

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