Task scheduling method and device, storage medium and electronic equipment

Abstract

The embodiment of the invention provides a task scheduling method and device, a storage medium and electronic equipment, and relates to the technical field of computers.The method comprises the steps that a task heterogeneous graph is constructed according to the state of a computing task needing to be processed by a heterogeneous computing system; constructing an equipment state heterogeneous graph according to the equipment state of the heterogeneous computing system; performing task type judgment according to the task heterogeneous graph and the equipment state heterogeneous graph to obtain a judgment result; selecting a strategy according to a judgment result to determine a priority sequence of the tasks; generating a first task allocation scheme and a plurality of second task allocation schemes according to the priority sequence; and executing at least one round of iterative operation to obtain a target task allocation scheme. Therefore, the change of the computing node is updated in real time, so that task allocation is accurately matched with the current resource state, and the resource utilization rate is improved. By judging the task type and adopting the first strategy or the second strategy to determine the priority of task allocation, the adaptation precision of the task type and the equipment characteristics is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and particularly relates to a task scheduling method and device, a storage medium and an electronic device. BACKGROUND

[0002] With the rapid development of information technology, heterogeneous computing platforms are increasingly valued for their outstanding performance and energy efficiency in handling high-performance computing tasks. Heterogeneous computing environments combine different types of computing nodes, such as CPUs, GPUs, FPGAs, etc., to provide more flexible and efficient computing capabilities. However, effectively managing and scheduling computing tasks in these complex environments has become a challenge, especially when facing various computing needs of tasks and characteristics of computing nodes.

[0003] Traditional task scheduling algorithms often fail to fully exploit the performance of heterogeneous computing platforms, as they do not fully consider the heterogeneity of the platform and the dependencies between tasks. Therefore, developing an efficient algorithm that can optimize task scheduling on heterogeneous computing platforms is of great significance to improve computing resource utilization and overall system performance. SUMMARY

[0004] The present application provides a task scheduling method, device, storage medium and electronic device to at least solve the above technical problems existing in the prior art.

[0005] The technical solution of the present application embodiment is as follows: In a first aspect, the present application provides a task scheduling method, which comprises: According to the state of the computing tasks required to be processed by the heterogeneous computing system, a task heterogeneity graph is constructed, which is used to record the task information required to be processed by the heterogeneous computing system; the heterogeneous computing system comprises multiple types of computing nodes; According to the device state of the heterogeneous computing system, a device state heterogeneity graph is constructed; the device state heterogeneity graph is used to record the real-time state of different computing nodes of the heterogeneous computing system; The first feature of the task heterogeneity graph and the second feature of the device state heterogeneity graph are extracted, and the first feature and the second feature are spliced to obtain a system feature; According to the system feature, a task type discrimination is performed to obtain a discrimination result, which is a computing-intensive or communication-intensive type; According to the discrimination result, a strategy is selected, and the priority order of the task nodes is determined according to the selected strategy; the selected strategy is a first strategy or a second strategy; A first task allocation scheme is generated according to the priority order, and a plurality of second task allocation schemes are generated according to the first task allocation scheme; According to the first task allocation scheme and the plurality of second task allocation schemes, at least one round of iteration operations is performed to obtain a target task allocation scheme; the iteration operations are used to adjust each task allocation scheme to obtain the target task allocation scheme.

[0006] In a second aspect, an embodiment of the present application provides a task scheduling device, the device comprising: A first processing module is configured to construct a task hetero-graph according to a state of a computing task required to be processed by a heterogeneous computing system, the task hetero-graph being used to record task information required to be processed by the heterogeneous computing system; the heterogeneous computing system comprises a plurality of types of computing nodes. A second processing module is configured to construct a device state hetero-graph according to a device state of the heterogeneous computing system; the device state hetero-graph is used to record real-time states of different computing nodes of the heterogeneous computing system. A third processing module is configured to extract a first feature of the task hetero-graph and a second feature of the device state hetero-graph, and splice the first feature and the second feature to obtain a system feature. A fourth processing module is configured to perform task type discrimination according to the system feature to obtain a discrimination result, the discrimination result being a computing-intensive type or a communication-intensive type. A fifth processing module is configured to select a strategy according to the discrimination result, and determine a priority order of task nodes according to the selected strategy; the selected strategy is a first strategy or a second strategy. A sixth processing module is configured to generate a first task allocation scheme according to the priority order, generate a plurality of second task allocation schemes according to the first task allocation scheme, and perform at least one round of iteration operations according to the first task allocation scheme and the plurality of second task allocation schemes to obtain a target task allocation scheme; the iteration operations are used to adjust each task allocation scheme to obtain the target task allocation scheme.

[0007] In a third aspect, an embodiment of the present application provides an electronic device, comprising: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the task scheduling method.

[0008] In a fourth aspect, an embodiment of the present application provides a non-transitory computer readable storage medium storing computer instructions, the computer instructions being used to enable a computer to execute the task scheduling method.

[0009] The embodiments of the present application have the following beneficial effects: The task scheduling method, device, storage medium and electronic device provided by the embodiments of the present application are used to construct a task heterogeneous graph according to the state of a computing task required to be processed by a heterogeneous computing system, wherein the task heterogeneous graph is used to record the task information required to be processed by the heterogeneous computing system; the heterogeneous computing system comprises multiple types of computing nodes; a device state heterogeneous graph is constructed according to the device state of the heterogeneous computing system; the device state heterogeneous graph is used to record the real-time state of different computing nodes of the heterogeneous computing system; a first feature of the task heterogeneous graph and a second feature of the device state heterogeneous graph are extracted, and the first feature and the second feature are spliced to obtain a system feature; a task type is discriminated according to the system feature, and a discrimination result is obtained, wherein the discrimination result is a computation-intensive or communication-intensive type; a strategy is selected according to the discrimination result, and a priority order of a task node is determined according to the selected strategy; the selected strategy is a first strategy or a second strategy; a first task allocation scheme is generated according to the priority order, a plurality of second task allocation schemes are generated according to the first task allocation scheme; at least one round of iteration operation is performed according to the first task allocation scheme and the plurality of second task allocation schemes, and a target task allocation scheme is obtained; the iteration operation is used to adjust each task allocation scheme to obtain the target task allocation scheme. In this way, by constructing the task heterogeneous graph and the device state heterogeneous graph, the computing nodes are updated in real time, the global resource features are dynamically aggregated by combining the graph convolution network, the computing node changes are captured in real time, the task allocation is accurately matched with the current resource state, and the resource utilization rate is improved. By discriminating the task type and determining the priority of the task allocation by using the first strategy or the second strategy, the adaptation accuracy of the task type and the device characteristics is improved.

[0010] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 A flowchart of a task scheduling method provided by an embodiment of the present application; Figure 2 A schematic diagram of a task heterogeneous graph provided by an embodiment of the present application; Figure 3 A schematic diagram of the first feature extraction of a task heterogeneous graph provided by an embodiment of the present application; Figure 4 A schematic diagram of a device state heterogeneous graph provided by an embodiment of the present application; Figure 5 A structural schematic diagram of a task scheduling device provided by an embodiment of the present application; Figure 6A structural schematic diagram of an electronic device is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0012] To make the objectives, characteristics and advantages of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0013] In the following description, “some embodiments” are described, which describe a subset of all possible embodiments, but it can be understood that “some embodiments” can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0014] If similar descriptions of “first / second” appear in the application file, the following description is added. In the following description, the terms “first\second\third” are only used to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that “first\second\third” can be interchanged in a specific order or sequence as allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0015] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application, and are not intended to limit the present application.

[0016] Figure 1 A flowchart of a task scheduling method is provided for an embodiment of the present application, as shown in Figure 1 The method is applied to an electronic device, and the task scheduling method comprises: Step 101, constructing a task heterogeneous graph according to the state of a computing task required to be processed by a heterogeneous computing system, the task heterogeneous graph being used to record task information required to be processed by the heterogeneous computing system; the heterogeneous computing system comprising multiple types of computing nodes; Step 102, constructing a device state heterogeneous graph according to the device state of the heterogeneous computing system; the device state heterogeneous graph being used to record the real-time state of different computing nodes of the heterogeneous computing system; Step 103, extracting a first feature of the task heterogeneous graph and a second feature of the device state heterogeneous graph, and splicing the first feature and the second feature to obtain a system feature; Step 104, determining the task type according to the system characteristics, obtaining a determination result, the determination result being computation-intensive or communication-intensive; Step 105, selecting a strategy according to the determination result, and determining the priority order of the tasks according to the selected strategy; the selected strategy being the first strategy or the second strategy. Step 106, generating a first task allocation scheme according to the priority order, and generating a plurality of second task allocation schemes according to the first task allocation scheme; Step 107, performing at least one round of iteration operation according to the first task allocation scheme and the plurality of second task allocation schemes, obtaining a target task allocation scheme; the iteration operation being used for adjusting each task allocation scheme to obtain the target task allocation scheme.

[0017] Here, the heterogeneous computing system includes a plurality of types of computing nodes; the computing nodes can also be described as computing units, computing nodes, processing devices, processors, etc.

[0018] The computing nodes can be at least one of the following types: central processing unit (CPU), graphics processing unit (GPU), embedded neural-network processing unit (NPU), tensor processing unit (TPU), data processing unit (DPU), chip application-specific integrated circuit (ASIC), or field-programmable gate array (FPGA), etc. Of course, there can be other types of computing nodes, which are not listed here.

[0019] In some embodiments, the task heterogeneity graph is used to record the task information required to be processed by the heterogeneous computing system, which can be the real-time task state of each task, etc. Specifically, the information recorded by the task heterogeneity graph includes at least one of the following: a task set, a task execution dependency relationship between tasks, a task computation amount set, a task communication amount set, a task computation preference set, a set of all computing nodes of the heterogeneous computing system, a current remaining memory amount of the heterogeneous computing system, and a set of current interconnection bandwidths of all computing nodes of the heterogeneous computing system.

[0020] For example, the task heterogeneity graph is used to record at least one of the following information: , represents a set of tasks; here, the number of tasks required to be processed by the system can be one or more, for example, one project or function, which needs to be composed of multiple tasks, which can be allocated to different computing nodes. Here, n represents the total number of tasks.

[0021] , represents the dependency relationship between the execution of tasks; for example, for an image recognition project, feature extraction needs to be performed first to construct an image vector, and then input to a classifier for classification. The above feature extraction and classification belong to two tasks, which have a processing relationship in order, called dependency relationship; , represents a set of task computation amounts; here, the computation amount of each task is different, for example, the task of feature extraction corresponds to a computation amount, and the task of classification corresponds to a computation amount; , represents a set of task communication amounts; here, data needs to be transmitted between the processing of each task, for example, after the above normalization processing of the image, it needs to be transmitted to the computing node to perform the subsequent processing of the next task, and the normalized processing result is a kind of task communication amount; , represents a set of task computation preferences; here, the computation preference can refer to which type of computing node is used for computation, for example, its value can be {0, 1, 2, 3}, 0 represents CPU, 1 represents GPU, 2 represents FPGA, and 3 represents the computation preference value of other types of GPU and other types of computing devices. The earlier the order is, the more suitable it is for the task computation; , represents a set of all computing nodes of the heterogeneous computing system, including CPU, GPU, FPGA, etc.; m represents the total number of computing nodes; , represents the current remaining memory amount of each computing node in the heterogeneous computing system; where, m as a subscript is used to represent the number, , represents the remaining memory amount of the mth computing node; , represents a set of current interconnection bandwidths of each computing node in the heterogeneous computing system.

[0022] As shown in Figure 2 , a schematic diagram of a task heterogeneous graph is provided; Figure 2 A task scheduling relationship in a heterogeneous computing system is described. For a certain task, V1, V2, V3, V4, V5, V6, and V7 are obtained by splitting, which are 7 tasks. The directed edge represents the execution dependency relationship between tasks, such as the dependency relationship between V1 and V2 (denoted as e 12), there is a dependency relationship between V2 and V5, and there is a dependency relationship between V5 and V7, which are not listed one by one. Task V1 is an entry task, and the computing characteristics of task V1 help determine how the task should be processed in a heterogeneous system, including: the computing amount, the communication amount, and the computing preference (indicating the preference of each task for different computing resources such as CPU, GPU, and FPGA) of task V1.

[0023] Each task in the figure is called a task node, and the computing characteristics of the task are recorded in each task node. For example, the computing characteristics recorded in V1 in the figure include: c1 (representing the computing amount), t 12 + t 13 + t 14 (representing the communication amount with task V2 + the communication amount with task V3 + the communication amount with task V4), and y1 (representing the computing preference). In addition, each task also has its computing characteristics, which are not all shown in the figure.

[0024] In some embodiments, the task heterogeneous graph includes: a feature matrix and an adjacency matrix; The task heterogeneous graph is constructed according to the computing task state required to be processed by the heterogeneous computing system, including: According to the task information required to be processed by the heterogeneous computing system, a feature matrix and an adjacency matrix are constructed, the feature matrix is used to represent the computing characteristics of each task node, and the adjacency matrix is used to represent the dependency relationship between the task nodes; According to the degree of each task node calculated according to the adjacency matrix, a degree matrix is determined according to the degrees of the task nodes; The adjacency matrix is normalized using the degree matrix to obtain a processed adjacency matrix.

[0025] Here, by creating a task heterogeneous graph, the task scheduling relationship is represented in a way that can be processed by a graph neural network. The adjacency matrix (denoted as A) can be used to represent the connection relationship between tasks, and the feature matrix (denoted as X) can be used to represent the characteristics (such as computing amount, communication amount, and computing preference) of each task.

[0026] Through the combination of the two matrices, the structure of the graph can be effectively represented, so that each task node in the graph neural network can obtain information from the neighbor nodes and gradually learn the deep representation of the task node through multi-layer processing.

[0027] In some embodiments, the task heterogeneous graph network is used to identify the task heterogeneous graph to obtain the first feature, including: propagating features of the task heterogeneous graph through a graph neural network, updating features of each task node in the task heterogeneous graph layer by layer, and introducing a dependency relationship between tasks into the features of the task nodes to obtain an updated feature vector of the task node; aggregating and updating the feature vectors of all the task nodes; determining a local contribution degree of each task node, the local contribution degree being determined based on at least one of a degree centrality, a closeness centrality, and a betweenness centrality of the task node; sorting the feature vectors of all the task nodes according to the local contribution degrees based on the dependency relationship of the task nodes; inputting the sorted feature vectors of all the task nodes into a long short-term memory (LSTM) network, and obtaining a first feature of the task heterogeneous graph based on the LSTM.

[0028] Here, the time sequence dependency between tasks and the influence of the critical path on the overall execution time are considered. For example, if the task V1→V2→V5→V7 constitutes a critical path, but V2 is allocated to a low-performance CPU, it will cause a collective delay of subsequent tasks. The present application proposes a task heterogeneous graph, quantifies the influence of nodes by a centrality index, and designs an LSTM network to extract time sequence dependency features, preferentially allocates high-performance devices to critical path tasks, and can greatly shorten the overall task completion time (by 15%-25%).

[0029] Specifically, the following Figure 3 provides a specific description of the construction of the task heterogeneous graph and the extraction process of the first feature. Specifically, it includes the following steps: Step 1, constructing a feature matrix X: for each task node , a vector of its calculation features is constructed , The vector can include: calculation amount, communication amount and calculation preference one-hot encoding, etc. If there are n tasks, the feature matrix X is an matrix, where n and m are used to represent the number, m is the dimension of the feature of each task node, and m represents the feature length of the calculation amount, communication amount and calculation preference of the task.

[0030] Step 2, constructing an adjacency matrix A: for each pair of task nodes with a dependency relationship, for the dependency relationship , set in the adjacency matrix A. If there is no dependency relationship, 0. Because a directed graph is constructed, A is not symmetric.

[0031] Step 3, calculating the degree matrix D: for each task node , calculate its degree according to the adjacency matrix A (i.e. from the task node the number of edges pointing to other tasks), and construct a degree matrix D on the diagonal according to the calculated degrees.

[0032] Step 4, Calculate the normalized adjacency matrix : Normalize the adjacency matrix A using the degree matrix D to obtain , where I is the identity matrix.

[0033] Step 5, Feature propagation: according to the normalized adjacency matrix , use the graph neural network (specifically the graph convolution layer) to update the task node features according to the following formula:

[0034] where the first layer H is denoted as , is the normalized adjacency matrix, is the weight matrix of the l-th layer, is the activation function, such as ReLU.

[0035] Step 6, Recursive feature propagation: for l = 1, 2, …, L, repeatedly apply the feature propagation step (i.e. Step 5) to learn deeper node features, and obtain the feature propagation result of the i-th task node . L is the total number of layers. After feature propagation, the connection relationship between task nodes remains unchanged, and the feature of each task node is updated.

[0036] Step 7, Aggregate the features of all task nodes to obtain the time series joint graph feature; here, define an output function R to aggregate the feature vectors of all task nodes and obtain the representation of the entire task heterogeneous graph: ; where R is the time series joint graph feature output function.

[0037] Step 8, Determine the local contribution degree of each task node; where the local contribution degree can be defined as its importance in structure and connection in the graph, which is usually related to the centrality of the node in the graph. For example, use the "centrality" index to reflect the importance of the node in the entire network.

[0038] Specifically, determining the local contribution degree of each node includes: calculating the degree centrality i of the task node V : ; where the degree centrality (Degree Centrality) represents the number of direct neighbor nodes of the task node. is the feature vector corresponding to the task node ; is the task node the total number of neighbor nodes of V the total number of task nodes.

[0039] calculating the closeness centrality of task node V i The closeness centrality is used to measure the average distance from a task node to all other task nodes in the graph. is the feature vector of task node V is the shortest path length from the feature vector of task node V

[0040] calculating the betweenness centrality of task node V i

[0041] The betweenness centrality represents the frequency of a task node appearing on the shortest path between all pairs of task nodes. is the number of all shortest paths from task node V to task node V is the number of paths passing through task node V

[0042] According to at least one of the degree centrality, closeness centrality, and betweenness centrality, a local contribution indicator is determined. The determination method can be: selecting one from the graph features, or taking the median of the degree centrality, closeness centrality, and betweenness centrality.

[0043] Step 9, according to the local contribution degree, sorting the feature vectors of each task node to continue to mine the graph logical connection information.

[0044] The sorting method can use a time sequence dependency relationship sorting method to identify the time sequence dependency relationship of each task node (which may need to be pre-annotated with a timestamp or define the order of the nodes according to a specific rule). Since V1 is the entry node, starting from V1, the access order of each node is determined along the directed edge. The specific process is as follows: 1) Establish a dependency relationship list: for each task node V i , establish a dependency relationship list D i , which includes all nodes directly pointing to V i , i.e. the direct predecessor nodes of V i . ​​​​​​​​​​

[0045] 2) Determine the timing level of each task node: starting from the entry node (e.g. V1), determine the timing level of each node, i.e. which nodes must be completed before starting the calculation of the current node. The entry node has the lowest timing level, usually 0.

[0046] 3) Use breadth-first search (BFS) to traverse the graph and update the timing level of each task node.

[0047] 4) Collect level nodes: some task nodes are in the same timing level, and all task nodes in the same timing level can be considered as level nodes; collect each level timing node to form a level node set.

[0048] 5) Output level node set: for each timing level, output the node set, and the task nodes in these sets are level nodes.

[0049] 6) Calculate centrality indicators: calculate centrality indicators for each task node in the graph. For example, you can choose betweenness centrality as the basis for sorting, so as to better reflect the influence of nodes in the entire graph.

[0050] 7) Sort level nodes: for each group of level task nodes, sort them according to the centrality indicators of each task node, with high centrality nodes at the front.

[0051] 8) Generate a sorted sequence: combine the timing-dependent sorted nodes and the centrality-sorted level nodes into a complete sorted sequence.

[0052] This sorted sequence will be input into the feature encoding network for sequence feature encoding, and the sequence feature encoding constitutes , , represent the Q task nodes commonly found in the sorted sequence (the actual number is the same as the number of tasks), and ins represents the feature encoding.

[0053] Step 10, sequence feature encoding: use the sorted sequence of sorted task nodes to input into the sequence feature encoding network (specifically using a long short-term memory network (LSTM, Long Short-Term Memory)), starting from the entry V1 to the exit V7, to extract graph features.

[0054] For example, use BiLSTM (Bidirectional Long Short-Term Memory Neural Network) to extract the dependency features of all sorted nodes. The formula is as follows: ,

[0055] where the arrows represent the direction of the LSTM encoding. That is, the forward and backward encoding of the node dependency features. represents the output of the q-th unit in the BiLSTM, and the different directions of the arrows represent the forward and backward feature aggregation according to the node ordering sequence, thereby obtaining the BiLSTM encoding output in different directions. Similarly, represents the output of the q-1-th unit in the BiLSTM, that is, the output of the previous node state.

[0056] Assuming that there are Q steps of ordering sequence dependency features, represents the feature of the q-th node of the graph neural network of the T-th layer. According to the order and inverse order of the generated ordering sequence information, it is sequentially input into the corresponding BiLSTM network, and finally the BiLSTM encoding of all task nodes is obtained, and the formula is as follows: .

[0057] In some embodiments, the information recorded by the device state heterogeneous graph includes at least one of the following: the state of all computing nodes in the heterogeneous computing system, and the connection relationship and communication rate between the computing nodes.

[0058] Here, the nodes in the device state heterogeneous graph represent computing nodes (denoted as ), and the state of each computing node can be represented as a vector containing the state information of the computing node, such as CPU usage, memory occupancy, etc.

[0059] In some embodiments, the device state heterogeneous graph includes an adjacency matrix and a feature matrix. According to the device state of the heterogeneous computing system, a device state heterogeneous graph is constructed, including: According to the device state of the heterogeneous computing system, a feature matrix and an adjacency matrix are constructed, the feature matrix being used to represent the state features of each computing node, and the adjacency matrix being used to represent the connection relationship and / or communication rate between the computing nodes. According to the degrees of the computing nodes, a degree matrix is determined. The adjacency matrix is normalized using the degree matrix to obtain a processed adjacency matrix.

[0060] Here, each edge in the device state heterogeneous graph represents that there is a connection relationship between the two computing nodes, and the communication rate can be represented by a weight ; The adjacency matrix (denoted as A) can be represented by an N x N matrix to represent the connection between all computing nodes, where N is the number of computing nodes. If the computing node and computing nodes have direct communication, then , otherwise, .

[0061] The state vector of each computing node can be collected into a feature matrix (denoted as X), where each row corresponds to the state vector of a computing node.

[0062] As shown in Figure 4 , a schematic diagram of a device state heterogeneous graph is provided, as shown in Figure 4 , the device state heterogeneous graph is used to record the real-time state of different computing nodes. The state includes each computing node (such as P1, P2, P3, P4), and the connection relationship between the computing nodes (such as b0, b1, b2,... b 11 ). Each computing node contains the state information of the computing node (such as M1, M2, M3, M4), such as CPU usage, memory occupation, etc. The device state heterogeneous graph represents the current computing load and resource utilization, and optimizes task scheduling and resource allocation.

[0063] In some embodiments, the device state heterogeneous graph is identified by using a device state heterogeneous graph network to obtain the second feature, including: At least one layer of feature aggregation is performed on the device state heterogeneous graph by a graph neural network (GCN, Graph Convolutional Networks) to obtain the feature aggregation result of each layer; According to the feature aggregation result of each layer, the average value of the feature vector of each computing node is calculated; The average values of the feature vectors of each computing node are aggregated to obtain the second feature of the device state heterogeneous graph.

[0064] Wherein, the feature aggregation of each layer is performed by using a graph neural network, including: According to the feature matrix and the adjacency matrix, the feature vectors of all neighbor nodes are aggregated to obtain the feature vector of each computing node; the feature vector of each computing node is subjected to feature conversion and nonlinear activation to obtain the processed feature vector of each computing node.

[0065] Here, a graph neural network is used in the task heterogeneous graph network and the device state heterogeneous graph network respectively, and the structure, design, training, etc. of the two graph neural networks can be the same or different, which is used for feature propagation or feature aggregation. The specific graph neural network used is not limited.

[0066] Here, considering the traditional dependence on static task partitioning rules, the real-time state of the processor (such as CPU, GPU, FPGA) cannot be perceived (such as memory occupation, load fluctuation, interconnection bandwidth change). For example, when the GPU load suddenly increases to 90%, the static strategy still allocates tasks according to the preset rules, resulting in resource contention and delay. The present application constructs a device state heterogeneous graph, updates the node state every 5 seconds, dynamically aggregates global resource features combined with graph convolution network (GCN), captures device changes in real time, and accurately matches task allocation with the current resource state, greatly improving resource utilization (about 30%-50%).

[0067] Specifically, the device state heterogeneous graph can be represented as: G =(V,E,A,X).

[0068] Where V represents the set of computing nodes, corresponding to each computing node in the graph , E is the edge set, corresponding to each edge in the graph , represents a directed edge from the source computing node to the target computing node and the corresponding weight, is the source node, is the destination node, represents the weight. A is the adjacency matrix, which defines the connection between the computing nodes and their communication rate. X is the feature matrix, each row corresponding to the state vector of a computing node.

[0069] In addition, a degree matrix D is defined to represent the connection degree of each computing node. The degree matrix D is a diagonal matrix whose diagonal elements are the out-degree sum of the computing node , that is, .

[0070] According to the degree matrix, the normalization processing is carried out: when processing the directed graph, the in-degree matrix D is calculated and the degree matrix is used to normalize the adjacency matrix , so that the total amount of information can be balanced during propagation.

[0071] The following describes the extraction of the second feature in combination with the device state heterogeneous graph. It can include: 1) Aggregating neighbor information: for each computing node , the graph neural network (GCN) aggregates the feature vectors of all its neighbor nodes. This is usually achieved by weighting the feature vectors of the neighbor nodes, and the weight is determined by the weight of the edge. For computing node , its updated feature vector , can be calculated as:

[0072] wherein, is a nonlinear activation function, is a learnable weight matrix, is a degree of a computing node , is a connection weight between a computing node and , taking a value of 0 (if there is no connection relationship) or a communication rate.

[0073] 2) Feature transformation: The feature vector of a computing node can be further processed through a linear transformation, which can usually be multiplied by a learnable weight matrix.

[0074] 3) Nonlinear activation: After feature transformation, a nonlinear activation function can be applied to increase the expression ability of the model. Common activation functions include ReLU, tanh, etc.

[0075] 4) Hierarchical processing: In actual GCN models, the above process can be performed through multiple layers, each of which can capture different feature abstractions and complex relationships between computing nodes, 5) Use the method of global average aggregation to realize the global aggregation of device state graph features: Calculate the average value of the feature vectors of all computing nodes, if is the output feature of the i-th computing node in the last layer of GCN, then the second feature of the device state heterogeneous graph may be: .

[0076] By completing the feature extraction of the device state graph and the task heterogeneous graph, the application extracts feature vectors from the device state heterogeneous graph and the task heterogeneous graph. The device state heterogeneous graph contains features such as CPU load, memory usage, communication rate, etc., while the task heterogeneous graph contains features such as the dependency relationship between tasks, resource requirements of tasks, etc. The features are spliced , called system features.

[0077] In some embodiments, extracting the first feature of the task heterogeneous graph and the second feature of the device state heterogeneous graph comprises: identifying the task heterogeneous graph using a task heterogeneous graph network to obtain the first feature; identifying the device state heterogeneous graph using a device state heterogeneous graph network to obtain the second feature; The task type discrimination according to the system features comprises: identifying the system features using a task classification network to obtain the discrimination result.

[0078] The task heterogeneous graph network, the device state heterogeneous graph network, and the task classification network can be pre-trained. The training method can include: Step 1, constructing a data set; specifically including: The global features of the device state heterogeneous graph and the global features of the task heterogeneous graph are extracted using the above method distribution (specifically, for each device or task, a graph neural network is executed to obtain node-level features, and then a summary layer is used to obtain global features of the graph); The global features of the device state heterogeneous graph and the global features of the task heterogeneous graph are spliced to form a system feature vector; According to the actual situation of system operation, each system feature vector is assigned a label, and the label is a compute-intensive or task-intensive system. The data set is divided into a training set, a validation set, and a test set. Common division ratios are 70% training set, 15% validation set, and 15% test set.

[0079] Step 2, model design: the system features are processed through 2 layers of fully connected layers, and the number of neurons in the last fully connected layer is set to 2 to realize the judgment of compute-intensive and task-intensive system features.

[0080] Step 3, training the neural network; specifically including: 1. Optimizer and loss function: select a suitable optimizer such as Adam or SGD, etc. For classification problems, use a cross-entropy loss function.

[0081] 2. Hyperparameter adjustment: The hyperparameters of the network are adjusted through the validation set, including learning rate, batch size, etc., and the training of the above two graph neural networks (i.e., the task heterogeneous graph network and the device state heterogeneous graph network) and the fully connected network for system feature judgment (i.e., the task classification network) is completed. Through the above steps, an effective system feature judgment network is constructed, which integrates three networks: the task heterogeneous graph network, the device state heterogeneous graph network, and the task classification network. The network is trained through a self-built data set. During inference, real-time task system features are collected to judge the compute-intensive and communication-intensive classification.

[0082] In practical applications, the above task heterogeneous graph network and device state heterogeneous graph network are used to complete the feature extraction of the device state heterogeneous graph and the task heterogeneous graph, and the task classification network is used to complete the task type judgment of real-time tasks under the current device state.

[0083] In some embodiments, according to the discrimination result, a strategy is selected, and the priority order of the task nodes is determined according to the selected strategy, including: If the discrimination result is communication-intensive, a first strategy is selected, and the first strategy is to determine a priority order based on average computation time and communication overhead; If the discrimination result is computation-intensive, a second strategy is selected, and the second strategy is to determine a priority order based on average computation time and computation cost standard deviation; The priority of each task node is calculated according to the selected strategy, and the priority order of the task nodes is obtained according to the priority of each task node.

[0084] Here, the task heterogeneous graph is divided into a computation-intensive task or a communication-intensive task.

[0085] For a communication-intensive task, the calculation of the priority of each task mainly considers: the task own cost (as follows ), the longest subsequent path cost (as follows ), and the structural importance cost (as follows ).

[0086] The priority calculation formula of the first strategy is as follows: +

[0087] Wherein, denotes the priority of the task node ; is the average computation time of the task node on multiple computing nodes (the value can be estimated based on the state of the computing node and the task content, the amount of task data, and the multiple computing nodes can refer to random multiple or all computing nodes, which is not limited here); denotes the task node set that has a preceding dependency relationship with the task node (that is, the task node that can be executed only after is completed); is the communication overhead between the task node and the task node (the communication overhead can be determined and recorded when the task is split). denotes the degree centrality of the task node ; denotes the betweenness centrality of the task node ; denotes the closeness centrality of the task node .

[0088] Through the above formula, the priority of the communication-intensive task node is mainly determined by the average calculation time and communication overhead, and the task node with high communication demand is given higher priority to be allocated to the high-bandwidth link.

[0089] Here, for the calculation-intensive task, the calculation of the task allocation priority mainly considers: calculation cost, maximum communication bottleneck (as follows ), the most critical subsequent task (as follows ), local connectivity (as follows ). At the same time, by introducing , the task that can maximize the advantage of heterogeneous computing can be better identified and processed preferentially.

[0090] The priority calculation formula of the second strategy is as follows: +

[0091] Wherein, represents the priority of the task node , the average calculation time of the task node on multiple computing nodes; the standard deviation of the calculation cost of the task node on multiple processors (the calculation cost can be resource consumption or energy consumption, which can be estimated based on the state of the computing node and the task content, the amount of task data, and multiple computing nodes can refer to random multiple or all computing nodes, which is not limited here). The standard deviation of the calculation cost can be obtained by using the calculation-intensive task sorting method, and the result sorted in descending order of the task sequence value is used as the final scheduling order. the communication overhead between the task node and the task node ; represents the set of task nodes that have a pre-dependence relationship with the task node ; represents the degree centrality of the task node .

[0092] Through the above formula, the priority of the calculation-intensive task is mainly determined by the average calculation time and the standard deviation of the calculation cost, which considers that the standard deviation can reflect the difference in execution time of the task on different processors, and the system will preferentially process those tasks that perform better on a specific processor.

[0093] The calculation formula of the above degree centrality is as follows: , wherein, is the task node ​a corresponding eigenvector, is the total number of neighbor task nodes of the task node is the total number of task nodes; The calculation formula of the betweenness centrality is as follows: wherein, is the total number of neighbor task nodes of the task node is the number of all shortest paths from the task node is the number of paths passing through the task node The calculation formula of the closeness centrality is as follows: wherein, is the shortest path length from the eigenvector of the task node to the eigenvector of the task node

[0094] Here, considering that different tasks have different resource requirements, a uniform allocation strategy cannot achieve reasonable allocation. For example, a communication-intensive task is incorrectly allocated to an FPGA with high computing performance but low bandwidth, which affects processing efficiency. The application introduces a task priority dynamic sorting function to match computing-intensive tasks with computing stable devices (such as GPUs) and preferentially allocate high-bandwidth nodes (such as interconnected GPU clusters) to communication-intensive tasks, so that the FPGA allocation efficiency is improved by 20%-40%, and the GPU intercommunication delay is reduced by 35%.

[0095] In some embodiments, a first task allocation scheme is generated according to the priority order, comprising: According to the priority order, each task node is allocated a computing node in turn to achieve the fastest task completion.

[0096] Here, the task node in the task heterogeneous graph actually represents a task, and the computing node in the device state heterogeneous graph actually represents a computing unit or processor, so that each task node is allocated a computing node means that the task is allocated to the corresponding computing unit or processor.

[0097] For any one of the above task types, the (i.e., the priority order of the task is obtained, and the priority order represents which task should be considered first) is calculated, and then a sorted task list is obtained. Then, using a greedy strategy, an initial scheme with the highest current quality, i.e., a first task allocation scheme, can be generated according to the task list. The specific way to generate the first task allocation scheme is: in the priority order, each task is allocated to the computing node that can make it "complete the fastest".​​​​

[0098] In some embodiments, a plurality of second task allocation schemes are generated according to the first task allocation scheme, including: The first task allocation scheme is fine-tuned to obtain an optimal candidate scheme, a following scheme and a warning scheme corresponding to the first task allocation scheme as the plurality of second task allocation schemes.

[0099] Here, the first task allocation scheme is taken as the initial optimal scheme of the subsequent plurality of schemes (such as the second task allocation scheme), and the subsequent method can generate some random perturbations on the basis thereof, thereby ensuring the quality of the entire initial population.

[0100] In this way, the priority ranking is used as the starting point for scheme generation, which greatly accelerates the convergence speed of the algorithm and enables it to find excellent solutions (i.e., optimal target task schemes) more quickly.

[0101] In some embodiments, the iteration operation of the first round includes: Each scheme is evaluated by using a scheduling simulator to obtain an evaluation result of each scheme; wherein the scheme is a first allocation task scheme or a second allocation task scheme; the evaluation result is related to a load balancing index and a scheduling length of the allocation task scheme; According to the evaluation result of each scheme, an optimal scheme of the current round iteration operation is selected; In some embodiments, the iteration operation of the second round to the last round includes: The optimal scheme obtained in the last round of iteration operation is fine-tuned to obtain an optimal candidate scheme, a following scheme and a warning scheme corresponding to the optimal scheme; Each scheme is evaluated by using the scheduling simulator to obtain an evaluation result of each scheme; wherein the scheme is the optimal candidate scheme, the following scheme or the warning scheme; According to the evaluation result of each scheme, an optimal scheme of the current round iteration operation is selected; It is judged whether an iteration end condition is reached, and if the iteration end condition is reached, the optimal scheme is determined as a target task allocation scheme; If the iteration end condition is not reached, the iteration operation enters the next round.

[0102] In some embodiments, fine-tuning the optimal scheme obtained in the last round of iteration operation to obtain an optimal candidate scheme, a following scheme and a warning scheme corresponding to the optimal scheme includes: According to the task dependency relationship of the task heterogeneous graph, the task nodes are layered to obtain a layering result; the task nodes in the same layer in the layering result have no dependency relationship, and the task nodes with a preposed dependency relationship belong to the same layer; Based on the principle of fine-tuning only the task nodes of the bottom layer, the optimal scheme is fine-tuned to obtain an optimal candidate scheme; Based on the principle of fine-tuning only the task nodes of the middle layer, the optimal scheme is fine-tuned to obtain a following scheme; Based on the principle of fine-tuning only the task nodes of the upper layer, the optimal scheme is fine-tuned to obtain a guard scheme.

[0103] Here, to obtain the optimal task allocation scheme (i.e., the target task allocation scheme), the present application proposes a dynamic collaborative allocation scheduling method based on elite iteration and multi-strategy disturbance. The core idea of this method is: starting from a high-quality initial allocation scheme (i.e., the first task allocation scheme), in each iteration, a set of new candidate schemes (i.e., multiple second task allocation schemes) is generated around the current optimal scheme through three different levels and amplitudes of disturbance strategies. Then, the candidate schemes are evaluated, a new optimal scheme is selected, and compared and updated with the historical optimal scheme, and so on, until the final solution that meets the requirements is found.

[0104] The above fine-tuning of the first task allocation scheme to obtain the optimal candidate scheme, the following scheme, and the guard scheme corresponding to the first task allocation scheme is the same as the fine-tuning of the optimal scheme obtained by the last iteration operation to obtain the optimal candidate scheme, the following scheme, and the guard scheme corresponding to the optimal scheme. Here, it is not repeated.

[0105] Here, through the designed normalized fitness function, the makespan and the load balance index (pld) are combined, the "optimal-following-guard" three-level allocation scheme is generated through the sparrow search algorithm (SSA), and the Pareto optimality of task completion time and load balancing degree is realized in the 5G edge computing scene. The system comprehensive performance is improved by 25%-30%.

[0106] In addition, through the dynamic collaborative allocation mechanism, the present application can also realize real-time sensing of task insertion or device abnormality (such as GPU memory overflow), trigger the guard scheme to redistribute tasks within 50ms, and combine the device state heterogeneous graph to predict resource bottlenecks, support millisecond-level adaptive adjustment, and shorten the task interruption recovery time to below 200ms in the smart city Internet of Things scene.

[0107] The following provides an example to illustrate the implementation steps of finally obtaining the target task allocation scheme according to the first task allocation scheme as follows: Step 1, according to the task heterogeneous graph or the task dependency relationship, the task dependency is layered; Here, all tasks are topologically layered according to the dependency relationship in the task heterogeneous graph. By breadth-first search (BFS) algorithm, starting from the entry tasks (such as V1, level 1), all tasks are divided into different levels, for example Figure 2 V1 in the middle belongs to the first layer, V2, V3, and V4 belong to the second layer, V5 and V6 belong to the third layer, and V7 belongs to the fourth layer (the bottom layer). All tasks in the same level have no direct dependency relationship and can be executed in parallel. If the entire task graph is divided into N layers, then: Layer 1: contains all entry tasks (tasks with in-degree 0); for example, Figure 2 V1 in the middle; Layer k: contains all tasks whose direct predecessor tasks are in the k-1 layer and before; for example, Figure 2 V2, V3, and V4 in the middle are in the second layer; V5 and V6 are in the third layer; Layer N: contains all exit tasks (tasks with out-degree 0); for example, Figure 2 V7 in the middle.

[0108] Step 2, perform at least one round of iteration operation; Here, in each iteration operation, first, from the current optimal solution (such as the first task allocation scheme, the optimal solution determined by each round of iteration operation), generate multiple (assume z, z can be a multiple of 3) new candidate solutions.

[0109] These z solutions are generated by the following three different generation strategies: 1. Fine-tuning strategy of the optimal solution (Leader): this strategy aims to fine-tune the current optimal solution. Copy several copies of the current optimal solution, and modify each copy as follows: Adjustment range: only allow adjustment in the bottom layer of the task heterogeneous graph (e.g. layer N and layer N-1).

[0110] Adjustment amplitude: small range random redistribution of nodes in the range. For example, randomly select 5% to 10% of the tasks in these layers and redistribute them to different computing nodes.

[0111] 2. Regional exploration strategy of the follower solution (Follower): this strategy aims to simulate and improve the core structure of the current optimal solution and perform regional exploration. Copy several copies of the current optimal solution, and modify each copy as follows: Adjustment range: adjustment can be made in the middle layer of the task heterogeneous graph (e.g. layer L to layer N-2).

[0112] Adjustment magnitude: Make a moderate adjustment to the node allocation. For example, randomly select 20% to 30% of the tasks within this range and allocate them according to the current optimal allocation pattern or perform random reallocation.

[0113] 3. Global Search Strategy of the Scout Algorithm: This strategy aims to introduce high diversity by making radical changes to the early levels that are crucial for task scheduling, helping the algorithm escape local optima. Several copies of the current optimal solution are made, and each is modified as follows: Adjustment scope: Mainly targets the upper or initial levels of the task heterogeneous graph (e.g., level 2 to level L-1).

[0114] Adjustment magnitude: Perform a high proportion of random redistribution. For example, randomly select 40% to 50% of the tasks within this range and distribute them completely randomly to new computing nodes.

[0115] Step 3: After obtaining multiple new candidate solutions, evaluate and update each candidate method, specifically including: Fitness calculation: After generating all new candidate solutions, call the scheduling simulator to calculate the allocation priority function value (denoted as fitness(z)) for each solution. Select the optimal allocation scheme for this generation of operations: From z candidate schemes, select the one with the smallest fitness value (optimal) as the optimal scheme for this iteration.

[0116] Update the historical best: Compare the current best solution with the historical best solution. If the current best solution has a lower fitness value, use it to update the historical best solution. The historical best solution only records the globally optimal solution discovered so far.

[0117] The current best solution is set as the new current best solution, serving as the starting point and template for the next iteration.

[0118] Step 4: Repeat steps 2 and 3 until any of the following conditions are met, at which point the algorithm terminates: The maximum number of iterations, max_iter, has been reached. The fitness value of the historically optimal solution did not improve significantly in consecutive iterations; The fitness value of the historically optimal solution has reached or fallen below the preset target threshold.

[0119] Step 5: Output the final historical best solution, which is the optimal task allocation strategy under the current system state and task requirements.

[0120] Here, each scheme is evaluated by the scheduling simulator to obtain an evaluation result of each scheme, including: The load balancing index and scheduling length of each scheme are calculated, and the allocation priority function value is determined according to the load balancing index and scheduling length as the evaluation result.

[0121] Specifically, the calculation process of the allocation priority function value (fitness ) of each scheme is as follows: = .

[0122] After obtaining the final allocation priority function value, it is sorted in descending order as the task allocation basis of the zth task allocation scheme.

[0123] Specifically, for the problem of load imbalance of heterogeneous processors, the embodiment of the application designs an optimization target as a processor load balancing index (pld, processor load), and the calculation formula is:

[0124] Among them, is the cumulative task quantity of the ith computing node in the zth scheme; is the average number of tasks allocated to each computing node; p is the total number of computing nodes; the smaller the pld value is, the better.

[0125] The final goal of the task scheduling algorithm is to make the overall completion time less, and to make the load of each processor tend to be balanced, so as to make the scheduling length as short as possible. The calculation formula of the scheduling length makespan is:

[0126] Among them, EFT represents Earliest Finish Time, the earliest completion time, represents the earliest completion time of the exit task in the zth task allocation scheme, and max(makespan) is the maximum value of the scheduling length in this iteration operation. The smaller the scheduling length value is, the better.

[0127] The application combines the scheduling length and the processor load balancing index as the final allocation priority function, but the numerical values of the two are quite different, so they cannot be directly added. In order to make the two be at the same measurement level, first, the normalization processing is performed, and the calculation formula of pld is:

[0128] Among them, is the maximum value of the load balancing index in this iteration; represents the normalized load balancing index of the zth task allocation scheme.

[0129] The calculation formula of makespan is:

[0130] Wherein, max(makespan) is the maximum value of the length of this iteration scheduling, and represents the normalized scheduling length of the zth task allocation scheme.

[0131] Here, under the premise of complying with the priority order, it is further determined that each task should be executed by which processor to make the overall effect optimal. In this application, a lightweight, ultra-fast "scheduling simulator" (Scheduling Simulator) or "mathematical model" is used to achieve this goal. In each algorithm iteration, when the fitness value of a new scheme needs to be calculated, the system does not call the actual processor to execute the task, but calculates it through mathematical simulation in memory.

[0132] The specific workflow of the scheduling simulator is as follows: The following data is input into the scheduling simulator: The first task allocation scheme, for example, [P2, P3, P5,...], indicates that task 1 is assigned to P2, task 2 is assigned to P1, etc. Task dependency graph (used to indicate task dependency relationship); Estimated calculation time of each task on each processor (a known two-dimensional table can be pre-estimated, and each element represents the time of task i on processor j); Estimated communication time between computing nodes (a known parameter that can be pre-calculated).

[0133] The simulation process of the scheduling simulator includes: according to the task dependency relationship, the tasks are virtually scheduled one by one; when all the tasks are scheduled in the scheduling simulator, the makespan is calculated. .

[0134] The entire simulation process only involves table lookup, comparison and addition operations, and does not involve any actual calculation tasks. The calculation of a scheme may only take a few milliseconds or even less time. Therefore, it takes only one second to evaluate, which enables the algorithm to explore a huge solution space in a short time and find a high-quality allocation scheme.

[0135] As mentioned above, the dynamic collaborative allocation scheduling method of the present application integrates hierarchical strategies and collaborative update rules to form a complete iterative optimization process until the optimal solution that meets the conditions is found.

[0136] The method provided by the application performs task priority sorting based on task types (communication-intensive or computation-intensive), considers the dependency relationship between tasks to determine critical task nodes and computing node states, and finally adopts an earliest completion time strategy and a computing node task allocation balancing strategy to perform dynamic processor allocation. In order to accurately implement this process, two heterogeneous graph networks, a task heterogeneous graph and a device state heterogeneous graph, are constructed, detailed information of computing devices in different states is captured through a graph neural network technology, and thus the optimized matching between tasks and resources is realized. This method not only improves the efficiency of task scheduling and the working efficiency of the system, but also improves the response capability of the scheduling system to changes in the heterogeneous computing environment through the dynamic collaborative allocation and scheduling method of the application, and provides an efficient, dynamic and intelligent solution for task scheduling on a heterogeneous processing platform.

[0137] Figure 5 A structural schematic diagram of a task scheduling device provided by an embodiment of the application is shown in FIG. 1. Figure 5 As shown in the figure, the device comprises: A first processing module configured to construct a task heterogeneous graph according to the state of a computing task required to be processed by a heterogeneous computing system, the task heterogeneous graph being configured to record task information required to be processed by the heterogeneous computing system; and the heterogeneous computing system comprising multiple types of computing nodes. A second processing module configured to construct a device state heterogeneous graph according to the device state of the heterogeneous computing system, the device state heterogeneous graph being configured to record the real-time state of different computing nodes of the heterogeneous computing system. A third processing module configured to extract a first feature of the task heterogeneous graph and a second feature of the device state heterogeneous graph, and splice the first feature and the second feature to obtain a system feature. A fourth processing module configured to perform task type discrimination according to the system feature to obtain a discrimination result, the discrimination result being computation-intensive or communication-intensive. A fifth processing module configured to select a strategy according to the discrimination result, and determine a priority order of task nodes according to the selected strategy; the selected strategy being a first strategy or a second strategy. A sixth processing module configured to generate a first task allocation scheme according to the priority order, generate a plurality of second task allocation schemes according to the first task allocation scheme, perform at least one round of iteration operation according to the first task allocation scheme and the plurality of second task allocation schemes to obtain a target task allocation scheme; and the iteration operation being configured to adjust each task allocation scheme to obtain the target task allocation scheme.

[0138] In some embodiments, the fifth processing module is configured to select the first strategy if the discrimination result is communication-intensive, and the first strategy is to determine the priority order based on the average computation time and the communication overhead. if the discrimination result is computation-intensive, a second strategy is selected, and the second strategy is to determine a priority order based on average computation time and computation cost standard deviation; a priority of each task node is calculated according to the selected strategy, and the priorities of the task nodes are sorted to obtain a priority order of the task nodes.

[0139] In some embodiments, the priority calculation formula of the first strategy is as follows: + ; wherein, denotes the priority of a task node ; is the average computation time of the task node on multiple computing nodes; denotes a set of task nodes having a precedence dependency relationship with the task node ; is the communication overhead between the task node and the task node ; denotes the degree centrality of the task node ; denotes the betweenness centrality of the task node ; denotes the closeness centrality of the task node .

[0140] In some embodiments, the priority calculation formula of the second strategy is as follows: + ; wherein, denotes the priority of a task node ; is the average computation time of the task node on multiple computing nodes; is the standard deviation of the computation cost of the task node on multiple computing nodes; is the communication overhead between the task node and the task node ; denotes a set of task nodes having a precedence dependency relationship with the task node ; denotes the degree centrality of the task node .

[0141] In some embodiments, the calculation formula of the degree centrality is as follows: wherein, is a task node is a corresponding feature vector, is a task node is a total number of neighbor task nodes of the task node is a total number of task nodes; The formula for calculating the betweenness centrality is as follows: wherein, is a task node is a number of all shortest paths from the task node to the task node is a number of paths passing through the task node ; The formula for calculating the closeness centrality is as follows: wherein, is a task node is a feature vector of the task node is a shortest path length from the feature vector of the task node to the feature vector of the task node .

[0142] In some embodiments, the sixth processing module is configured to, according to the priority order, sequentially assign a computing node to each task node with the goal of completing a task as quickly as possible.

[0143] In some embodiments, the sixth processing module is configured to fine-tune the first task allocation scheme to obtain an optimal candidate scheme, a following scheme, and a guard scheme corresponding to the first task allocation scheme as the plurality of second task allocation schemes.

[0144] In some embodiments, the sixth processing module is configured to evaluate each scheme by using a scheduling simulator to obtain an evaluation result of each scheme; wherein the scheme is a first allocation task scheme or a second allocation task scheme; the evaluation result is related to a load balancing index and a scheduling length of the allocation task scheme. According to the evaluation result of each scheme, an optimal scheme of a current round of iteration operation is selected.

[0145] In some embodiments, the sixth processing module is configured to fine-tune an optimal scheme obtained in a previous round of iteration operation to obtain an optimal candidate scheme, a following scheme, and a guard scheme corresponding to the optimal scheme. Each scheme is evaluated by using the scheduling simulator to obtain an evaluation result of each scheme; wherein the scheme is the optimal candidate scheme, the following scheme, or the guard scheme. According to the evaluation result of each scheme, an optimal scheme of a current round of iteration operation is selected. determining whether an iteration end condition is reached, and if the iteration end condition is reached, determining the optimal scheme as the target task allocation scheme; If the iteration end condition is not reached, proceeding to the next round of iteration.

[0146] In some embodiments, the sixth processing module is configured to perform layering on the task nodes according to the task dependency relationship of the task heterogeneous graph to obtain a layering result; task nodes in the same layer in the layering result have no dependency relationship, and task nodes with a preceding dependency relationship belong to the same layer; The optimal scheme is fine-tuned based on the principle of fine-tuning only the task nodes in the bottom layer to obtain an optimal candidate scheme; The optimal scheme is fine-tuned based on the principle of fine-tuning only the task nodes in the middle layer to obtain a following scheme; The optimal scheme is fine-tuned based on the principle of fine-tuning only the task nodes in the upper layer to obtain a warning scheme.

[0147] In some embodiments, the sixth processing module is configured to calculate a load balancing index and a scheduling length of each scheme, determine an allocation priority function value of each scheme as the evaluation result according to the load balancing index and the scheduling length; The calculation formula of the load balancing index is as follows: ; Wherein, ; is the cumulative task quantity of the i-th computing node in the z-th scheme; is the average number of tasks allocated to each computing node; p is the total number of computing nodes; is the maximum value of the load balancing index in the current iteration operation; The calculation formula of the scheduling length is as follows: ; Wherein, , represents the completion time of the exit task in the z-th scheme; max(makespan) is the maximum value of the scheduling length in the current iteration operation.

[0148] In some embodiments, the third processing module is configured to identify the task heterogeneous graph using a task heterogeneous graph network to obtain the first feature; identify the device state heterogeneous graph using a device state heterogeneous graph network to obtain the second feature; The fourth processing module is configured to identify the system feature using a task classification network to obtain the discrimination result.

[0149] In some embodiments, the task heterogeneous graph includes: a feature matrix and an adjacency matrix; The first processing module is used to construct a feature matrix and an adjacency matrix based on the task information to be processed by the heterogeneous computing system. The feature matrix is ​​used to characterize the computational characteristics of each task node, and the adjacency matrix is ​​used to characterize the dependency relationships between task nodes. Calculate the degree of each task node based on the adjacency matrix, and determine the degree matrix based on the degree of each task node; The adjacency matrix is ​​normalized using the degree matrix to obtain the processed adjacency matrix.

[0150] In some embodiments, the third processing module is used to perform feature propagation on the task heterogeneous graph through a graph neural network, update the features of each task node in the task heterogeneous graph layer by layer, and introduce the dependencies between tasks into the features of the task nodes to obtain the updated feature vector of the task nodes. Aggregate and update the feature vectors of all the task nodes; Determine the local contribution of each task node; the local contribution is determined based on at least one of the degree centrality, proximity centrality, and betweenness centrality of the task node. Based on the dependencies between task nodes, the feature vectors of all task nodes are sorted according to their local contribution. The feature vectors of all sorted task nodes are input into a Long Short-Term Memory (LSTM) network, and the first feature of the task heterogeneous graph is obtained based on the LSTM.

[0151] In some embodiments, the first processing module is configured to construct a feature matrix and an adjacency matrix based on the device states of the heterogeneous computing system, wherein the feature matrix is ​​used to characterize the state characteristics of each computing node; and the adjacency matrix is ​​used to characterize the connection relationships and / or communication rates between computing nodes. Calculate the degree of each computing node based on the adjacency matrix, and determine the degree matrix based on the degree of each computing node; The adjacency matrix is ​​normalized using the degree matrix to obtain the processed adjacency matrix.

[0152] In some embodiments, the third processing module is configured to perform feature aggregation of at least one layer on the device state heterogeneous graph using a graph neural network to obtain the feature aggregation result of each layer; Based on the feature aggregation results of each layer, calculate the average value of the feature vector of each computing node; The average value of the feature vectors of each computing node is aggregated to obtain the second feature of the device state heterogeneity graph.

[0153] In some embodiments, the information recorded in the task heterogeneity graph includes at least one of the following: The set of tasks, the task execution dependencies between tasks, the set of task computation volume, the set of task communication volume, the set of task computation preferences, the set of all computing nodes of the heterogeneous computing system, the current remaining memory of the heterogeneous computing system, and the current set of interconnect bandwidth of all computing nodes of the heterogeneous computing system. The information recorded in the heterogeneous device status graph includes at least one of the following: the status of all computing nodes in the heterogeneous computing system, and the connection relationships and communication rates between computing nodes.

[0154] It is understood that the task scheduling device provided in the above embodiments, when implementing the corresponding task scheduling method, can allocate the above processing to different program modules as needed to complete all or part of the processing described above. Furthermore, the device and the corresponding method embodiments provided in the above embodiments belong to the same concept, and their specific implementation process is detailed in the method embodiments, which will not be repeated here.

[0155] This application provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform a task scheduling method.

[0156] This application provides a computer-readable storage medium storing executable instructions, wherein the executable instructions are stored and when executed by a processor, they will cause the processor to execute the task scheduling method provided in this application.

[0157] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; or it may be a variety of devices including one or any combination of the above-mentioned memories.

[0158] In some embodiments, executable instructions may take the form of a program, software, software module, script, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0159] As an example, executable instructions may, but do not necessarily, correspond to files in a file system. They may be stored as part of a file that holds other programs or data, for example, in one or more scripts in a Hyper Text Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple collaborating files (e.g., a file that stores one or more modules, subroutines, or code sections).

[0160] As an example, executable instructions can be deployed to execute on a single computing device, or on multiple computing devices located in one location, or on multiple computing devices distributed across multiple locations and interconnected via a communication network.

[0161] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; as shown below. Figure 6 As shown, the electronic device 60 includes: a processor 601, and a memory 602 communicatively connected to the processor 601; the memory 602 stores instructions executable by the processor 601. The instructions are executed by the processor 601 to enable the processor 601 to perform: Based on the computing task status required to be processed by the heterogeneous computing system, a task heterogeneity graph is constructed. The task heterogeneity graph is used to record the task information required to be processed by the heterogeneous computing system. The heterogeneous computing system includes multiple types of computing nodes. Based on the device status of the heterogeneous computing system, a device status heterogeneity diagram is constructed; the device status heterogeneity diagram is used to record the real-time status of different computing nodes in the heterogeneous computing system. Extract the first feature of the task heterogeneity graph and the second feature of the device state heterogeneity graph, and concatenate the first feature and the second feature to obtain the system feature; Based on the system characteristics, the task type is determined to obtain a determination result, which is either computationally intensive or communication-intensive. A strategy is selected based on the discrimination result, and the priority order of task nodes is determined based on the selected strategy; the selected strategy is either the first strategy or the second strategy. A first task allocation scheme is generated according to the priority order, and multiple second task allocation schemes are generated based on the first task allocation scheme. At least one round of iterative operations is performed based on the first task allocation scheme and the plurality of second task allocation schemes to obtain the target task allocation scheme; the iterative operations are used to adjust each task allocation scheme to obtain the target task allocation scheme.

[0162] The electronic devices and corresponding task scheduling methods provided in the above embodiments belong to the same concept, and their specific implementation process can be found in the method embodiments, which will not be repeated here.

[0163] In practical applications, the electronic device 60 may further include at least one network interface 603. The various components of the electronic device 60 are coupled together via a bus system 604. It is understood that the bus system 604 is used to implement communication between these components. In addition to a data bus, the bus system 604 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 6 All buses are labeled as bus system 604. The number of processors 601 and the number of memories 602 can be at least one. The network interface 603 is used for wired or wireless communication between the electronic device 60 and other devices.

[0164] The memory 602 in this embodiment is used to store various types of data to support the operation of the electronic device 60.

[0165] The methods disclosed in the embodiments of this application can be applied to or implemented by processor 601. Processor 601 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuit of the hardware in processor 601 or by instructions in software form. The processor 601 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 601 can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in memory 602. Processor 601 reads the information in memory 602 and, in conjunction with its hardware, completes the steps of the aforementioned task scheduling method.

[0166] In some embodiments, the electronic device 60 may be implemented by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers (MCUs), microprocessors, or other electronic components to perform the aforementioned methods.

[0167] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0168] In the above description, the term "some embodiments" refers to a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0169] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used in this application is for the purpose of describing embodiments of this application only and is not intended to be limiting of this application.

[0170] It should be understood that in the various embodiments of this application, the sequence number of each implementation process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0171] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0172] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A task scheduling method, characterized in that, The method includes: Based on the computing task status required to be processed by the heterogeneous computing system, a task heterogeneity graph is constructed; the task heterogeneity graph is used to record the task information required to be processed by the heterogeneous computing system; the heterogeneous computing system includes multiple types of computing nodes. Based on the device status of the heterogeneous computing system, a device status heterogeneity diagram is constructed; the device status heterogeneity diagram is used to record the real-time status of different computing nodes in the heterogeneous computing system. Extract the first feature of the task heterogeneity graph and the second feature of the device state heterogeneity graph, and concatenate the first feature and the second feature to obtain the system feature; Based on the system characteristics, the task type is determined to obtain a determination result, which is either computationally intensive or communication-intensive. A strategy is selected based on the discrimination result, and the priority order of task nodes is determined based on the selected strategy; the selected strategy is either the first strategy or the second strategy. A first task allocation scheme is generated according to the priority order, and multiple second task allocation schemes are generated based on the first task allocation scheme. At least one round of iterative operations is performed based on the first task allocation scheme and the plurality of second task allocation schemes to obtain the target task allocation scheme; the iterative operations are used to adjust each task allocation scheme to obtain the target task allocation scheme.

2. The method according to claim 1, characterized in that, The step of selecting a strategy based on the discrimination result and determining the priority order of task nodes based on the selected strategy includes: If the discrimination result is communication intensive, the first strategy is selected, and the first strategy is to determine the priority order based on the average computing time and communication overhead. If the discrimination result is computationally intensive, the second strategy is selected, which determines the priority order based on the average computation time and the standard deviation of computation cost. The priority of each task node is calculated based on the selected strategy, and the task nodes are sorted according to their priorities to obtain the priority order of the task nodes.

3. The method according to claim 2, characterized in that, The priority calculation formula for the first strategy is as follows: + ； in, Represents task node Priority; For task nodes Average computation time across multiple computing nodes; Represents task nodes A set of task nodes that have prerequisite dependencies; For task nodes and task nodes Inter-communication overhead; Represents task node Degree centrality; Represents task node Betweenness centrality; Represents task node The proximity centrality.

4. The method according to claim 2, characterized in that, The priority calculation formula for the second strategy is as follows: + ； in, Represents task node Priority; For task nodes Average computation time across multiple computing nodes; For task nodes The standard deviation of computation cost across multiple computing nodes; For task nodes and task nodes Inter-communication overhead; Represents task nodes A set of task nodes that have prerequisite dependencies; Represents task node Degree centrality.

5. The method according to claim 3, characterized in that, The formula for calculating the degree centrality is as follows: ,in, For task nodes The corresponding feature vector, It is a task node The total number of neighboring task nodes, The total number of task nodes; The formula for calculating the betweenness centrality is as follows: ,in, For task nodes To the task node The number of all shortest paths, For passing through task nodes The number of paths; The formula for calculating the proximity centrality is as follows: ,in, For task nodes eigenvectors To the task node eigenvectors The shortest path length.

6. The method according to claim 1, characterized in that, The first task allocation scheme is generated according to the aforementioned priority order, including: Based on the priority order, with the goal of completing the task as quickly as possible, computing nodes are assigned to each task node in sequence.

7. The method according to claim 1, characterized in that, Multiple second task allocation schemes are generated based on the first task allocation scheme, including: The first task allocation scheme is fine-tuned to obtain the optimal candidate scheme, the following scheme, and the warning scheme corresponding to the first task allocation scheme, which are used as the plurality of second task allocation schemes.

8. The method according to claim 1, characterized in that, The first round of iterative operations includes: Each scheme is evaluated using a scheduling simulator to obtain an evaluation result for each scheme; wherein, the scheme is either a first task allocation scheme or a second task allocation scheme; the evaluation result is related to the load balancing index and scheduling length of the task allocation scheme; Based on the evaluation results of each scheme, the optimal scheme for the current round of iteration is selected.

9. The method according to claim 1, characterized in that, The iterative operations from the second to the last round include: Fine-tune the optimal solution obtained in the previous iteration to obtain the optimal candidate solution, the following solution, and the warning solution corresponding to the optimal solution. Each scheme is evaluated using the scheduling simulator to obtain an evaluation result for each scheme; wherein, the scheme is the optimal candidate scheme, the following scheme, or the alert scheme; Based on the evaluation results of each scheme, select the optimal scheme for the current round of iteration. Determine whether the iteration termination adjustment has been reached. If the iteration termination condition has been met, determine the optimal solution as the target task allocation solution. If the iteration termination condition is not met, proceed to the next iteration.

10. The method according to claim 9, characterized in that, Fine-tuning the optimal solution obtained in the previous iteration yields the optimal candidate solution, the following solution, and the warning solution corresponding to the optimal solution, including: Based on the task dependency relationship of the task heterogeneous graph, the task nodes are layered to obtain the layering result; in the layering result, task nodes in the same layer have no dependency relationship, and task nodes with a prerequisite dependency relationship belong to the same layer. Based on the principle of fine-tuning only the lowest-level task nodes, the optimal solution is fine-tuned to obtain the optimal candidate solution; Based on the principle of fine-tuning only the task nodes in the intermediate layer, the optimal solution is fine-tuned to obtain the following solution; Based on the principle of only fine-tuning the upper-level task nodes, the optimal solution is fine-tuned to obtain the warning solution.

11. The method according to claim 9, characterized in that, Each scheme is evaluated using the scheduling simulator to obtain the evaluation results for each scheme, including: Calculate the load balancing index and scheduling length for each scheme, and determine the allocation priority function value for each scheme based on the load balancing index and scheduling length, as the evaluation result; The formula for calculating the load balancing index is as follows: ； in, ; Let be the cumulative number of tasks at the i-th computing node in the z-th scheme; The average number of tasks assigned to each computing node; p is the total number of computing nodes; This represents the maximum value of the load balancing index during this iteration. The formula for calculating the scheduling length is as follows: ； in, , This represents the completion time of the exit task in the z-th scheme; max(makespan) is the maximum value of the scheduling length in this iteration.

12. The method according to claim 1, characterized in that, Extracting the first feature of the task heterogeneity graph and the second feature of the device state heterogeneity graph includes: The first feature is obtained by identifying the task heterogeneous graph using a task heterogeneous graph network. The second feature is obtained by identifying the device state heterogeneity graph using a device state heterogeneity graph network; The step of determining the task type based on the system characteristics and obtaining the determination result includes: using a task classification network to identify the system characteristics and obtaining the determination result.

13. The method according to claim 1, characterized in that, The task heterogeneous graph includes: a feature matrix and an adjacency matrix; The step of constructing a task heterogeneity graph based on the computing task states required by the heterogeneous computing system includes: Based on the task information to be processed by the heterogeneous computing system, a feature matrix and an adjacency matrix are constructed. The feature matrix is ​​used to characterize the computational characteristics of each task node; the adjacency matrix is ​​used to characterize the dependencies between task nodes. Calculate the degree of each task node based on the adjacency matrix, and determine the degree matrix based on the degree of each task node; The adjacency matrix is ​​normalized using the degree matrix to obtain the processed adjacency matrix.

14. The method according to claim 12, characterized in that, The step of using a task heterogeneous graph network to identify the task heterogeneous graph and obtain the first feature includes: The graph neural network is used to propagate features of the heterogeneous task graph, update the features of each task node in the heterogeneous task graph layer by layer, and introduce the dependencies between tasks into the features of the task nodes to obtain the updated feature vector of the task nodes. Aggregate and update the feature vectors of all the task nodes; Determine the local contribution of each task node; the local contribution is determined based on at least one of the degree centrality, proximity centrality, and betweenness centrality of the task node. Based on the dependencies between task nodes, the feature vectors of all task nodes are sorted according to their local contribution. The feature vectors of all sorted task nodes are input into a Long Short-Term Memory (LSTM) network, and the first feature of the task heterogeneous graph is obtained based on the LSTM.

15. The method according to claim 1, characterized in that, Based on the device states of the heterogeneous computing system, construct a device state heterogeneity diagram, including: Based on the device status of the heterogeneous computing system, a feature matrix and an adjacency matrix are constructed. The feature matrix is ​​used to characterize the state characteristics of each computing node; the adjacency matrix is ​​used to characterize the connection relationship and / or communication rate between computing nodes. Calculate the degree of each computing node based on the adjacency matrix, and determine the degree matrix based on the degree of each computing node; The adjacency matrix is ​​normalized using the degree matrix to obtain the processed adjacency matrix.

16. The method according to claim 12, characterized in that, The second feature is obtained by identifying the device state heterogeneity graph using a device state heterogeneity graph network, including: The device state heterogeneous graph is subjected to feature aggregation at least one layer using a graph neural network to obtain the feature aggregation result of each layer. Based on the feature aggregation results of each layer, calculate the average value of the feature vector of each computing node; The average value of the feature vectors of each computing node is aggregated to obtain the second feature of the device state heterogeneity graph.

17. The method according to claim 1, characterized in that, The information recorded in the task heterogeneity graph includes at least one of the following: The set of tasks, the task execution dependencies between tasks, the set of task computation volume, the set of task communication volume, the set of task computation preferences, the set of all computing nodes of the heterogeneous computing system, the current remaining memory of the heterogeneous computing system, and the current set of interconnect bandwidth of all computing nodes of the heterogeneous computing system. The information recorded in the heterogeneous device status graph includes at least one of the following: the status of all computing nodes in the heterogeneous computing system, and the connection relationships and communication rates between computing nodes.

18. A task scheduling device, characterized in that, The device includes: The first processing module is used to construct a task heterogeneity graph based on the computing task status required to be processed by the heterogeneous computing system. The task heterogeneity graph is used to record the task information required to be processed by the heterogeneous computing system. The heterogeneous computing system includes multiple types of computing nodes. The second processing module is used to construct a device state heterogeneity graph based on the device status of the heterogeneous computing system; the device state heterogeneity graph is used to record the real-time status of different computing nodes in the heterogeneous computing system. The third processing module is used to extract the first feature of the task heterogeneity graph and the second feature of the device state heterogeneity graph, and to concatenate the first feature and the second feature to obtain the system feature. The fourth processing module is used to determine the task type based on the system characteristics and obtain a determination result, wherein the determination result is either computationally intensive or communication-intensive. The fifth processing module is used to select a strategy based on the discrimination result and determine the priority order of tasks based on the selected strategy; the selected strategy is either the first strategy or the second strategy. The sixth processing module is used to generate a first task allocation scheme according to the priority order, generate multiple second task allocation schemes according to the first task allocation scheme, and perform at least one round of iterative operation according to the first task allocation scheme and the multiple second task allocation schemes to obtain a target task allocation scheme; the iterative operation is used to adjust each task allocation scheme to obtain the target task allocation scheme.

19. An electronic device, characterized in that, include: At least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 17.

20. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, The computer instructions are used to cause the computer to perform the method according to any one of claims 1 to 17.

Images