A system-on-chip xbar module verification method and system
By reusing known functional modules on the SoC to provide stimulation and result capture for the XBAR module, the problems of resource waste and scene distortion in XBAR module verification are solved, and efficient and reliable verification results are achieved.
Patent Information
- Application Number
- CN202511491999.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-20
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2045-10-20
AI Technical Summary
Existing technologies make it difficult to directly verify XBAR modules without output status registers in on-chip systems, and verification methods suffer from high resource overhead, distortion of verification scenarios, and low efficiency.
By reusing known and functionally correct hardware modules on the SoC, dynamically configuring stimulus generation and result capture, a verification environment for the XBAR module is established, avoiding the introduction of additional test circuitry and achieving indirect and realistic verification.
It reduces chip design costs and complexity, improves the authenticity and reliability of verification, significantly enhances verification efficiency and coverage, and can expose system-level interaction defects.
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Figure CN120975034B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of integrated circuit verification, more particularly, to a cooperative verification method and system for multiple types of dedicated interconnection buses in a system on chip and their associated peripheral functions. BACKGROUND
[0002] With the increasing integration of system on chip (SoC), its internal interconnection structure is becoming increasingly complex. In addition to standard buses, there are a large number of special, functionally different crossbar (XBAR) modules (such as CLB_XBAR, EPWM_XBAR, etc.) for connecting specific peripheral function modules. These XBAR modules are the key to ensuring the correct flow of data within the chip.
[0003] Currently, the verification of such XBAR modules mainly faces the following technical difficulties and defects:
[0004] (1) Blind area of verification: Most special XBAR modules have no output state register, and their output signals cannot be directly read and observed, making it difficult for traditional testing methods to directly verify their functions.
[0005] (2) Resource overhead and additional risk: To verify such XBAR, existing technologies usually need to design and implement additional dedicated test circuits (such as test stimulus generators and result comparators) for them. This not only increases the area and complexity of chip design, but the test logic introduced itself may also become a new potential fault point.
[0006] (3) Distortion of verification scenarios: The segmented and independent verification method cannot construct the real scenario of XBAR and its associated peripherals working cooperatively, making it difficult to expose system-level implicit defects such as cross-clock domain timing, multi-module interaction protocol, etc., resulting in insufficient verification coverage.
[0007] (4) Low efficiency: For each different type of XBAR module, a customized verification environment and use case are needed, which is repetitive and inefficient. SUMMARY
[0008] To solve the above problems, the present application proposes an efficient, reliable, and low-cost XBAR module system-level verification method and system, which dynamically provides stimulus generation and result comparison functions for its associated XBAR modules by reusing other known functional correct existing hardware modules on the SoC, thereby indirectly and realistically verifying the XBAR functions without introducing additional test circuits.
[0009] The present application is implemented by adopting the following technical solutions:
[0010] A system on chip XBAR module verification method is proposed, comprising:
[0011] S1, a programmable function module of a system on chip generates an excitation signal of a target XBAR module;
[0012] S2, an input selection register inside the target XBAR module is configured to establish a transmission path of the excitation signal to a specified input port;
[0013] S3, an internal route of the target XBAR module is configured to route test data to a specified output port thereof;
[0014] S4, a specified function module of the system on chip is configured to capture an output of the target XBAR module, and verification logic of the specified function module is configured;
[0015] S5, based on the output result of the specified function module and the verification logic thereof, a verification result of the target XBAR module is determined.
[0016] In some embodiments of the present application, S5 is specifically:
[0017] an expected value is calculated according to the input excitation signal and the verification logic of the specified function module;
[0018] an output result of the specified module is read;
[0019] the output result of the specified module is compared with the expected value, and if the comparison result is the same as the expected value, the verification is passed, otherwise an error report is generated.
[0020] A system for verifying an XBAR module of a system on chip is provided, which is composed of a target XBAR module and a plurality of function modules connected thereto, and further comprises:
[0021] a configuration unit, configured to configure a control register of the target XBAR module and a pre-multiplexed function module of the target XBAR module according to a test requirement of the target XBAR module to be tested through a CPU or a debugging interface of the system on chip, so as to establish a verification environment of the target XBAR module; wherein the pre-multiplexed function module includes an excitation generation module and a capture module;
[0022] The configuration unit configures the programmable function module to be multiplexed as the excitation generation module of the target XBAR module, and configures the excitation generation module to generate the excitation signal of the target XBAR module; the input selection register inside the target XBAR module is configured to establish a transmission path of the excitation signal to a specified input port; the internal route of the target XBAR module is configured to route test data to a specified output port thereof; the specified function module is configured to be multiplexed as the capture module and its verification logic is configured, and based on the output result of the capture module and the verification logic thereof, a verification result of the target XBAR module is determined.
[0023] In some embodiments of the present application, the system further comprises:
[0024] The comparison unit is used for calculating an expected value according to an input excitation signal and verification logic of the capture module; reading a captured output result; comparing the output result of the capture module with the expected value, and if the comparison result is the same as the expected value, the verification is passed, otherwise an error report is generated.
[0025] Compared with the prior art, the advantages and positive effects of the system-on-chip XBAR module verification method and system are that the system-on-chip XBAR module verification method and system are composed of a target XBAR module and other functional modules of the system-on-chip which have been verified to be correct, control registers in the target XBAR module and the pre-multiplexed functional modules are configured by a CPU or a debugging interface of the system-on-chip, so that they enter the required test state, thereby realizing the verification environment of the target XBAR module. Based on the verification method, most of the unnecessary special test circuits can be abandoned, the existing functional modules are completely reused as the excitation input and the result capture of the target XBAR module, the chip area is saved, and the design cost and complexity are reduced. The verification environment is the real working environment of the system-on-chip, errors and risks possibly introduced by additional test logic are avoided, and the verification result is more real and reliable. The verification method can be quickly adapted to the verification of different types of XBAR modules, and the verification efficiency and the method universality are significantly improved. Based on the method, an end-to-end real data transmission path can be constructed, system-level interaction defects such as timing errors and protocol mismatches are effectively exposed, and the completeness of the verification is significantly improved.
[0026] Other features and advantages of the present application will become more apparent after reading the detailed description of the embodiments of the present application in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS
[0027] The accompanying drawings, which are part of the present application, serve to further understand the present application, and the illustrative embodiments and descriptions of the present application are used to explain the present application, but do not constitute an improper limitation on the present application. Obviously, the accompanying drawings in the following description are only some embodiments, and other drawings can be obtained by those skilled in the art without creating laborious work.
[0028] Figure 1 An execution schematic of the system-on-chip XBAR module verification method proposed by the present application;
[0029] Figure 2 Embodiment one of the system-on-chip XBAR module verification system proposed by the present application;
[0030] Figure 3 Embodiment two of the system-on-chip XBAR module verification system proposed by the present application. DETAILED DESCRIPTION
[0031] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments will be described clearly and completely below with reference to the drawings in the embodiments of the present application. The following embodiments are used to explain the present application but not to limit the scope of the present application.
[0032] The core of the System on a Chip (SOC) XBAR module verification method is "module mutual verification based on function module reuse", which is a system-level verification method. The method aims to dynamically reuse other hardware modules with known correct functions on the chip to establish a verification environment for the target XBAR module lacking an output status register, provide stimulus generation, response capture and result comparison, thereby indirectly complete the complete verification of the target XBAR module without building additional physical circuits. These hardware modules include CLB (Configurable Logic Block), EPWM (Enhanced Pluse Width Modulation), GPIO (General Purpose Input / output), ADC (Analog-to-Digital Converter), ECAP (Enhanced Capture Module) and the like.
[0033] Based on the above idea, according to the test requirements of the current target XBAR module to be tested, the control registers of the target XBAR module and the function modules (providing stimulus generation, output capture and comparison for the target XBAR module) to be reused by the target XBAR module are configured through a CPU or a debugging interface, so that they enter the required test state, thereby realizing the establishment of a verification environment.
[0034] Specifically, as shown in Figure 1 The System on a Chip XBAR module verification method includes:
[0035] S1: configuring programmable function modules of a System on a Chip to generate stimulus signals of a target XBAR module.
[0036] This step utilizes the programmable characteristics of existing peripherals of the System on a Chip to generate rich and real stimulus signals. The stimulus signals are not from external test equipment or additional test vector generators, but are generated by the verified function modules of the chip.
[0037] For example, for INPUT XBAR, configurable GPIO, ADC or ECAP modules generate a set of digital waveform sequences as stimuli; for EPWM XBAR, configurable CMPSS (Comparator Subsystem), ADC, ECAP, CLB modules control their internal registers to generate the required output values of different types as the multi-source input stimuli of EPWM XBAR.
[0038] S2: Configure the input selection register inside the target XBAR module to establish the transmission path of the stimulus signal to the specified input port.
[0039] The CPU of the system on chip configures the input selection register inside the target XBAR to ensure that the signal generated in S1 is correctly routed to the specified input port.
[0040] S3: Configure the internal routing of the target XBAR module to route the test data to its specified output port.
[0041] After the stimulus signal is input into the target XBAR module through the specified input port, the test data is output to the specified output port of the target XBAR through the operation of the target XBAR.
[0042] S4: Configure the specified functional module of the system on chip to capture the output of the target XBAR module, and configure the verification logic of the specified functional module.
[0043] The XBAR itself has no output register, and the present application indirectly captures its output by connecting other functional modules to its specified output port. Among them, the corresponding verification logic configuration is implemented on the specified functional module to adapt to the output capture and comparison requirements of the target XBAR module, that is, the specified functional module is reused as a dynamic and configurable "software comparator". For example, when verifying CLB XBAR, its output port can be connected to the input of the CLB module, and the CLB can be configured as a known logic function such as a counter, an XOR gate, etc., and the internal related state register can directly display the flip situation of the currently selected input port.
[0044] S5: Execute the test case, and determine the verification result of the target XBAR module based on the output result of the specified functional module and its verification logic.
[0045] Read the output result of the specified functional module. If the result is consistent with the expected value calculated based on the input stimulus signal and the verification logic of the specified functional module, it proves that the transmission of the target XBAR module is correct, and the verification is passed. If it is not passed, an error report is generated to prompt which stage of the test path the error occurs.
[0046] The following detailed description of the on-chip system XBAR module verification method proposed in this invention will be provided with specific implementation details.
[0047] Example 1.
[0048] like Figure 2 The on-chip XBAR module verification system shown reuses the known functionally correct ECAP (Enhanced Capture Module) module of the on-chip system as the excitation source of CLB_XBAR, and reuses the known functionally correct CLB module of the on-chip system to capture and compare the output of CLB_XBAR.
[0049] Specifically, the verification of the CLB_XBAR module shall be carried out according to the following steps:
[0050] 1. Generate excitation signal: Control the relevant registers of the ECAP module through CPU instructions to make the ECAP output a pulse, which is then used as an excitation input to the input port of CLB_XBAR.
[0051] 2. Establish transmission path: Configure the input selection register of CLB_XBAR to establish the transmission path from the output of the ECAP module to the specified input port of CLB_XBAR.
[0052] 3. Configure internal routing: Configure the internal routing of CLB_XBAR to route the test data of CLB_XBAR to the specified output port, and the specified output port is directly connected to the input of the CLB module.
[0053] 4. Test data capture: Configure the CLB module as a "result display", and its internal registers directly display the toggling status of the currently selected input port.
[0054] 5. Test data comparison and result judgment: Read the status register of the CLB module and compare the output value with the test data and the expected value calculated by the CLB configuration logic. If the output value meets the expected value, it proves that CLB_XBAR has correctly transmitted the data; otherwise, it indicates that there is an error in the transmission process.
[0055] Compared to existing methods that require additional logic analyzers or test circuits to observe the output of CLB_XBAR, this embodiment reverse-engineers the functionality of CLB_XBAR by observing whether the output of a "known functional CLB module" is correct. This reuses the CLB module as a dynamic, configurable result comparator, eliminating the need to build additional physical circuits and avoiding errors and risks that may be introduced by additional test logic, resulting in more realistic and reliable verification results.
[0056] Example 2.
[0057] likeFigure 3 The system-on-chip XBAR module verification device shown multiplexes the CMPSS module, the ADC module, the ECAP module and the INPUT_XBAR module known to be functionally correct of the system-on-chip as the excitation source of the EPWM_XBAR, and multiplexes the EPWM module known to be functionally correct of the system-on-chip to capture and compare the output of the EPWM_XBAR.
[0058] Specifically, the verification of the EPWM_XBAR module is implemented according to the following steps:
[0059] 1. Generating excitation signals: the relevant registers of the CMPSS module, the ADC module, the ECAP module and the INPUT_XBAR module are controlled by CPU instructions respectively, and the outputs of these modules are sequentially input to the input ports of the EPWM_XBAR as multi-source excitation by sequentially triggering these modules.
[0060] 2. Establishing transmission paths: the input selection registers of the EPWM_XBAR are configured to establish transmission paths of the outputs of the modules to the specified input ports of the EPWM_XBAR.
[0061] 3. Configuring internal routing: the internal routing of the EPWM_XBAR is configured to route the test data of the EPWM_XBAR to the specified output port, and the specified output port is directly connected to the input of the EPWM module.
[0062] 4. Capturing test data: the EPWM module is configured to have its input from the EPWM_XBAR module, so that the EPWM module captures the output value of the EPWM_XBAR.
[0063] 5. Determining the comparison level result: whether the finally captured data is consistent with the data of the initially selected input source of the EPWM_XBAR.
[0064] In the prior art, the excitation generator needs to be rebuilt to simulate different inputs of the EPWM_XBAR, and the correctness of the built module needs to be verified first, and the verification work only completes the verification of the independent EPWM_XBAR, and the scenario of whether the excitation signal is transmitted and received according to the actual SOC on-chip interconnection logic is not covered. In the embodiment, different peripheral modules are known function modules that have been correctly verified and are programmable, which avoids the introduction of external devices to cause additional errors.
[0065] It should be pointed out that the above description is not a limitation of the present application, and the present application is not limited to the above examples. Changes, modifications, additions or substitutions made by ordinary skilled in the art within the scope of the present application should also be within the protection scope of the present application.
Claims
1. A method for verifying an XBAR module in a system-on-a-chip, characterized in that, include: S1, Configure the programmable functional modules of the on-chip system to generate the excitation signal of the target XBAR module; S2, Configure the input selection register inside the target XBAR module to establish the transmission path of the excitation signal to the specified input port; S3, configure the internal routing of the target XBAR module to route test data to its specified output port; S4, Configure the specified functional module of the on-chip system to capture the output of the target XBAR module, and configure the verification logic of the specified functional module; S5, based on the output results and verification logic of the specified functional module, determine the verification result of the target XBAR module; Among them, programmable functional modules and designated functional modules are other hardware modules on the chip that are known to have correct functions.
2. The on-chip system XBAR module verification method according to claim 1, characterized in that, S5 specifically refers to: The expected value is calculated based on the input excitation signal and the verification logic of the specified functional module; Read the output of the specified module; The output of the specified module is compared with the expected value. If the comparison result is the same as the expected value, the verification is successful; otherwise, an error report is generated.
3. A system-on-a-chip XBAR module verification system, comprising a target XBAR module and several functional modules connected thereto, characterized in that, Also includes: The configuration unit is used to configure the control registers of the target XBAR module and the pre-reused functional modules of the target XBAR module through the CPU or debug interface of the on-chip system according to the test requirements of the target XBAR module under test, so as to establish the verification environment of the target XBAR module; the pre-reused functional modules include the stimulus generation module and the capture module. The configuration unit configures a programmable functional module to be reused as an excitation generation module for the target XBAR module, and configures the excitation generation module to generate excitation signals for the target XBAR module; configures the input selection register inside the target XBAR module to establish a transmission path from the excitation signal to the specified input port; configures the internal routing of the target XBAR module to route test data to its specified output port; configures a specified functional module to be reused as a capture module and configures its verification logic, and determines the verification result of the target XBAR module based on the output result of the capture module and its verification logic; Among them, programmable functional modules and designated functional modules are other hardware modules on the chip that are known to have correct functions.
4. The on-chip XBAR module verification system according to claim 3, characterized in that, The system also includes: The comparison unit is used to calculate the expected value based on the input excitation signal and the verification logic of the capture module; read the output result of the capture; compare the output result of the capture module with the expected value; if the comparison result is the same as the expected value, the verification is successful; otherwise, an error report is generated.
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