Weak signal detection circuit based on memristor and signal processing method

Abstract

The invention provides a weak signal detection circuit based on a memristor. The weak signal detection circuit can be applied to the technical field of signal detection and processing. The weak signal detection circuit comprises a nonvolatile memristor, a capacitor, a first discharge circuit and a control circuit, the first end of the nonvolatile memristor is connected with a signal input end and is used for receiving an input signal, and the second end of the nonvolatile memristor is connected with the first end of the capacitor; the nonvolatile memristor is configured to charge the capacitor based on a received input signal; the first discharge circuit is connected with the first end of the capacitor and is configured to discharge the capacitor; the control circuit is connected with the first end of the capacitor and is configured to control the capacitor to discharge through the first discharge circuit or control the capacitor to charge through the nonvolatile memristor according to the voltage of the first end of the capacitor; the second end of the capacitor is grounded, and the first end of the capacitor is the signal output end of the weak signal detection circuit. The invention further provides a signal processing method.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal detection and processing, and particularly relates to a weak signal detection circuit based on a memristor and a signal processing method. BACKGROUND

[0002] Weak signal detection is a technology for extracting a target signal from strong noise, and has important application value in the fields of biomedicine, space communication and nuclear power. In some examples, the noise in the weak signal contains complex nonlinear characteristics, and in the process of weak signal detection, real-time performance and noise reduction effect cannot be considered at the same time, resulting in signal distortion and low signal-to-noise ratio of the output signal. SUMMARY

[0003] In view of the above problems, the present application provides a weak signal detection circuit based on a memristor and a signal processing method.

[0004] According to a first aspect of the present application, a signal processing method is provided, comprising: a non-volatile memristor, a capacitor, a first discharging circuit and a control circuit; a first end of the non-volatile memristor is connected to a signal input end for receiving an input signal, and a second end of the non-volatile memristor is connected to a first end of the capacitor; the non-volatile memristor is configured to charge the capacitor based on the received input signal; the first discharging circuit is connected to the first end of the capacitor and is configured to discharge the capacitor; the control circuit is connected to the first end of the capacitor and is configured to control the capacitor to discharge through the first discharging circuit or to charge through the non-volatile memristor according to the voltage at the first end of the capacitor; a second end of the capacitor is grounded, and the first end of the capacitor is a signal output end of the weak signal detection circuit.

[0005] According to an embodiment of the present application, the control circuit comprises: a comparator and a control module; a non-inverting input end of the comparator is connected to the first end of the capacitor, and an output end of the comparator is connected to the control module; the comparator is configured to output a high-level signal to the control module at the output end in the case that the voltage at the non-inverting input end is higher than the threshold voltage at the inverting input end; the control module is configured to control the capacitor to discharge through the first discharging circuit in the case that the high-level signal output at the output end is received; and the control module is configured to control the capacitor to charge through the non-volatile memristor in the case that the voltage at the first end of the capacitor is 0.

[0006] According to an embodiment of the present application, the first discharging circuit comprises: a third analog switch and a resistor; the third analog switch connects a first end of the resistor to the first end of the capacitor; a second end of the resistor is grounded; and the control module is configured to control the third analog switch to be connected in the case that the high-level signal output at the output end is received.

[0007] According to the embodiment of the present application, the second analog switch is connected between the non-volatile memristor and the capacitor, and the control module is configured to control the second analog switch to be disconnected when a high-level signal output by the output end is received, and to control the second analog switch to be connected when the voltage at the first end of the capacitor is 0.

[0008] According to the embodiment of the present application, the first analog switch is connected between the non-volatile memristor and the ground wire, and the control module is configured to control the first analog switch to be connected before the input signal is received at the first end of the non-volatile memristor.

[0009] The second aspect of the present application provides a driving method applied to the weak signal detection circuit of the embodiment of the present application, which includes: charging the capacitor through the non-volatile memristor based on the input signal in response to receiving the input signal from the signal input end; controlling the charging or discharging of the capacitor according to the voltage at the first end of the capacitor; controlling the charging of the capacitor through the non-volatile memristor when the capacitor is charging; controlling the discharging of the capacitor through the first discharging circuit when the capacitor is discharging; and outputting the voltage signal at the first end of the capacitor as an output signal.

[0010] According to the embodiment of the present application, the time difference between the output signal and the input signal is obtained, and the conductance of the non-volatile memristor is adjusted according to the time difference.

[0011] The third aspect of the present application provides a signal processing method for processing the output signal of the weak signal detection circuit of the embodiment of the present application, which includes: performing fast Fourier transform spectrum analysis on the output signal to obtain a target spectrum; performing spectrum entropy threshold analysis on the target spectrum to obtain spectrum entropy values of each frequency point in the target spectrum; determining target frequency points and noise frequency points according to the spectrum entropy values of each frequency point and a preset spectrum entropy value threshold; performing gain compensation on the power spectral density values of the target frequency points and attenuation compensation on the power spectral density values of the noise frequency points to obtain a compensated target spectrum; converting the compensated target spectrum into a target time domain signal; and performing filtering processing on the target time domain signal to obtain a processed output signal.

[0012] According to the embodiment of the present application, the fast Fourier transform spectrum analysis on the output signal to obtain a target spectrum includes: performing windowing and framing processing on the output signal to obtain a plurality of signal frames; performing fast Fourier transform spectrum analysis on the plurality of signal frames to obtain the spectrum of each signal frame; and performing average processing on the spectrum of each signal frame to obtain the target spectrum.

[0013] According to the embodiment of the present application, the target time domain signal is filtered to obtain a processed output signal, including: performing forward filtering on the target time domain signal to obtain a first output signal; performing reverse filtering on the first output signal to obtain a second output signal; determining the average of the first output signal and the second output signal as the processed output signal.

[0014] The fourth aspect of the present application provides a signal processing device, including: a first analysis module, configured to perform fast Fourier transform spectrum analysis on an output signal to obtain a target spectrum; a second analysis module, configured to perform spectrum entropy threshold analysis on the target spectrum to obtain spectrum entropy values of each frequency point in the target spectrum; a determination module, configured to determine target frequency points and noise frequency points according to the spectrum entropy values of each frequency point and a preset spectrum entropy value threshold; a compensation module, configured to perform gain compensation on the power spectral density values of the target frequency points and attenuation compensation on the power spectral density values of the noise frequency points to obtain a compensated target spectrum; a conversion module, configured to convert the compensated target spectrum into a target time domain signal; and a processing module, configured to perform filtering processing on the target time domain signal to obtain a processed output signal.

[0015] The fifth aspect of the present application provides an electronic device, including: one or more processors; a memory, configured to store one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the method.

[0016] The sixth aspect of the present application further provides a computer readable storage medium, having a computer program or instructions stored thereon, wherein the computer program or instructions are executed by a processor to implement the steps of the method.

[0017] The seventh aspect of the present application further provides a computer program product, including a computer program or instructions, wherein the computer program or instructions are executed by a processor to implement the steps of the method. BRIEF DESCRIPTION OF DRAWINGS

[0018] The above content of the present application and other purposes, features and advantages will be more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings, in which:

[0019] Figure 1 The structure schematic diagram of the weak signal detection circuit based on the memristor according to the embodiment of the present application is schematically shown;

[0020] Figure 2 The structure schematic diagram of the weak signal detection circuit based on the memristor according to another embodiment of the present application is schematically shown;

[0021] Figure 3 The flow schematic diagram of the driving method according to the embodiment of the present application is schematically shown;

[0022] Figure 4 A schematic flowchart of a signal processing method according to an embodiment of this application is illustrated; and

[0023] Figure 5 A block diagram schematically illustrates an electronic device suitable for implementing a signal processing method according to an embodiment of this application. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the described embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. It should be noted that throughout the accompanying drawings, the same elements are represented by the same or similar reference numerals. In the following description, some specific embodiments are used for descriptive purposes only and should not be construed as limiting this application in any way, but are merely examples of embodiments of this application. Conventional structures or configurations will be omitted where they may cause confusion in understanding this application. It should be noted that the shapes and sizes of the components in the figures do not reflect actual size and proportion, but are only schematic representations of the contents of the embodiments of this application.

[0025] Unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by those skilled in the art. The terms "first," "second," and similar words used in the embodiments of this application do not indicate any order, quantity, or importance, but are only used to distinguish different components.

[0026] Furthermore, in the description of the embodiments in this application, the terms "connected" or "connected to" can refer to two components being directly connected, or to two components being connected via one or more other components. Additionally, these two components can be connected or coupled via wired or wireless means.

[0027] Weak signal detection is a technique for extracting target signals from strong noise, with significant applications in biomedicine, aerospace communications, and nuclear power. Weak signals are often submerged in noise, and traditional denoising methods, such as linear filtering algorithms like mean filtering and median filtering, are ineffective at handling noise with complex nonlinear characteristics, easily losing crucial signal details. While nonlinear denoising methods like wavelet transform can handle nonlinear noise to some extent, their performance is limited when dealing with chaotic noise. Furthermore, related technologies often struggle to balance real-time performance and denoising effectiveness when handling low-frequency and time-varying noise, resulting in signal distortion or limited improvement in signal-to-noise ratio.

[0028] The nervous system possesses unique signal detection and processing methods distinct from modern information technology. It can detect and cognize information through chaos or chaotic edge states. Spiking neurons, as the fundamental units of information transmission and processing in the nervous system, exhibit unique chaotic dynamics, enabling complex nonlinear responses to input signals. Memristor-based neural network models, due to their nonlinear dynamics and synaptic plasticity, show great potential in weak signal detection. However, existing research largely focuses on theoretical simulations, lacking effective hardware implementation and integrated noise reduction algorithms, thus limiting their performance in practical applications. Especially for weak signal detection in complex environments, designing efficient noise reduction algorithms that combine chaotic dynamics with optimized hardware circuit integration remains a pressing technical challenge.

[0029] In some examples, weak signals contain noise with complex nonlinear characteristics. During weak signal detection, it is impossible to balance real-time performance and noise reduction, resulting in signal distortion and a low signal-to-noise ratio in the output signal.

[0030] In view of this, embodiments of this application provide a weak signal detection circuit based on a memristor.

[0031] Figure 1 The schematic diagram illustrates the structure of a weak signal detection circuit based on a memristor according to an embodiment of this application.

[0032] like Figure 1 As shown, the weak signal detection circuit 100 includes a non-volatile memristor 110, a capacitor 120, a first discharge circuit 130, and a control circuit 140.

[0033] In this embodiment, the first terminal of the non-volatile memristor 110 is connected to a signal input terminal for receiving an input signal, and the second terminal of the non-volatile memristor 110 is connected to the first terminal of the capacitor 120. The non-volatile memristor 110 is configured to charge the capacitor based on the received input signal. The first discharge circuit 130 is connected to the first terminal of the capacitor 120 and is configured to discharge the capacitor 120. The control circuit 140 is connected to the first terminal of the capacitor 120 and is configured to control the capacitor 120 to discharge through the first discharge circuit 130 or to control the capacitor 120 to charge through the non-volatile memristor 110 based on the voltage at the first terminal of the capacitor 120. The second terminal of the capacitor 120 is grounded, and the first terminal of the capacitor 120 is the signal output terminal of the weak signal detection circuit 100.

[0034] In this embodiment, the input signal at the signal input terminal can be an input current signal. The input signal contains noise with complex nonlinear characteristics. The weak signal detection circuit based on memristor in this embodiment is used to detect weak signals in the input signal and reduce noise in the output signal. The non-volatile memristor 110 inherits the basic characteristics of memristors (the resistance value is determined by the history of the net charge flowing through it), and on this basis, it achieves stable maintenance of the resistance value after power failure.

[0035] In this embodiment, the input signal at the signal input terminal charges the capacitor 120 via the non-volatile memristor 110. The resistance of the non-volatile memristor 110 is inversely proportional to the amount of charge flowing through it. In this way, the more charge accumulates, the lower the resistance of the non-volatile memristor 110 becomes, and the current amplification factor of the input signal increases non-linearly.

[0036] In this embodiment, the weak signal detection circuit based on memristor can be used as a cumulative release neuron model, and the non-volatile memristor 110 can be used as a neural synapse. The cumulative release neuron model can include the following formula.

[0037] (1)

[0038] (2)

[0039] (3)

[0040] (4)

[0041] Wherein, formula (1) represents the resistance value of the non-volatile memristor 110. and the amount of charge flowing through the non-volatile memristor 110 The relationship between R ON R OFF These represent the minimum and maximum resistance values ​​of the non-volatile memristor 110, respectively, and D represents the thickness of the non-volatile memristor 110. Let be the mobility of charge carriers. Equation (2) represents the input signal. A and B represent the DC bias and AC component amplitude of the input signal, respectively. Indicates the angular frequency of the input signal. This represents the initial phase offset. Noise is represented. Formula (3) represents the charging equation for capacitor 120, and formula (4) represents the discharging equation for capacitor 120. The voltage across the first terminal of capacitor 120 is represented by C, the capacitance of capacitor 120 is represented by C, and the resistance of the resistor in the first discharge circuit is represented by R.

[0042] In this embodiment, the input signal at the signal input terminal charges the capacitor 120 via the non-volatile memristor 110, and the first end of the capacitor 120 is used as the signal output terminal of the weak signal detection circuit. In this way, the voltage signal at the first end of the capacitor 120 is used as the output signal, which can effectively improve the signal-to-noise ratio of the output signal.

[0043] In this embodiment, during the charging process of the non-volatile memristor 110, the non-volatile memristor 110 does not directly cancel noise in the input signal. Instead, the non-volatile memristor 110 controls the charging speed by switching its resistance value. A minimum charge is required for the non-volatile memristor 110 to switch from a high-resistance state to a low-resistance state. Only when the accumulated charge of the non-volatile memristor 110 exceeds the minimum charge will the resistance value of the non-volatile memristor 110 decrease significantly.

[0044] For example, if a small noise signal in the input signal generates a charge less than the minimum charge, it cannot change the resistance of the non-volatile memristor 110, and the noise signal is blocked. When the effective weak signal in the input signal continuously accumulates a charge exceeding the minimum charge, the non-volatile memristor 110 switches to a low-resistance state, and the current accumulated at the first terminal of capacitor 120 increases significantly. The non-volatile memristor 110 is like a "smart valve" that only opens when the flow (i.e., charge) is large enough, and small droplets (i.e., noise) are blocked.

[0045] In this embodiment, when the non-volatile memristor 110 is in a high-resistance state, the current of the weak signal in the input signal is extremely small, and the weak signal slowly accumulates to the capacitor 120. The current of the noise signal in the input signal is even smaller and hardly accumulates. As the amount of charge passing through the non-volatile memristor 110 increases, the non-volatile memristor 110 enters a low-resistance state. The voltage of the weak signal in the input signal increases rapidly, and the weak signal voltage accumulates rapidly at the first end of the capacitor 120. The voltage of the noise signal in the input signal still fluctuates randomly, and the voltage of the noise signal is canceled out by the noise fluctuations.

[0046] According to the weak signal detection circuit based on memristors in this application embodiment, the non-volatile memristor 110 accelerates the directional accumulation of weak signals by switching resistance values. As can be seen from formula (3), the charging of capacitor 120 is essentially an integral process. The non-volatile memristor 110 utilizes the random fluctuation characteristics of noise signals to statistically cancel the noise signals during the integration process, thereby achieving a leap in signal-to-noise ratio at the voltage level. The threshold effect and nonlinear gain characteristics of the non-volatile memristor 110 make it a natural high-pass filter, fundamentally solving the bottleneck problem of "amplifying the signal inevitably amplifies the noise" in traditional amplifiers, and providing a hardware-level noise suppression solution for weak signal detection.

[0047] In this embodiment, the control circuit 140 is connected to the first terminal of the capacitor 120. When the accumulated voltage of the capacitor 120 reaches a preset threshold, the control circuit 140 controls the capacitor 120 to discharge through the first discharge circuit 130. The potential at the first terminal of the capacitor 120 decays to the resting value, which can eliminate residual charge and prevent noise accumulation. After the capacitor 120 finishes discharging, the non-volatile memristor 110 can maintain its resistance value before discharge, and the control circuit 140 controls the capacitor 120 to enter the next charging cycle.

[0048] In this embodiment, the first end of capacitor 120 is the signal output end of the weak signal detection circuit, that is, the voltage signal of the voltage film at the first end of capacitor 120 is the output signal of the weak signal detection circuit.

[0049] According to the memristor-based weak signal detection circuit of this application embodiment, by controlling charging and discharging, a 3-5ms recovery period after neuronal excitation can be simulated. Through the simulation of biological characteristics in hardware, the false alarm rate triggered by noise can be suppressed. Discharging only clears the capacitor charge, and the resistance value of the non-volatile memristor 110 remains unchanged, which can improve the gain of subsequent weak signals, thereby effectively optimizing the response capability of the weak signal detection circuit to the input signal in this embodiment.

[0050] Figure 2 The schematic diagram illustrates the structure of a weak signal detection circuit based on a memristor according to another embodiment of this application.

[0051] like Figure 2 As shown, unlike the previous embodiments, the weak signal detection circuit 200 based on memristors in this embodiment includes a non-volatile memristor 210, a capacitor 220, a first discharge circuit 230, and a control circuit 240.

[0052] In the embodiments of this application, the non-volatile memristor 210 and capacitor 220 can be referred to as the non-volatile memristor 110 and capacitor 120 described above, and similar parts will not be repeated.

[0053] In this embodiment, the control circuit 240 includes a comparator 241 and a control module 242.

[0054] In this embodiment, the non-inverting input of comparator 241 is connected to the first terminal of capacitor 220, and the output of comparator 241 is connected to the control module. Comparator 241 is configured to output a high-level signal to control module 242 when the voltage at the non-inverting input is higher than the threshold voltage at the inverting input. Control module 242 is configured to control capacitor 220 to discharge through first discharge circuit 230 when it receives the high-level signal from the output. When the voltage at the first terminal of capacitor 220 is 0, control capacitor 220 to charge through non-volatile memristor 210.

[0055] In this embodiment, comparator 241 compares the signal at the non-inverting input with the signal at the inverting input. If the voltage at the non-inverting input is higher than the threshold voltage at the inverting input, comparator 241 controls the output to output a high-level signal (i.e., ...). Figure 2 The VCC signal is sent to the control module 242. When the control module 242 receives a high-level signal from the output terminal, it controls the capacitor 220 to discharge through the first discharge circuit 230. The control module 242 can monitor the voltage at the first terminal of the capacitor 220 in real time. When the voltage at the first terminal of the capacitor 220 is 0, it controls the capacitor 220 to charge through the non-volatile memristor 210.

[0056] Through the embodiments of this application, it can be ensured that capacitor 220 in the weak signal detection circuit discharges when it reaches a specific potential. The discharge of capacitor 220 is controlled by comparator 241 and control module 242. At the biosimulation level, the refractory period mechanism can prevent neuronal over-excitation. Secondly, at the signal processing level, periodic reset solves the baseline drift problem. Finally, at the hardware implementation level, the state maintenance and update of non-volatile memristor 210 are achieved through discharge.

[0057] In this embodiment, the first discharge circuit 230 includes a third analog switch 231 and a resistor 232. The third analog switch 231 connects the first terminal of the resistor 232 to the first terminal of the capacitor 220. The second terminal of the resistor 232 is grounded. The control module 242 is configured to control the third analog switch 231 to connect upon receiving a high-level signal from the output terminal.

[0058] In this embodiment, when the control module 242 receives a high-level signal from the output terminal, it controls the third analog switch 231 to connect, and the capacitor 220 discharges through the resistor 232. The potential at the first end of the capacitor 220 decays to the resting value, which can eliminate residual charge and prevent noise accumulation.

[0059] In this embodiment, the weak signal detection circuit 200 further includes a second analog switch 250, which connects the non-volatile memristor 210 and the capacitor 220. The control module 242 is configured to disconnect the second analog switch 250 when a high-level signal is received from the output terminal, and to connect the second analog switch 250 when the voltage at the first terminal of the capacitor 220 is 0.

[0060] In this embodiment, when the control module 242 receives a high-level signal from the output terminal, the capacitor 220 needs to be discharged. The second analog switch 250 is turned off and the third analog switch 231 is turned on, and the capacitor 220 is connected to the first discharge circuit 230 to discharge.

[0061] In this embodiment, when the control module 242 detects that the voltage at the first terminal of the capacitor 220 is 0, the capacitor 220 needs to be charged. The control module 242 controls the second analog switch 250 to be connected and the third analog switch 231 to be disconnected. The capacitor 220 is charged by the input signal passing through the non-volatile memristor 210.

[0062] In this embodiment, the weak signal detection circuit 200 further includes a first analog switch 260, which connects the non-volatile memristor 210 to ground. The first analog switch 260 is connected before the first terminal of the non-volatile memristor 210 receives an input signal.

[0063] In this embodiment, before charging the non-volatile memristor 210, its state needs to be cleared. Under the control of the control module 242, the first analog switch 260 is connected, and the second analog switch 250 and the third analog switch 231 are disconnected, thus clearing the state of the non-volatile memristor 210.

[0064] In the embodiments of this application, such as Figure 2 As shown, control module 242 can control the connection and disconnection of the first analog switch 260, the second analog switch 250, and the third analog switch 231. Control module 242 can detect the voltage at the first terminal of capacitor 220 and output it as an output signal. Control module 242 can also detect input signals; when an input signal is detected, control module 242 can control the charging or discharging of capacitor 220 by controlling the connection or disconnection of the analog switches.

[0065] It should be noted that the first analog switch 260, the second analog switch 250, and the third analog switch 231 in this embodiment can be constructed from metal-oxide-semiconductor field-effect transistors (MOS transistors). Analog switches are used to implement signal switching functions in analog signal links. The signal is turned on or off by turning on and off the MOS transistor, which has advantages such as low power consumption, high speed, no mechanical contacts, small size, and long service life.

[0066] In this embodiment, the dynamic adjustment of synaptic weights is achieved by controlling the resistance change of the non-volatile memristor 210, ensuring the network's adaptability to input signals. Synaptic weight represents the strength of the connection between two neurons. In this embodiment, the synaptic weight is equivalent to the conductance of the non-volatile memristor 210. When the synaptic weight increases, the resistance of the non-volatile memristor 210 decreases, and the conductance of the non-volatile memristor 210 increases, thereby improving the response to the input signal. The first neuron is the signal input terminal, and the second neuron is the weak signal detection circuit. They are connected by a synapse, the strength of which is represented by the non-volatile memristor 210 and called the synaptic weight. The conductivity state of the non-volatile memristor 210 (i.e., its ability to switch between multiple conductivity states) is used to represent the change in synaptic weight (increased and decreased conductivity correspond to increased and decreased synaptic weight, respectively). The change in conductivity state is non-volatile, and this continuously changing resistive state of the device corresponds to the plasticity of the neural synapse.

[0067] The weak signal detection circuit in this embodiment simulates the pulse firing characteristics of a neuron. Equation (3) describes the neuronal membrane potential. The accumulation of voltage at the first terminal of capacitor 220 ensures that the neuron fires when it reaches a specific potential, and formula (4) simulates the neuron membrane potential. The pulse delivery.

[0068] Under the control of module 242, the first analog switch 260 is connected, clearing the state of the non-volatile memristor 210. The second analog switch 250 and the third analog switch 231 are disconnected, and the membrane voltage... ≈0, the non-volatile memristor 210 is ready to receive signals.

[0069] Under the control of module 242, capacitor 220 begins charging, the first analog switch 260 and the third analog switch 231 are disconnected, and the second analog switch 250 is connected, resulting in a noisy input signal. After passing through the non-volatile memristor 210, capacitor 220 is charged, and the voltage of capacitor 220... The resistance will rise as current flows through the non-volatile memristor 210, from its high-resistance state R. OFF Transition to low resistance state R ON And it retains this state even after the current is removed. The resistance value of the non-volatile memristor 210... Modulated by historical charge, the circuit acquires nonlinear gain characteristics, which can automatically suppress noise components with excessively small amplitudes.

[0070] Under the control of module 242, the membrane potential is monitored in real time. Comparator 241 sets the threshold voltage V. ref When the membrane potential Reaching threshold voltage V ref When the comparator 241 outputs a high-level signal (VCC signal), the control module 242 controls the capacitor 220 to start discharging.

[0071] Under the control of the control module 242, the control module 242 controls the first analog switch 260 and the second analog switch 250 to open, and the third analog switch 231 to open, stopping the input signal and the charging circuit. The capacitor 220 discharges through the resistor 232, and the film potential... Attenuate to resting value, eliminate residual charge, and prevent noise accumulation. When When the value is approximately 0, the discharge stops, and the input and charging circuits are reconnected. The resistance of the non-volatile memristor 210 is... Maintain the resistance value before discharge, preparing for the next charging cycle. Output signal. It is a periodic pulse signal, the amplitude and frequency of which are determined by the input signal. The resistance R of resistor 232, the capacitance C of capacitor 220, and the threshold voltage V. ref Decide.

[0072] Figure 3 A schematic flowchart of a driving method according to an embodiment of this application is shown.

[0073] like Figure 3 As shown, the driving method of this embodiment includes operations S310 to S320, and this driving method can be executed by a control circuit. This driving method is applied to the weak signal detection circuit of any embodiment of this application.

[0074] In operation S310, in response to receiving an input signal from the signal input terminal, the capacitor is charged based on the input signal via a non-volatile memristor.

[0075] In operation of S320, the capacitor is controlled to charge or discharge according to the voltage at the first terminal of the capacitor; when the capacitor is charging, the capacitor is controlled to charge through a non-volatile memristor; when the capacitor is discharging, the capacitor is controlled to discharge through a first discharge circuit.

[0076] When operating S330, the voltage signal at the first terminal of the capacitor is output as the output signal.

[0077] In the embodiments of this application, the weak signal detection circuit includes a non-volatile memristor, a capacitor, a first discharge circuit, and a control circuit. The driving method of this embodiment can be executed by the control circuit. It is used to output a corresponding output signal through the first terminal of the capacitor based on the input signal received at the first terminal of the non-volatile memristor. Optionally, the driving method of this embodiment can be executed by a control module in the control circuit.

[0078] In embodiments of this application, the control circuit controls the charging or discharging of the capacitor based on the voltage at its first terminal. For example, when the voltage at the first terminal of the capacitor is detected as not reaching a preset threshold, the capacitor is controlled to charge via a non-volatile memristor. When the voltage at the first terminal of the capacitor is detected as reaching the preset threshold, the capacitor is controlled to discharge via a first discharge circuit. After the capacitor has finished discharging, the capacitor is controlled to begin the next charging and discharging cycle. The voltage signal at the first terminal of the capacitor is used as the output signal.

[0079] Through the embodiments of this application, a non-volatile memristor accelerates the directional accumulation of weak signals by switching its resistance value. The charging of a capacitor is essentially an integral process. The non-volatile memristor utilizes the random fluctuation characteristics of noise signals to statistically cancel out the noise signals during integration, thereby achieving a leap in signal-to-noise ratio at the voltage level. The threshold effect and nonlinear gain characteristics of the non-volatile memristor make it a natural high-pass filter, fundamentally solving the bottleneck problem of "amplifying the signal inevitably amplifies the noise" in traditional amplifiers, providing a hardware-level noise suppression solution for weak signal detection. By controlling the charging and discharging of the control circuit, a 3-5ms recovery period after neuronal excitation can be simulated. Through the hardware simulation of biological characteristics, the false alarm rate triggered by noise can be suppressed. Discharging only removes the capacitor charge, while the resistance value of the non-volatile memristor remains unchanged, which can improve the gain of subsequent weak signals, thereby effectively optimizing the response capability of the weak signal detection circuit to the input signal in this embodiment.

[0080] In some embodiments, the method further includes: acquiring the time difference between the output signal and the input signal; and adjusting the conductance of the non-volatile memristor according to the time difference.

[0081] In the embodiments of this application, the time difference between the output signal and the input signal can be the time interval between a change in the input signal (such as a rising edge or a falling edge) and a corresponding change in the output signal.

[0082] In the embodiments of this application, synaptic weights represent the strength of the connection between two neurons in a neural network. In the embodiments of this application, synaptic weights are equivalent to the conductance of a non-volatile memristor. When the synaptic weights increase, the resistance of the non-volatile memristor decreases, and the conductance of the memristor increases, thereby improving the response to the input signal and enabling the weak signal detection circuit to respond to the input more quickly.

[0083] It should be noted that the first neuron is the signal input terminal, and the second neuron is the weak signal detection circuit. They are connected by a synapse, the strength of which is represented by a non-volatile memristor, called the synaptic weight. The conductivity state of the non-volatile memristor represents the change in synaptic weight (increased and decreased conductivity correspond to increased and decreased synaptic weight, respectively). This change in conductivity is non-volatile, and the continuously changing resistance state of this device corresponds to the plasticity of the neural synapse. The conductance and resistance of a non-volatile memristor are inversely related.

[0084] In the embodiments of this application, in order to optimize the response capability of the weak signal detection circuit to the input signal, a typical time-dependent synaptic plasticity model can be adopted, and the change of synaptic weight can be represented by formula (5).

[0085] (5)

[0086] in, This represents the change in synaptic weight, i.e., the change in conductance of a non-volatile memristor. = Indicates the output signal With input signal The time difference between them. and These represent the magnitude constants of the weight changes. and To control the time constants of synaptic enhancement and decay.

[0087] In this embodiment, by increasing the time constant, the synapse (non-volatile memristor) can respond more sensitively to weak input signals. It generates a response over a longer time window, thus enhancing the output signal. The cumulative capacity. When the synaptic weight increases (the conductance of the non-volatile memristor increases), the input signal... It is easier to pass through a non-volatile memristor, thereby improving the capacitor charging rate and enhancing the output signal. .

[0088] For example, the time difference between the output pulse and the input pulse =5ms; Time constant =5ms, synaptic weight change is ≈0, resulting in the input signal Even with input, the output signal cannot be driven. The discharge threshold has been exceeded. (This can be resolved by setting...) =20ms =30ms, enabling the weak signal detection circuit to adaptively enhance its response to weak signals within the range of 0.1μV~10mV. Optimized =20ms, the weights are increased by nearly 2 times, making the next time the same input signal The input generates a larger current, and the output signal... Rise faster.

[0089] Figure 4 A schematic flowchart of a signal processing method according to an embodiment of this application is shown.

[0090] like Figure 4 As shown, the signal processing method of this embodiment includes operations S410 to S460, and this signal processing method can be executed by a server. The signal processing method of this embodiment is used to process the output signal of the weak signal detection circuit of any embodiment of this application.

[0091] By operating S410, a fast Fourier transform spectrum analysis is performed on the output signal to obtain the target spectrum.

[0092] In the embodiments of this application, the output signal is subjected to Fast Fourier Transform spectral analysis to convert the time-domain pulse signal (output signal) into a frequency-domain representation.

[0093] Through the embodiments of this application, the pulse signal is converted from the time domain to the frequency domain, which can provide a basis for subsequent analysis, reduce spectral leakage, and improve the stability and accuracy of spectral analysis.

[0094] In operation S420, spectral entropy threshold analysis is performed on the target spectrum to obtain the spectral entropy value of each frequency point in the target spectrum.

[0095] In the embodiments of this application, spectral entropy threshold analysis is performed on the target spectrum. Based on the spectral entropy threshold analysis method, the distribution of noise energy in the target spectrum is quantified, and the normalized power spectral entropy is calculated to obtain the spectral entropy value of each frequency point in the target spectrum, which can be calculated by formula (6).

[0096] (6)

[0097] Where N is the total number of frequency segments. For example, N can be 256, meaning the frequency is divided into 256 segments, and the average frequency of each segment is used as the frequency point of that segment. k is the frequency index, ranging from 1 to N. P k Let be the normalized power spectral density at the k-th frequency point. (Definition) , For the first The original power spectral density values ​​at each frequency point.

[0098] In operation S430, the target frequency and noise frequency are determined based on the spectral entropy value of each frequency point and the preset spectral entropy value threshold.

[0099] In operation S440, gain compensation is performed on the power spectral density value of the target frequency, and attenuation compensation is performed on the power spectral density value of the noise frequency to obtain the compensated target spectrum.

[0100] In the embodiments of this application, when the spectral entropy value of a frequency point is higher than a preset spectral entropy threshold, the frequency point is determined to be a noise-dominant region and identified as a noise frequency point. When the spectral entropy value of a frequency point is lower than the preset spectral entropy threshold, the frequency point is determined to be a signal-dominant region and identified as a target frequency point. A set of dynamic compensation coefficient matrices is constructed based on the frequency domain analysis results. Gain compensation is applied to the target frequency point, and attenuation compensation is applied to the noise frequency point. Active decoupling processing of the input signal and noise components is achieved through frequency domain multiplication operations.

[0101] For example, the preset spectral entropy threshold can be set to H. th =2.5. If H k If the value is ≤2.5, the frequency point is determined to be the dominant frequency point (target frequency point) of the signal, and the compensation coefficient a is used. k =1.5 (gain compensation). Where, H k This represents the spectral entropy value at the k-th frequency point. If H... k If the value is greater than 2.5, the frequency point is determined to be the noise-dominant frequency point (noise frequency point), and the compensation coefficient a is used. k =0.2 (attenuation compensation).

[0102] Through embodiments of this application, signal-dominant and noise-dominant frequency points are distinguished using spectral entropy analysis. A dynamic compensation matrix is ​​constructed to actively separate (i.e., actively decouple) signal and noise in the frequency domain.

[0103] In operation S450, the compensated target spectrum is converted into the target time domain signal.

[0104] The S460 is used to filter the target time-domain signal to obtain the processed output signal.

[0105] In the embodiments of this application, the target time-domain signal is filtered to obtain the processed output signal, which can suppress high-frequency residual noise, while avoiding the introduction of phase shift and keeping the signal waveform undistorted.

[0106] In the embodiments of this application, in order to improve the system's adaptability to time-varying noise environments, an adaptive closed-loop feedback adjustment mechanism based on the least mean square algorithm can be constructed to dynamically adjust the compensation coefficient according to the input and output errors, thereby maintaining signal processing stability and output quality under different noise conditions.

[0107] The embodiments of this application employ a software compensation algorithm to dynamically correct the baseline drift of the output signal, and design an active decoupling and noise reduction algorithm based on chaotic dynamics characteristics to suppress noise coupling interference through sequence reconstruction. The solution of this embodiment can significantly improve the signal-to-noise ratio of weak signals and can be widely applied in high-precision measurement fields such as temperature and pressure, providing an efficient and reliable solution for weak signal detection in complex environments.

[0108] In some embodiments, performing Fast Fourier Transform (FFT) spectral analysis on the output signal to obtain the target spectrum includes: windowing and framing the output signal to obtain multiple signal frames; performing FFT spectral analysis on the multiple signal frames to obtain the spectrum of each signal frame; and averaging the spectrum of each signal frame to obtain the target spectrum.

[0109] In the embodiments of this application, the output signal is windowed and framed to obtain multiple signal frames. The Hamming window function can be used to perform windowing and frame-segmentation on the output signal to obtain multiple signal frames.

[0110] For example, the window length can be set to 256 points, and the inter-frame overlap rate can be set to 50%. During the framing process, a 50% overlap rate (i.e., frame shift of 128 points) is used, and adjacent frames overlap by 128 points.

[0111] In the embodiments of this application, fast Fourier transform spectral analysis is performed on multiple signal frames to obtain the spectrum of each signal frame. The spectrum of each signal frame is then averaged to obtain the target spectrum.

[0112] The embodiments of this application can reduce spectral leakage, improve the stability and accuracy of spectral analysis, and enhance the signal-to-noise ratio and signal component identification ability through averaging.

[0113] In some embodiments, filtering the target time-domain signal to obtain a processed output signal includes: performing forward filtering on the target time-domain signal to obtain a first output signal; performing reverse filtering on the first output signal to obtain a second output signal; and determining the average value of the first output signal and the second output signal as the processed output signal.

[0114] In the embodiments of this application, a 64th-order finite impulse response low-pass filter with a cutoff frequency of 500Hz can be designed to filter the target time-domain signal, and zero-phase filtering technology can be used to avoid phase shift.

[0115] For example, the target time-domain signal is input to a filter for forward filtering to obtain a first output signal. The first output signal is then input to a filter for reverse filtering to obtain a second output signal. The arithmetic mean of the first and second output signals is determined as the processed output signal.

[0116] In the embodiments of this application, in order to solve the delay problem introduced by bidirectional filtering, a low-latency processing architecture based on frame overlap can be implemented in a digital signal processing platform, and the measured processing delay can be controlled within 1ms.

[0117] Through the embodiments of this application, a bidirectional filtering method combined with frame overlap processing technology is used to ensure the real-time performance and phase linearity of the filtering operation, thereby effectively reducing high-frequency interference components, suppressing high-frequency residual noise, and avoiding the introduction of phase shift, thus keeping the signal waveform undistorted.

[0118] Through the embodiments of this application, a memristor neural network is used to simulate the chaotic edge state of the nervous system. Leveraging its sensitivity to weak signals and nonlinear noise suppression characteristics, the performance bottleneck of traditional linear filters is overcome. A hardware design of an accumulator-release weak signal detection circuit and a memristor synapse module is employed to achieve high real-time signal detection, avoiding the computational delay problem of pure software algorithms. Based on frequency domain active decoupling technology, precise separation of noise and target signals is achieved through spectral entropy threshold analysis and dynamic compensation coefficient generation, resulting in a signal-to-noise ratio improvement of over 40% compared to traditional wavelet transform methods. The network is hardware-based through the memristor circuit and the accumulator-release weak signal detection circuit, constructing a dedicated circuit module for weak signal detection and noise reduction, providing a hardware foundation for weak signal detection.

[0119] Based on the above signal processing method, this application also provides a signal processing apparatus. The signal processing apparatus includes a first analysis module, a second analysis module, a determination module, a compensation module, a conversion module, and a processing module.

[0120] The first analysis module is used to perform Fast Fourier Transform spectral analysis on the output signal to obtain the target spectrum. In one embodiment, the first analysis module can be used to perform the operation S410 described above, which will not be repeated here.

[0121] The second analysis module is used to perform spectral entropy threshold analysis on the target spectrum to obtain the spectral entropy value of each frequency point in the target spectrum. In one embodiment, the second analysis module can be used to perform the operation S420 described above, which will not be repeated here.

[0122] The determination module is used to determine the target frequency and noise frequency based on the spectral entropy value of each frequency point and a preset spectral entropy threshold. In one embodiment, the determination module can be used to perform the operation S430 described above, which will not be repeated here.

[0123] The compensation module is used to perform gain compensation on the power spectral density value of the target frequency and attenuation compensation on the power spectral density value of the noise frequency to obtain the compensated target spectrum. In one embodiment, the compensation module can be used to perform the operation S440 described above, which will not be repeated here.

[0124] The conversion module is used to convert the compensated target spectrum into a target time-domain signal. In one embodiment, the conversion module can be used to perform the operation S450 described above, which will not be repeated here.

[0125] The processing module is used to filter the target time-domain signal to obtain a processed output signal. In one embodiment, the processing module can be used to perform the operation S460 described above, which will not be repeated here.

[0126] According to embodiments of this application, any multiple modules among the first analysis module, second analysis module, determination module, compensation module, conversion module, and processing module can be merged into one module, or any one of these modules can be split into multiple modules. Alternatively, at least some of the functions of one or more of these modules can be combined with at least some of the functions of other modules and implemented in one module. According to embodiments of this application, at least one of the first analysis module, second analysis module, determination module, compensation module, conversion module, and processing module can be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or implemented in hardware or firmware by any other reasonable means of integrating or packaging circuitry, or implemented in any one of software, hardware, and firmware methods, or in a suitable combination of any of these. Alternatively, at least one of the first analysis module, second analysis module, determination module, compensation module, conversion module, and processing module can be at least partially implemented as a computer program module, which can perform corresponding functions when the computer program module is run.

[0127] Figure 5 A block diagram schematically illustrates an electronic device suitable for implementing a signal processing method according to an embodiment of this application.

[0128] like Figure 5As shown, an electronic device 500 according to an embodiment of this application includes a processor 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage portion 508 into a random access memory (RAM) 503. The processor 501 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 501 may also include onboard memory for caching purposes. The processor 501 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of this application.

[0129] RAM 503 stores various programs and data required for the operation of electronic device 500. Processor 501, ROM 502, and RAM 503 are interconnected via bus 504. Processor 501 executes various operations of the method flow according to embodiments of this application by executing programs in ROM 502 and / or RAM 503. It should be noted that programs may also be stored in one or more memories other than ROM 502 and RAM 503. Processor 501 may also execute various operations of the method flow according to embodiments of this application by executing programs stored in one or more memories.

[0130] According to embodiments of this application, the electronic device 500 may further include an input / output (I / O) interface 505, which is also connected to a bus 504. The electronic device 500 may also include one or more of the following components connected to the input / output (I / O) interface 505: an input section 506 including a keyboard, mouse, etc.; an output section 507 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 508 including a hard disk, etc.; and a communication section 509 including a network interface card such as a LAN card, modem, etc. The communication section 509 performs communication processing via a network such as the Internet. A drive 510 is also connected to the input / output (I / O) interface 505 as needed. A removable medium 511, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 510 as needed so that computer programs read from it can be installed into the storage section 508 as needed.

[0131] This application also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of this application.

[0132] According to embodiments of this application, the computer-readable storage medium may be a non-volatile computer-readable storage medium, such as including but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to embodiments of this application, the computer-readable storage medium may include ROM 502 and / or RAM 503 and / or one or more memories other than ROM 502 and RAM 503 described above.

[0133] Embodiments of this application also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code is used to enable the computer system to implement the signal processing method provided in the embodiments of this application.

[0134] When the computer program is executed by the processor 501, it performs the functions defined in the system / apparatus of this application embodiment. According to the embodiments of this application, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0135] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 509, and / or installed from a removable medium 511. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0136] In such an embodiment, the computer program can be downloaded and installed from a network via communication section 509, and / or installed from removable medium 511. When the computer program is executed by processor 501, it performs the functions defined in the system of this application embodiment. According to embodiments of this application, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0137] According to embodiments of this application, program code for executing the computer programs provided in the embodiments of this application can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0138] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0139] Those skilled in the art will understand that the features described in the various embodiments of this application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this application. In particular, the features described in the various embodiments of this application can be combined and / or combined in various ways without departing from the spirit and teachings of this application. All such combinations and / or combinations fall within the scope of this application.

Claims

1. A weak signal detection circuit based on memristors, characterized in that, include: Non-volatile memristor, capacitor, first discharge circuit and control circuit; The first terminal of the non-volatile memristor is connected to the signal input terminal for receiving input signals, and the second terminal of the non-volatile memristor is connected to the first terminal of the capacitor. The non-volatile memristor is configured to charge the capacitor based on the received input signal; The first discharge circuit is connected to the first terminal of the capacitor and is configured to discharge the capacitor. The control circuit is connected to the first terminal of the capacitor and is configured to control the capacitor to discharge through the first discharge circuit or to control the capacitor to charge through the non-volatile memristor based on the voltage at the first terminal of the capacitor. The second terminal of the capacitor is grounded, and the first terminal of the capacitor is the signal output terminal of the weak signal detection circuit.

2. The weak signal detection circuit according to claim 1, characterized in that, The control circuit includes: Comparator and control module; The non-inverting input of the comparator is connected to the first terminal of the capacitor, and the output of the comparator is connected to the control module. The comparator is configured to control the output to output a high-level signal to the control module when the voltage at the non-inverting input is higher than the threshold voltage at the inverting input. The control module is configured to, upon receiving a high-level signal from the output terminal, control the capacitor to discharge through the first discharge circuit; and to control the capacitor to charge through the non-volatile memristor when the voltage at the first terminal of the capacitor is 0.

3. The weak signal detection circuit according to claim 2, characterized in that, The first discharge circuit includes: The third analog switch and resistor; The third analog switch connects the first end of the resistor to the first end of the capacitor; The second terminal of the resistor is grounded; The control module is configured to control the third analog switch to connect when it receives a high-level signal from the output terminal.

4. The weak signal detection circuit according to claim 2, characterized in that, Also includes: A second analog switch connects the non-volatile memristor and the capacitor. The control module is configured to disconnect the second analog switch when it receives a high-level signal from the output terminal, and to connect the second analog switch when the voltage at the first terminal of the capacitor is 0.

5. The weak signal detection circuit according to claim 2, characterized in that, Also includes: A first analog switch connects the non-volatile memristor to ground. The first analog switch is connected before the input signal is received at the first terminal of the non-volatile memristor.

6. A driving method, characterized in that, The weak signal detection circuit applied to any one of claims 1-5 includes: In response to receiving an input signal from the signal input terminal, the capacitor is charged based on the input signal via a non-volatile memristor; The capacitor is charged or discharged according to the voltage at its first terminal; when the capacitor is charging, the capacitor is controlled to charge through a non-volatile memristor; when the capacitor is discharging, the capacitor is controlled to discharge through a first discharge circuit. The voltage signal at the first terminal of the capacitor is output as the output signal.

7. The driving method according to claim 6, characterized in that, Also includes: Obtain the time difference between the output signal and the input signal; The conductance of the non-volatile memristor is adjusted according to the time difference.

8. A signal processing method, characterized in that, The method for processing the output signal of the weak signal detection circuit as described in any one of claims 1-5 includes: Perform a Fast Fourier Transform spectral analysis on the output signal to obtain the target spectrum; Perform spectral entropy threshold analysis on the target spectrum to obtain the spectral entropy value of each frequency point in the target spectrum; The target frequency and noise frequency are determined based on the spectral entropy value of each frequency point and the preset spectral entropy value threshold. Gain compensation is applied to the power spectral density value at the target frequency, and attenuation compensation is applied to the power spectral density value at the noise frequency to obtain the compensated target spectrum. The compensated target spectrum is converted into a target time-domain signal; The target time-domain signal is filtered to obtain the processed output signal.

9. The signal processing method according to claim 8, characterized in that, The step of performing a fast Fourier transform spectral analysis on the output signal to obtain the target spectrum includes: The output signal is windowed and framed to obtain multiple signal frames; Perform Fast Fourier Transform spectral analysis on the multiple signal frames to obtain the spectrum of each signal frame; The target spectrum is obtained by averaging the spectrum of each signal frame.

10. The signal processing method according to claim 8, characterized in that, The step of filtering the target time-domain signal to obtain the processed output signal includes: The target time-domain signal is forward filtered to obtain the first output signal; The first output signal is inversely filtered to obtain the second output signal; The average value of the first output signal and the second output signal is determined as the processed output signal.

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