A method for manufacturing a semiconductor structure

Abstract

The application discloses a semiconductor structure manufacturing method and belongs to the technical field of semiconductors. The manufacturing method comprises the following steps: providing a substrate; forming a layer to be etched on the substrate; forming an amorphous carbon layer on the layer to be etched; placing the substrate after the deposition of the amorphous carbon layer into a plasma chamber, inputting hydrogen and argon at a preset temperature and a preset power for a preset time, performing plasma treatment on the amorphous carbon layer to form a hydrophobic layer, and the hydrophobic layer comprises a -CH3 group; cleaning the hydrophobic layer; forming an anti-reflection layer on the hydrophobic layer; forming a patterned photoresist layer on the anti-reflection layer, taking the patterned photoresist layer as a mask, and etching the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer and the layer to be etched. The semiconductor structure manufacturing method can form a hydrophobic layer on the amorphous carbon layer, avoid water residues on the surface of the amorphous carbon layer in the cleaning process, and improve the performance and yield of chips.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor, and particularly relates to a manufacturing method of semiconductor structure. BACKGROUND

[0002] With the rapid development of semiconductor technology, the integration of chips is higher and higher, and the size of semiconductor devices is smaller and smaller. Semiconductor process is to form a large number of various types of semiconductor devices on the same silicon substrate by using photoresist, etching, implantation and deposition and a series of processes, and to connect them to each other to have complete electronic functions. Among them, etching is to remove the excess material to form the required microstructure. The precision of etching affects the size of semiconductor devices, and further affects the function and performance of semiconductor devices.

[0003] As the etching size is smaller and smaller, it is necessary to form a hard mask layer on the surface of the wafer to cooperate with the mask pattern formed by the photoresist. Amorphous carbon has a high etching selectivity compared to silicon oxide, silicon nitride and silicon in the etching process, so amorphous carbon is used as a hard mask layer together with an anti-reflective layer and widely used in chip manufacturing processes. However, after the deposition of amorphous carbon film, there are generally problems of poor compactness and easy water vapor absorption. After water washing by wet scrubber clean after deposition, central defects and other problems will occur. If water washing is not performed, surface particle residues and other problems will occur. Whether water washing or not will affect the yield of chips. SUMMARY

[0004] The purpose of the present application is to provide a manufacturing method of semiconductor structure. Through the manufacturing method of semiconductor structure provided by the present application, by forming a hydrophobic layer on the amorphous carbon layer, the particles and other impurities remaining in the forming process of the amorphous carbon layer can be partially removed in the process of forming the hydrophobic layer. The remaining impurities are removed by cleaning. At the same time, due to the existence of the hydrophobic layer, water can be prevented from remaining in the amorphous carbon layer, thereby improving the performance and yield of chips.

[0005] To solve the above technical problems, the present application provides a manufacturing method of semiconductor structure, at least comprising the following steps:

[0006] providing a substrate;

[0007] forming a layer to be etched on the substrate;

[0008] forming an amorphous carbon layer on the layer to be etched;

[0009] placing the substrate after depositing the amorphous carbon layer into a plasma chamber, and introducing hydrogen and argon at a preset temperature and a preset power for a preset time to perform plasma treatment on the amorphous carbon layer to form a hydrophobic layer, the hydrophobic layer comprising-CH3 groups;

[0010] cleaning the hydrophobic layer;

[0011] forming an anti-reflection layer on the hydrophobic layer; and

[0012] forming a patterned photoresist layer on the anti-reflection layer, and etching the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer and the layer to be etched by taking the patterned photoresist layer as a mask.

[0013] In an embodiment of the present application, the flow rate of the hydrogen is 100sccm-500sccm, and the flow rate of the argon is 200sccm-1000sccm.

[0014] In an embodiment of the present application, the preset temperature is 350℃-430℃.

[0015] In an embodiment of the present application, the preset power includes top power, side power and bias power, and each of the top power, the side power and the bias power is 1000W-8000W.

[0016] In an embodiment of the present application, the thickness of the hydrophobic layer is 20Å-40Å.

[0017] In an embodiment of the present application, the manufacturing method further includes: after the hydrophobic layer is cleaned, the substrate is subjected to a drying treatment in a stable gas atmosphere.

[0018] In an embodiment of the present application, the temperature of the drying treatment is 300℃-430℃, and the time of the drying treatment is 2min-6min.

[0019] In an embodiment of the present application, the stable gas is nitrogen, helium or argon.

[0020] In an embodiment of the present application, the flow rate of the stable gas is 500sccm-1500sccm, and the cleaning liquid for cleaning the hydrophobic layer is distilled water, deionized water or high-purity water.

[0021] In an embodiment of the present application, the manufacturing method further includes:

[0022] performing a first etching by taking the patterned photoresist layer as a mask to etch the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer; and

[0023] performing a second etching by taking the remaining patterned photoresist layer, the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer as a mask layer, or taking the anti-reflection layer, the hydrophobic layer and the amorphous carbon layer as a mask layer to etch the layer to be etched, thereby forming a preset etching pattern.

[0024] In summary, the present application provides a method for manufacturing a semiconductor structure, and the unexpected technical effects of the present application are that the hydrophobic layer can be formed on the amorphous carbon layer, the particles and other impurities remaining in the amorphous carbon layer during the formation process can be partially removed during the formation of the hydrophobic layer, and then the remaining impurities can be removed through cleaning and drying. In addition, due to the presence of the hydrophobic layer, the surface of the amorphous carbon layer can be densified, the problems such as yield reduction caused by particles and other impurities can be prevented, the center defects caused by water introduced during cleaning can be avoided, the performance and yield of the chip can be improved, the plasma treatment time can be shortened, the processing efficiency can be improved, the etching accuracy can be improved, the semiconductor device with small size can be obtained, and the yield of the semiconductor device can be improved. The uniform amorphous carbon layer can be obtained at a lower temperature, the influence on the to-be-etched layer and the substrate can be reduced, the deformation can be reduced, the energy consumption can be saved, and the production cost can be reduced. The formation and processing method of the amorphous carbon layer can be applied to the links in the semiconductor process to improve the yield of each link in the semiconductor process.

[0025] Of course, implementing any product of the present application does not necessarily require achieving all the advantages described above at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed for the description of the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0027] Figure 1 The flow chart of the method for manufacturing a semiconductor structure according to an embodiment of the present application.

[0028] Figure 2 The schematic diagram of forming a to-be-etched layer and an amorphous carbon layer on a substrate according to an embodiment of the present application.

[0029] Figure 3 The schematic diagram of plasma treating the amorphous carbon layer to form a hydrophobic layer according to an embodiment of the present application.

[0030] Figure 4 The schematic diagram of forming an anti-reflection layer on the amorphous carbon layer according to an embodiment of the present application.

[0031] Figure 5 The schematic diagram of forming a patterned photoresist layer on the anti-reflection layer according to an embodiment of the present application.

[0032] Figure 6 The schematic diagram of etching the anti-reflection layer and the amorphous carbon layer according to an embodiment of the present application.

[0033] Figure 7A schematic view of the embodiment of the present application after etching the to-be-etched layer.

[0034] Figure 8 A schematic view of the embodiment of the present application after removing the amorphous carbon layer.

[0035] Label explanation:

[0036] 10, substrate; 11, to-be-etched layer; 12, amorphous carbon layer; 121, hydrophobic layer; 13, anti-reflection layer; 14, patterned photoresist layer; 141, first opening. DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0038] It should be noted that the diagrams provided in the embodiments are only used to schematically illustrate the basic concept of the present application, and only the components related to the present application are shown in the diagrams, rather than being drawn according to the number, shape and size of the components in actual implementation. The shape, number and proportion of each component in actual implementation can be arbitrarily changed, and the layout pattern of the components can be more complex.

[0039] In the present application, it should be noted that, if terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like appear, the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, if the terms "first" and "second" appear, they are only used for description and distinction purposes, and cannot be understood as indicating or implying relative importance.

[0040] Please refer to Figure 1 The present application provides a semiconductor structure manufacturing method, and the manufacturing method comprises steps S11-S17.

[0041] Step S11, providing a substrate.

[0042] Step S12, forming a to-be-etched layer on the substrate.

[0043] Step S13, forming an amorphous carbon layer on the to-be-etched layer.

[0044] Step S14, after depositing the amorphous carbon layer, the substrate is put into the plasma chamber, and hydrogen and argon are inputted at a preset temperature and a preset power for a preset time to perform plasma treatment on the amorphous carbon layer to form a hydrophobic layer, and the hydrophobic layer comprises -CH3 groups.

[0045] Step S15, the hydrophobic layer is cleaned.

[0046] Step S16, an anti-reflection layer is formed on the hydrophobic layer.

[0047] Step S17, a patterned photoresist layer is formed on the anti-reflection layer, and the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer and the layer to be etched are etched by taking the patterned photoresist layer as a mask.

[0048] Please refer to Figures 1-2As shown, in an embodiment of the present application, in step S11, a substrate 10 is provided, which can be any material suitable for forming a semiconductor device, and the substrate 10 is, for example, silicon carbide (SiC), indium phosphide (InP), gallium arsenide (GaAs), gallium nitride (GaN), aluminum nitride (AIN), indium nitride (InN), silicon germanium (GeSi), sapphire, a silicon wafer, or other III / V compound semiconductor material, and also includes a laminated structure of these semiconductor materials, or a silicon-on-insulator, a silicon-on-laminated insulator, a silicon germanium-on-insulator, a germanium-on-insulator, etc. The present application does not limit the type of the substrate 10, which can be selected according to the manufacturing requirements of the semiconductor device. The substrate is, for example, used to form one or more of the following semiconductor devices: a field effect transistor (FET), a metal-oxide-semiconductor field effect transistor (MOSFET), a complementary metal oxide semiconductor (CMOS), an insulated gate bipolar transistor (IGBT), a fast recovery diode (FRD), a high efficiency diode (HED), a constant voltage diode, a high frequency diode, a light-emitting diode (LED), a gate turn off thyristor (GTO), a light triggered thyristor (LTT), a thyristor, a charge coupled device (CCD image sensor), a digital signal processor (DSP), a photo relay, or a micro processor, etc. The specific substrate 10 can be selected according to the type of the semiconductor device.

[0049] Referring to Figures 1-2As shown in the embodiment of the present application, in step S12, the to-be-etched layer 11 is formed on the substrate 10, wherein the to-be-etched layer 11 is, for example, a dielectric layer, a semiconductor layer or a metal layer, etc., wherein the dielectric layer is, for example, at least one of silicon oxide, silicon nitride, high dielectric constant material, low dielectric constant material, silicon oxynitride, etc., the semiconductor layer is, for example, at least one of single crystal silicon, polycrystalline silicon, silicon germanium, gallium arsenide, etc., and the metal layer is, for example, at least one of aluminum, tungsten, copper, titanium, nitride, indium nitride, etc. In the present application, the material of the to-be-etched layer 11 is not specifically limited. Different deposition methods are selected to form the to-be-etched layer 11 according to the material of the to-be-etched layer 11.

[0050] Referring to Figures 1-2 As shown in the embodiment of the present application, the substrate 10 is, for example, a raw substrate, or a substrate with structures such as shallow trench isolation structure, deep trench isolation structure, well region or drift region, etc. The present application is not specifically limited, i.e., the present application is not limited to the stage of the application of the amorphous carbon hard mask layer in the semiconductor process, but can be applied to each stage of the semiconductor process to improve the yield of each stage of the semiconductor process. For example, the to-be-etched layer 11 is directly disposed on the substrate 10, or other structures such as gate dielectric layer, gate structure, grid structure, light filtering structure or connecting structure, etc. are disposed between the to-be-etched layer 11 and the substrate 10, i.e., the position of the to-be-etched layer 11 is not specifically limited in the present application. In a specific embodiment of the present application, the to-be-etched layer 11 is, for example, a silicon nitride layer, the silicon oxide layer is, for example, disposed on the substrate as a pad nitride layer for forming a shallow trench isolation structure, the silicon nitride layer is, for example, disposed on the gate structure and the substrate as a side wall dielectric layer for forming a shallow trench isolation structure, and the silicon nitride layer is, for example, disposed on the gate, the side wall structure and the substrate as a contact hole etching stop layer. In the present embodiment, the to-be-etched layer 11 is disposed on the substrate 10 as an example.

[0051] Referring to Figures 1-2As shown, in an embodiment of the present application, in step S13, an amorphous carbon layer 12 is formed on the layer to be etched 11 as a hard mask layer of the layer to be etched 11. The amorphous carbon layer 12 is formed by, for example, a chemical vapor deposition (CVD), a physical vapor deposition (PVD), or a pyrolysis method. In this embodiment, the amorphous carbon layer 12 is obtained by, for example, a plasma enhanced chemical vapor deposition (PECVD) method. Specifically, the substrate 10 on which the layer to be etched 11 is formed is placed in a deposition chamber, the working temperature of the deposition chamber is, for example, 300-400°C, and a hydrocarbon gas such as ethylene (C2H4) or propylene (C3H6) is introduced. Under the bombardment of plasma energy, the hydrocarbon gas is decomposed to produce by-products such as carbon (C) and hydrogen (H2). The carbon is deposited on the surface of the layer to be etched 11 to form the amorphous carbon layer 12, and the by-products such as hydrogen are pumped away. The present application does not limit the thickness of the amorphous carbon layer 12, which is selected according to the material and thickness of the layer to be etched 11, and the process, etc. In a specific embodiment of the present application, the thickness of the amorphous carbon layer 12 is, for example, 150-350 nm. When the amorphous carbon layer is formed by the plasma enhanced chemical vapor deposition method, it can be formed at a relatively low temperature, a uniform amorphous carbon layer can be obtained, the influence on the layer to be etched and the substrate, etc. is reduced, the deformation is reduced, the energy consumption is saved, and the production cost is reduced.

[0052] Referring to Figures 1-3In one embodiment of the present application, after the amorphous carbon layer 12 is formed, the amorphous carbon layer 12 is subjected to plasma treatment to form a hydrophobic layer 121, as shown in step S14. The plasma includes, for example, hydrogen plasma and inert plasma. In this embodiment, the substrate 10 is placed in a plasma chamber, and the pressure in the plasma chamber is, for example, 6 torr to 10 torr. Hydrogen (H2) and argon are introduced into the plasma chamber at a preset temperature and a preset power for a preset time. In this embodiment, the flow rate of the hydrogen is, for example, 100 sccm to 500 sccm, the flow rate of the argon is, for example, 200 sccm to 1000 sccm, the preset temperature is, for example, 350 °C to 430 °C, and the preset power includes a top power, a side power, and a bias power, each of which is, for example, 1000 W to 8000 W, to obtain a high-density plasma to shorten the processing time and improve the processing efficiency. The hydrogen generates a high-density hydrogen plasma in the plasma chamber, and the generated hydrogen plasma reacts with the carbon on the surface of the amorphous carbon layer 12 to form -CH3 groups. The -CH3 groups are hydrophobic, and can reduce the adsorption of water on the surface of the amorphous carbon layer 12 during the cleaning process, thereby reducing the generation of defects. In addition, the plasma can also partially remove the impurities, such as particles, remaining in the amorphous carbon layer 12 during the formation process. At the same time, a gas with a molecular weight greater than hydrogen, such as argon, is introduced as a mixed gas to solve the problem that the hydrogen plasma with a small molecular weight can only combine with a very shallow part of the surface of the amorphous carbon layer 12. The hydrogen plasma can reach a deeper part of the amorphous carbon layer 12 to form more -CH3 hydrophobic groups, increase the thickness of the hydrophobic layer 121, improve the hydrophobicity of the amorphous carbon layer 12, and increase the density of the surface of the amorphous carbon layer 12 to reduce water absorption caused by poor density. In one embodiment of the present application, the thickness of the hydrophobic layer 121 is, for example, 20 Å to 40 Å.

[0053] Please refer to Figures 1-3As shown, in an embodiment of the present application, after the hydrophobic layer 121 is formed, the hydrophobic layer 121 is cleaned to remove the residual particles and other impurities, and to improve the interface performance of the anti-reflective layer and the hydrophobic layer 121 formed subsequently. Specifically, the substrate 10 with the amorphous carbon layer 12 and the hydrophobic layer 121 is placed in a wet cleaning machine, and a cleaning liquid is sprayed from a nozzle above the substrate to remove the particles and other impurities on the substrate 10, while the substrate 10 is rotated. After the spraying of the cleaning liquid is stopped, the substrate 10 is continuously rotated, and a stable gas is introduced for blowing and drying during the rotation and after the rotation is stopped. The cleaning liquid is, for example, distilled water, deionized water or high-purity water, and the stable gas is, for example, nitrogen or argon. Through the cleaning, the particles and other impurities remaining in the amorphous carbon layer during the formation process can be removed, the surface of the hydrophobic layer 121 can be cleaned, and the problems such as the yield reduction caused by the particles and other impurities can be prevented. At the same time, because the surface of the amorphous carbon layer 12 is provided with the hydrophobic layer 121 which is dense and hydrophobic, the water residue can be reduced during the cleaning.

[0054] Referring to Figures 1-3 As shown, in an embodiment of the present application, after the hydrophobic layer 121 is cleaned, the substrate 10 is subjected to a drying treatment. The drying treatment temperature is, for example, 300-430°C, the drying treatment time is, for example, 2-6 minutes, and the drying treatment is, for example, performed in a stable gas atmosphere, the stable gas is, for example, nitrogen, helium (He) or argon, and the flow rate of the stable gas is, for example, 500-1500 seem, so as to prevent the oxidation of the amorphous carbon layer 12 in the process of removing the water. Because of the presence of the hydrophobic layer 121, through the drying treatment, the water on the surface of the hydrophobic layer 121 can be removed, and the water and the amorphous carbon layer 12 can be prevented from combining. The temperature of the drying treatment is controlled so as not to affect the substrate 10, the layer to be etched 11 or the metal layer between the substrate 10 and the layer to be etched 11, and therefore the temperature of the heat treatment cannot exceed 430°C, and at the same time, in order to quickly achieve a good removal effect, the drying treatment temperature is not lower than 300°C, so as to speed up the process. Through the high-density plasma treatment, the hydrophobic layer 121 can be formed on the surface of the amorphous carbon layer 12, the problem of the defects caused by the water residue after the water washing can be well solved, and the performance and the yield of the chip can be improved. In a specific embodiment of the present application, the yield of the semiconductor device is improved by 1-3% through the manufacturing method provided by the present application.

[0055] Referring to Figures 1-4As shown in the figure, in an embodiment of the present application, after the hydrophobic layer 121 is cleaned and dried, an anti-reflection layer 13 is formed on the hydrophobic layer 121 in step S16. The anti-reflection layer 13 is, for example, silicon oxynitride (SiON) or the like, so as to improve the accuracy and efficiency of the photolithography process. The anti-reflection layer 13 is deposited by, for example, plasma enhanced chemical vapor deposition, atomic layer deposition (ALD), low pressure chemical vapor deposition (LPCVD), or the like, so as to improve the deposition quality of the anti-reflection layer 13. In the embodiment, the anti-reflection layer 13 is formed by, for example, plasma enhanced chemical vapor deposition. Specifically, process gases SiH4, N2O and NH3 are introduced into a plasma cavity, and the deposition temperature is controlled at 330-350°C. The gas molecules are dissociated into plasma in a vacuum and radio frequency environment, diffuse to the surface of the hydrophobic layer 121, and react to deposit a layer of SiON film. The present application does not limit the thickness of the anti-reflection layer 13, which is selected according to the manufacturing requirements. By adjusting the ratio of SiH4, N2O and NH3, and the pressure and power of the deposition chamber, the refractive index of the anti-reflection layer 13 is adjusted, so as to reduce reflection and standing wave problems, and improve the accuracy of etching. At the same time, the amorphous carbon layer 12 has good light transmittance, which is more conducive to layer alignment in photolithography. In addition, the amorphous carbon layer 12 has high hardness, and has a high etching selectivity ratio compared with other materials. In the embodiment, the combination of the amorphous carbon layer 12 and the anti-reflection layer 13 can effectively reduce the dependence of etching on the thickness of the subsequent photoresist layer, so as to thin the photoresist layer, thereby avoiding photoresist pattern defects such as photoresist collapse, and improving the accuracy of etching, facilitating the obtaining of fine patterns, and being conducive to the miniaturization of semiconductor devices.

[0056] As shown in the figure, Figure 1 、 Figures 4-5 As shown in the figure, in an embodiment of the present application, after the anti-reflection layer 13 is formed, a patterned photoresist layer 14 is formed on the anti-reflection layer 13 in step S17. Specifically, the photoresist layer is formed on the anti-reflection layer 13 by, for example, spin coating or spraying, and then a plurality of first openings 141 are formed on the photoresist layer by exposure and development processes, so as to define the positions to be etched. In the present application, the photoresist is, for example, a positive photoresist or a negative photoresist, and the present application does not make specific limitations. The exposure and development methods are determined according to the type of photoresist.

[0057] As shown in the figure, Figures 5-6As shown, in one embodiment of the present application, after the formation of the patterned photoresist layer 14, a first etching is performed using the patterned photoresist layer 14 as a mask to etch the anti-reflective layer 13, the hydrophobic layer 121 and the amorphous carbon layer 12 exposed by the first opening 141, for example, by dry etching, wet etching or a combination of dry etching and wet etching. In this embodiment, dry etching is used to etch the anti-reflective layer 13 and the amorphous carbon layer 12, and the etching gas includes one or a mixture of several of chlorine (Cl2), carbon tetrafluoride (CF4), trifluoromethane (CHF3), difluoromethane (CH2F2), octafluoropropane (C8F 18 ), nitrogen trifluoride (NF3) or sulfur hexafluoride (SF6), or a combination of the above and oxygen (O2). After the anti-reflective layer 13 and the amorphous carbon layer 12 exposed by the first opening 141 are etched completely, the patterned photoresist layer 14 of the anti-reflective layer 13 is etched completely, for example, or partially, for example, or the anti-reflective layer 13 is partially etched, i.e. the patterned photoresist layer 14 is also etched in the process of etching the anti-reflective layer 13 and the amorphous carbon layer 12, and the patterned photoresist layer 14 is not sufficient to serve as an etching stop layer for etching the to-be-etched layer 11.

[0058] Referring to Figures 6-7 As shown, in one embodiment of the present application, after the anti-reflective layer 13 and the amorphous carbon layer 12 exposed by the first opening 141 are etched completely, a second etching is performed using the remaining patterned photoresist layer 14, the hydrophobic layer 121, the anti-reflective layer 13 and the amorphous carbon layer 12 as a mask, or using the anti-reflective layer 13, the hydrophobic layer 121 and the amorphous carbon layer 12 as a mask to etch the to-be-etched layer 11 to form a preset etching pattern. The to-be-etched layer 11 is etched by, for example, dry etching, wet etching or a combination of dry etching and wet etching, and the specific etching method is determined according to the material of the to-be-etched layer 11. In this embodiment, dry etching is used, and the etching gas includes one or a mixture of several of chlorine, bromine (Br2), hexafluoroethane (C2F6), carbon tetrafluoride, trifluoromethane, difluoromethane, octafluoropropane, nitrogen trifluoride, sulfur hexafluoride or hydrogen bromide (HBr), or a combination of the above and oxygen. After the to-be-etched layer 11 exposed by the first opening 141 is etched completely, the anti-reflective layer 13 is etched completely, and at least part of the amorphous carbon layer 12 remains on the to-be-etched layer 11. By step etching, the amorphous carbon layer 12 is used as an etching mask when the to-be-etched layer 11 is etched, which can protect the to-be-etched layer 11 covered by the amorphous carbon layer 12 and make the etching boundary clear.

[0059] Referring to Figures 7-8As shown, in an embodiment of the present application, after the layer to be etched 11 is etched, the amorphous carbon layer 12 on the layer to be etched 11 is removed. The amorphous carbon layer 12 is removed, for example, by oxygen plasma, ultraviolet treatment, or wet cleaning. In an embodiment of the present application, the byproducts of the etching process and the amorphous carbon layer 12 are removed by using argon and oxygen as cleaning gas, for example, the flow ratio of Ar and O2 is 10:1-15:1, and the flow of the cleaning gas is 300-400 sccm. In other embodiments of the present application, other etching gas can be selected for etching according to the etching selectivity ratio of the layer to be etched 11 and the amorphous carbon layer 12, or wet etching liquid can be selected for removal, which is not limited in the present application.

[0060] In summary, the present application provides a method for manufacturing a semiconductor structure. The unexpected technical effects of the present application are as follows: by means of plasma treatment, a hydrophobic layer can be formed on the amorphous carbon layer, and in the process of forming the hydrophobic layer, the particles and other impurities remaining in the amorphous carbon layer during the formation process can be partially removed. Then, cleaning and drying are performed to remove the remaining impurities. At the same time, due to the presence of the hydrophobic layer, the surface of the amorphous carbon layer can be densified, which prevents the decrease of the production yield caused by particles and other impurities, avoids the center defects caused by the water introduced by cleaning, and improves the performance and yield of the chip. The plasma treatment time can be shortened, and the processing efficiency can be improved. The etching accuracy can be improved, small-sized semiconductor devices can be obtained, and the yield of the semiconductor devices can be improved. Uniform amorphous carbon layers can be obtained at a lower temperature, the influence on the layer to be etched and the substrate is reduced, the deformation is reduced, the energy consumption can be saved, and the production cost can be reduced. The formation and treatment of the amorphous carbon layer can be applied to the links in the semiconductor process to improve the yield of each link in the semiconductor process.

[0061] The embodiments disclosed above are only used to help explain the present application. The embodiments do not describe all the details, nor limit the present application to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of the present application. The embodiments are selected and described in detail to better explain the principles and practical applications of the present application, so that those skilled in the art can well understand and utilize the present application. The present application is limited by the claims and their full scope and equivalents.

Claims

1. A method of fabricating a semiconductor structure, the method comprising: The method comprises the following steps: providing a substrate; forming a layer to be etched on the substrate; forming an amorphous carbon layer on the layer to be etched; putting the substrate after the amorphous carbon layer is deposited into a plasma chamber, and performing plasma treatment on the amorphous carbon layer at a preset temperature and a preset power for a preset time by inputting hydrogen and argon, so as to form a hydrophobic layer, wherein the hydrophobic layer comprises -CH3 groups; cleaning the hydrophobic layer; forming an anti-reflection layer on the hydrophobic layer; and forming a patterned photoresist layer on the anti-reflection layer, and etching the anti-reflection layer, the hydrophobic layer, the amorphous carbon layer and the layer to be etched by taking the patterned photoresist layer as a mask.

2. The method of fabricating a semiconductor structure of claim 1, wherein, The flow rate of the hydrogen is 100sccm-500sccm, and the flow rate of the argon is 200sccm-1000sccm.

3. The method of fabricating a semiconductor structure of claim 1, wherein, The preset temperature is 350℃-430℃.

4. The method of fabricating a semiconductor structure of claim 1, wherein, The preset power comprises a top power, a side power and a bias power, and each of the top power, the side power and the bias power is 1000W-8000W.

5. The method of fabricating a semiconductor structure of claim 1, wherein, The thickness of the hydrophobic layer is 20Å-40Å.

6. The method of fabricating a semiconductor structure of claim 1, wherein, The method further comprises: after the hydrophobic layer is cleaned, performing a drying treatment on the substrate in a stable gas atmosphere.

7. The method of fabricating a semiconductor structure of claim 6, wherein, The temperature of the drying treatment is 300℃-430℃, and the time of the drying treatment is 2min-6min.

8. The method of fabricating a semiconductor structure of claim 6, wherein, The stable gas is nitrogen, helium or argon.

9. The method of fabricating a semiconductor structure of claim 6, wherein, The flow rate of the stable gas is 500sccm-1500sccm, and the cleaning liquid for cleaning the hydrophobic layer is distilled water, deionized water or high-purity water.

10. The method of fabricating a semiconductor structure of claim 1, wherein, The method further comprises: performing a first etching by taking the patterned photoresist layer as a mask to etch the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer; and performing a second etching by taking the remaining patterned photoresist layer, the hydrophobic layer, the anti-reflection layer and the amorphous carbon layer as mask layers, or taking the anti-reflection layer, the hydrophobic layer and the amorphous carbon layer as mask layers, to etch the layer to be etched and form a preset etching pattern.

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