Pre-charging circuit for energy storage system and energy storage system
By designing a pre-charging circuit and controlling the current flow, the surge current problem when the battery closes the main circuit in the energy storage system is solved, thus avoiding damage and improving charging efficiency.
Patent Information
- Application Number
- CN202511282038.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-09
- Publication Date
- 2025-11-18
AI Technical Summary
In an energy storage system, when the battery closes the main circuit switch, the voltage difference across the capacitor is insufficient, resulting in a surge current that may damage the main contactor contacts, fuses, DC bus capacitors, or even the battery itself.
Design a pre-charge circuit, including a battery module, a sampling resistor, a discharge MOS-Q10, a charging MOS-Q11, and a functional circuit module. By combining the pre-charge circuit, a current sampling module, an overcurrent trigger circuit, and a drive module, the current on and off can be controlled to avoid the generation of surge current.
It enhances the pre-charge capability of the battery pack, avoids unnecessary damage, improves the ability to continuously carry current, and shortens charging time.
Smart Images
Figure CN120978950A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of energy storage systems, and more particularly to a pre-charging circuit for an energy storage system and an energy storage system. Background Technology
[0002] In the field of energy storage systems, the inverter / PCS battery terminal in the system usually has a large number of capacitors connected in parallel across the positive and negative terminals. If there is no voltage difference across the capacitors, when the battery closes the main circuit switching system to power on, the voltage across the capacitors cannot change abruptly. This instant is equivalent to a short circuit between the positive and negative terminals of the battery, which will generate a very large surge current. This may damage the main contactor contacts, fuses, DC bus capacitors, or even the battery itself, causing unnecessary losses.
[0003] To address the aforementioned technical problems, this invention proposes a pre-charging circuit solution, namely a pre-charging circuit for an energy storage system and an energy storage system. Summary of the Invention
[0004] The present invention provides a pre-charging circuit and an energy storage system for an energy storage system, which can enhance the pre-charging capability of a battery pack / battery cluster to avoid unnecessary damage and improve the ability to continuously carry current, thereby shortening the charging time.
[0005] In a first aspect, embodiments of the present invention provide a pre-charging circuit for an energy storage system, wherein the pre-charging circuit is connected to a corresponding battery PACK. The pre-charging circuit for the energy storage system includes: a battery module BAT1, a sampling resistor R2, a discharge MOS-Q10, a charging MOS-Q11, and a functional circuit module. The positive terminal of the battery module BAT1 is connected to the functional circuit module, and the functional circuit module is connected to the positive terminal of the battery PACK. The negative terminal of the battery module BAT1 is connected to the sampling resistor R2, the sampling resistor R2 is connected to the discharge MOS-Q10, the discharge MOS-Q10 is connected to the charging MOS-Q11, and the charging MOS-Q11 is connected to the negative terminal of the battery PACK.
[0006] A further technical solution is as follows: the negative terminal of the battery module BAT1 is connected to the sampling resistor R2; the sampling resistor R2 is connected to terminal 3 of the discharge MOS-Q10; terminal 2 of the discharge MOS-Q10 is connected to terminal 2 of the charging MOS-Q11; and terminal 3 of the charging MOS-Q11 is connected to the negative terminal of the battery PACK. Furthermore, terminal 3 of the discharge MOS-Q10 is also connected to the overall functional circuit module, and terminal 2 of the charging MOS-Q11 is also connected to the overall functional circuit module.
[0007] A further technical solution is that the functional circuit module includes a pre-charge circuit A, a current sampling module B, an overcurrent trigger circuit C, and a drive module D; the pre-charge circuit A is connected to the current sampling module B, the current sampling module B is connected to the overcurrent trigger circuit C, and the drive module D is connected to the pre-charge circuit A.
[0008] A further technical solution is that the pre-charge circuit A includes a main circuit switch SW1, a freewheeling diode D1, a power inductor L1, a sampling resistor R1, an N-channel switch MOS-Q1, and a protection transistor TVS1; the positive terminal of the battery PACK is connected to the positive terminal of the battery module BAT1 through the main circuit switch SW1, the main circuit switch SW1 is connected to the freewheeling diode D1, the freewheeling diode D1 is connected to the power inductor L1, and the power inductor L1 is connected to the power inductor L1. Inductor L1 is connected to sampling resistor R1, which is connected to terminal N1 and current sampling module B. Power inductor L1 is connected to current sampling module B. Power inductor L1 is connected to terminal 2 of N-channel MOSFET-Q1, terminal 3 of N-channel MOSFET-Q1 is connected to terminal B1-1, terminal 3 of N-channel MOSFET-Q1 is connected to drive module D, and terminal 1 of N-channel MOSFET-Q1 is connected to drive module D.
[0009] A further technical solution is that the current sampling module B includes resistors R3, R4, R7, and R8, and operational amplifier U1A; the power inductor L1 is connected to resistor R3, the sampling resistor R1 is connected to resistor R4, resistor R4 is connected to resistor R7, resistor R7 is connected to terminal V1, and resistor R4 is connected to terminal 3 of operational amplifier U1A; resistor R3 is connected to terminal 2 of operational amplifier U1A, resistor R3 is connected to resistor R8, resistor R8 is connected to terminal 1 of operational amplifier U1A, and terminal 1 of operational amplifier U1A is connected to the overcurrent trigger circuit C.
[0010] A further technical solution is as follows: the overcurrent trigger circuit C includes comparator U2A, comparator U2B, Schottky diode D2, and Schottky diode D3; terminal 1 of operational amplifier U1A is connected to the IO-IN terminal, terminal 1 of operational amplifier U1A is connected to terminal 2 of comparator U2A, terminal 3 of comparator U2A is connected to terminal V4, terminal 1 of comparator U2A is connected to Schottky diode D2, and Schottky diode D2 is connected to the driving module D; terminal 1 of operational amplifier U1A is connected to terminal 5 of comparator U2B, terminal 6 of comparator U2B is connected to terminal V5, terminal 7 of comparator U2B is connected to Schottky diode D3, and Schottky diode D3 is connected to the driving module D.
[0011] A further technical solution is that the driving module D includes resistors R5 and R6, diode ZD1, resistors R9 and R10, resistors R11 and R12, a PNP transistor Q2, and an NPN transistor Q3; the Schottky diode D2 is connected to resistors R5 and R6, the Schottky diode D3 is connected to resistors R5 and R6, diode ZD1 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1, and resistor R5 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1. Resistors R5 are connected in parallel and then connected to terminal 3 of PNP transistor Q2 via resistor R6; terminal 2 of PNP transistor Q2 is connected to VCC; terminal 1 of PNP transistor Q2 is connected to VCC via resistor R9; terminal 1 of PNP transistor Q2 is connected to terminal 3 of NPN transistor Q3 via resistor R10; terminal 2 of NPN transistor Q3 is grounded; terminal 2 of NPN transistor Q3 is connected to terminal 1 of NPN transistor Q3 via resistor R12; and terminal 1 of NPN transistor Q3 is connected to the IO-OUT terminal via resistor R11.
[0012] Secondly, embodiments of the present invention provide an energy storage system, the energy storage system including a battery subsystem, the battery subsystem including a battery PACK, the battery subsystem further including a pre-charging circuit as described in the first aspect, the battery PACK being connected to the pre-charging circuit.
[0013] In summary, in the field of energy storage systems, the battery terminals of inverters / PCS typically have a large number of capacitors connected in parallel across the positive and negative terminals. If there is no voltage difference across the capacitors, when the main circuit switching system is powered on, the voltage across the capacitors cannot change abruptly. This instantaneous moment is equivalent to a short circuit between the positive and negative terminals of the battery, generating a very large surge current. This could damage the main contactor contacts, fuses, DC bus capacitors, or even the battery itself, causing unnecessary losses. Based on this, this application proposes a pre-charging circuit and energy storage system for energy storage systems, which can enhance the pre-charging capability of the battery pack / battery cluster to avoid unnecessary damage and improve the ability to continuously carry current, thereby shortening the charging time. Attached Figure Description
[0014] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 This is a first circuit diagram of the pre-charging circuit proposed in an embodiment of the present invention.
[0016] Figure 2 This is a second circuit diagram of the pre-charging circuit proposed in an embodiment of the present invention.
[0017] Figure 3 This is a third circuit diagram of the pre-charging circuit proposed in an embodiment of the present invention.
[0018] Figure 4 This is the fourth circuit diagram of the pre-charging circuit proposed in an embodiment of the present invention.
[0019] Figure 5 This is the fifth circuit diagram of the pre-charging circuit proposed in an embodiment of the present invention.
[0020] Figure 6 This is a pre-charge circuit diagram of the pre-charge circuit proposed in an embodiment of the present invention.
[0021] Figure 7 This is a diagram of the current sampling module of the pre-charging circuit proposed in an embodiment of the present invention.
[0022] Figure 8 This is an overcurrent triggering circuit diagram for the pre-charging circuit proposed in an embodiment of the present invention.
[0023] Figure 9 This is a diagram of the driving module for the pre-charging circuit proposed in an embodiment of the present invention. Detailed Implementation
[0024] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Similar component reference numerals in the drawings represent similar components. Obviously, the embodiments described below are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0025] It should be understood that the terminology used in the specification of embodiments of the present invention is for the purpose of describing particular embodiments only and is not intended to limit the embodiments of the present invention. As used in the specification of embodiments of the present invention and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0026] Example See Figures 1 to 9 The diagram illustrates a pre-charging circuit for an energy storage system and the energy storage system itself, as proposed in this invention. In a first aspect, this invention provides a pre-charging circuit for an energy storage system, the pre-charging circuit being connected to a corresponding battery pack. The pre-charging circuit for the energy storage system includes: a battery module BAT1, a sampling resistor R2, a discharge MOS-Q10, a charging MOS-Q11, and a functional circuit module. The positive terminal of the battery module BAT1 is connected to the functional circuit module, and the functional circuit module is connected to the positive terminal of the battery pack. The negative terminal of the battery module BAT1 is connected to the sampling resistor R2, the sampling resistor R2 is connected to the discharge MOS-Q10, the discharge MOS-Q10 is connected to the charging MOS-Q11, and the charging MOS-Q11 is connected to the negative terminal of the battery pack. In the field of energy storage systems, the battery terminals of inverters / PCS in these systems typically have a large number of capacitors connected in parallel across the positive and negative terminals. If there is no voltage difference across the capacitors, when the main circuit switching system is powered on, the voltage across the capacitors cannot change abruptly. This instantaneous change is equivalent to a short circuit between the positive and negative terminals of the battery, generating a very large surge current. This could damage the main contactor contacts, fuses, DC bus capacitors, or even the battery itself, causing unnecessary losses. The pre-charging circuit for energy storage systems described in this application solves the above-mentioned technical problems.
[0027] A further technical solution is as follows: the negative terminal of the battery module BAT1 is connected to the sampling resistor R2; the sampling resistor R2 is connected to terminal 3 of the discharge MOS-Q10; terminal 2 of the discharge MOS-Q10 is connected to terminal 2 of the charging MOS-Q11; and terminal 3 of the charging MOS-Q11 is connected to the negative terminal of the battery PACK. Furthermore, terminal 3 of the discharge MOS-Q10 is also connected to the overall functional circuit module, and terminal 2 of the charging MOS-Q11 is also connected to the overall functional circuit module.
[0028] Its further technical solution is as follows, see Figure 4 as well as Figure 5 As shown, the functional circuit module includes a pre-charge circuit A, a current sampling module B, an overcurrent trigger circuit C, and a drive module D; the pre-charge circuit A is connected to the current sampling module B, the current sampling module B is connected to the overcurrent trigger circuit C, and the drive module D is connected to the pre-charge circuit A.
[0029] Its further technical solution is as follows, see Figure 6 As shown, the pre-charge circuit A includes a main circuit switch SW1, a freewheeling diode D1, a power inductor L1, a sampling resistor R1, an N-channel MOSFET-Q1, and a protection transistor TVS1. The positive terminal of the battery PACK is connected to the positive terminal of the battery module BAT1 through the main circuit switch SW1. The main circuit switch SW1 is connected to the freewheeling diode D1, which is connected to the power inductor L1. The sampling resistor R1 is connected to the N1 terminal and the current sampling module B. The power inductor L1 is connected to the current sampling module B. The power inductor L1 is connected to terminal 2 of the N-channel MOSFET-Q1. Terminal 3 of the N-channel MOSFET-Q1 is connected to terminal B1-1. Terminal 3 of the N-channel MOSFET-Q1 is connected to the drive module D. Terminal 1 of the N-channel MOSFET-Q1 is connected to the drive module D. In the above scheme, the pre-charge circuit A includes an N-channel MOSFET-Q1, with a protection transistor TVS1 connected in parallel between its 3rd terminal (source) and the 2nd terminal (drain) of the MOSFET, a power inductor L1, a freewheeling diode D1, a sampling resistor R1, and a main circuit switch SW1. Furthermore, the 3rd terminal (source), 2nd terminal (drain), and 1st terminal (gate) of the N-channel MOSFET-Q1 are all represented by numerical serial numbers. Referring to the accompanying drawings, the pin terminals corresponding to the numerical serial numbers can be seen. Similarly, other components in this application, such as transistors, also use this numerical serial number combined with the accompanying drawings. This representation method is understandable to those skilled in the art.
[0030] Its further technical solution is as follows, see Figure 7 As shown, the current sampling module B includes resistors R3, R4, R7, and R8, and operational amplifier U1A. The power inductor L1 is connected to resistor R3, the sampling resistor R1 is connected to resistor R4, resistor R4 is connected to resistor R7, resistor R7 is connected to terminal V1, and resistor R4 is connected to terminal 3 of operational amplifier U1A. Resistor R3 is connected to terminal 2 of operational amplifier U1A, resistor R3 is connected to resistor R8, resistor R8 is connected to terminal 1 of operational amplifier U1A, and terminal 1 of operational amplifier U1A is connected to the overcurrent trigger circuit C.
[0031] Its further technical solution is as follows, see Figure 8 As shown, the overcurrent trigger circuit C includes comparator U2A, comparator U2B, Schottky diode D2, and Schottky diode D3. Terminal 1 of operational amplifier U1A is connected to the IO-IN terminal, terminal 1 of operational amplifier U1A is connected to terminal 2 of comparator U2A, terminal 3 of comparator U2A is connected to terminal V4, terminal 1 of comparator U2A is connected to Schottky diode D2, and Schottky diode D2 is connected to the driver module D. Terminal 1 of operational amplifier U1A is connected to terminal 5 of comparator U2B, terminal 6 of comparator U2B is connected to terminal V5, terminal 7 of comparator U2B is connected to Schottky diode D3, and Schottky diode D3 is connected to the driver module D. The technical effect of the above solution is to enhance the pre-charge capability of the battery pack / battery cluster to avoid unnecessary damage.
[0032] Furthermore, the current sampling module B includes amplification factor configuration resistors R3, R4, R7, and R8, and operational amplifier U1A; the overcurrent trigger circuit C includes dual comparators U2A and U2B, and two Schottky diodes D2 and D3 with small voltage drops; furthermore, the IO-IN label in the figure indicates that this is connected to the ADC interface of the microprocessor for calculating the pre-charge current. V1 in the figure is the bias voltage, used to realize the ability to collect charging and discharging current. V2 and V3 are the power supply input terminals of the operational amplifier and the comparator, respectively. The output pin 1 of operational amplifier U1A is connected to the inverting input pin 2 of the first channel and the non-inverting input pin 5 of the second channel of comparator U2. V4 is connected to the non-inverting input pin 3 of the first channel of comparator U2, and V5 is connected to the inverting input pin 6 of the second channel of comparator U2; wherein, the output pin 1 is also known as terminal 1, and the inverting input pin 2 is also known as terminal 2, and the following content is similar.
[0033] Further, see Figure 9As shown, the driving module D includes resistors R5 and R6, diode ZD1, resistors R9, R10, R11, and R12, a PNP transistor Q2, and an NPN transistor Q3. Schottky diode D2 is connected to resistors R5 and R6, and Schottky diode D3 is also connected to resistors R5 and R6. Diode ZD1 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1. Resistor R5 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1. The diode ZD1 and resistor R5... The transistors are connected in parallel and connected to terminal 3 of PNP transistor Q2 via resistor R6; terminal 2 of PNP transistor Q2 is connected to VCC; terminal 1 of PNP transistor Q2 is connected to VCC via resistor R9; terminal 1 of PNP transistor Q2 is connected to terminal 3 of NPN transistor Q3 via resistor R10; terminal 2 of NPN transistor Q3 is grounded; terminal 2 of NPN transistor Q3 is connected to terminal 1 of NPN transistor Q3 via resistor R12; and terminal 1 of NPN transistor Q3 is connected to the IO-OUT terminal via resistor R11. Optionally, terminal 1 of PNP transistor Q2 is connected to an external microcontroller via resistor R11.
[0034] Furthermore, the IO-OUT terminal in the drive module D is connected to the IO port of the microcontroller to drive the pre-charge switching transistor MOS-Q1. Resistor R11 limits the current, and resistor R12 pulls down the base of NPN transistor Q3 to GND. Resistor R10 and bias resistor R9 are used to control the turn-on and turn-off of PNP transistor Q2. R6 is a current-limiting resistor, and R5 pulls down the gate of the pre-charge switching transistor MOS-Q1 to GND. Diode ZD1 clamps the Vgs voltage of the pre-charge switching transistor MOS-Q1 for protection. The anodes (A) of D2 and D3 are connected between the gate of Q1 and R6. Furthermore, when the current through R1 is zero, the voltage value at pin 1 of the operational amplifier U1A is equal to V1. At this time, V4 should be greater than V1, and V5 should be less than V1; otherwise, the switching transistor MOS-Q1 cannot be controlled to turn on.
[0035] The solution described in this invention does not require the use of current-limiting resistors and complex control circuits. It has strong pre-charging capability, simple circuit, and can sample the pre-charging current to determine whether the circuit components are damaged. It has high cost performance and strong practicality. Furthermore, in addition to the pre-charging function, this circuit can also charge the low-voltage battery when the batteries are connected in parallel until the voltage difference between the batteries is less than the parallel connection threshold voltage to complete the parallel connection.
[0036] The further technical solution is as follows: The pre-charging circuit operation process includes: Step 1, SW1 closes in advance, and the charging switch transistor MOS-Q11 of the main circuit is closed in advance before pre-charging. When IO-OUT is low, Q2 and Q3 are cut off, and Q1 is in the off state. At this time, the current through R1 is 0A, the voltage value of pin 1 of the operational amplifier U1A is equal to V1, and pins 1 and 7 of the comparator U2 are both high. Step 2, when IO-OUT is high, Q2 and Q3 are turned on, Q1 is closed, and the circuit current flows from BAT1+ through Q11, R1, L1, and R2 and returns to BAT1-. When the current flowing through R1 increases, the voltage of pin 1 of the operational amplifier U1A also increases. When the voltage is high... At V4, the output pin 1 of comparator U2 flips from high to low. At this time, the high level of the gate of Q1 is clamped to low by D2, Q1 is turned off, the current of L1 cannot change abruptly, and the drain voltage of Q1 rises rapidly until it exceeds the battery PACK voltage. At this time, the current will flow back to the PACK1+ terminal through the freewheeling diode D1. In the third step, when the current decreases, the voltage of the output pin 1 of U1 decreases accordingly until it is less than V4. The output pin 1 of comparator U2 flips from low to high, Q1 closes again, and the current increases from small to large until the voltage of the output pin 1 of U1 is greater than V4. In the fourth step, the previous steps 2 and 3 are repeated continuously to limit the current until the capacitor at the PCS / inverter terminal is fully charged.
[0037] Furthermore, the current path during the operation of the aforementioned pre-charging circuit mainly includes, on the one hand, when Q1 is closed: the current flows from BAT1+ to SW1, then to PACK1+, then to PCS / inverter, then to PACK1-, then to Q11, then to R1, then to L1, then to Q1, then to R2, then to BAT1-, then to BAT1+; on the other hand, when Q1 is off: the current flows from BAT1+ to SW1, then to PACK1+, then to PCS / inverter, then to PACK1-, then to Q11, then to R1, then to L1, then to D1, then to SW1. Further, as... Figure 4The diagram shows the electrical connection when batteries are connected in parallel. PACK1+ is connected to PACK2+, and PACK1- is connected to PACK2-. Assume the voltage difference between batteries PACK1 and PACK2 is greater than the closing threshold, and the voltage of battery PACK1 is greater than that of battery PACK2. Close both SW1 and SW2 switches for both batteries. Battery PACK2 controls the closing of the charging switch MOS-Q20. Then, battery PACK1 controls the closing of the charging switch MOS-Q11 and the pre-charge switch MOS-Q1. Repeat steps 2 and 3 until the voltage difference between batteries PACK1 and PACK2 is less than the closing threshold. At this point, battery PACK1 controls the closing of the discharging switch MOS-Q10, and battery PACK2 controls the closing of the discharging switch MOS-Q21. The two batteries are successfully connected in parallel. Battery PACK1 then controls the turning off of the pre-charge switch MOS-Q1.
[0038] The further technical solution is as follows: the device selection in this application includes: the DS-R of the switching transistor MOS-Q1 needs to be greater than the battery PACK voltage, and the continuously flowing current needs to be selected based on the actual heat generation; R1 is selected as a high-precision resistor at the milliohm level to reduce resistor heat generation and improve sampling accuracy; it is recommended that resistor R3 be equal to resistor R4 and resistor R7 be equal to resistor R8 for easy calculation, and high-precision resistors are selected to improve sampling accuracy. The resistance value needs to be considered in conjunction with the input offset current of U1; furthermore, in this solution, it is recommended that V1 be selected as half of the IO port input voltage, and V2 be less than or equal to V3; furthermore, in this solution, D2 and D3 are selected as forward... For diodes with small voltage drops, such as Schottky diodes, the reverse withstand voltage is greater than V3; diode ZD1 is less than the Vth of the switching transistor MOS-Q1. Resistors R5 and R12 should be selected from 100KΩ to 1MΩ, resistor R11 can be selected from 10Ω to 100Ω, and resistor R6 should be selected with an appropriate value according to the actual situation. When the comparator output is low, the current flowing through resistor R6 is (VCC-VF) / R6, where VF is the forward conduction voltage drop of D2 and D3; the corresponding formula is: -VBE(sat)<VCC*(R9 / (R9+R10)), where VBE(sat) corresponds to the minimum BE voltage drop required for the transistor to saturate and conduct.
[0039] In summary, in the field of energy storage systems, the battery terminals of inverters / PCS typically have a large number of capacitors connected in parallel across the positive and negative terminals. If there is no voltage difference across the capacitors, when the main circuit switching system is powered on, the voltage across the capacitors cannot change abruptly. This instantaneous moment is equivalent to a short circuit between the positive and negative terminals of the battery, generating a very large surge current. This could damage the main contactor contacts, fuses, DC bus capacitors, or even the battery itself, causing unnecessary losses. Based on this, this application proposes a pre-charging circuit and energy storage system for energy storage systems, which can enhance the pre-charging capability of the battery pack / battery cluster to avoid unnecessary damage and improve the ability to continuously carry current, thereby shortening the charging time.
[0040] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0041] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0042] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0043] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0044] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. The illustrative expressions of the above terms in this specification should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0045] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Since these modifications and variations fall within the scope of the claims and their equivalents, this invention also intends to include these modifications and variations.
[0046] The above description describes specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A pre-charging circuit for an energy storage system, characterized in that, The pre-charging circuit is connected to the corresponding battery pack, and the pre-charging circuit for the energy storage system includes: The battery module BAT1, sampling resistor R2, discharge MOS-Q10, charging MOS-Q11, and functional circuit module are included; the positive terminal of the battery module BAT1 is connected to the functional circuit module, and the functional circuit module is connected to the positive terminal of the battery PACK. The negative terminal of the battery module BAT1 is connected to the sampling resistor R2, the sampling resistor R2 is connected to the discharge MOS-Q10, the discharge MOS-Q10 is connected to the charging MOS-Q11, and the charging MOS-Q11 is connected to the negative terminal of the battery PACK.
2. The pre-charging circuit for an energy storage system according to claim 1, characterized in that: The negative terminal of the battery module BAT1 is connected to the sampling resistor R2, the sampling resistor R2 is connected to terminal 3 of the discharge MOS-Q10, terminal 2 of the discharge MOS-Q10 is connected to terminal 2 of the charging MOS-Q11, and terminal 3 of the charging MOS-Q11 is connected to the negative terminal of the battery PACK. Terminal 3 of the discharge MOS-Q10 is also connected to the main functional circuit module, and terminal 2 of the charging MOS-Q11 is also connected to the main functional circuit module.
3. The pre-charging circuit for an energy storage system according to claim 2, characterized in that: The functional circuit module includes a pre-charge circuit A, a current sampling module B, an overcurrent trigger circuit C, and a drive module D; the pre-charge circuit A is connected to the current sampling module B, the current sampling module B is connected to the overcurrent trigger circuit C, and the drive module D is connected to the pre-charge circuit A.
4. The pre-charging circuit for an energy storage system according to claim 3, characterized in that: The pre-charge circuit A includes a main circuit switch SW1, a freewheeling diode D1, a power inductor L1, a sampling resistor R1, an N-channel switch MOS-Q1, and a protection transistor TVS1. The positive terminal of the battery PACK is connected to the positive terminal of the battery module BAT1 via the main circuit switch SW1. The main circuit switch SW1 is connected to the freewheeling diode D1, the freewheeling diode D1 is connected to the power inductor L1, the power inductor L1 is connected to the sampling resistor R1, the sampling resistor R1 is connected to terminal N1, the sampling resistor R1 is connected to the current sampling module B, and the power inductor L1 is connected to the current sampling module B. The power inductor L1 is connected to terminal 2 of the N-channel MOSFET-Q1, terminal 3 of the N-channel MOSFET-Q1 is connected to terminal B1-1, terminal 3 of the N-channel MOSFET-Q1 is connected to the drive module D, and terminal 1 of the N-channel MOSFET-Q1 is connected to the drive module D.
5. The pre-charging circuit for an energy storage system according to claim 4, characterized in that: The current sampling module B includes resistors R3, R4, R7, and R8, and operational amplifier U1A. The power inductor L1 is connected to the resistor R3, the sampling resistor R1 is connected to the resistor R4, the resistor R4 is connected to the resistor R7, the resistor R7 is connected to the V1 terminal, and the resistor R4 is connected to the 3rd terminal of the operational amplifier U1A. The resistor R3 is connected to terminal 2 of the operational amplifier U1A, the resistor R3 is connected to the resistor R8, the resistor R8 is connected to terminal 1 of the operational amplifier U1A, and terminal 1 of the operational amplifier U1A is connected to the overcurrent trigger circuit C.
6. The pre-charging circuit for an energy storage system according to claim 5, characterized in that: The overcurrent trigger circuit C includes comparator U2A, comparator U2B, Schottky diode D2, and Schottky diode D3; Terminal 1 of the operational amplifier U1A is connected to the IO-IN terminal. Terminal 1 of the operational amplifier U1A is connected to terminal 2 of the comparator U2A. Terminal 3 of the comparator U2A is connected to the V4 terminal. Terminal 1 of the comparator U2A is connected to the Schottky diode D2. The Schottky diode D2 is connected to the driver module D. Terminal 1 of the operational amplifier U1A is connected to terminal 5 of the comparator U2B, terminal 6 of the comparator U2B is connected to terminal V5, terminal 7 of the comparator U2B is connected to the Schottky diode D3, and the Schottky diode D3 is connected to the driver module D.
7. The pre-charging circuit for an energy storage system according to claim 6, characterized in that: The drive module D includes resistors R5 and R6, diode ZD1, resistors R9, R10, R11, and R12, PNP transistor Q2, and NPN transistor Q3. The Schottky diode D2 is connected to the resistors R5 and R6, the Schottky diode D3 is connected to the resistors R5 and R6, the diode ZD1 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1, the resistor R5 is located between terminals 1 and 3 of the N-channel switching transistor MOS-Q1, the diode ZD1 and the resistor R5 are connected in parallel and connected to terminal 3 of the PNP transistor Q2 through the resistor R6; Terminal 2 of the PNP transistor Q2 is connected to the VCC terminal. Terminal 1 of the PNP transistor Q2 is connected to the VCC terminal via resistor R9. Terminal 1 of the PNP transistor Q2 is connected to terminal 3 of the NPN transistor Q3 via resistor R10. Terminal 2 of the NPN transistor Q3 is grounded. Terminal 2 of the NPN transistor Q3 is connected to terminal 1 of the NPN transistor Q3 via resistor R12. Terminal 1 of the NPN transistor Q3 is connected to the IO-OUT terminal via resistor R11.
8. An energy storage system, characterized in that, The energy storage system includes a battery subsystem, the battery subsystem includes a battery pack, and the battery subsystem further includes a pre-charging circuit as described in any one of claims 1 to 7, wherein the battery pack is connected to the pre-charging circuit.