Strong PUF circuit based on switched capacitor circuit, chip and application method thereof

Abstract

The invention discloses a strong PUF circuit based on a switched capacitor circuit, a chip and an application method thereof.The strong PUF circuit comprises a comparator and a switched capacitor proportional sampling circuit SCRi connected to the input end of the comparator, the switched capacitor proportional sampling circuit SCRi is composed of a switched capacitor sub-circuit SC2i and a switched capacitor sub-circuit SC2i + 1, each sub-switched capacitor circuit is composed of two sub-sampling capacitors, and each sub-sampling capacitor is connected with the input excitation through one switch and is grounded through the other switch. According to the invention, the number of required capacitors is greatly reduced, the stability, bias characteristic and uniqueness of the output key are improved, the CRP space is expanded, and the cost is reduced.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit and hardware information security technology, specifically relating to a strong PUF circuit, chip and application method based on switched capacitor circuit. Background Technology

[0002] For secure encryption / decryption chips, the most important thing is to ensure the security of the keys used for encryption and decryption. Currently, Physically Unclonable Function (PUF) circuits are commonly used to provide random keys that cannot be directly observed through reverse engineering. PUF circuits detect random changes in the physical characteristics of circuit components during chip manufacturing. Different chips present the same visual image to the outside world; even chip manufacturers cannot completely replicate the same key, and attackers cannot deduce the key through image analysis.

[0003] Due to its capacitive sensitivity, switched capacitor (SC) circuits, when applied to PUF circuits, possess unique characteristics that prevent invasive attacks such as probe detection, and have been used to protect the entire security chip.

[0004] like Figure 1 As shown, prior art 1 (Chinese patent document with publication number CN104052604A) discloses an anti-cracking PUF structure. This PUF structure uses a switched capacitor circuit to sample the process mismatch of the capacitor ratios C1P / C1N and C2P / C2N and convert it into an output key value, while using a sampling capacitor to protect the entire chip. However, the SCPUF proposed in prior art 1 is a weak PUF structure, meaning that after the chip is manufactured, each chip can only generate one set of random, but fixed, and unchangeable key values ​​in real time. In most security authentication applications, multiple challenge-response pair (CRP) keys are usually required. After using up a set of challenge-response pair keys, to ensure security, this set of keys can be permanently discarded, and the incentive can be changed to select other key pairs to prevent the risk of key leakage.

[0005] Based on existing technology one, such as Figure 2As shown, prior art 2 (Chinese patent document with publication number CN107292200A) discloses a strong PUF circuit structure based on switched capacitors. This scheme makes full use of the characteristics of switched capacitor circuits, providing multiple sets of CRP pairs. An external input of N bits is used to select the specific capacitor distribution that constitutes the sampling capacitors C2N and C1N. While keeping the large capacitors C1P and C2P unchanged, the size of C1P / C1N and C2P / C2N is controlled by controlling whether each of the 2N small capacitors belongs to C2N or C1N, thereby obtaining different output key values. Since the capacitance value of each small capacitor has random mismatch during the production process, when the enable signal is changed, the sub-capacitors constituting C1N and C2N will change, and the total capacitance value of C1N and C2N will also change randomly, thus causing C1P / C1N and C2P / C2N to change randomly, ultimately causing the output key to change randomly.

[0006] Although the existing technology 2 can enhance and improve the switched capacitor PUF, it has three problems: (1) In order to ensure the voltage V output to the comparator N and V P A DC operating voltage at the power supply-ground mid-level is required for the comparator to function properly. C1P and C2P should be equal to the sum of the sub-capacitors ΣC. i Since they are on the same order of magnitude, C1P and C2P will be much larger than the capacitance value of each sub-capacitor. If C1P and C2P are mismatched, the mismatch value will be much larger than the mismatch value of the sub-capacitors. Because C1P and C2P are independent of the external enable signal, when a certain bit of the external excitation changes, that is, when the subordinate relationship of a pair of sub-capacitors is interchanged, such as C... i (0) Transition from C1N to C2N, C i(1) The conversion from C2N to C1N has a much smaller impact on C2N and C1N than the mismatch inherent in C1P and C2P. In this case, even if one or more pairs of sub-capacitors are swapped, the mismatch inherent in C1P and C2P will dominate, and the magnitude relationships of C1P / C1N and C2P / C2N will remain unchanged. The output key will also be independent of the enable signal, thus keeping the output key unchanged within a considerable excitation space, wasting a large amount of CRP space. The output key will only change when the changes in C1N and C2N exceed the mismatch inherent in C1P and C2P. (2) Meanwhile, since C1P and C2P are fixed and independent of external excitation, changes in external excitation cannot cause changes in C1P and C2P. This is equivalent to reducing the number of CRPs under the same circuit consumption. If C1P and C2P can be controlled by the excitation signal C[N-1:0] like C1N and C2N, then the total number of sub-capacitor pairs can actually be halved. For example, if C1P and C2P are also composed of the same sub-capacitor pairs and switch groups as C1N and C2N, then C[N / 2-1:0] can be used to control the assignment of C1N and C2N sub-capacitors, while C[N / 2-1:N / 2] can be used to control the assignment of C1P and C2P sub-capacitors. Thus, in order to achieve 2 N The number of CRP, C1N, and C2N sub-capacitor pairs can be halved, and the total sampling capacitance value of C1P and C2P can also be halved. Therefore, it can be considered that in order to achieve 2 N For each CRP, this circuit structure consumes more cost. (3) In addition, in order to realize the interchangeability of each pair of sub-capacitors, the existing technology 2 uses multiple sets of switches to control whether each sub-capacitor is connected to the C1N group or the C2N group. This will consume a lot of hardware resources. At the same time, the parasitic capacitance brought by the switch will also make the output key unstable. This is because the parasitic capacitance of the switch will also be connected to C1N and C2N. The parasitic capacitance of the switch is greatly affected by the external environment, so that C1N and C2N are easily affected by the external environment such as temperature and power supply when the enable signal is determined, which ultimately affects the stability of the output key. In summary, the existing strong PUF based on switched capacitor circuit has disadvantages such as poor statistical characteristics, waste of CRP space, high cost and susceptibility to environmental influence. Summary of the Invention

[0007] The technical problem to be solved by this invention is to provide a strong PUF circuit, chip and application method based on switched capacitor circuit, which greatly reduces the number of capacitors required, improves the stability, bias characteristics and uniqueness of the output key, expands the CRP space and reduces the cost.

[0008] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0009] A strong PUF circuit based on switched capacitor circuitry includes a comparator and a switched capacitor proportional sampling circuit (SCR) connected to the input of the comparator. i The switched capacitor proportional sampling circuit SCR i The switched capacitor sub-circuit SC 2i and SC 2i+1 It consists of two switched capacitor sub-circuits. Each switched capacitor sub-circuit consists of two sub-sampling capacitors, and each sub-sampling capacitor is connected to the input excitation through one switch and grounded through the other switch.

[0010] Optionally, the switched capacitor sub-circuit SC 2i Including sub-sampling capacitor C 1N_2i and C 2N_2i Sub-sampling capacitor C 1N_2i and C 2N 2i The intermediate connection point between them serves as the switched capacitor sub-circuit SC 2i The negative output terminal and the negative input terminal V of the comparator N Connected,

[0011] The switched capacitor subcircuit SC 2i+1 Including sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 The intermediate connection point between them serves as the switched capacitor sub-circuit SC 2i The positive output terminal and the positive input terminal V of the comparator P Connected, the sub-sampling capacitor C 1N_2i and C 2N_2i and sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Each is connected to the input excitation via one switch and grounded via another switch.

[0012] Optionally, the sub-sampling capacitor C 1N_2i and C 2N_2i and sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Both are connected to the input excitation via a switch controlled by the enable signal EN, and grounded via another switch controlled by the reverse signal of the enable signal EN.

[0013] Optionally, the switched capacitor proportional sampling circuit SCR i Switched capacitor sub-circuit SC 2i and SC 2i+1 In the two switched capacitor sub-circuits, the switched capacitor sub-circuit SC 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1The input excitations C[2i+1] are independent of each other.

[0014] Optionally, the input of the comparator is connected to an N / 2-channel switched-capacitor proportional sampling circuit in parallel, where N is the total number of switched-capacitor sub-circuits included in the strong PUF circuit.

[0015] In addition, the present invention also provides a chip, including a chip body and a PUF circuit disposed in the chip body, wherein the PUF circuit is the strong PUF circuit based on the switched capacitor circuit.

[0016] Optionally, the chip includes multiple strong PUF circuits based on switched capacitor circuits, and the output key corresponding to each strong PUF circuit based on switched capacitor circuits is 0 or 1, so that all the strong PUF circuits based on switched capacitor circuits can be combined to output a multi-bit output key.

[0017] Furthermore, the present invention also provides an application method for the aforementioned strong PUF circuit based on switched capacitor circuits, including assigning a specified level of input excitation to each of the N / 2-channel switched capacitor proportional sampling circuits, using the enable signal EN and the inverse signal of the enable signal EN to control the sub-sampling capacitors in the switched capacitor proportional sampling circuits to be connected to the input excitation or grounded, thereby adjusting the assignment of the sub-sampling capacitors in the switched capacitor sub-circuit to change the total sampling capacitance of the N / 2-channel switched capacitor proportional sampling circuits connected in parallel to the input terminal of the comparator, and obtaining the corresponding output key after amplification and comparison by the comparator.

[0018] Optionally, the step of assigning a specified level of input excitation to each of the N / 2-channel switched capacitor proportional sampling circuits, and controlling the sub-sampling capacitors in the switched capacitor proportional sampling circuits to be connected to the input excitation or grounded using the enable signal EN and the inverse signal of the enable signal EN, includes: when the capacitor sub-circuit SC is turned off... 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1 When both input excitations C[2i+1] are logic high, the sub-sampling capacitor C 1N_2i Connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 In capacitor C1P, sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 Connect to the total sampling capacitor C2P; when the capacitor sub-circuit SC is turned off 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1 When both the input excitation C[2i+1] and the input excitation C[2i+1] are logic low, the sub-sampling capacitor C 1N_2i The sub-sampling capacitor C is connected to the total sampling capacitor C2N. 1P_2i+1In the capacitor C2P connection, the sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 Connect to the total sampling capacitor C1P; when the capacitor sub-circuit SC is turned off 2i The input excitation C[2i] is logic high, and the switched capacitor sub-circuit SC 2i+1 When the input stimulus C[2i+1] is logic low, the sub-sampling capacitor C 1N_2i The sub-sampling capacitor C is connected to the total sampling capacitor C2N. 1P_2i+1 In capacitor C1P, sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 Connect to the total sampling capacitor C2P; when the capacitor sub-circuit SC is turned off 2i The input stimulus C[2i] is logic low, and the switched capacitor sub-circuit SC 2i+1 When the input stimulus C[2i+1] is logic high, the sub-sampling capacitor C 1N_2i Connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 In the capacitor C2P connection, the sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 Connect to the total sampling capacitor C1P; where the total sampling capacitor C1N refers to all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitor connected to the input excitation, C2N, refers to the total sampling capacitor C2N of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitor grounded, C1P refers to the total sampling capacitor of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitor connected to the input excitation, C2P, refers to the total sampling capacitor C2P of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitance grounded.

[0019] Optionally, controlling the sub-sampling capacitors in the switched-capacitor proportional sampling circuit to connect to the input excitation or ground using the enable signal EN and its inverse signal includes: first, setting the enable signal EN to 0, so that all sub-sampling capacitors are grounded and their stored charge is 0; then, setting the enable signal EN to 1, so that the strong PUF circuit based on the switched-capacitor circuit enters the charge redistribution state: the upper plates of the total sampling capacitors C1N and C1P are both connected to the input excitation, and the upper plates of the total sampling capacitors C2N and C2P are both grounded, so that the switched-capacitor proportional sampling circuit SCR... iA voltage difference ΔV is introduced between the output terminals of the two switched capacitor sub-circuits. PN :

[0020]

[0021] In the above formula, VDD is the input excitation, and C1N, C1P, C2N, and C2P are all total sampling capacitors;

[0022] When the switched capacitor proportional sampling circuit SCR i Zhongguan capacitor sub-circuit SC 2i When the input excitation C[2i] is 1, the voltage difference ΔV PN The possible values ​​are:

[0023]

[0024] In the above formula, C 1N_exc_2i To remove sub-sampling capacitor C from the total sampling capacitor C1N 1N_2i The capacitance value after C 1N_2i For sub-sampling capacitor C 1N_2i The capacitance value, C 2N_exc_2i To remove sub-sampling capacitor C from the total sampling capacitor C2N 2N_2i The capacitance value after C 2N_2i For sub-sampling capacitor C 2N_2i The capacitance value, if the capacitor sub-circuit SC is turned off 2i When the input excitation C[2i] changes from 1 to 0, the voltage difference ΔV PN The possible values ​​are:

[0025]

[0026] Thus, the sub-sampling capacitor C is realized. 1N_2i Sampling capacitor C 2N_2i The total sampling capacitance of the two components is interchanged;

[0027] When the switched capacitor proportional sampling circuit SCR i Zhongguan capacitor sub-circuit SC 2i When the input excitation C[2i+1] is 1, the voltage difference ΔV PN The value can be:

[0028]

[0029] In the above formula, C 2P_exc_2i+1 Remove sub-sampling capacitor C from the total sampling capacitor C2P 2P_2i+1 The capacitance value after C 2P_2i+1 For sub-sampling capacitor C 2P_2i+1 The capacitance value, C 1P_exc_2i+1 Remove sub-sampling capacitor C from the total sampling capacitor C1P 1P_2i+1 The capacitance value after C1P_2i+1 For sub-sampling capacitor C 1P_2i+1 The capacitance value; if the capacitor sub-circuit SC is turned off 2i When the input excitation C[2i] changes from 1 to 0, the voltage difference ΔV PN The value can be:

[0030]

[0031] Thus, the sub-sampling capacitor C is realized. 2P_2i+1 Sampling capacitor C 1P_2i+1 The total sampling capacitance of the two is interchanged.

[0032] Compared with the prior art, the present invention has the following main advantages: The strong PUF circuit based on the switched capacitor circuit of the present invention includes a comparator and a switched capacitor proportional sampling circuit (SCR) connected to the input terminal of the comparator. i The switched capacitor proportional sampling circuit SCR i The switched capacitor sub-circuit SC 2i and SC 2i+1 The invention comprises two switched-capacitor sub-circuits, each consisting of two sub-sampling capacitors. Each sub-sampling capacitor is connected to the input excitation via one switch and grounded via another switch. By connecting the input excitation and its inverse signal to the sampling power supply (input excitation) and ground signal of the sub-sampling capacitor circuit, the assignment of sub-capacitors in the sub-sampling capacitor circuit can be achieved simply by changing the value of the input excitation, thereby changing the total capacitance of each overall sampling capacitor group to obtain different output response keys. This invention eliminates the need for complex switch control of sub-capacitor assignment and avoids using fixed capacitors. The total capacitance of all four overall sampling capacitor groups changes with the input excitation, and the changes in the assignment of all sub-capacitors are reflected in the final total capacitance ratio. This significantly reduces the number of capacitors required, improves the stability, bias characteristics, and uniqueness of the output key, expands the CRP space, and reduces costs. Attached Figure Description

[0033] Figure 1 It is a PUF structure based on a switched capacitor circuit proposed in the existing technology.

[0034] Figure 2 It is a strong PUF structure based on switched capacitor circuit proposed in existing technology 2.

[0035] Figure 3 This is a schematic diagram of the structure of a strong PUF circuit based on a switched capacitor circuit in an embodiment of the present invention.

[0036] Figure 4 This is an equivalent circuit diagram of a strong PUF structure based on a switched capacitor circuit in an embodiment of the present invention.

[0037] Figure 5 This is the SCR in the embodiment of the present invention. i Equivalent circuit diagrams under different input excitation conditions. Detailed Implementation

[0038] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Examples of the embodiments are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, but should not be construed as limiting the present invention. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention should be included within the scope of the claims of the present invention. Techniques not described in detail in this technical solution are all well-known technologies.

[0039] like Figure 3 As shown, the strong PUF circuit based on the switched capacitor circuit in this embodiment includes a comparator and a switched capacitor proportional sampling circuit (SCR) connected to the input of the comparator. i Switched capacitor proportional sampling circuit SCR i The switched capacitor sub-circuit SC 2i and SC 2i+1 It consists of two switched capacitor sub-circuits. Each switched capacitor sub-circuit consists of two sub-sampling capacitors, and each sub-sampling capacitor is connected to the input excitation through one switch and grounded through the other switch.

[0040] like Figure 3 As shown, the switched capacitor sub-circuit SC 2i Including sub-sampling capacitor C 1N_2i and C 2N_2i Sub-sampling capacitor C 1N_2i and C 2N_2i The intermediate connection point between them serves as the switched capacitor sub-circuit SC 2i The negative output terminal and the negative input terminal V of the comparator N The switched capacitor sub-circuit SC is connected. 2i+1 Including sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 The intermediate connection point between them serves as the switched capacitor sub-circuit SC 2i The positive output terminal and the positive input terminal V of the comparator P Connected, the sub-sampling capacitor C 1N_2i and C 2N_2i and sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Each is connected to the input excitation via one switch and grounded via another switch.

[0041] like Figure 3 As shown, the sub-sampling capacitor C 1N_2i and C 2N_2i and sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 Both are connected to the input excitation via a switch controlled by the enable signal EN, and grounded via another switch controlled by the reverse signal of the enable signal EN.

[0042] like Figure 3 As shown, the switched capacitor proportional sampling circuit (SCR) i Switched capacitor sub-circuit SC 2i and SC 2i+1 In the two switched capacitor sub-circuits, the switched capacitor sub-circuit SC 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1 The input excitations C[2i+1] are independent of each other.

[0043] like Figure 3 As shown, the input of the comparator is connected to an N / 2-channel switched-capacitor proportional sampling circuit (SCR0~SCR2) in parallel. N / 2 ), where N is the total number of switched-capacitor sub-circuits included in the strong PUF circuit. All sub-switched-capacitor proportional sampling circuits SCR0~SCR N / 2 V N With V P Each of these components is connected together and used as the overall output voltage. This voltage is then fed into a comparator for amplification and comparison, thereby obtaining the output key related to the mismatch between the total capacitance ratios C1P / C1N and C2P / C2N.

[0044] This embodiment of the strong PUF circuit based on switched capacitor circuits includes N / 2 sub-switched capacitor proportional sampling circuits. Each sub-switched capacitor proportional sampling circuit consists of two sub-switched capacitor circuits. During the sampling phase, the input excitation and its inverse signal are respectively connected to the sampling power supply and sampling ground signal of the sub-switched capacitor circuit. By changing the input excitation, the relative relationship between the two sub-capacitors in each sub-switched capacitor circuit and the sampling power supply and sampling ground is changed, thereby changing the belonging relationship of each sub-capacitor in the overall sampling capacitor group, so as to obtain different total capacitance and proportion of the overall sampling capacitor group, and finally obtain different output keys, realizing a one-to-one correspondence between the output key and the input excitation. The sub-switched capacitor proportional sampling circuit consists of two sub-switched capacitor circuits, and each sub-switched capacitor circuit consists of two sub-sampling capacitors. During the discharge phase, all sub-sampling capacitors are grounded or powered at both ends. During the sampling phase, one end of one sub-sampling capacitor is connected to the input excitation, and the other end is connected to one end of the other sub-sampling capacitor. The other end of the other sub-sampling capacitor is connected to the inverse signal of the input excitation. The switched-capacitor strong PUF consists of N / 2 sub-switched-capacitor proportional sampling circuits. In all sub-switched-capacitor comparison circuits, the common terminals of the two capacitors in one sub-switched-capacitor circuit are connected together to form one input of the comparison voltage. Similarly, the common terminals of the two capacitors in the other sub-switched-capacitor comparison circuit are also connected together to form the other input of the comparison voltage. After sampling, the comparator amplifies and compares the two comparison voltages to convert them into an output key.

[0045] Figure 4 The diagram shows the equivalent circuit of the strong PUF circuit based on the switched capacitor circuit in this embodiment, where C1N refers to all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitor connected to the input excitation, C2N refers to all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitance grounded, C1P, refers to the total sampling capacitance of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitor connected to the input excitation, C2P refers to the total sampling capacitor of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitance grounded.

[0046] Furthermore, this embodiment also provides a chip, including a chip body and a PUF circuit disposed in the chip body, wherein each PUF circuit is a strong PUF circuit based on a switched capacitor circuit as described above. In this embodiment, the chip includes multiple strong PUF circuits based on switched capacitor circuits, and the output key corresponding to each strong PUF circuit based on a switched capacitor circuit is 0 or 1, so that all the strong PUF circuits based on switched capacitor circuits jointly output a multi-bit output key.

[0047] Furthermore, this embodiment also provides an application method for the aforementioned strong PUF circuit based on switched capacitor circuits, including assigning a specified level of input excitation to each of the N / 2-channel switched capacitor proportional sampling circuits, using the enable signal EN and the inverse signal of the enable signal EN to control the sub-sampling capacitors in the switched capacitor proportional sampling circuits to be connected to the input excitation or grounded, thereby adjusting the assignment of the sub-sampling capacitors in the switched capacitor sub-circuit to change the total sampling capacitance of the N / 2-channel switched capacitor proportional sampling circuits connected in parallel to the input terminal of the comparator, and obtaining the corresponding output key after amplification and comparison by the comparator.

[0048] In this embodiment, for each of the N / 2-channel switched capacitor proportional sampling circuits, a specified level of input excitation is assigned. The sub-sampling capacitors in the switched capacitor proportional sampling circuits are connected to the input excitation or grounded using the enable signal EN and its inverse signal.

[0049] When the capacitor circuit SC is turned off 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1 When both input excitations C[2i+1] are logic high, the sub-sampling capacitor C 1N_2i Connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 In capacitor C1P, sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 The equivalent circuit of the input to the total sampling capacitor C2P is as follows: Figure 5 As shown in (a) in the figure.

[0050] When the capacitor circuit SC is turned off 2i The input excitation C[2i] and the switched capacitor sub-circuit SC 2i+1 When both the input excitation C[2i+1] and the input excitation C[2i+1] are logic low, the sub-sampling capacitor C 1N_2i The sub-sampling capacitor C is connected to the total sampling capacitor C2N. 1P_2i+1 In the capacitor C2P connection, the sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 The equivalent circuit of the circuit connected to the total sampling capacitor C1P is as follows: Figure 5 As shown in (b) of the diagram.

[0051] When the capacitor circuit SC is turned off 2i The input excitation C[2i] is logic high, and the switched capacitor sub-circuit SC 2i+1 When the input stimulus C[2i+1] is logic low, the sub-sampling capacitor C 1N_2i The sub-sampling capacitor C is connected to the total sampling capacitor C2N. 1P_2i+1 In capacitor C1P, sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 The equivalent circuit of the input to the total sampling capacitor C2P is as follows: Figure 5 As shown in (c) in the figure.

[0052] When the capacitor circuit SC is turned off 2i The input stimulus C[2i] is logic low, and the switched capacitor sub-circuit SC 2i+1 When the input stimulus C[2i+1] is logic high, the sub-sampling capacitor C 1N_2i Connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 In the capacitor C2P connection, the sub-sampling capacitor C 2N_2i Connect the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 The equivalent circuit of the circuit connected to the total sampling capacitor C1P is as follows: Figure 5 As shown in (d) in the figure.

[0053] Wherein, the total sampling capacitor C1N refers to the total number of switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitor connected to the input excitation, C2N, refers to the total sampling capacitor C2N of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i The total sampling capacitor grounded, C1P refers to the total sampling capacitor of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitor connected to the input excitation, C2P, refers to the total sampling capacitor C2P of all switched capacitor proportional sampling circuits (SCRs). i Switched capacitor sub-circuit SC 2i+1 The total sampling capacitor is grounded. Therefore, the final capacitance values ​​of the four total sampling capacitors C1N, C1P, C2N, and C2P are:

[0054]

[0055]

[0056]

[0057]

[0058] In the above formulas, C 1N_0 C 2N_0 C 1P_1 C 2P_1 …C 1P_N-1 C 2P_N-1 Let C[0], C[1], ..., C[N-1] be the sub-capacitors, and C[0], C[1], ..., C[N-1] be the control signals. These are the inverted signals of C[0], C[1], ..., C[N-1], respectively. C[0], C[1], ..., C[N-1] and Mainly used to control C 1N_0 C 2N_0 C 1P_1 C 2P_1 …C 1P_N-1 C 2P_N-1 Which of C1N, C1P, C2N, and C2P should these sub-capacitors be connected to? Figure 3 As shown.

[0059] In this embodiment, controlling the sub-sampling capacitors in the switched capacitor proportional sampling circuit to connect to the input excitation or ground using the enable signal EN and its inverse signal includes: first, setting the enable signal EN to 0, so that all sub-sampling capacitors are grounded and their stored charge is 0; then, setting the enable signal EN to 1, so that the strong PUF circuit based on the switched capacitor circuit enters the charge redistribution state: the upper plates of the total sampling capacitors C1N and C1P are both connected to the input excitation, and the upper plates of the total sampling capacitors C2N and C2P are both grounded, so that the switched capacitor proportional sampling circuit SCR... i A voltage difference ΔV is introduced between the output terminals P and N of the two switched capacitor sub-circuits. PN (The voltage at points P and N will be related to C1N / C2N and C1P / C2P):

[0060]

[0061] In the above formula, VDD is the input excitation, and C1N, C1P, C2N, and C2P are all total sampling capacitors;

[0062] When the switched capacitor proportional sampling circuit SCR i Zhongguan capacitor sub-circuit SC 2i When the input excitation C[2i] is 1, the voltage difference ΔV PN The value can be:

[0063]

[0064] In the above formula, C 1N_exc_2iTo remove sub-sampling capacitor C from the total sampling capacitor C1N 1N_2i The capacitance value after C 1N_2i For sub-sampling capacitor C 1N_2i The capacitance value, C 2N_exc_1i To remove sub-sampling capacitor C from the total sampling capacitor C2N 2N_2i The capacitance value after C 2N_2i For sub-sampling capacitor C 2N_2i The capacitance value, if the capacitor sub-circuit SC is turned off 2i When the input excitation C[2i] changes from 1 to 0, the voltage difference ΔV PN The possible values ​​are:

[0065]

[0066] Thus, the sub-sampling capacitor C is realized. 1N_2i Sampling capacitor C 2N_2i The total sampling capacitance of the two components is interchanged;

[0067] When the switched capacitor proportional sampling circuit SCR i Zhongguan capacitor sub-circuit SC 2i When the input excitation C[2i+1] is 1, the voltage difference ΔV PN The possible values ​​are:

[0068]

[0069] In the above formula, C 2P_exc_2i+1 Remove sub-sampling capacitor C from the total sampling capacitor C2P 2P_2i+1 The capacitance value after C 2P_2i+1 For sub-sampling capacitor C 2P_2i+1 The capacitance value, C 1P_exc_2i+1 Remove sub-sampling capacitor C from the total sampling capacitor C1P 1P_2i+1 The capacitance value after C 1P_2i+1 For sub-sampling capacitor C 1P_2i+1 The capacitance value; if the capacitor sub-circuit SC is turned off 2i When the input excitation C[2i] changes from 1 to 0, the voltage difference ΔV PN The value can be:

[0070]

[0071] Thus, the sub-sampling capacitor C is realized. 2P_2i+1 Sampling capacitor C 1P_2i+1 Interchange of the total sampling capacitance of the two

[0072] In the above expression, C 1N_exc_2i C 2N_exc_2i C 2P_exc_2i+1 C 1P_exc_2i+1The values ​​of C1N, C2N, C1P, and C2P are respectively divided by C. 1N_2i C 2N_2i C 1P_2i+1 and C 2P_2i+1 From the capacitance values ​​other than C[2i], it can be seen that when C[2i] changes, C 1N_exc_2i C 2N_exc_2i C 1P and C 2P C remains unchanged 1N_2i With C 2N_2i An interchange occurs; and when C[2i+1] changes, C 2P_exc_2i+1 C 1P_exc_2i+1 C 1N and C 2N C remains unchanged 2P_2i+1 With C 1P_2i+1 An interchange occurs. Although each capacitor is designed to have the same value, in actual production, a mismatch occurs between the sub-capacitors, resulting in C... 1N_2i With C 2N_2i Interchange occurs, C 2P_2i+1 With C 1P_2i+1 When the interchange occurs, ΔV PN The polarity changes when the comparator is paired with ΔV. PN After amplification and comparison, the output key will also transition between 0 and 1. It can be seen that changing the excitation signal of each sub-switched capacitor proportional sampling capacitor easily achieves a change in the output response, without the need for additional switches to control the sub-capacitor assignment, thus avoiding parasitic capacitances susceptible to environmental influences caused by switches. Furthermore, as shown in the equation, the number of sub-switched capacitor proportional sampling circuits is only N / 2, halved. And C 1N C 2P C 1P and C 2N Each of them consists of N / 2-1 identical sub-capacitors. There is no large capacitor as in the prior art 2. Its distribution characteristics do not deviate from the distribution characteristics of the sub-capacitors. The change of C[i] may directly cause the change of the output key. Therefore, it has better bias characteristics and uniqueness, and better statistical characteristics.

[0073] In summary, addressing the problems described in the background section, this embodiment proposes a simple, large CRP space-controlled switched-capacitor strong PUF circuit. The four sampling capacitors are each composed of sub-capacitor groups controlled by external excitation. By changing the input excitation value, the sampling power supply and sampling ground of the switched-capacitor circuit composed of sub-capacitors are switched, allowing the sub-capacitor pairs to be interchanged between C1N, C1P and C2N, C2P respectively, obtaining different C1P / C1N and C2P / C2N capacitor ratios, and thus obtaining different output keys, achieving input excitation control of the output key. The key to this embodiment's method is that the sampled capacitors C1P and C2P are not fixed but related to the input excitation, changing with the input excitation; secondly, this embodiment's method does not use switching control to change the sub-capacitor assignments of each group of capacitors, but rather seeks a simpler method to change the sub-capacitor connection relationships. Since each capacitor bank in C1N, C1P, C2N, and C2P is composed of sub-capacitors and no large fixed capacitors are used, this novel strong PUF has a wide CRP space, good statistical characteristics, and C1N, C1P, C2N, and C2P are all controlled by input excitation. When achieving the same number of CRP spaces, fewer switched capacitor sub-circuits are required. At the same time, changes in input excitation can be reflected by the simplest digital logic to the sampling stage for the conversion of power supply and ground signals, without the need for complex switches. There is also no parasitic capacitance effect, resulting in stronger stability and a simpler circuit.

[0074] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the process. Figure 1 One or more processes and / or boxes Figure 1The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0075] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A switched-capacitor circuit based strong PUF circuit, characterized in that, A comparator and a switched-capacitor proportional sampling circuit (SCR) connected to the input of the comparator i , respectively i The switched-capacitor proportional sampling circuit (SCR) comprises two switched-capacitor sub-circuits (SC 2i , SC 2i+1 ) each of which comprises two sub-sampling capacitors connected to the input excitation through a switch and to ground through another switch 2. The switched-capacitor circuit based strong PUF circuit of claim 1, wherein, The switch capacitor sub-circuit SC 2i comprises sub-sampling capacitors C 1N_2i and C 2N_2i , and an intermediate junction between the sub-sampling capacitors C 1N_2i and C 2N_2i serves as a negative output terminal of the switch capacitor sub-circuit SC 2i and is connected to a negative input terminal V N of the comparator, and the switch capacitor sub-circuit SC 2i+1 comprises sub-sampling capacitors C 1P_2i+1 and C 2P_2i+1 , and an intermediate junction between the sub-sampling capacitors C 1P_2i+1 and C 2P_2i+1 serves as a positive output terminal of the switch capacitor sub-circuit SC 2i and is connected to a positive input terminal V P of the comparator, and the sub-sampling capacitors C 1N_2i and C 2N_2i and the sub-sampling capacitors C 1P_2i+1 and C 2P_2i+1 are connected to the input excitation through one switch and to the ground through another switch.

3. The switched-capacitor circuit based strong PUF circuit of claim 2, wherein, The sub-sampling capacitor C 1N_2i and C 2N_2i and the sub-sampling capacitor C 1P_2i+1 and C 2P_2i+1 are connected to the input excitation via a switch controlled by the enable signal EN and to ground via a switch controlled by the inverted enable signal EN.

4. The switched-capacitor circuit-based strong PUF circuit of claim 2, wherein, The switch capacitor proportional sampling circuit SCR i The switch capacitor sub-circuit SC 2i And SC 2i+1 In the two switch capacitor sub-circuits, the input excitation C[2i] of the switch capacitor sub-circuit SC 2i The input excitation C[2i+1] of the switch capacitor sub-circuit SC 2i+1 Are independent of each other.

5. The switched-capacitor circuit-based strong PUF circuit of claim 3, wherein, The input end of the comparator is connected with N / 2 parallel switch capacitor proportional sampling circuits, wherein N is the total number of switch capacitor sub-circuits contained in the strong PUF circuit.

6. A chip comprising a chip body and a PUF circuit provided in the chip body, characterized in that, The PUF circuit is the strong PUF circuit based on the switch capacitor circuit in any one of claims 1-5.

7. The chip of claim 6, wherein, The chip comprises a plurality of strong PUF circuits based on switch capacitor circuits, and each strong PUF circuit based on the switch capacitor circuit corresponds to an output key of 0 or 1, so that all strong PUF circuits based on the switch capacitor circuit jointly combine to output a multi-bit output key.

8. A method of using the strong PUF circuit based on switched capacitor circuit of claim 5, characterized in that, The input excitation is assigned a specified level for each switch capacitor proportional sampling circuit in the N / 2 switch capacitor proportional sampling circuits, the sub-sampling capacitors in the switch capacitor proportional sampling circuit are controlled to be connected to the input excitation or grounded by using an enable signal EN and an inverse signal of the enable signal EN, so as to adjust the attribution of the sub-sampling capacitors in the switch capacitor sub-circuit, change the total sampling capacitors of the N / 2 switch capacitor proportional sampling circuits connected in parallel at the input end of the comparator, and obtain the corresponding output key through the comparator amplification comparison.

9. The method of claim 8, wherein the method further comprises: The input excitation of the specified level is given to each of the N / 2 switch capacitor proportional sampling circuits, and the connection of the sub-sampling capacitor in the switch capacitor proportional sampling circuit to the input excitation or ground is controlled by using the enable signal EN and the inverse signal of the enable signal EN, including: when the input excitation C[2i] of the switch capacitor sub-circuit SC 2i and the input excitation C[2i+1] of the switch capacitor sub-circuit SC 2i+1 are both high, the sub-sampling capacitor C 1N_2i is connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 is connected to the capacitor C1P, the sub-sampling capacitor C 2N_2i is connected to the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 is connected to the total sampling capacitor C2P; when the input excitation C[2i] of the switch capacitor sub-circuit SC 2i and the input excitation C[2i+1] of the switch capacitor sub-circuit SC 2i+1 are both low, the sub-sampling capacitor C 1N_2i is connected to the total sampling capacitor C2N, the sub-sampling capacitor C 1P_2i+1 is connected to the capacitor C2P, the sub-sampling capacitor C 2N_2i is connected to the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 is connected to the total sampling capacitor C1P; when the input excitation C[2i] of the switch capacitor sub-circuit SC 2i is high and the input excitation C[2i+1] of the switch capacitor sub-circuit SC 2i+1 is low, the sub-sampling capacitor C 1N_2i is connected to the total sampling capacitor C2N, the sub-sampling capacitor C 1P_2i+1 is connected to the capacitor C1P, the sub-sampling capacitor C 2N_2i is connected to the total sampling capacitor C1N, and the sub-sampling capacitor C 2P_2i+1 is connected to the total sampling capacitor C2P; when the input excitation C[2i] of the switch capacitor sub-circuit SC 2i is low and the input excitation C[2i+1] of the switch capacitor sub-circuit SC 2i+1 is high, the sub-sampling capacitor C 1N_2i is connected to the total sampling capacitor C1N, the sub-sampling capacitor C 1P_2i+1 is connected to the capacitor C2P, the sub-sampling capacitor C 2N_2i is connected to the total sampling capacitor C2N, and the sub-sampling capacitor C 2P_2i+1 is connected to the total sampling capacitor C1P; wherein the total sampling capacitor C1N refers to the total sampling capacitor to which the switch capacitor sub-circuit SC i of all the switch capacitor proportional sampling circuits SCR 2i connects the input excitation, and the total sampling capacitor C2N refers to the total sampling capacitor to which the switch capacitor sub-circuit SC i switched-capacitor sub-circuit SC 2i total sampling capacitor to ground, total sampling capacitor C1P refers to all switched-capacitor proportional sampling circuits SCR i switched-capacitor sub-circuit SC 2i+1 total sampling capacitor to input stimulus, total sampling capacitor C2P refers to all switched-capacitor proportional sampling circuits SCR i switched-capacitor sub-circuit SC 2i+1 total sampling capacitor to ground.

10. The method of claim 9, wherein the method is applied to a switched-capacitor circuit based strong PUF circuit. The utilization of the enable signal EN and the reverse signal of the enable signal EN controls the connection of the sub-sampling capacitors in the switched-capacitor proportional sampling circuit to the input stimulus or ground, which includes: first setting the enable signal EN to 0, so that all the sub-sampling capacitors are grounded, and the stored charges are all 0; then setting the enable signal EN to 1, so that the strong PUF circuit based on the switched-capacitor circuit enters a charge redistribution state: the upper plates of the total sampling capacitors C1N and C1P are both connected to the input stimulus, and the upper plates of the total sampling capacitors C2N and C2P are both connected to the ground, so that the switched-capacitor proportional sampling circuit SCR i A voltage difference ΔV is introduced between the output ends of the two switched-capacitor sub-circuits PN : In the above formula, VDD is the input excitation, C1N, C1P, C2N and C2P are all total sampling capacitors; When the switched capacitor proportional sampling circuit SCR i Zhongguan capacitor sub-circuit SC 2i When the input excitation C[2i] is 1, the voltage difference ΔV PN The value can be: In the above formula, C 1N_exc_2i is the capacitance value after the total sampling capacitance C1N is removed from the sub-sampling capacitance C 1N_2i , C 1N_2i is the capacitance value of the sub-sampling capacitance C 1N_2i , C 2N_exc_2i is the capacitance value after the total sampling capacitance C2N is removed from the sub-sampling capacitance C 2N_2i , C 2N_2i is the capacitance value of the sub-sampling capacitance C 2N_2i , and the voltage difference ΔV 2i is equal to 0 when the input excitation C[2i] of the sub-capacitance circuit SC PN changes from 1 to 0. Thus implementing a sub-sampling capacitance C 1N_2i and a sub-sampling capacitance C 2N_2i interchange of both with the total sampling capacitance When the input stimulus C[2i+1] of the switched-capacitor proportional sampling circuit SCR i is 1, the voltage difference ΔV 2i takes the value: PN ​ In the above formula, C 2P_exc_2i+1 is the capacitance value after the total sampling capacitor C2P removes the sub-sampling capacitor C 2P_2i+1 ; C 2P_2i+1 is the capacitance value of the sub-sampling capacitor C 2P_2i+1 ; C 1P_exc_2i+1 is the capacitance value after the total sampling capacitor C1P removes the sub-sampling capacitor C 1P_2i+1 ; C 1P_2i+1 is the capacitance value of the sub-sampling capacitor C 1P_2i+1 ; and if the input excitation C[2i] of the off-capacitor sub-circuit SC 2i changes from 1 to 0, the voltage difference ΔV PN takes the value: Thus realizing a sub-sampling capacitance C 2P_2i+1 and a sub-sampling capacitance C 1P_2i+1 both belonging to the total sampling capacitance.

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