Micro-LED epitaxial wafer, preparation method thereof and Micro-LED

By designing a buffer layer in the micro-LED epitaxial wafer and optimizing the growth process of the GaN layer, the problem of poor crystal quality on the planar sapphire substrate was solved, thereby improving the luminous efficiency and yield of the micro-LED.

CN120981046APending Publication Date: 2025-11-18JIANGXI ZHAO CHI SEMICON CO LTD
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Patent Information

Application Number
CN202511153968.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-18
Publication Date
2025-11-18

AI Technical Summary

Technical Problem

Existing techniques for growing GaN on planar sapphire substrates result in poor crystal quality and low luminous efficiency, especially with epitaxial defects having a significant impact at low currents.

Method used

A buffer layer design is adopted, which includes a first AlN layer, a first GaN layer and a second AlN layer stacked in sequence. The thickness ratio of the first AlN layer to the second AlN layer is 1:(0.3~5). The growth process is controlled by physical vapor deposition and metal-organic chemical vapor deposition to optimize the quality of the GaN layer.

Benefits of technology

This improved the luminous efficiency and yield of Micro-LEDs under low current, reduced defect density, and enhanced the crystal quality of GaN materials.

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Abstract

The invention discloses a Micro-LED epitaxial wafer, a preparation method of the Micro-LED epitaxial wafer and a Micro-LED. The Micro-LED epitaxial wafer comprises a sapphire substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the sapphire substrate. Wherein the buffer layer comprises a first AlN layer, a first GaN layer, a second GaN layer and a second AlN layer which are stacked in sequence, the first GaN layer is a two-dimensional growth GaN layer, the second GaN layer is a three-dimensional growth GaN layer, and the thickness ratio of the first AlN layer to the second AlN layer is 1: (0.3-5). By implementing the method, the defect density of epitaxial growth can be controlled, so that the luminous efficiency and the yield of the Micro-LED under low current are improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a Micro-LED epitaxial wafer, a preparation method thereof and a Micro-LED. BACKGROUND

[0002] With the gradual maturity of Micro-LED technology, corresponding terminal products are gradually industrialized. The size of the Micro-LED chip is micron level, and the substrate needs to be peeled off. Moreover, the working current of the Micro-LED chip is extremely small. The current mainstream epitaxial technology is based on growing GaN on a planar sapphire substrate. However, compared with growing GaN on a PSS patterned sapphire substrate, growing GaN directly on a planar sapphire substrate has obvious shortcomings, such as poor crystal quality and low light-emitting efficiency. Especially at extremely small currents, epitaxial defects greatly affect the light-emitting efficiency. SUMMARY

[0003] The technical problem to be solved by the present application is to provide a Micro-LED epitaxial wafer, a preparation method thereof and a Micro-LED, which can control the defect density of epitaxial growth, thereby improving the light-emitting efficiency and yield of the Micro-LED at small currents.

[0004] To solve the above problems, the present application discloses a Micro-LED epitaxial wafer, comprising a sapphire substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the sapphire substrate; wherein the buffer layer comprises a first AlN layer, a first GaN layer, a second GaN layer and a second AlN layer which are sequentially stacked, the first GaN layer is a two-dimensional growth GaN layer, the second GaN layer is a three-dimensional growth GaN layer, and the thickness ratio of the first AlN layer to the second AlN layer is 1:(0.3-5).

[0005] As an improvement of the above technical solution, the thickness of the first AlN layer is 10-30 nm; and the thickness of the second AlN layer is 10-50 nm.

[0006] As an improvement of the above technical solution, the thickness ratio of the first AlN layer to the second AlN layer is 1:(1-1.5).

[0007] As an improvement of the above technical solution, the thickness of the first GaN layer is 15-35 nm; and the thickness of the second GaN layer is 500-2000 nm.

[0008] As the improvement of the above technical scheme, the first AlN layer is formed by physical vapor deposition, the sputtering temperature is 100-300 DEG C, the sputtering power is 1500-3000 W, the sputtering bias is 20-50 V, the atmosphere is Ar, N2 and O2, and the flow ratio of Ar, N2 and O2 is 1:(2-5):(0.01-0.05).

[0009] As the improvement of the above technical scheme, the second AlN layer is formed by physical vapor deposition, the sputtering temperature is 600-800 DEG C, the sputtering power is 3500-5000 W, the sputtering bias is 80-150 V, the atmosphere is Ar, N2 and O2, and the flow ratio of Ar, N2 and O2 is 1:(4-7):(0.05-0.1).

[0010] As the improvement of the above technical scheme, the first GaN layer is formed by metal organic chemical vapor deposition, the growth temperature is 870-920 DEG C, the V / III ratio is 2000-3000, the growth pressure is 50-100 torr, the first sublayer is grown, the temperature is raised to 1050-1100 DEG C, the growth pressure is 200-400 torr, the V / III ratio is 1000-1500, the second sublayer is grown, the temperature is lowered to 780-820 DEG C, the growth pressure is 200-400 torr, and the V / III ratio is 2000-2500.

[0011] As the improvement of the above technical scheme, the second GaN layer is formed by metal organic chemical vapor deposition, the growth temperature is 1000-1200 DEG C, the growth pressure is 100-300 torr, the atmosphere is N2, H2 and NH3, the flow ratio of N2, H2 and NH3 is 1:(3-8):(1-6), and the V / III ratio is 500-1500.

[0012] Correspondingly, the application further discloses a preparation method of the Micro-LED epitaxial wafer.

[0013] Correspondingly, the application further discloses a Micro-LED, which comprises the Micro-LED epitaxial wafer.

[0014] The present application is implemented, and has the following beneficial effects:

[0015] The present application grows a buffer layer on a planar sapphire substrate, which includes a first AlN layer, a first GaN layer, a second GaN layer and a second AlN layer stacked in sequence. Among them, the first GaN layer is two-dimensionally grown, the second GaN layer is three-dimensionally grown, and the first AlN layer and the second AlN layer have a preset thickness ratio. The first AlN layer can improve the defects introduced by growing the first GaN layer directly on the planar sapphire substrate. The second AlN layer is introduced after the three-dimensionally grown second GaN layer, which fills the voids generated by three-dimensional growth, changes the extension direction of defects, reduces the density of defects extending upward, thereby improving the quality of the subsequently grown GaN material, and ultimately improving the light-emitting efficiency and yield of Micro-LED under small current. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a structure schematic diagram of a Micro-LED epitaxial wafer provided by an embodiment of the present application;

[0017] Figure 2 is a preparation method flowchart of a Micro-LED epitaxial wafer provided by an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the present application more clear, the present application is further described in detail below.

[0019] As shown in Figure 1 The present application provides a Micro-LED epitaxial wafer, which includes a sapphire substrate 100, and a buffer layer 200, an undoped GaN layer 300, an N-type GaN layer 400, a stress release layer 500, a multi-quantum well layer 600, an electron blocking layer 700 and a P-type GaN layer 800 stacked in sequence on the sapphire substrate 100; wherein the buffer layer 200 includes a first AlN layer 210, a first GaN layer 220, a second GaN layer 230 and a second AlN layer 240 stacked in sequence, the first GaN layer 220 is a two-dimensionally grown GaN layer, the second GaN layer 230 is a three-dimensionally grown GaN layer, and the thickness ratio of the first AlN layer 210 to the second AlN layer 240 is 1:(0.3-5), for example, 1:0.5, 1:1, 1:2, 1:3 or 1:4, but not limited thereto.

[0020] The patterning of the sapphire substrate 100 and the use of the AlN layer as the nucleation buffer layer 200 can reduce the dislocation density of the subsequently grown GaN thin film, but the processing procedure is complicated, and the crystal quality of the GaN thin film directly grown on the planar sapphire substrate 100 is poor. By using the buffer layer 200 provided in the present application, the growth of the buffer layer 200 can be directly performed on the flat sapphire substrate 100, without the need of patterning the sapphire substrate 100, and the preparation procedure is simple, and the quality of the subsequently epitaxially grown GaN thin film is good. The buffer layer 200 comprises a first AlN layer 210, a first GaN layer 220, a second GaN layer 230 and a second AlN layer 240 which are sequentially stacked. The first GaN layer 220 is two-dimensionally grown, the second GaN layer 230 is three-dimensionally grown, and the first AlN layer 210 and the second AlN layer 240 have a preset thickness ratio. The first AlN layer 210 can improve the defects introduced by the growth of the first GaN layer 220 directly on the planar sapphire substrate 100, and the second AlN layer 240 is introduced after the three-dimensionally grown second GaN layer 230, which fills the cavities generated by the three-dimensional growth, changes the extension direction of the defects, reduces the density of the defects extending upward, thereby improving the quality of the subsequently grown GaN material, and finally improving the light-emitting efficiency and yield of the Micro-LED under small current.

[0021] In an embodiment, the thickness of the first AlN layer 210 is 10 nm to 30 nm, and is exemplarily 12 nm, 15 nm, 18 nm, 20 nm or 25 nm, but is not limited thereto. If the thickness of the first AlN layer 210 is too small, it cannot effectively cover the defects on the substrate surface; if the thickness of the first AlN layer 210 is too large, the substrate is prone to warping due to stress. The thickness of the second AlN layer 240 is 10 nm to 50 nm, and is exemplarily 15 nm, 20 nm, 25 nm, 30 nm or 40 nm, but is not limited thereto. If the thickness of the second AlN layer 240 is too small, the dislocations can penetrate and extend into the GaN thin film; if the thickness of the second AlN layer 240 is too large, additional stress will be introduced.

[0022] In a preferred embodiment, the thickness of the first AlN layer 210 is greater than or equal to the thickness of the second AlN layer 240, and more preferably, the thickness ratio of the first AlN layer 210 to the second AlN layer 240 is 1:(1-1.5). If the thickness ratio of the first AlN layer 210 to the second AlN layer 240 is too large, the tensile stress of the second AlN layer 240 cannot be compensated by the first AlN layer 210, resulting in cracks and interface dislocations extending to the active region; if the thickness ratio of the first AlN layer 210 to the second AlN layer 240 is too small, the dislocations of the second AlN layer 240 will penetrate into the multi-quantum well layer 600.

[0023] In an embodiment, the first GaN layer 220 has a thickness of 15-35 nm, for example 18 nm, 20 nm, 25 nm, 30 nm or 32 nm, but not limited thereto. The second GaN layer 230 has a thickness of 500-2000 nm, for example 800 nm, 1000 nm, 1200 nm, 1500 nm or 1800 nm, but not limited thereto.

[0024] Growth of an AlN layer on a hetero-substrate by MOCVD can block the upward extension of some dislocation defects, but the MOCVD-grown AlN layer has a large dependence on the hetero-substrate. When the lattice mismatch and thermal mismatch between the GaN epitaxial material and the hetero-substrate are large, the blocking effect of the MOCVD-grown AlN buffer layer 200 on dislocation defects is very limited, and it is difficult to fully release the stress on the GaN epitaxial material.

[0025] In an embodiment, the first AlN layer 210 is formed by physical vapor deposition, with a sputtering temperature of 100-300°C, a sputtering power of 1500-3000 W, a sputtering bias of 20-50 V, and an atmosphere of Ar, N2 and O2, with a flow ratio of Ar:N2:O2 of 1:(2-5):(0.01-0.05). A lower sputtering temperature can avoid thermal stress cracking of the substrate caused by high temperature, while ensuring the initial crystallization of AlN, and low power reduces ion bombardment damage, suitable for growth of a nucleation layer, and slight ion bombardment improves film density, the atmosphere is mainly Ar to improve the sputtering rate, and a very small amount of O2 can passivate interface defects. The first AlN layer 210 grown under these conditions can enhance substrate adhesion and relieve lattice mismatch stress.

[0026] In an embodiment, the second AlN layer 240 is formed by physical vapor deposition, with a sputtering temperature of 600-800°C, a sputtering power of 3500-5000 W, a sputtering bias of 80-150 V, and an atmosphere of Ar, N2 and O2, with a flow ratio of Ar:N2:O2 of 1:(4-7):(0.05-0.1). Higher sputtering temperature promotes AlN crystallization, matches the GaN epitaxial temperature, reduces thermal expansion mismatch, high power enhances plasma density, suppresses dislocation extension, high bias induces ion-assisted deposition, enhances film density, turns or annihilates threading dislocations, and very low O2 in the atmosphere can avoid oxygen impurity scattering of carriers. The second AlN layer 240 grown under these conditions can improve the defect filtering and stress regulation capability.

[0027] In an embodiment, the first GaN layer 220 is formed by metal organic chemical vapor deposition, the growth temperature is 870-920℃, the V / III ratio is 2000-3000, the growth pressure is 50-100 torr, the growth atmosphere is N2 and H2, the flow ratio of N2 and H2 is 1:(0.1-0.25), the first sub-layer is grown, the temperature is raised to 1050-1100℃, the growth pressure is 200-400 torr, the V / III ratio is 1000-1500, the growth atmosphere is N2 and H2, the flow ratio of N2 and H2 is 1:(1.5-4), the second sub-layer is grown, the temperature is lowered to 780-820℃, the growth pressure is 200-400 torr, the V / III ratio is 2000-2500, the growth atmosphere is NH3 and H2, the flow ratio of NH3 and H2 is 1:(0.1-0.2), and the third sub-layer is grown. The first sub-layer is a low-temperature nucleation stage, the lower growth temperature can promote high-density nucleation, avoid 3D island growth, the higher can inhibit Ga droplet formation, the low pressure can enhance surface mobility, N2 is the main atmosphere, the etching risk of H2 to the first AlN layer 210 is reduced, a continuous and non-porous first sub-layer is formed, and a template is provided for subsequent high-temperature growth. The higher temperature of the second sub-layer can promote dislocation annihilation and grain coalescence, specifically, the temperature raising rate is 10-20℃ / min, and the higher V / III ratio can balance the growth rate and crystal quality. The higher pressure can enhance lateral growth and reduce defects. H2 is the main atmosphere, which can improve surface mobility and promote step-flow growth. A thicker second sub-layer with low defect density and high crystalline quality is obtained. The third sub-layer is obtained by slow cooling, specifically, the cooling rate is 5-10℃ / min, a higher V / III ratio is maintained to prevent GaN surface decomposition. The pressure is maintained to avoid stress introduced by sudden pressure changes. The third sub-layer can release thermal stress and reduce cracks. Through the segmented process of warm nucleation, high-temperature growth and slow annealing, combined with dynamic gas ratio and pressure regulation, a high-quality two-dimensional GaN layer is obtained on the first AlN layer 210.

[0028] In an embodiment, the second GaN layer 230 is formed by metal organic chemical vapor deposition, the growth temperature is 1000-1200℃, the growth pressure is 100-300 torr, the atmosphere is N2, H2 and NH3, the flow ratio of N2, H2 and NH3 is 1:(3-8):(1-6), and the V / III ratio is 500-1500.

[0029] The non-doped GaN layer 300 is a GaN layer without intentional doping, and the thickness is 800-1200 nm.

[0030] The N-type GaN layer 400 can be a Si-doped GaN layer with a thickness of 1000nm-3000nm and a Si doping concentration of 1*10 19 cm -3 -5*10 19 cm -3 .

[0031] The stress release layer 500 comprises periodically and alternately stacked InGaN stress release layers and GaN stress release layers, with an alternately stacked period of 2-10; in each period, the thickness of the InGaN stress release layer is 1nm-3nm, and the thickness of the GaN stress release layer is 15nm-30nm.

[0032] The multi-quantum well layer 600 comprises periodically and alternately stacked InGaN quantum well layers and GaN quantum barrier layers, with an alternately stacked period of 6-14; in each period, the thickness of the InGaN quantum well layer is 2nm-4nm, and the thickness of the GaN quantum barrier layer is 8nm-12nm.

[0033] The electron blocking layer 700 comprises periodically and alternately stacked AlGaN electron blocking layers and GaN electron blocking layers, with an alternately stacked period of 2-10; in each period, the thickness of the AlGaN electron blocking layer is 2nm-4nm, and the thickness of the GaN electron blocking layer is 8nm-12nm.

[0034] The P-type GaN layer 800 can be a Mg-doped GaN layer with a thickness of 10nm-50nm and a Mg doping concentration of 1*10 19 cm -3 -1*10 21 cm -3 A too high Mg doping concentration will damage the crystal quality, and a too low Mg doping concentration will affect the hole concentration.

[0035] Correspondingly, as shown in Figure 2 the application further discloses a preparation method of the Micro-LED epitaxial wafer.

[0036] S1, providing a sapphire substrate.

[0037] S2, sequentially growing a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer on the sapphire substrate; wherein the buffer layer comprises a first AlN layer, a first GaN layer, a second GaN layer and a second AlN layer which are sequentially stacked, the first GaN layer is a two-dimensional growth GaN layer, the second GaN layer is a three-dimensional growth GaN layer, and the thickness ratio of the first AlN layer to the second AlN layer is 1:(0.3-5).

[0038] Correspondingly, the application further discloses a Micro-LED, which comprises the Micro-LED epitaxial wafer.

[0039] The application will be further described in the following specific embodiments:

[0040] Embodiment 1

[0041] The embodiment provides a Micro-LED epitaxial wafer, which comprises a substrate, and a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate. The buffer layer comprises a first AlN layer, a first GaN layer, a second GaN layer and a second AlN layer which are sequentially stacked, the first GaN layer is two-dimensionally grown, the second GaN layer is three-dimensionally grown, the thickness of the first AlN layer is 20 nm, the thickness of the first GaN layer is 30 nm, the thickness of the second GaN layer is 1000 nm, and the thickness of the second AlN layer is 25 nm.

[0042] Embodiment 2

[0043] The embodiment provides a Micro-LED epitaxial wafer, which is different from the embodiment 1 in that the thickness of the first AlN layer is 5 nm, and the thickness of the second AlN layer is 25 nm.

[0044] The rest is the same as the embodiment 1.

[0045] Embodiment 3

[0046] The embodiment provides a Micro-LED epitaxial wafer, which is different from the embodiment 1 in that the thickness of the first AlN layer is 10 nm, and the thickness of the second AlN layer is 25 nm.

[0047] The rest is the same as the embodiment 1.

[0048] Embodiment 4

[0049] The embodiment provides a Micro-LED epitaxial wafer, which is different from the embodiment 1 in that the thickness of the first AlN layer is 30 nm, and the thickness of the second AlN layer is 25 nm.

[0050] The rest is the same as the embodiment 1.

[0051] Embodiment 5

[0052] The embodiment provides a Micro-LED epitaxial wafer, which is different from the embodiment 1 in that the thickness of the first AlN layer is 35 nm, and the thickness of the second AlN layer is 25 nm.

[0053] The rest is the same as the embodiment 1.

[0054] Example 6

[0055] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 10 nm.

[0056] The rest are the same as example 1.

[0057] Example 7

[0058] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 20 nm.

[0059] The rest are the same as example 1.

[0060] Example 8

[0061] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 30 nm.

[0062] The rest are the same as example 1.

[0063] Example 9

[0064] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 40 nm.

[0065] The rest are the same as example 1.

[0066] Example 10

[0067] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 50 nm.

[0068] The rest are the same as example 1.

[0069] Example 11

[0070] The present example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 60 nm.

[0071] The rest are the same as example 1.

[0072] Comparative Example 1

[0073] The present comparative example provides a Micro-LED epitaxial wafer, which is different from example 1 in that no first AlN layer and second AlN layer are arranged, and correspondingly, the preparation method does not include the preparation of the first AlN layer and the second AlN layer. The rest are the same as example 1.

[0074] Comparative example 2

[0075] The present comparative example provides a Micro-LED epitaxial wafer, which is different from example 1 in that the thickness of the first AlN layer is 20 nm, and the thickness of the second AlN layer is 5 nm.

[0076] The rest are the same as example 1.

[0077] Example 1~Example 11 and Comparative Example 1 are detected, the epitaxial wafer is made into a Micro-LED chip, the size is 10 μm x 15 μm, the test current is 2 μA, and the light emitting efficiency improvement percentage of example 1~example 11 relative to comparative example 1 is calculated, and the specific results are as follows:

[0078]

[0079] The above is the preferred embodiment of the application. It should be noted that those skilled in the art can make several improvements and refinements without departing from the principles of the application. These improvements and refinements are also considered within the scope of protection of the application.

Claims

1. A Micro-LED epitaxial wafer, characterized in that, The invention includes a sapphire substrate, and a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the sapphire substrate; wherein the buffer layer includes a first AlN layer, a first GaN layer, a second GaN layer, and a second AlN layer sequentially stacked, the first GaN layer being a two-dimensional GaN layer, the second GaN layer being a three-dimensional GaN layer, and the thickness ratio of the first AlN layer to the second AlN layer being 1:(0.3~5).

2. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The thickness of the first AlN layer is 10nm to 30nm; the thickness of the second AlN layer is 10nm to 50nm.

3. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The thickness ratio of the first AlN layer to the second AlN layer is 1:(1~1.5).

4. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The thickness of the first GaN layer is 15nm to 35nm; the thickness of the second GaN layer is 500nm to 2000nm.

5. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The first AlN layer was formed by physical vapor deposition, with a sputtering temperature of 100℃~300℃, a sputtering power of 1500W~3000W, a sputtering bias of 20V~50V, and an atmosphere of Ar, N2 and O2, with a flow ratio of Ar, N2 and O2 of 1:(2~5):(0.01~0.05).

6. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The second AlN layer was formed by physical vapor deposition at a sputtering temperature of 600℃ to 800℃, a sputtering power of 3500W to 5000W, a sputtering bias of 80V to 150V, and an atmosphere of Ar, N2, and O2 with a flow ratio of 1:(4 to 7):(0.05 to 0.1).

7. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The first GaN layer is formed by metal-organic chemical vapor deposition at a growth temperature of 870℃~920℃, a V / III ratio of 2000~3000, and a growth pressure of 50 torr~100 torr. The first sublayer is then grown at a temperature of 1050℃~1100℃, a growth pressure of 200 torr~400 torr, and a V / III ratio of 1000~1500. The second sublayer is then grown at a temperature of 780℃~820℃, a growth pressure of 200 torr~400 torr, and a V / III ratio of 2000~2500. The third sublayer is then grown.

8. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The second GaN layer is formed by metal-organic chemical vapor deposition at a growth temperature of 1000℃~1200℃ and a growth pressure of 100 torr~300 torr. The atmosphere consists of N2, H2 and NH3, with a flow ratio of N2, H2 and NH3 of 1:(3~8):(1~6) and a V / III ratio of 500~1500.

9. A method for preparing a Micro-LED epitaxial wafer as described in any one of claims 1 to 8, characterized in that, Includes the following steps: A sapphire substrate is provided, on which a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type GaN layer are sequentially grown; wherein, the buffer layer comprises a first AlN layer, a first GaN layer, a second GaN layer, and a second AlN layer stacked sequentially, the first GaN layer being a two-dimensional GaN layer, the second GaN layer being a three-dimensional GaN layer, and the thickness ratio of the first AlN layer to the second AlN layer being 1:(0.3~5).

10. A Micro-LED, characterized in that, The Micro-LED includes a Micro-LED epitaxial wafer as described in any one of claims 1 to 8.

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