Epitaxial wafer and preparation method thereof

Abstract

The invention discloses an epitaxial wafer and a preparation method thereof, and relates to the technical field of semiconductor manufacturing. The preparation method of the epitaxial wafer comprises the following steps: introducing a first carrier gas, a first carbon source and a first silicon source into a reaction cavity so as to form an epitaxial layer on one side, far away from a base, of a substrate; wherein the substrate comprises a first area, a second area and a third area, the second area is arranged around the first area, and the third area is arranged around the second area; the flow ratio of the first carrier gas in the first area, the second area and the third area is (50-70): (10-18): (25-40). According to the invention, the flow of the first carrier gas introduced when the epitaxial layer is formed is controlled in a partitioned manner, and the thickness of the epitaxial layer in each region can be adjusted, so that the thickness uniformity of the epitaxial layer is improved, and the thickness uniformity of the epitaxial wafer is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to an epitaxial wafer and its preparation method. Background Technology

[0002] Silicon carbide (SiC) is a high-performance semiconductor material with outstanding advantages such as a large bandgap, high thermal conductivity, high breakdown field strength, high electron saturation drift velocity, high temperature resistance, and radiation resistance. In recent years, it has been widely used in important fields such as new energy vehicles, photovoltaic power generation, 5G communication, smart grids, and national defense.

[0003] Currently, chemical vapor deposition is commonly used to prepare silicon carbide epitaxial layers, resulting in epitaxial wafers with uniform thickness. Summary of the Invention

[0004] The purpose of this application is to provide a method for preparing an epitaxial wafer that can improve the thickness uniformity of the prepared epitaxial wafer; another purpose of this application is to provide an epitaxial wafer with good thickness uniformity.

[0005] The first aspect of this application provides a method for preparing an epitaxial wafer, comprising:

[0006] A first carrier gas, a first carbon source, and a first silicon source are introduced into the reaction chamber to form an epitaxial layer on the side of the substrate away from the base.

[0007] The substrate includes a first region, a second region, and a third region, wherein the second region surrounds the first region and the third region surrounds the second region;

[0008] The flow rate ratio of the first carrier gas in the first region, the second region, and the third region is (50-70):(10-18):(25-40).

[0009] In some embodiments, during the formation of the epitaxial layer on the side of the substrate away from the base, a first doping source is also introduced into the reaction chamber, and the flow rate ratio of the first doping source in the first region, the second region and the third region is (110-150):(40-60):(3-20).

[0010] In some implementations, the first region is circular, and the second and third regions are annular;

[0011] The substrate has a radius R, and the first region has a radius r, satisfying: 6 / 10 ≤ r / R ≤ 7 / 10;

[0012] The second region has a width L1, satisfying: 0.5 / 10 ≤ L1 / R ≤ 1.5 / 10;

[0013] The third region has a width L2, which satisfies: 1.5 / 10 ≤ L2 / R ≤ 3.5 / 10.

[0014] In some embodiments, the fabrication method further includes forming an epitaxial layer on the side of the substrate away from the pedestal before:

[0015] A second carrier gas, a second carbon source, and a second silicon source are introduced into the reaction chamber to form a buffer layer on the substrate;

[0016] The flow rate ratio of the second carrier gas in the first region, the second region, and the third region is (50-70):(10-18):(25-40); after the buffer layer is formed, the epitaxial layer is formed on the side of the buffer layer away from the substrate.

[0017] In some embodiments, during the formation of a buffer layer on the side of the substrate away from the base, a second doping source is also introduced into the reaction chamber, and the flow rate ratio of the second doping source in the first region, the second region and the third region is (30-80):(20-40):(2-20).

[0018] In some embodiments, the flow rate of the first carrier gas is 120–170 slm.

[0019] In some embodiments, the flow rate of the first doped source is 210–270 sccm.

[0020] In some embodiments, the flow rate of the first carbon source is 200–300 sccm.

[0021] In some embodiments, the flow rate of the first silicon source is 650–750 sccm.

[0022] In some embodiments, the flow rate of the second carrier gas is 120–170 slm.

[0023] In some embodiments, the flux of the second doped source is 135–195 sccm.

[0024] In some embodiments, the flow rate of the second carbon source is 20–80 sccm.

[0025] In some embodiments, the flow rate of the second silicon source is 100–200 sccm.

[0026] In some embodiments, the first carbon source includes a first carbon element, the first silicon source includes a first silicon element, and the atomic ratio of the first carbon element to the first silicon element is a first carbon-silicon ratio M1; the second carbon source includes a second carbon element, the second silicon source includes a second silicon element, and the atomic ratio of the first carbon element to the first silicon element is a second carbon-silicon ratio M2.

[0027] The first carbon-silicon ratio M1 and the second carbon-silicon ratio M2 satisfy: M2 <M1。

[0028] In some embodiments, the first carbon-silicon ratio M1 satisfies: 0.8 ≤ M1 ≤ 1.0.

[0029] In some embodiments, the second carbon-silicon ratio M2 satisfies: 0.4 ≤ M2 ≤ 0.6.

[0030] In some embodiments, the fabrication method further includes forming a buffer layer on the side of the substrate away from the base before:

[0031] The temperature of the reaction chamber is lowered from the first temperature T1 to the second temperature T2;

[0032] The substrate is placed in the reaction chamber and kept still.

[0033] The reaction chamber is heated from the second temperature T2 to the third temperature T3;

[0034] Etching gas is introduced into the reaction chamber to etch the substrate.

[0035] In some embodiments, after forming an epitaxial layer on the side of the substrate away from the pedestal, the fabrication method further includes:

[0036] The temperature of the reaction chamber is reduced from the third temperature T3 to the second temperature T2.

[0037] In some embodiments, the first temperature T1, the second temperature T2, and the third temperature T3 satisfy: T2 <T1<T3。

[0038] In some implementations, the first temperature T1 satisfies: 850℃≤T1≤950℃.

[0039] In some embodiments, the second temperature T2 satisfies: 550℃≤T2≤650℃.

[0040] In some embodiments, the third temperature T3 satisfies: 1580℃≤T3≤1650℃.

[0041] In some embodiments, the temperature of the reaction chamber is cooled from a first temperature T1 to a second temperature T2 within a first cooling time, and the first cooling time is 3 to 5 minutes.

[0042] In some embodiments, the reaction chamber is heated from the second temperature T2 to the third temperature T3 within a first heating time, and the first heating time is 15 to 18 minutes.

[0043] In some embodiments, the settling time is 1 to 3 minutes.

[0044] In some embodiments, during the process of introducing etching gas into the reaction chamber, the flow rate of the etching gas is 120-170 slm, and the pressure of the reaction chamber is 80-120 mbar.

[0045] In some embodiments, the etching process takes 5 to 15 minutes.

[0046] In some embodiments, during the second cooling time, the temperature of the reaction chamber is cooled from the third temperature T3 to the second temperature T2, and the second cooling time is 15 to 18 minutes.

[0047] A second aspect of this application provides an epitaxial wafer, prepared using the epitaxial wafer preparation method described above, the epitaxial wafer comprising:

[0048] Substrate;

[0049] A buffer layer, the buffer layer being located on one side of the substrate;

[0050] An epitaxial layer is located on the side of the buffer layer opposite to the substrate.

[0051] In some embodiments, the thickness uniformity of the epitaxial layer is 1.3% to 2.0%.

[0052] In some embodiments, the carrier concentration uniformity of the epitaxial layer is 2.5% to 4.0%.

[0053] In some embodiments, the thickness of the substrate is 330–380 μm.

[0054] In some embodiments, the thickness of the buffer layer is 0.5 to 2.0 μm.

[0055] In some embodiments, the thickness of the epitaxial layer is 10.0 to 11.5 μm.

[0056] The beneficial effects of this application are as follows:

[0057] This application provides a method for preparing an epitaxial wafer, comprising: introducing a first carrier gas, a first carbon source, and a first silicon source into a reaction chamber to form an epitaxial layer on a side of a substrate away from the base; wherein the substrate includes a first region, a second region, and a third region, the second region surrounding the first region, and the third region surrounding the second region; the flow rate ratio of the first carrier gas in the first region, the second region, and the third region is (50-70):(10-18):(25-40). This application, by controlling the flow rate of the first carrier gas introduced during the formation of the epitaxial layer in different zones, can adjust the thickness of the epitaxial layer in each region, thereby improving the thickness uniformity of the epitaxial layer and consequently improving the thickness uniformity of the epitaxial wafer. Attached Figure Description

[0058] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0059] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0060] Figure 1 This is a schematic diagram of the structure of the epitaxial wafer provided in this application;

[0061] Figure 2 This is a schematic diagram of the substrate structure provided in this application;

[0062] Figure 3 A schematic diagram of the gas outlet pipeline of the epitaxial furnace provided in this application;

[0063] Figure 4 A point diagram provided in this application for testing the uniformity of epitaxial layer thickness;

[0064] Figure 5 This is a thickness test trend diagram of the epitaxial wafers provided in Embodiments 1-2 of this application;

[0065] Figure 6 The carrier concentration test trend graphs of the epitaxial wafers provided in Examples 1-2 of this application;

[0066] Explanation of reference numerals in the attached figures:

[0067] 10. Substrate; 101. First region; 102. Second region; 103. Third region; 20. Epitaxial layer; 30. Buffer layer; 40. Gas outlet pipeline; 401. Main gas outlet pipeline; 402. First gas outlet bypass; 403. Second gas outlet bypass. Detailed Implementation

[0068] The technical solutions of this application will be clearly and completely described below with reference to the embodiments and accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Various embodiments of this application may exist in the form of a range; it should be understood that the description in the form of a range is only for convenience and conciseness, and should not be construed as a hard limitation on the scope of this application; therefore, it should be considered that the range description has specifically disclosed all possible sub-ranges and the single numerical value within that range. For example, it should be considered that the range description from 1 to 6 has specifically disclosed sub-ranges, such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., and the single digits within the range, such as 1, 2, 3, 4, 5, and 6, which applies regardless of the range. In addition, whenever a numerical range is indicated herein, it means including any referenced number (fraction or integer) within the indicated range.

[0069] like Figure 1 and Figure 2 As shown, the first aspect of this application provides a method for preparing an epitaxial wafer, comprising:

[0070] A first carrier gas, a first carbon source, and a first silicon source are introduced into the reaction chamber to form an epitaxial layer 20 on the side of the substrate 10 away from the base.

[0071] The substrate 10 includes a first region 101, a second region 102 and a third region 103, wherein the second region 102 is disposed around the first region 101 and the third region 103 is disposed around the second region 102.

[0072] The flow rate ratio of the first carrier gas in the first region 101, the second region 102, and the third region 103 is (50-70):(10-18):(25-40). Specifically, the flow rate ratio of the first carrier gas in the first region 101, the second region 102, and the third region 103 can be any one ratio or any two ratios from 50:10:25, 50:18:40, 60:15:30, 70:10:25, and 70:18:25.

[0073] Understandably, a base is provided in the reaction chamber to support the substrate 10. In the process of preparing the epitaxial wafer, the substrate 10 is placed on the base, and then the first carbon source and the first silicon source react on the side of the substrate 10 away from the base to form the epitaxial layer 20. This application can adjust the thickness of the epitaxial layer 20 in each region by controlling the flow rate of the first carrier gas introduced during the formation of the epitaxial layer 20, thereby improving the thickness uniformity of the epitaxial layer 20 and thus improving the thickness uniformity of the epitaxial wafer.

[0074] like Figure 3 As shown, in some embodiments, the reaction chamber is located in an epitaxial furnace, which also has a gas outlet pipe 40 connected to the reaction chamber. The gas outlet pipe 40 has multiple gas outlet holes and includes a main gas outlet pipe 401, a first gas outlet bypass pipe 402, and a second gas outlet bypass pipe 403. The first gas outlet bypass pipe 402 is located on both sides of the main gas outlet pipe 401, and the second gas outlet bypass pipe 403 is located on the side of the first gas outlet bypass pipe 402 away from the main gas outlet pipe 401. The main gas outlet pipe 401 is correspondingly arranged with the first region 101, the first gas outlet bypass pipe 402 is correspondingly arranged with the second region 102, and the second gas outlet bypass pipe 403 is correspondingly arranged with the third region 103.

[0075] It is understandable that by controlling the flow rate of the first carrier gas in the main outlet 401, the flow rate of the first carrier gas in the first region 101 can be controlled; by controlling the flow rate of the first carrier gas in the first outlet bypass 402, the flow rate of the first carrier gas in the second region 102 can be controlled; and by controlling the flow rate of the first carrier gas in the second outlet bypass 403, the flow rate of the first carrier gas in the third region 103 can be controlled. Since the gas has fluidity, the first carrier gas will mix with each other at the boundaries of the first region 101, the second region 102, and the third region 103.

[0076] In some embodiments, during the formation of the epitaxial layer 20 on the side of the substrate 10 away from the base, a first dopant source is also introduced into the reaction chamber. The flow rate ratio of the first dopant source in the first region 101, the second region 102, and the third region 103 is (110-150):(40-60):(3-20). The flow rate ratio of the first dopant source in the first region 101, the second region 102, and the third region 103 can be any one ratio or any combination of two ratios from 150:45:10, 140:50:15, 110:50:10, 130:40:3, and 140:40:5.

[0077] It is understood that by controlling the flow rate of the first doped source introduced during the formation of the epitaxial layer 20, this application can adjust the doping concentration of the first doped source in each region, thereby improving the uniformity of the carrier concentration of the epitaxial layer 20 and thus improving the uniformity of the carrier concentration of the epitaxial wafer.

[0078] Similarly, by controlling the flow rate of the first dopant source in the main outlet 401, the flow rate of the first dopant source in the first region 101 can be controlled; by controlling the flow rate of the first dopant source in the first outlet bypass 402, the flow rate of the first dopant source in the second region 102 can be controlled; and by controlling the flow rate of the first dopant source in the second outlet bypass 403, the flow rate of the first dopant source in the third region 103 can be controlled. Since the gas is fluid, the first dopant source will mix with each other at the boundaries of the first region 101, the second region 102, and the third region 103.

[0079] In some embodiments, the first region 101 is circular, and the second region 102 and the third region 103 are annular; the substrate 10 has a radius R, the first region 101 has a radius r, satisfying: 6 / 10≤r / R≤7 / 10; the second region 102 has a width L1, satisfying: 0.5 / 10≤L1 / R≤1.5 / 10; the third region 103 has a width L2, satisfying: 1.5 / 10≤L2 / R≤3.5 / 10. Specifically, the value of r / R can be any one of 6 / 10, 6.5 / 10, 7 / 10, or any range of any two ratios; the value of L1 / R can be any one of 0.5 / 10, 1 / 10, 1.5 / 10, or any range of any two ratios; and the value of L2 / R can be any one of 1.5 / 10, 2 / 10, 2.5 / 10, 3 / 10, 3.5 / 10, or any range of any two ratios.

[0080] It is understood that the substrate 10 is circular in shape with a radius of R. The first region 101 is also circular in shape, with the geometric centers of the substrate 10 and the first region 101 coinciding, meaning they are concentric circles. The second region 102 is an annular shape, surrounding the first region 101. The third region 103 is also an annular shape, surrounding the second region 102. The radius of the first region 101 is r, satisfying: 6 / 10 ≤ r / R ≤ 7 / 10. The width of the second region 102 is L1, satisfying: 0.5 / 10 ≤ L1 / R ≤ 1.5 / 10. The width of the third region 103 is L2, satisfying: 1.5 / 10 ≤ L2 / R ≤ 3.5 / 10. This configuration can improve the thickness uniformity and carrier concentration uniformity of the epitaxial layer 20, thereby improving the thickness uniformity and carrier concentration uniformity of the epitaxial wafer.

[0081] In some embodiments, the fabrication method further includes, before forming the epitaxial layer 20 on the side of the substrate 10 away from the pedestal:

[0082] A second carrier gas, a second carbon source, and a second silicon source are introduced into the reaction chamber to form a buffer layer 30 on the substrate 10.

[0083] Among them, the flow rate ratios of the second carrier gas in the first region 101, the second region 102, and the third region 103 are (50 - 70):(10 - 18):(25 - 40); after forming the buffer layer 30, an epitaxial layer 20 is formed on the side of the buffer layer 30 away from the substrate 10.

[0084] Specifically, the flow rate ratios of the second carrier gas in the first region 101, the second region 102, and the third region 103 can be any one ratio or the range composed of any two ratios among 50:10:25, 50:18:40, 60:15:30, 70:10:25, and 70:18:25.

[0085] It can be understood that in this application, by controlling the flow rate of the second carrier gas introduced when forming the buffer layer 30 in different regions, the thickness of the buffer layer 30 in each region can be adjusted, thereby improving the thickness uniformity of the buffer layer 30, and further improving the thickness uniformity of the epitaxial wafer.

[0086] In some embodiments, during the process of forming the buffer layer 30 on the side of the substrate 10 away from the pedestal, a second doping source is also introduced into the reaction chamber. The flow rate ratios of the second doping source in the first region 101, the second region 102, and the third region 103 are (30 - 80):(20 - 40):(2 - 20). Specifically, the flow rate ratios of the second doping source in the first region 101, the second region 102, and the third region can be any one ratio or the range composed of any two ratios among 30:28:20, 35:30:15, 45:35:20, 50:30:5, 70:30:5, and 80:30:2.

[0087] It can be understood that in this application, by controlling the flow rate of the second doping source introduced when forming the buffer layer 30 in different regions, the doping concentration of the second doping source in each region can be adjusted, thereby improving the carrier concentration uniformity of the buffer layer 30, and further improving the carrier concentration uniformity of the epitaxial wafer.

[0088] In some embodiments, the first carbon source includes a first carbon element, the first silicon source includes a first silicon element, the atomic number ratio of the first carbon element to the first silicon element is the first carbon-silicon ratio M1, the second carbon source includes a second carbon element, the second silicon source includes a second silicon element, the atomic number ratio of the first carbon element to the first silicon element is the second carbon-silicon ratio M2, and the first carbon-silicon ratio M1 and the second carbon-silicon ratio M2 satisfy: M2 < M1.

[0089] It can be understood that the epitaxial layer 20 has a first carbon-silicon ratio M1, and the buffer layer 30 has a second carbon-silicon ratio M2. By controlling the growth processes of the epitaxial layer 20 and the buffer layer 30, making the first carbon-silicon ratio M1 and the second carbon-silicon ratio M2 satisfy: M2 < M1, the growth rate of the epitaxial layer 20 can be adjusted, thereby controlling the thickness of the epitaxial layer 20, and further improving the crystal quality.

[0090] In some implementations, the first carbon-silicon ratio M1 satisfies: 0.8 ≤ M1 ≤ 1.0. Specifically, the first carbon-silicon ratio M1 can be any one or a range of any two of the following: 0.8, 0.85, 0.9, 0.95, and 1.0.

[0091] It is understandable that the epitaxial layer 20 has a high carbon-to-silicon ratio, which means that the carbon content in the epitaxial layer 20 is relatively high, while the silicon content is relatively low. This can improve the uniformity of the doping concentration of the epitaxial layer 20, thereby improving the crystal quality.

[0092] In some implementations, the second carbon-silicon ratio M2 satisfies: 0.4 ≤ M2 ≤ 0.6. Specifically, the second carbon-silicon ratio M2 can be any one or a range of any two of the following: 0.4, 0.45, 0.5, 0.55, and 0.6.

[0093] Understandably, the buffer layer 30 provides a flat surface during epitaxial growth, reducing stress and defects in the substrate 10. The buffer layer 30 has a low carbon-to-silicon ratio, which means that the silicon content in the buffer layer 30 is relatively high, while the carbon content is relatively low. This can improve the uniformity of the doping concentration of the buffer layer 30, thereby improving the crystal quality.

[0094] In some embodiments, the flow rate of the first carrier gas is 120 to 170 slm. Specifically, the flow rate of the first carrier gas can be any one or a range of any two of the following values: 120 slm, 130 slm, 140 slm, 150 slm, 160 slm, and 170 slm.

[0095] It is understandable that the first carrier gas introduced when forming the epitaxial layer 20 is distributed in flow through the main outlet 401, the first outlet bypass 402, and the second outlet bypass 403.

[0096] In some implementations, the first carrier gas is selected from hydrogen.

[0097] In some embodiments, the flux of the first doped source is 210 to 270 sccm. Specifically, the flux of the first doped source can be any one or a range of any two of the following values: 210 sccm, 220 sccm, 230 sccm, 240 sccm, 250 sccm, 260 sccm, and 270 sccm.

[0098] It is understandable that the first doping source introduced when forming the epitaxial layer 20 is distributed through the main exhaust path 401, the first exhaust bypass 402, and the second exhaust bypass 403.

[0099] In some implementations, the first doping source is selected from an n-type doping source or a p-type doping source.

[0100] In some implementations, the n-type dopant source is selected from nitrogen (N2) or ammonia (NH3).

[0101] In some implementations, the p-type dopant source is selected from trimethylaluminum (TMA).

[0102] In some embodiments, the flow rate of the first carbon source is 200–300 sccm. Specifically, the flow rate of the first carbon source can be any one or a range of any two of the following values: 200 sccm, 220 sccm, 240 sccm, 260 sccm, 280 sccm, and 300 sccm.

[0103] In some embodiments, the flow rate of the first silicon source is 650–750 sccm. Specifically, the flow rate of the first silicon source can be any one or a range of any two values ​​selected from 650 sccm, 660 sccm, 670 sccm, 680 sccm, 690 sccm, 700 sccm, 710 sccm, 720 sccm, 730 sccm, 740 sccm, and 750 sccm.

[0104] In some embodiments, the first carbon source is selected from at least one of ethylene, acetylene, methane, and propane.

[0105] In some embodiments, the first silicon source is selected from at least one of silanes or silane derivatives.

[0106] In some embodiments, the silane derivative is selected from at least one of dichlorosilane, trichlorosilane, and tetrachlorosilane.

[0107] In some embodiments, the flow rate of the second carrier gas is 120 to 170 slm. Specifically, the flow rate of the first carrier gas can be any one or any two of the following values: 120 slm, 130 slm, 140 slm, 150 slm, 160 slm, and 170 slm.

[0108] It is understandable that the second carrier gas introduced when the buffer layer 30 is formed is distributed in flow through the main outlet 401, the first outlet bypass 402 and the second outlet bypass 403.

[0109] In some implementations, the second carrier gas is selected from hydrogen.

[0110] In some implementations, the flux of the second doping source is 135–195 sccm. Specifically, the flux of the first doping source can be any one or any two of the following values: 135 sccm, 145 sccm, 155 sccm, 165 sccm, 175 sccm, 185 sccm, and 195 sccm.

[0111] It is understandable that the second doping source introduced when the buffer layer 30 is formed is distributed in flow through the main outlet 401, the first outlet bypass 402 and the second outlet bypass 403.

[0112] In some implementations, the second doping source is selected from an n-type doping source or a p-type doping source.

[0113] In some implementations, the n-type dopant source is selected from nitrogen (N2) or ammonia (NH3).

[0114] In some implementations, the p-type dopant source is selected from trimethylaluminum (TMA).

[0115] In some embodiments, the flow rate of the second carbon source is 20 to 80 sccm. Specifically, the flow rate of the second carbon source can be any one or any two of the following values: 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, and 80 sccm.

[0116] In some implementations, the flow rate of the second silicon source is 100 to 200 sccm. Specifically, the flow rate of the second silicon source can be any one or any two of the following values: 100 sccm, 120 sccm, 140 sccm, 160 sccm, 180 sccm, and 200 sccm.

[0117] In some embodiments, the second carbon source is selected from at least one of ethylene, acetylene, methane, and propane.

[0118] In some embodiments, the second silicon source is selected from at least one of silanes or silane derivatives.

[0119] In some embodiments, the silane derivative is selected from at least one of dichlorosilane, trichlorosilane, and tetrachlorosilane.

[0120] In some implementations, the first carbon source and the second carbon source may be the same or different.

[0121] In some implementations, the first silicon source and the second silicon source may be the same or different.

[0122] In some implementations, the first doping source and the second doping source may be the same or different.

[0123] In some embodiments, the fabrication method further includes, before forming the buffer layer 30 on the side of the substrate 10 away from the base:

[0124] The temperature of the reaction chamber is lowered from the first temperature T1 to the second temperature T2;

[0125] Place the substrate 10 in the reaction chamber and keep it stationary;

[0126] The reaction chamber is heated from the second temperature T2 to the third temperature T3;

[0127] Etching gas is introduced into the reaction chamber to etch the substrate 10.

[0128] It is understandable that by cooling the temperature of the reaction chamber from the first temperature T1 to the second temperature T2, and placing the substrate 10 in the reaction chamber and keeping it stationary, the warpage of the substrate 10 can be improved by reducing the transfer temperature and allowing the substrate 10 to remain stationary to adapt to the chamber temperature, thereby improving the warpage of the epitaxial wafer. By etching the substrate 10, the contact surface between the substrate 10 and the buffer layer 30 can be cleaned and improved, thereby reducing the defect density and improving the crystal quality.

[0129] In some implementations, the etching gas is selected from hydrogen.

[0130] In some embodiments, after forming the epitaxial layer 20 on the side of the substrate 10 away from the base, the preparation method further includes cooling the temperature of the reaction chamber from a third temperature T3 to a second temperature T2.

[0131] It is understandable that after the epitaxial layer 20 is formed, the temperature of the reaction chamber is lowered from the third temperature T3 to the second temperature T2, which reduces the wafer transfer temperature and can improve the warpage of the substrate 10, thereby improving the warpage of the epitaxial wafer.

[0132] In some implementations, the first temperature T1, the second temperature T2, and the third temperature T3 satisfy: T2 <T1<T3。

[0133] It is understandable that by cooling the temperature of the reaction chamber from the first temperature T1 to the second temperature T2, that is, from the initial standby temperature to the second temperature T2, and then raising the temperature from the second temperature T2 to the third temperature T3, that is, from the second temperature T2 to the etching temperature and growth temperature, and finally after the epitaxial layer 20 is formed, cooling the temperature of the reaction chamber from the third temperature T3 to the second temperature T2, the wafer transfer temperature is reduced, which can improve the warpage of the substrate 10, thereby improving the warpage of the epitaxial wafer.

[0134] In some implementations, the first temperature T1 satisfies: 850℃≤T1≤950℃. Specifically, the value of T1 can be any one or any two of the following values: 850℃, 850℃, 870℃, 880℃, 890℃, 900℃, 910℃, 920℃, 930℃, 940℃, and 950℃.

[0135] In some implementations, the second temperature T2 satisfies: 550℃≤T2≤650℃. Specifically, the value of T2 can be any one or any two of the following values: 550℃, 560℃, 570℃, 580℃, 590℃, 600℃, 610℃, 620℃, 630℃, 640℃, and 650℃.

[0136] In some implementations, the third temperature T3 satisfies: 1580℃≤T3≤1650℃. Specifically, the value of T3 can be any one or any two of the following: 1580℃, 1590℃, 1600℃, 1610℃, 1620℃, 1630℃, 1640℃, and 1650℃.

[0137] In some embodiments, during the first cooling time, the temperature of the reaction chamber is cooled from a first temperature T1 to a second temperature T2, and the first cooling time is 3 to 5 minutes. Specifically, the first cooling time can be any one or any combination of two values ​​from 3 minutes, 3.5 minutes, 4 minutes, 4.5 minutes, and 5 minutes.

[0138] It is understandable that by cooling the temperature of the reaction chamber from the first temperature T1 to the second temperature T2 within the first cooling time of 3 to 5 minutes, the wafer transfer temperature is reduced, which can improve the warpage of the substrate 10, thereby improving the warpage of the epitaxial wafer.

[0139] In some embodiments, the reaction chamber is heated from a second temperature T2 to a third temperature T3 within a first heating time, which is 15 to 18 minutes. Specifically, the first heating time can be any one or any combination of two of the following: 15 minutes, 16 minutes, 17 minutes, and 18 minutes.

[0140] It is understandable that by raising the temperature of the reaction chamber from the second temperature T2 to the third temperature T3 within the first heating time, which is 15 to 18 minutes, the heating rate is reduced, which can improve the warpage of the substrate 10 and thus improve the warpage of the epitaxial wafer.

[0141] In some implementations, the settling time is 1 to 3 minutes. Specifically, the settling time can be any one or any two of the following values: 1 minute, 1.5 minutes, 2 minutes, 2.5 minutes, and 3 minutes.

[0142] It is understandable that by allowing the substrate 10 to stand for 1 to 3 minutes, the substrate 10 can adapt to the cavity temperature, reducing the warpage caused by temperature changes, thereby improving the warpage of the substrate 10 and thus improving the warpage of the epitaxial wafer.

[0143] In some embodiments, during the process of introducing etching gas into the reaction chamber, the flow rate of the etching gas is 120–170 slm, and the pressure of the reaction chamber is 80–120 mbar. Specifically, during the process of introducing etching gas into the reaction chamber, the flow rate of the etching gas can be any one or any two of the values ​​of 120 slm, 130 slm, 140 slm, 150 slm, 160 slm, and 170 slm, and the pressure of the reaction chamber can be any one or any two of the values ​​of 80 mbar, 90 mbar, 100 mbar, 110 mbar, and 120 mbar.

[0144] It is understandable that by controlling the flow rate of the etching gas to 120–170 slm and the pressure of the reaction chamber to 80–120 mbar, the etching process of the substrate 10 can clean and improve the contact surface between the substrate 10 and the buffer layer 30, thereby reducing the defect density and improving the crystal quality.

[0145] In some embodiments, the etching process takes 5 to 15 minutes. Specifically, the etching process can be any one or any two of the following values: 5 minutes, 6 minutes, 7 minutes, 8 minutes, 9 minutes, 10 minutes, 11 minutes, 12 minutes, 13 minutes, 14 minutes, and 15 minutes.

[0146] It is understandable that by controlling the etching time to 5 to 15 minutes, the etching process of the substrate 10 can clean and improve the contact surface between the substrate 10 and the buffer layer 30, thereby reducing the defect density and improving the crystal quality.

[0147] In some embodiments, during the second cooling time, the temperature of the reaction chamber is cooled from the third temperature T3 to the second temperature T2, and the second cooling time is 15 to 18 minutes. Specifically, the second cooling time can be any one or any combination of two of the following: 15 minutes, 16 minutes, 17 minutes, and 18 minutes.

[0148] It is understandable that by cooling the reaction chamber from the third temperature T3 to the second temperature T2 during the second cooling time, which is 15 to 18 minutes, the cooling rate is reduced, which can improve the warpage of the substrate 10 and thus improve the warpage of the epitaxial wafer.

[0149] A second aspect of this application provides an epitaxial wafer, prepared using the aforementioned epitaxial wafer preparation method, comprising:

[0150] Substrate 10;

[0151] Buffer layer 30, the buffer layer 30 is located on one side of substrate 10;

[0152] Epitaxial layer 20 is located on the side of buffer layer 30 away from substrate 10.

[0153] It is understood that the epitaxial wafers prepared using the method provided in this application have good thickness uniformity and carrier concentration uniformity.

[0154] In some embodiments, the thickness uniformity of the epitaxial layer 20 is 1.3% to 2.0%. Specifically, the thickness uniformity of the epitaxial layer 20 can be any one of 1.3%, 1.5%, and 2.0%, or a range of any two of these values.

[0155] It is understandable that crystal quality can be improved by controlling the thickness uniformity of the epitaxial layer 20 to 1.3–2.0%.

[0156] In some embodiments, the carrier concentration uniformity of the epitaxial layer 20 is 2.5% to 4.0%. Specifically, the carrier concentration uniformity of the epitaxial layer 20 can be any one or a range of any two of the following values: 2.5%, 3.0%, 3.5%, and 4.0%.

[0157] It is understandable that the crystal quality can be improved by controlling the uniformity of carrier concentration in the epitaxial layer 20 to be 2.5–4.0%.

[0158] In some embodiments, the thickness of the substrate 10 is 330–380 μm. Specifically, the thickness of the substrate 10 can be any one or any two of the following values: 330 μm, 340 μm, 350 μm, 360 μm, 370 μm, and 380 μm.

[0159] Understandably, by controlling the thickness of the substrate 10 to be 330–380 μm, the cost of the epitaxial wafer can be reduced.

[0160] In some embodiments, the thickness of the buffer layer 30 is 0.5 to 2.0 μm. Specifically, the thickness of the buffer layer 30 can be any one or any combination of two of the following values: 0.5 μm, 1.0 μm, 1.5 μm, and 2.0 μm.

[0161] It is understandable that the buffer layer 30 is used to reduce the extension of defects on the substrate 10 to the epitaxial layer 20. If the thickness of the buffer layer 30 is too thin, it may not be able to reduce the defects on the substrate 10. If the thickness of the buffer layer 30 is too thick, it may introduce new defects. Therefore, controlling the thickness of the buffer layer 30 to 0.5 to 2.0 μm can reduce the impact of defects on the substrate 10 on the epitaxial layer 20, thereby improving the crystal quality.

[0162] In some embodiments, the thickness of the epitaxial layer 20 is 10.0 to 11.5 μm. Specifically, the thickness of the epitaxial layer 20 can be any one or any two of 10.0 μm, 10.5 μm, 11.0 μm, and 11.5 μm.

[0163] Understandably, the thickness of the epitaxial layer 20 has a significant impact on the performance and characteristics of semiconductor devices. A thinner epitaxial layer 20 can provide better electron transport performance and higher carrier mobility, thereby improving the speed and efficiency of the device. On the other hand, a thicker epitaxial layer 20 can increase the capacitance and current carrying capacity of the device; the thickness of the epitaxial layer 20 is usually determined based on specific application requirements and fabrication processes.

[0164] The present application will now be described in conjunction with specific embodiments.

[0165] Example 1

[0166] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 600℃ (second temperature T2);

[0167] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0168] S3: Within 16 minutes (first heating time), the temperature of the reaction chamber is increased from 600℃ (second temperature T2) to 1640℃ (third temperature T3);

[0169] S4: Introduce hydrogen gas (etching gas) into the reaction chamber at a flow rate of 160 slm and a pressure of 100 mbar. Etch the substrate 10 for 12 min in a hydrogen atmosphere.

[0170] S5: Hydrogen (second carrier gas), ethylene (second carbon source), trichlorosilane (second silicon source), and nitrogen (second doping source) are introduced into the reaction chamber to form a buffer layer 30 on the side of the substrate 10 away from the base. The flow rate of ethylene is 35 sccm, the flow rate of trichlorosilane is 135 sccm, the flow rate of hydrogen is 160 sccm, and the flow rate of nitrogen is 160 sccm. The flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102, and the third region 103 is 64:16:32. The flow rate ratio of nitrogen (second doping source) in the first region 101, the second region 102, and the third region 103 is 62.7:22:2.2.

[0171] S6: Hydrogen (first carrier gas), ethylene (first carbon source), trichlorosilane (first silicon source), and nitrogen (first doping source) are introduced into the reaction chamber to form an epitaxial layer 20 on the side of the buffer layer 30 away from the substrate 10. The flow rate of ethylene is 250 sccm, the flow rate of trichlorosilane is 680 sccm, the flow rate of hydrogen is 160 slm, and the flow rate of nitrogen is 240 sccm. The flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102, and the third region 103 is 64:16:32. The flow rate ratio of nitrogen (first doping source) in the first region 101, the second region 102, and the third region 103 is 136.8:48:4.8.

[0172] S7: Within 16 minutes (second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 600℃ to obtain an epitaxial wafer.

[0173] Example 2

[0174] The preparation method of Example 2 is the same as that of Example 1, except that the flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102 and the third region 103 is 62:16:34; the flow rate ratio of nitrogen (second dopant source) in the first region 101, the second region 102 and the third region 103 is 60.8:22:35.2; the flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102 and the third region 103 is 62:16:34; and the flow rate ratio of nitrogen (first dopant source) in the first region 101, the second region 102 and the third region 103 is 110:48:9.6.

[0175] Comparative Example 1

[0176] The preparation method of Comparative Example 1 is the same as that of Example 1, except that the flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102, and the third region 103 is 54.4:16:36.8; the flow rate ratio of nitrogen (second dopant source) in the first region 101, the second region 102, and the third region 103 is 35.2:30.4:32; the flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102, and the third region 103 is 54.4:16:36.8; and the flow rate ratio of nitrogen (first dopant source) in the first region 101, the second region 102, and the third region 103 is 52.8:45.6:48.

[0177] Comparative Example 2

[0178] The preparation method of Comparative Example 2 is the same as that of Example 1, except that the flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102, and the third region 103 is 57.6:16:35.2; the flow rate ratio of nitrogen (second dopant source) in the first region 101, the second region 102, and the third region 103 is 35.2:30.4:32; the flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102, and the third region 103 is 57.6:16:35.2; and the flow rate ratio of nitrogen (first dopant source) in the first region 101, the second region 102, and the third region 103 is 52.8:45.6:48.

[0179] Comparative Example 3

[0180] The preparation method of Comparative Example 3 is the same as that of Example 1, except that the flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102, and the third region 103 is 60.8:16:33.6; the flow rate ratio of nitrogen (second dopant source) in the first region 101, the second region 102, and the third region 103 is 48:30.4:25.6; the flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102, and the third region 103 is 60.8:16:33.6; and the flow rate ratio of nitrogen (first dopant source) in the first region 101, the second region 102, and the third region 103 is 72:45.6:38.4.

[0181] Comparative Example 4

[0182] The preparation method of Comparative Example 4 is the same as that of Example 1, except that the flow rate ratio of hydrogen (second carrier gas) in the first region 101, the second region 102 and the third region 103 is 64:16:32; the flow rate ratio of nitrogen (second dopant source) in the first region 101, the second region 102 and the third region 103 is 60.8:32:19.2; the flow rate ratio of hydrogen (first carrier gas) in the first region 101, the second region 102 and the third region 103 is 64:16:32; and the flow rate ratio of nitrogen (first dopant source) in the first region 101, the second region 102 and the third region 103 is 91.2:48:28.8.

[0183] Comparative Example 5

[0184] The preparation method of Comparative Example 5 is the same as that of Comparative Example 1, except that:

[0185] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 550℃ (second temperature T2);

[0186] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0187] S3: Within 16 minutes (first heating time), the reaction chamber is heated from 550℃ (second temperature T2) to 1640℃ (third temperature T3);

[0188] S7: Within 16 minutes (second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 550℃ to obtain an epitaxial wafer.

[0189] Comparative Example 6

[0190] The preparation method of Comparative Example 6 is the same as that of Comparative Example 1, except that:

[0191] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 650℃ (second temperature T2);

[0192] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0193] S3: Within 16 minutes (first heating time), the temperature of the reaction chamber is increased from 650℃ (second temperature T2) to 1640℃ (third temperature T3);

[0194] S7: Within 16 minutes (second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 650℃ to obtain an epitaxial wafer.

[0195] Comparative Example 7

[0196] The preparation method of Comparative Example 7 is the same as that of Comparative Example 1, except that:

[0197] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 600℃ (second temperature T2);

[0198] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0199] S3: Within 15 minutes (first heating time), the temperature of the reaction chamber is increased from 600℃ (second temperature T2) to 1640℃ (third temperature T3);

[0200] S7: Within 15 minutes (the second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 600℃ to obtain an epitaxial wafer.

[0201] Comparative Example 8

[0202] The preparation method of Comparative Example 8 is the same as that of Comparative Example 1, except that:

[0203] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 600℃ (second temperature T2);

[0204] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0205] S3: Within 18 minutes (first heating time), the temperature of the reaction chamber is increased from 600℃ (second temperature T2) to 1640℃ (third temperature T3);

[0206] S7: Within 18 minutes (the second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 600℃ to obtain an epitaxial wafer.

[0207] Comparative Example 9

[0208] The preparation method of Comparative Example 1 is the same as that of Comparative Example 1, except that the hydrogen gas (second carrier gas) is not partitioned and controlled; the hydrogen gas (second carrier gas) is not partitioned and controlled; the nitrogen gas (second doping source) is not partitioned and controlled; and the nitrogen gas (first doping source) is not partitioned and controlled.

[0209] Comparative Example 10

[0210] The preparation method of Comparative Example 10 is the same as that of Comparative Example 1, except that the temperature of the reaction chamber is directly raised from 900℃ (first temperature T1) to 1640℃ (third temperature T3) within 10 minutes.

[0211] Comparative Example 11

[0212] The preparation method of Comparative Example 11 is the same as that of Comparative Example 1, except that:

[0213] S1: Within 3 minutes (first cooling time), the temperature of the reaction chamber is reduced from 900℃ (first temperature T1) to 600℃ (second temperature T2);

[0214] S2: Place substrate 10 in the reaction chamber and let it stand for 2 minutes;

[0215] S3: Within 10 minutes (first heating time), the temperature of the reaction chamber is increased from 600℃ (second temperature T2) to 1640℃ (third temperature T3);

[0216] S7: Within 10 minutes (second cooling time), the temperature of the reaction chamber is reduced from 1640℃ to 600℃ to obtain an epitaxial wafer.

[0217] Measurement method:

[0218] (1) The film thickness was measured using a Fourier transform infrared spectrometer and the doping concentration was measured using a mercury probe (mercury CV) tester.

[0219] (2) Doping concentration uniformity: The standard deviation of the doping concentration at 37 measurement points on epitaxial layer 20 / the arithmetic mean of the doping concentration at 37 measurement points on epitaxial layer 20 × 100%, and the point map of the 37 measurement points on epitaxial layer 20 is shown below. Figure 4 As shown.

[0220] (3) Thickness uniformity: standard deviation of the thickness of 37 measurement points on epitaxial layer 20 / arithmetic mean of the thickness of 37 measurement points on epitaxial layer 20 × 100%.

[0221] Table 1 shows the parameter settings for Examples 1-8 and Comparative Examples 1-3.

[0222] Table 1

[0223]

[0224]

[0225] Table 2 shows the test results of Examples 1-8 and Comparative Examples 1-3.

[0226] Table 2

[0227]

[0228] The thickness trends of the epitaxial wafers provided in Examples 1 and 2 at 37 measurement points are as follows: Figure 5 As shown, the carrier concentration trends of the epitaxial wafers provided in Examples 1 and 2 at 37 measurement points are as follows: Figure 6 As shown in Table 2, the epitaxial wafers prepared using the method provided in this application exhibit ideal thickness uniformity and carrier concentration uniformity within the defined process parameter range.

[0229] The present application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present application. Therefore, the content of this specification should not be construed as a limitation of the present application.

Claims

1. A method for producing an epitaxial wafer, characterized by, The preparation method comprises the following steps: a first carrier gas, a first carbon source and a first silicon source are introduced into a reaction cavity to form an epitaxial layer (20) on a side of a substrate (10) away from a base; wherein the substrate (10) comprises a first region (101), a second region (102) and a third region (103), the second region (102) is arranged around the first region (101), and the third region (103) is arranged around the second region (102); a flow ratio of the first carrier gas in the first region (101), the second region (102) and the third region (103) is (50-70):(10-18):(25-40).

2. The method for producing an epitaxial wafer according to claim 1, wherein In the process of forming the epitaxial layer (20) on the side of the substrate (10) away from the base, a first doping source is also introduced into the reaction cavity, and a flow ratio of the first doping source in the first region (101), the second region (102) and the third region (103) is (110-150):(40-60):(3-20).

3. The method for producing an epitaxial wafer according to claim 1, wherein The first region (101) is circular, and the second region (102) and the third region (103) are annular; The substrate (10) has a radius R, and the first region (101) has a radius r, and 6 / 10≤r / R≤7 / 10 is satisfied; The second region (102) has a width L1, and 0.5 / 10≤L1 / R≤1.5 / 10 is satisfied; The third region (103) has a width L2, and 1.5 / 10≤L2 / R≤3.5 / 10 is satisfied.

4. The method for producing an epitaxial wafer according to claim 2, wherein Before forming the epitaxial layer (20) on the side of the substrate (10) away from the base, the preparation method further comprises: a second carrier gas, a second carbon source and a second silicon source are introduced into the reaction cavity to form a buffer layer (30) on the side of the substrate (10) away from the base; wherein a flow ratio of the second carrier gas in the first region (101), the second region (102) and the third region (103) is (50-70):(10-18):(25-40); and after forming the buffer layer (30), the epitaxial layer (20) is formed on a side of the buffer layer (30) away from the substrate (10).

5. The method for producing an epitaxial wafer according to claim 4, wherein In the process of forming the buffer layer (30) on the side of the substrate (10) away from the base, a second doping source is also introduced into the reaction cavity, and a flow ratio of the second doping source in the first region (101), the second region (102) and the third region (103) is (30-80):(20-40):(2-36).

6. The method for producing an epitaxial wafer according to claim 5, wherein a flow of the first carrier gas is 120-170 slm; and / or, a flow of the first doping source is 210-270 sccm; and / or, a flow of the first carbon source is 200-300 sccm; and / or, a flow of the first silicon source is 650-750 sccm; and / or, a flow of the second carrier gas is 120-170 slm; and / or, a flow rate of the second doping source is 135-195 sccm; and / or, a flow rate of the second carbon source is 20-80 sccm; and / or, a flow rate of the second silicon source is 100-200 sccm.

7. The method for producing an epitaxial wafer according to claim 4, wherein the first carbon source comprises a first carbon element, the first silicon source comprises a first silicon element, a ratio of the number of atoms of the first carbon element to the first silicon element is a first carbon-silicon ratio M1, the second carbon source comprises a second carbon element, the second silicon source comprises a second silicon element, a ratio of the number of atoms of the first carbon element to the first silicon element is a second carbon-silicon ratio M2, the first carbon-silicon ratio M1 and the second carbon-silicon ratio M2 satisfy: M2 < M1.

8. The method for producing an epitaxial wafer according to claim 7, wherein the first carbon-silicon ratio M1 satisfies: 0.8 ≤ M1 ≤ 1.0; and / or, the second carbon-silicon ratio M2 satisfies: 0.4 ≤ M2 ≤ 0.

6.

9. The method for producing an epitaxial wafer according to claim 4, wherein Before forming the buffer layer (30) on the side of the substrate (10) away from the susceptor, the preparation method further comprises: lowering the temperature of the reaction chamber from a first temperature T1 to a second temperature T2; placing the substrate (10) in the reaction chamber to keep still; raising the temperature of the reaction chamber from the second temperature T2 to a third temperature T3; introducing etching gas into the reaction chamber to perform etching treatment on the substrate (10).

10. The method of producing an epitaxial wafer according to claim 9, wherein After forming the epitaxial layer (20) on the side of the substrate (10) away from the susceptor, the preparation method further comprises: lowering the temperature of the reaction chamber from the third temperature T3 to the second temperature T2.

11. The method of producing an epitaxial wafer according to claim 10, wherein the first temperature T1, the second temperature T2 and the third temperature T3 satisfy: T2 < T1 < T3; and / or, the first temperature T1 satisfies: 850℃ ≤ T1 ≤ 950℃; and / or, the second temperature T2 satisfies: 550℃ ≤ T2 ≤ 650℃; and / or, the third temperature T3 satisfies: 1580℃ ≤ T3 ≤ 1650℃.

12. The preparation method of the epitaxial wafer according to claim 10, wherein, in a first lowering time, the temperature of the reaction chamber is lowered from the first temperature T1 to the second temperature T2, and the first lowering time is 3-5 min; and / or, in a first raising time, the temperature of the reaction chamber is raised from the second temperature T2 to the third temperature T3, and the first raising time is 15-18 min; and / or, the time for keeping still is 1-3 min; and / or, in the process of introducing etching gas into the reaction chamber, a flow rate of the etching gas is 120-170 slm, and a pressure of the reaction chamber is 80-120 mbar; and / or, a time for the etching treatment is 5-15 min; and / or, in a second lowering time, the temperature of the reaction chamber is lowered from the third temperature T3 to the second temperature T2, and the second lowering time is 15-18 min.

13. An epitaxial wafer, characterized by, The epitaxial wafer is prepared by the preparation method of the epitaxial wafer according to any one of claims 1-12, and comprises: a substrate (10); a buffer layer (30) on the side of the substrate (10) away from the susceptor; an epitaxial layer (20) located on a side of the buffer layer (30) distal to the substrate (10).

14. The epitaxial wafer of claim 13, wherein, a thickness uniformity of the epitaxial layer (20) of 1.3-2.0%; and / or, a carrier concentration uniformity of the epitaxial layer (20) of 2.5-4.0%.

15. The epitaxial wafer of claim 13, wherein, a thickness of the substrate (10) of 330-380 μm; and / or, a thickness of the buffer layer (30) of 0.5-2.0 μm; and / or, a thickness of the epitaxial layer (20) of 10.0-11.5 μm.

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