Current compensation circuit, logarithmic detector and chip

Abstract

The embodiment of the invention discloses a current compensation circuit, a logarithmic detector and a chip. The current compensation circuit includes: a current mirror including a first transistor and a second transistor, the current mirror being configured to mirror a first current flowing through a first end of the first transistor to a first end of the second transistor, the first end of the second transistor outputting a compensation current; the resistance module is connected with the first end of the first transistor, and the resistance value of the resistance module and the first voltage of the first end of the first transistor are used for determining the first current; the fuse module comprises one or more fuse arrays and is connected with the resistor module and / or the first end of the first transistor, and the fuse arrays are used for outputting a corresponding first control signal based on the fusing state and applying the first control signal to the first end of the corresponding first transistor so as to adjust the first voltage, or the first control signal is applied to the corresponding resistor module to adjust the resistance value of the resistor module connected to the first end of the first transistor.

Description

[0001] Divisional Explanation

[0002] This application is a divisional application of the Chinese patent application No. 202510151792.0, filed on February 11, 2025, entitled "Current compensation circuit, logarithmic detector and chip". TECHNICAL FIELD

[0003] Embodiments of the present disclosure relate to the field of electronic devices, and more particularly, but not exclusively, to a current compensation circuit, a logarithmic detector and a chip. BACKGROUND

[0004] Commonly, various detectors or signal processors tend to have detection or processing errors due to process angle mismatch and process deviation, and therefore need to be calibrated for precision, such as detectors, ring oscillators, amplifiers, etc.

[0005] Taking a logarithmic detector as an example, it is commonly used for measuring and detecting the amplitude of a signal, and has the characteristic of converting an input signal into an output voltage or current that is proportional to the logarithm of the input signal. The logarithmic detector is mainly used in devices such as radar, satellite communication, microwave point-to-point communication, test instruments, radio spectrum monitoring, etc., and is suitable for applications such as signal strength indication, wideband spectrum detection, fault detection, automatic gain control, etc.

[0006] Different logarithmic detectors have process angle mismatch and process deviation, which affect the performance of the logarithmic detector, so that the logarithmic curves of different logarithmic detectors are different, thereby causing the intercepts of the logarithmic curves to have deviations, wherein the logarithmic curve is a curve of output voltage versus input power.

[0007] The deviations of devices such as logarithmic detectors can be adjusted by current correction to compensate for the performance differences of different devices themselves, and therefore, how to realize current calibration is one of the problems to be considered in the field. SUMMARY

[0008] Therefore, embodiments of the present disclosure provide a current compensation circuit, a logarithmic detector and a chip for outputting adjustable current.

[0009] In one aspect, embodiments of the present disclosure provide a current compensation circuit, comprising:

[0010] A current mirror comprising a first transistor and a second transistor, the first transistor and the second transistor each comprising a first end, a second end and a control end, the current mirror being configured to mirror a first current flowing through the first end of the first transistor to the first end of the second transistor, the first end of the second transistor outputting a compensation current;

[0011] a resistance module connected to the first end of the first transistor, a resistance value of the resistance module and the first voltage of the first end of the first transistor being used to determine the size of the first current;

[0012] a fuse module connected to the resistance module and / or the first end of the first transistor, used to output a first control signal based on a fuse state, the first control signal being used to calibrate the resistance value of the resistance module and / or the size of the first voltage.

[0013] The current compensation circuit of the embodiments of the present disclosure, the fuse module is a programmable memory, which stores data based on the fuse state of the internal fuse, and the internal fuse is fused based on the size of the compensation current that needs to be output; the fuse module outputs a first control signal according to the fuse state, and the first control signal is used to calibrate the resistance value of the resistance module and / or the size of the first voltage. The resistance value of the resistance module and the first voltage of the first end of the first transistor are used to determine the size of the first current, so that by adjusting, the first voltage of the first end of the first transistor of the current mirror and / or the resistance value of the resistance module can be adjusted by the fuse module, and then the size of the first current is adjusted; since the compensation current is a copy of the first current, the compensation current changes with the first current, and therefore the size of the compensation current can be adjusted by the first control signal output by the fuse module, so as to realize accurate calibration of the size of the compensation current, which is beneficial to improve the calibration accuracy and calibration efficiency.

[0014] When the fuse module is connected to the resistance module and the first end of the first transistor at the same time, the first control signal is used to calibrate the resistance value of the resistance module and the size of the first voltage, so that at least two dimensions of the first voltage and the resistance value of the resistance module can be adjusted by the fuse module, and multi-stage adjustment of the compensation current output by the current compensation circuit can be realized, so as to further improve the accuracy of the compensation current.

[0015] In some embodiments, the resistance module includes one or more variable resistance units and one or more resistance array units in series, at this time, the resistance value can be adjusted by the variable resistance unit or the resistance array unit, that is, the resistance value has two-stage adjustment, plus the adjustment of the first voltage value, the current compensation circuit can realize three-stage adjustment in total, so as to realize accurate calibration of the size of the compensation current, which is beneficial to improve the calibration accuracy and calibration efficiency.

[0016] In addition, the current output circuit is applied to the logarithmic detection assembly to realize the calibration of the logarithmic detector, the calibration of the logarithmic curve intercept of the logarithmic detector can be realized by debugging the current output circuit, the abnormal deviation of the logarithmic curve intercept caused by process foot mismatch and process deviation of different logarithmic detector products is effectively reduced, so as to improve the detection accuracy of the logarithmic detection assembly and improve the product yield. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 A circuit structure block diagram of a logarithmic detector according to an embodiment of the present disclosure;

[0018] Figure 2 A circuit structure block diagram of a circuit for calibrating the intercept of a logarithmic detector according to an embodiment of the present disclosure;

[0019] Figure 3 A schematic diagram of a current compensation circuit according to an embodiment of the present disclosure;

[0020] Figure 4 A schematic diagram of another current compensation circuit according to an embodiment of the present disclosure;

[0021] Figure 5 A schematic diagram of a current compensation circuit and one of its resistance modules according to an embodiment of the present disclosure;

[0022] Figure 6 A schematic diagram of the resistance characteristic curve of a MOS transistor according to an embodiment of the present disclosure;

[0023] Figure 7A and Figure 7B Schematic diagrams of two resistance array units in a current compensation circuit according to embodiments of the present disclosure, respectively;

[0024] Figure 8 A schematic diagram of a current compensation circuit and its voltage follower according to an embodiment of the present disclosure;

[0025] Figure 9 A schematic diagram of a voltage switching module in a current compensation circuit according to an embodiment of the present disclosure;

[0026] Figure 10 A schematic diagram of a fuse module in a current compensation circuit according to an embodiment of the present disclosure;

[0027] Figure 11 A schematic diagram of yet another current compensation circuit according to an embodiment of the present disclosure;

[0028] Figure 12 A flowchart of a calibration method of a logarithmic detector according to an embodiment of the present disclosure;

[0029] Figure 13 A structure block diagram of a chip according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] For the purpose of promoting an understanding of the disclosure, the disclosure will now be described in greater detail with reference to the relevant drawings. The preferred embodiments of the disclosure are shown in the drawings. However, the disclosure can be realized in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. The disclosure is capable of many modifications in various obvious aspects, all without departing from the scope thereof. The embodiments of the disclosure should therefore not be construed as limiting the disclosure but construed to illustrate the disclosure.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used in the description of the disclosure herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. In the embodiments of the disclosure, the terms "first", "second", "third", "fourth" are used only for the purpose of description, and should not be construed as indicating or implying relative importance or implying the number of the technical features indicated. Therefore, the features defined with "first", "second", "third", "fourth" can be explicitly or implicitly included one or more of the features.

[0032] It should be understood that in the description of the embodiments of the disclosure, it is necessary to explain that, unless otherwise explicitly specified and limited, the terms "connected", "connected" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be directly connected, or indirectly connected through an intermediate medium, or the communication inside two elements.

[0033] The terms involved in the embodiments of the disclosure are explained as follows:

[0034] Logarithmic detector: used for measuring and detecting the amplitude of a signal, the output DC signal (such as voltage signal) is proportional to the logarithm of the input signal voltage amplitude.

[0035] Logarithmic curve: the curve of the change of the output DC voltage signal of the logarithmic detector with the change of the input signal. The abscissa of the logarithmic curve is the signal power of the input radio frequency signal, and the unit of the radio frequency signal power is exemplarily decibel-milliwatt (dBm). The ordinate of the logarithmic curve is the DC voltage of the output signal, and the unit can be volt (V) or millivolt (mV).

[0036] Intercept of logarithmic curve: the voltage value corresponding to the intersection of the logarithmic curve and the ordinate axis. The intercept of the logarithmic curve can also be understood as the output offset of the logarithmic detector.

[0037] Logarithmic amplifier: an amplifier with logarithmic input-output relationship.

[0038] Efuse programming: Efuse is a kind of fuse device, belonging to one-time programmable memory. Usually, through the way of large current, a certain device is burned out or a certain device is burned short to realize the one-time change of the circuit.

[0039] Process corner: refers to the case of considering different process changes and parameter changes when designing and manufacturing chips. On a wafer, it is impossible for the average drift velocity of carriers of each chip to be the same, and the characteristics of different chips will also be different with different voltages and temperatures. Classifying different process characteristics has PVT (Process, Voltage, Temperature) characteristics. And the process characteristics are divided into different process limits, called process corners. The log characteristic performance of the detector chip under different process corners will exist certain dispersion.

[0040] The log detector is based on the working principle of the logarithmic amplifier. The input signal is taken logarithm and amplified, and then the amplified signal is anti-logarithm operation, and finally the direct current output signal is obtained. Because it has logarithmic operation and anti-logarithmic operation, the input signal and the direct current output signal of the log detector have linear relationship. The log detector is mainly used in radar, satellite communication, microwave point-to-point communication, test instrument, radio spectrum monitoring equipment, etc. It is suitable for signal strength indication, wideband spectrum detection, fault detection, automatic gain control and other application scenarios. The log detector has good application prospect and research significance.

[0041] As Figure 1 It is a circuit structure block diagram of a log detector, and the log detector is used to realize log detection. As Figure 1As shown, the logarithmic detector 100 is composed of multiple modules, including a radio frequency logarithmic amplifier 110, a current operation module 120, an output module 130, and a feedback module 140, etc. After the radio frequency signal RF to be detected is input, it will be logarithmically amplified by the radio frequency logarithmic amplifier 110, and a current I corresponding to the amplitude will be output; the current operation module 120 realizes the addition operation or subtraction operation of the input current and outputs the current; the output module 130 is to convert the current into a direct current voltage (DC) output. The logarithmic detector can also include a feedback module 140, the input end of the feedback module 140 is connected to the output end of the output module 130, the output end of the feedback module 140 is connected to the input end of the current operation module 120, and the feedback module 140 converts the DC output voltage into a current and outputs it to the current operation module 120. The feedback loop formed by the feedback module 140 is conducive to realizing stable DC voltage output. In some cases, the radio frequency logarithmic amplifier 110 and the current operation module 120 also include an anti-log circuit, which can use the exponential characteristics of diodes or transistors to perform anti-log operation on the current I. The current I after the anti-log operation has a linear relationship with the radio frequency signal RF.

[0042] In some embodiments, the input end of the feedback module 140 can also not be connected to the output end of the output module 130, but a fixed voltage is provided for the input end of the feedback module 140. Figure 1 The circuit shown cannot realize the calibration of the intercept of the logarithmic curve. If the intercept of the logarithmic curve is not calibrated, the logarithmic curve of the logarithmic detector will have a certain degree of dispersion in different batches of wafers or different wafer areas, thereby affecting the screening of good products.

[0043] It can be understood that the logarithmic detector amplifies the input radio frequency signal through the logarithmic amplifier and outputs a current corresponding to the amplitude, and the size of the output current is one-to-one corresponding to the signal to be detected (i.e. the amplitude of the input radio frequency signal). Taking the logarithmic detector 100 as an example, the radio frequency signal RF is input to the radio frequency logarithmic amplifier 110, and the radio frequency signal RF is logarithmically amplified to output a current I corresponding to the amplitude of the radio frequency signal RF. The current I is input to the current operation module 120, and the current operation module 120 adds or subtracts the current I to output a current I1. The current I1 is input to the feedback module 140, and the feedback module 140 converts the DC output voltage into a current and outputs it to the current operation module 120. The current operation module 120 adds or subtracts the current I to output a current I2. The current I2 is input to the output module 130, and the output module 130 converts the current I2 into a direct current voltage (DC) output. Figure 1The logarithmic detector shown is a logarithmic detector with a negative slope logarithmic curve. Assuming that the slope of the logarithmic curve of the logarithmic detector is 20 mV / dBm, the power of the signal to be detected is -20 dBm, the current I flowing into the current operation module is 0.6 mA, and the DC voltage output by the output module 130 is 0.8 V; due to the process dispersion, the output voltage of different batches of chips is 0.7 V-0.9 V, which may be due to the deviation of the logarithmic amplifier caused by the process, so that the current I output by the logarithmic amplifier deviates, and thus the current I flowing into the current operation module 120 deviates, for example, the current I flowing into the current operation module 120 of different batches of chips is between 0.5 mA and 0.7 mA. Thus, for the same radio frequency input signal, the detected value will have a difference of 0.2 V / (20 mV / dBm) = 10 dBm, resulting in a large intercept error of the logarithmic curve detected by different batches of detectors.

[0044] The embodiments of the present disclosure provide a scheme that can be used to calibrate the intercept of the logarithmic detector, as shown in Figure 2 As shown, the scheme uses the current compensation circuit 200 to output a compensation current I0, which is provided to the current operation module 120 of the logarithmic detector 100. The current compensation circuit 200 includes a fuse module for fixing the value of the compensation current I0. Specifically, during the calibration phase before use, the required compensation current I0 size is determined according to the value of the DC output voltage; then, according to the required compensation current I0 size, the fuse module in the current compensation circuit 200 is programmed to ensure that the current compensation circuit 200 can output a compensation current I0 of appropriate size; during operation, the first control signal output by the fuse module in the current compensation circuit 200 can make the current compensation circuit 200 output an appropriate compensation current I0, thereby effectively compensating for the intercept error of the logarithmic curve of the logarithmic detector caused by batch differences.

[0045] Specifically, the embodiments of the present disclosure provide a current compensation circuit. As shown in Figure 3 The current compensation circuit 200 provided by the embodiments of the present disclosure includes:

[0046] The current mirror 220 includes a first transistor 221 and a second transistor 222, and the first transistor 221 and the second transistor 222 each include a first end, a second end, and a control end. The current mirror 220 is configured to mirror a first current I1 flowing through the first end of the first transistor 221 to the first end of the second transistor 222, and the first end of the second transistor 222 outputs a compensation current I0. The voltage at the first end of the first transistor 221 is a first voltage V1;

[0047] The resistance module 230 is connected to the first end of the first transistor 221, and can be connected in series between the first end of the first transistor 221 and the ground. The resistance value R of the resistance module 230 and the first voltage V1 are used to determine the size of the first current I1.

[0048] The fuse module 210 can include a plurality of fuses, and the fuse-off state of the fuses is used to store data. The fuse-off state of the internal fuse can reflect the size of the compensation current. The fuse module 210 is connected to the resistance module 230 and / or the first end of the first transistor 221. In the figure, the fuse module 210 is connected to the resistance module 230 and the first end of the first transistor 221, respectively. The fuse module 210 is used to output the first control signal T1 based on the fuse-off state. The first control signal T1 is used to calibrate the resistance value R of the resistance module 230 and / or the size of the first voltage V1.

[0049] In the embodiments of the present disclosure, the currents of the two current branches of the current mirror 220 are mutually mirrored, so that the size of the compensation current I0 output on the other branch (the branch where the second transistor 222 is located) can be changed by adjusting the size of the first current I1 on one branch (the branch where the first transistor 221 is located). Therefore, the related components for adjusting the first current I1 can be connected to the first end or the second end of the first transistor 221, so as to control the size of the first current I1 on the current path where the first transistor 221 is located.

[0050] It should be noted that the current mirror can be a mirror structure including two transistors. The structure of the current mirror can include a reference transistor and a mirror transistor. The control ends of the two transistors are connected, so they have the same on state. The current on the current path where the reference transistor is located will be completely mirrored to the current path where the mirror transistor is located, that is, the mirror current is equal to the reference current (which can be provided by a current source connected in series with the reference transistor). It can be understood that if the sizes (channel width-length ratio) of the reference transistor and the mirror transistor are different, the mirror current can also have a corresponding proportional relationship with the reference current. Therefore, the current mirror can be used to output an output current in a fixed proportion to the reference current.

[0051] In an embodiment, the current mirror can be a PMOS current mirror, the first transistor 221 and the second transistor 222 are both PMOS, thus, the second end of the first transistor 221 and the second end of the second transistor 222 are both connected to the power supply end VDD, and the resistance module 230 is connected between the first end of the first transistor 221 and the ground end GND. In another embodiment, the current mirror can also be an NMOS current mirror, the first transistor 221 and the second transistor 222 are both NMOS, thus, the second end of the first transistor 221 and the second end of the second transistor 222 are both connected to the ground end GND, and the resistance module 230 is connected between the first end of the first transistor 221 and the power supply end VDD. In some other embodiments, the current mirror 220 can also be a self-biased current mirror, a Wilson current mirror, a “cascode” current mirror, etc. In addition, the first transistor 221 can include two or more transistors connected in source-drain order, and the second transistor 222 can also include two or more transistors connected in source-drain order. In a self-biased current mirror and a “cascode” current mirror, the first transistor 221 and the second transistor 222 each include two or more transistors. In a Wilson current mirror, the first transistor 221 and the second transistor 222 can also be triodes.

[0052] In the embodiments of the present disclosure, the first transistor 221 is used as a reference transistor in the current mirror 220, and the second transistor 222 is used as a mirror transistor in the current mirror 220. The embodiments of the present disclosure are described by taking the example that the first transistor and the second transistor have the same size (the output compensation current I0 is equal to the first current I1), in actual applications, the ratio relationship of the sizes of the first transistor and the second transistor can also be set according to requirements, and then a compensation current I0 in a fixed ratio of the first current I1 can be obtained.

[0053] In the embodiments of the present disclosure, the first transistor 221 and the resistance module 230 are connected in series on the current path of the first current I1, and the resistance value of the resistance module 230 or the first voltage V1 of the first end of the first transistor 221 is adjusted by the fuse module 210 to adjust the size of the first current I1, so that the size of the output compensation current I0 can be adjusted by the fuse module 210.

[0054] In the embodiments of the present disclosure, the size of the first current I1 can be adjusted by the fuse module 210. Specifically, the fuse module 210 has a one-time editable capability, which can be written with the first control signal T1, and the first control signal T1 can be applied to the first end of the first transistor 221 to adjust the first voltage V1, or applied to the resistance module 230 to adjust the resistance value of the resistance module 230, thereby realizing the editing of the size of the first current I1.

[0055] For the process deviation of the log detector or other devices such as amplifiers, the log detector can be calibrated before use of the product to determine the required compensation current I0, and thus, when the required compensation current I0 is determined, the fuse module 210 can be edited once to output the specified first control signal T1, and thus obtain the first current I1 corresponding to the required compensation current I0.

[0056] The first control signal T1 output by the fuse module 210 can include one or more, respectively used to calibrate the resistance value of the resistance module 230 and the size of the first voltage V1, so that the control of the first current I1 can be realized from at least two dimensions, and thus the coarse calibration and fine calibration can be realized. For example, the fuse module 210 can include a plurality of fuse arrays, and different fuse arrays are used to output different first control signals T1.

[0057] In addition, the current compensation circuit can also include one or more resistance modules connected in series or parallel to the first current I1 path, and each resistance module can have an adjustable resistance value. For example, the current compensation circuit can include two or more resistance modules connected in series or parallel, and each resistance module has a different resistance value range, so that different ranges of current adjustment can be realized, and thus the accuracy of the compensation current can be further improved.

[0058] Because the deviations of different log detectors are different, the data written in the fuse module of different log detectors are different, and the fuse module needs to know the data to be written in advance. In order to obtain the data to be written in the fuse module, in some embodiments, as shown in Figure 4 The current compensation circuit 200 further includes:

[0059] One or more voltage switching modules 240 (such as Figure 4 The voltage switching module 240a and the voltage switching module 240b shown in the voltage switching module 240) have an output end for outputting a plurality of second control signals T2; the second control signal T2 is used to calibrate the resistance value of the resistance module 230 and / or the size of the first voltage V1;

[0060] One or more check modules 250 (such as Figure 4The input end of the multiplex module 250a shown in FIG. 2 is connected to the output end of the voltage switching module 240 and the output end of the fuse module 210, the output end of the multiplex module 250a is connected to the first end of the first transistor 221, and the output end of the multiplex module 250b is connected to the resistance module 230; the multiplex module 250a is used to select one of the second control signal T2 and the first control signal T1 to output, so as to control the size of the first voltage V1; the multiplex module 250b is used to select one of the second control signal T2 and the first control signal T1 to output, so as to control the resistance value of the resistance module 230.

[0061] As mentioned above, in order to calibrate the process angle deviation of the log detector and other devices, it is necessary to calibrate and debug before the product is used, and the required compensation current I0 is determined. Therefore, in the embodiment of the present disclosure, when calibrating, the multiplex module 250 selects the second control signal T2 to output, and the voltage switching module 240 provides the switchable second control signal T2, so as to find the second control signal with appropriate size as the target control signal, and burn the target control signal into the fuse module; when the product is used, the multiplex module 250 selects the first control signal T1 to output, because the data in the fuse module is not lost due to power-off, so the fuse module can provide stable first control signal T1, so that the current compensation circuit can provide stable and reliable compensation current to compensate the process angle deviation of the log detector and other devices.

[0062] The multiplex module 250 can be realized by a signal selector, a multiplexer (MUX), or other logic circuits that can select one of multiple input signals as an output signal. The multiplex module has multiple input and single output, and it can also have a selection control signal end for receiving a selection signal, which is used to determine the selected input signal as the output signal and output. For example, when the multiplex module 250 has two input signals T1 and T2, the selection signal can include a one-bit binary digital signal of 0 or 1, when the selection signal is 0, the input signal T1 can be selected as the output signal, and when the selection signal is 1, the input signal T2 can be selected as the output signal.

[0063] Here, the signal selected by the multiplex module 250 can be the first control signal T1 provided by the fuse module 210 or the second control signal T2 provided by the voltage switching module 240. In addition, since there can be multiple first control signals T1 and multiple second control signals T2, the multiplex module 250 can also be used to select one of the multiple second control signals T2 or output one of the first control signals T1.

[0064] In addition, the first control signal T1 and the second control signal T2 can be digital signals or analog signals.

[0065] In some embodiments, the voltage switching module 240 can be located in the same chip as the fuse module 210; in other embodiments, the voltage switching module 240 can be an external test module, which can be removed after the corresponding fuse module 210 is edited and the output of the fuse module 210 is switched by the check module 250 after the required second control signal T2 is obtained.

[0066] In some embodiments, as shown in FIG. 2B, the resistance module 230 includes: Figure 5 The variable resistance unit Rb, the resistance array unit Ra, or the series connection of the variable resistance unit Rb and the resistance array unit Ra; in the figure, the case of one variable resistance unit Rb and one resistance array unit Ra in series connection is shown, and in other embodiments, only the variable resistance unit Rb or the resistance array unit Ra can be included. Moreover, the check module 250 includes three, respectively: the check module 250a connected to the first end of the first transistor 122 (the voltage switching module connected thereto is 240a), the check module 250b connected to the control end of the variable resistance unit Rb (the voltage switching module connected thereto is 240b), and the check module 250c connected to the resistance array unit Ra (the voltage switching module connected thereto is 240c).

[0067] In the calibration phase, the control end of the variable resistance unit Rb receives the second control signal T2 output by the check module 250b; in the use after calibration, the control end of the variable resistance unit Rb receives the first control signal T1 output by the check module 250b to control the first resistance value of the variable resistance unit Rb.

[0068] The resistance array unit Ra can include a plurality of resistance elements ri (i represents the number of resistance elements, 0≤i≤n, and the total number of resistance elements in the resistance array unit Ra is n+1), for changing the number of resistance elements ri in the path accessed by the first current I1 by the first control signal T1 or the second control signal T2 output by the check module 250c, to control the second resistance value of the resistance array unit Rb.

[0069] In some embodiments, the variable resistance unit Rb is connected in series between the first voltage V1 and the resistance array unit Ra, and in other embodiments, the resistance array unit Ra can also be connected in series between the first voltage V1 and the variable resistance unit Rb.

[0070] Figure 5

[0071] ​​It can be understood that, since the variable resistance unit Rb and the resistance array unit Ra are connected in series, the resistance values of the two will affect the size of the first current I1 on the entire path, and the greater the sum of the first resistance value and the second resistance value, the smaller the first current I1 is under the condition that the first voltage V1 is fixed. The two different types of resistances can provide different precision current control. For example, the first resistance value has a smaller adjustment range, which can achieve fine adjustment of the first current I1, and the second resistance value has a larger adjustment range, which can achieve coarse adjustment of the first current I1.

[0072] By design, the resistance value of the resistance module can be adjusted by the variable resistance unit or the resistance array unit, that is, the resistance value has two-level adjustment, plus the adjustment of the first voltage value, the current compensation circuit can realize three-level adjustment in total, so as to realize accurate calibration of the size of the compensation current, which is beneficial to improve the calibration precision and calibration efficiency.

[0073] In some embodiments, the variable resistance unit Rb comprises a third transistor;

[0074] The control end of the third transistor receives the first control signal or the second control signal, and the first end and the second end of the third transistor are connected in series with the resistance array unit to adjust the first resistance value of the third transistor.

[0075] It can be understood that the resistance characteristic of the transistor is used here to realize the variable resistance unit Rb. Taking a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET, MOS for short) as an example, the MOS has a resistance characteristic that the resistance changes with the gate voltage within a certain range.

[0076] Figure 6 The change curve between the gate voltage and the on-resistance of the MOS is shown, that is, the abscissa represents the gate voltage Vg, and the ordinate represents the on-resistance Ron. Among them, Figure 6 (1) is the overall switching characteristic of the MOS, Figure 6 (2) is an enlarged view of the range circled in (1), wherein, Figure 6 (1) the ordinate resistance unit is in the order of kΩ, Figure 6 (1) the ordinate resistance unit is in the order of kΩ, Figure 6 (2) the current unit of the ordinate is Ω, Figure 6 (1) and Figure 6 (2) the abscissa is in volts. It can be seen that the MOS has the characteristic that the on-resistance changes uniformly with the voltage within a certain voltage range, so the resistance value of the MOS can be adjusted by adjusting the gate voltage within the range.

[0077] In other embodiments, the variable resistor unit Rb may also be a variable resistor of other types besides a transistor, and this disclosure does not limit the embodiments.

[0078] In some embodiments, such as Figure 7A As shown, the resistor array unit Ra includes:

[0079] Multiple first resistor elements r1i are connected in series, and multiple first switches k1i are connected in parallel; the first and second terminals of the first switches k1i are connected in parallel with the first resistor elements r1i; the control terminal of the first switches k1i receives the corresponding first control signal T1 or second control signal T2.

[0080] When the first switch k1i is open, the corresponding parallel first resistor element r1i is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the first switch k1i.

[0081] Specifically, there can be multiple first control signals T1 or second control signals T2, each connected to a first switch k1i. When the first control signal T1 or the second control signal T2 is an on signal (a voltage or current signal that enables the first switch k1i to be in the on state), the connected first switch k1i is in the on state, and the corresponding first resistor element r1i is short-circuited, thus not connected to the circuit. When the first control signal T1 or the second control signal T2 is an off signal (a voltage or current signal that enables the first switch k1i to be in the off state), the connected first switch k1i is in the off state, and the corresponding first resistor element r1i is connected to the circuit. It should be noted that if the first switches k1i corresponding to the multiple first resistor elements r1i connected in series in the resistor array unit Ra are all in the on state, then the multiple first resistor elements r1i are not connected to the circuit, and the total resistance value of the resistor array unit Ra is approximately equal to 0.

[0082] It is understandable that the resistance values ​​of the multiple first resistor elements r1i can be equal. Thus, by changing the number of first resistor elements r1i connected to the path, the total resistance value of the resistor array unit Ra can be adjusted. Of course, the resistance values ​​of the multiple first resistor elements r1i can also be different, and can be designed according to actual needs, thereby achieving flexible resistance adjustment.

[0083] In some embodiments, such as Figure 7B As shown, the resistor array unit Ra includes:

[0084] Multiple second resistor elements r2i are connected in parallel, and multiple second switches k2i are connected in series with the second resistor elements r2i; the control terminal of the second switch k2i receives the corresponding first control signal T1 or second control signal T2.

[0085] When the second switch k2i is turned on, the corresponding second resistor element r2i connected in series is connected to the path through which the first current I1 flows; the first control signal T1 or the second control signal T2 is used to control the second switch.

[0086] Similar to the series connection, there can be multiple first control signals T1 or second control signals T2, each connected to a second switch k2i. When the first control signal T1 or the second control signal T2 is an on signal (a voltage or current signal that enables the second switch k2i to be in the on state), the second switch k2i connected in series is in the on state, and the corresponding second resistor r2i is connected to the circuit; when the first control signal T1 or the second control signal T2 is an off signal (a voltage or current signal that enables the second switch k2i to be in the off state), the second switch k2i connected to it is in the off state, the branch containing the corresponding second resistor r2i is disconnected, and thus the second resistor r2i is not connected to the circuit.

[0087] It is understandable that the resistance values ​​of multiple second resistor elements r2i can be equal. Thus, by changing the number of second resistor elements r2i connected in the circuit, the total resistance value of the resistor array unit Ra can be adjusted. Of course, the resistance values ​​of the multiple second resistor elements r2i can also be different, and can be designed according to actual needs to achieve flexible resistance adjustment. Furthermore, it should be noted that in the case of multiple second resistor elements r2i connected in parallel, each branch connected to the circuit can conduct; therefore, at least one second resistor element r2i must be connected, otherwise the circuit will be broken.

[0088] It should be noted that for the resistor array unit Ra, the first or second switch corresponding to each resistor element can receive control signals through a multiplexing module 250. The input signals of the multiplexing module 250 can include only the turn-on voltage for controlling the first or second switch to turn on and the turn-off voltage for controlling the first or second switch to turn off, i.e., high voltage (such as power supply voltage) and low voltage (such as ground voltage). Therefore, the two input terminals of the multiplexing module 250 can be connected to the power supply terminal VDD and the ground terminal GND, respectively.

[0089] In some embodiments, such as Figure 8 As shown, the current compensation circuit 200 also includes:

[0090] Voltage follower 260 is connected between multiplexing module 250 and the first terminal of first transistor 221 to control the first voltage V1 of the first terminal of first transistor 221.

[0091] The voltage follower 260 can ensure that the output voltage closely follows the change of the input voltage. The working principle is based on the negative feedback of the operational amplifier. When the input voltage changes, the change is sensed and amplified by the operational amplifier. Due to the negative feedback of the operational amplifier, the output voltage of the amplifier is partially or fully fed back to its input, compared with the original input voltage. The comparison result is used as an adjustment signal to adjust the output of the amplifier to ensure that the output voltage always follows the change of the input voltage.

[0092] In some embodiments, as shown in FIG. 2B, the voltage follower 260 includes an operational amplifier OPA, the negative input (-) of the operational amplifier OPA is connected to the output of the multiplexer 250a, the positive input (+) of the operational amplifier OPA is connected to the drain of the first transistor 221, and the output of the operational amplifier OPA is connected to the gate of the first transistor 221. The output of the operational amplifier OPA is connected to its positive input (+), forming a negative feedback. Figure 8

[0093] The voltage follower 260 can act as a buffer to transmit the output signal of the previous stage circuit to the next stage circuit, and also act as an isolation to protect the previous stage circuit from the influence of the next stage circuit. In addition, the voltage follower 260 can drive a larger load, improving the load capacity of the circuit.

[0094] In some embodiments, as shown in FIG. 2B, the voltage follower 260 includes an operational amplifier OPA, the negative input (-) of the operational amplifier OPA is connected to the output of the multiplexer 250a, the positive input (+) of the operational amplifier OPA is connected to the drain of the first transistor 221, and the output of the operational amplifier OPA is connected to the gate of the first transistor 221. The output of the operational amplifier OPA is connected to its positive input (+), forming a negative feedback. Figure 9 Figure 9 In some embodiments, as shown in FIG. 2B, the voltage switching module 240 involved in the embodiments can include a plurality of first voltage dividing resistors R0-Rn connected in series between the power supply end VDD and the ground end GND. The voltage switching module 240 includes a plurality of output ends, and the connection nodes between adjacent first voltage dividing resistors R0-Rn are used as output ends. The plurality of output ends are used to output a corresponding alternative voltage to the multiplexer 250, wherein,

[0095] It can be understood that the first voltage dividing resistors Rx connected in series between the power supply end VDD and the ground end GND can be fixed, and the resistance of each first voltage dividing resistor Rx can be the same or different. The voltage dividing of each first voltage dividing resistor Rx is the ratio of the resistance of the first voltage dividing resistor Rx to the total resistance of all the first voltage dividing resistors multiplied by the power supply voltage. The output alternative voltage Vbias-x of each output end node is the sum of the voltage dividing of all the first voltage dividing resistors Rx connected in series between the node and the ground end GND. Therefore, the output voltage of each node between the power supply end VDD and the ground end GND decreases in turn. ​​

[0096] The multiple inputs of the multiplexing module 250 can be connected to each output node respectively, and by switching, one of the candidate voltages Vbias-x is selected to be provided to the input of the voltage follower, or to the control terminal of the variable resistance unit Rb.

[0097] Figure 9 The voltage switching module 240 in the first embodiment can be used to Figure 4 The voltage switching module 240a in the second embodiment, Figure 5 The voltage switching module 240a and the voltage switching module 240b in the third embodiment, for providing the analog second control signal T2.

[0098] In some embodiments, as shown in Figure 10 The specific structure of the fuse module 210 involved in the embodiments of the present application can include: a first fuse array 211 and a voltage switching unit 212 connected to the first fuse array 211; wherein the first fuse array 211 is configured to output multiple third control signals T3 <n:0>(n is a positive integer), wherein the third control signal can be a digital signal;

[0099] The voltage switching unit 212 includes a plurality of second voltage division resistors Ry connected in series between a power supply end VDD and a ground end GND, and the connection nodes of adjacent second voltage division resistors Ry are connected to the first ends of corresponding third switches K3; the second ends of the third switches K3 are used as the output ends of the first fuse array 211, for connecting corresponding check modules and outputting the first control signal T1; the control ends of the third switches K3 are connected to the first fuse array 211, and receive corresponding third control signals T3<0>-T3 <n>Used to control the opening or closing of multiple third switches K3 respectively.

[0100] Understandably, the voltage switching unit 212 includes a second voltage divider resistor Ry connected in series between the power supply terminal VDD and the ground terminal GND, such that the output voltage of each node between any two adjacent second voltage divider resistors Ry is different. A third switch K3 is connected at each output node. By selecting to turn on one or more third switches K3, the corresponding output voltage is output as the first control signal T1. The on / off state of these third switches K3 is controlled by the third control signal output by the fuse array 211, thereby realizing the function of editing the output voltage using the fuse array.

[0101] It should be noted that, in this embodiment of the disclosure, the fuse module 210 may include a plurality of first fuse arrays 211 and a voltage switching unit 212. For example... Figure 11 As shown, the fuse module 210 includes a first fuse array 211a and voltage switching units 212a and 211b connected thereto. At the node for adjusting the first voltage V1, a multiplexing module 250a can be connected to the output of the voltage switching unit 212a; at the control terminal for adjusting the variable resistor unit Vb, a multiplexing module 250b is connected to the output of the voltage switching unit 212b.

[0102] Furthermore, in one embodiment, such as Figure 11 As shown, the fuse module 210 may further include a second fuse array 213, but does not include a voltage switching unit. The second fuse array 213 may include multiple output terminals, each connected to... Figure 7A The first switch k11-k13 or Figure 7B The control terminals of the second switches k21-k23 are shown in the figure, with the second switches connected in parallel as an example.

[0103] It should be noted that since the multiple control switches (first switch or second switch) of the resistor array unit Ra are switched on and off by high / low levels respectively, and the control signals T1 or T2 are digital signals, the resistor array unit Ra corresponds to the second fuse array 213, excluding the voltage switching unit. In this case, the voltage switching module corresponding to the resistor array unit Ra can be a circuit that provides multiple digital signals to provide multiple control signals T2. The voltage value of the control signal T2 can be 0V or the power supply voltage VDD.

[0104] Based on the same inventive concept, this disclosure also provides a calibration method for a logarithmic detector, used for calibrating... Figure 2 The logarithmic detector shown is calibrated as follows, in conjunction with the reference. Figure 2 and Figure 12 To illustrate this calibration method, the calibration method includes the following steps:

[0105] Step S101, start calibration; because the processes of different batches of logarithmic detectors have deviations, different logarithmic detectors output different signals when inputting the same radio frequency signal, and calibration is needed;

[0106] Step S102, input a radio frequency signal to the logarithmic detector; specifically, input a known radio frequency signal to the radio frequency logarithmic amplifier 110 in the logarithmic detector, and when the logarithmic detector does not have process deviation, the logarithmic detector will output a fixed output signal after receiving the known radio frequency signal, and the fixed output signal is the target output signal; Figure 2

[0107] Step S103, all the complex selection modules select the corresponding second control signal T2 as the output, sequentially control different second control signals T2 output by each complex selection module, and sequentially detect the output signal of the logarithmic detector under different output values; if the process of the logarithmic detector has deviation, the output signal of the logarithmic detector is not the target output signal, compensation is needed to make the output signal of the logarithmic detector reach the target output signal. Specifically, during calibration, the complex selection module selects the corresponding second control signal T2 as the output, sequentially traverses the value of the second control signal T2, controls the gear of the compensation current I0 under each value of the second control signal T2, and detects whether the output signal of the logarithmic detector reaches the target output signal under different gears of the compensation current I0.

[0108] Take the current compensation circuit as an example Figure 11 The current compensation circuit shown in FIG. 10 includes three complex selection modules and has three-stage adjustment. It is assumed that the complex selection module 250a corresponds to A1 second control signals T2, the complex selection module 250b corresponds to A2 second control signals T2, and the complex selection module 250c corresponds to A3 second control signals T2. Then, the entire current compensation circuit can realize A1×A2×A3 gears of the compensation current I0, and in step S103, A1×A2×A3 gears can be sequentially output and adjusted.

[0109] Step S104, determine the output value of the second control signal T2 selected by each complex selection module according to the output signal of the logarithmic detector; specifically, when the value of the second control signal T2 is in a certain condition, the output signal of the logarithmic detector is the same as the target output signal, which indicates that the compensation current I0 can compensate for the process deviation at this time; therefore, the second control signal T2 at this time can be used as the target control signal to compensate for the process deviation;

[0110] ​In step S105, the output value of the second control signal (target control signal) selected by each check module is burned into the fuse module, for example, the target second control signal of each check module is burned into the corresponding fuse array, and each check module is controlled to receive the first control signal T1 provided by the fuse module. At this time, the connection end of each check module receiving the second control signal can be cut off, or can be retained.

[0111] In the case of normal operation after calibration, the check module selects to receive the first control signal T1 output by the fuse module; through the first control signal T1, the current compensation circuit can output appropriate compensation current, thereby compensating the intercept of the logarithmic curve of the logarithmic detector, thereby eliminating the influence of process deviation.

[0112] The logarithmic detector of each of the foregoing embodiments can be used for detecting a radio frequency channel, as shown in FIG. 1, and the present embodiment also provides a chip 400, comprising: at least one radio frequency channel 410; a logarithmic detector 420 connected with the radio frequency channel 410, used for detecting a radio frequency signal RF provided by the radio frequency channel 410. Generally, the chip 400 also comprises a radio frequency amplifier, a mixer, a filter, etc., which are not limited here. Figure 13 The logarithmic detector 300 and the chip 400 have the same inventive concept as the current compensation circuit 200, and the specific implementation manner can refer to the description in any embodiment, which will not be repeated here.

[0113] It should be understood that "some embodiments", "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily mean the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present disclosure, the size of the serial number of each process does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial number of the embodiments of the present disclosure is only for description, not representing the advantages and disadvantages of the embodiments.

[0114]

[0115] ​It should be noted that, in the present document, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises a", "comprising", or "comprises" does not, without further restriction, exclude the presence of other elements of the process, method, article, or apparatus that comprises the element.

[0116] The above merely shows the embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure.< / n>

Claims

1. A current compensation circuit, characterized in that, include: A current mirror includes a first transistor and a second transistor, the first transistor and the second transistor respectively including a first terminal, a second terminal and a control terminal, the current mirror being configured to mirror a first current flowing through the first terminal of the first transistor to the first terminal of the second transistor, the first terminal of the second transistor outputting a compensation current; A resistor module is connected to the first terminal of the first transistor. The resistance value of the resistor module and the first voltage at the first terminal of the first transistor are used to determine the magnitude of the first current. A fuse module includes one or more fuse arrays connected to the resistor module and / or the first terminal of the first transistor. The fuse array is used to output a corresponding first control signal based on the fuse state, apply the first control signal to the first terminal of the corresponding first transistor to adjust the first voltage, or apply the first control signal to the corresponding resistor module to adjust the resistance value of the resistor module connected to the first terminal of the first transistor.

2. The current compensation circuit according to claim 1, characterized in that, The resistor module includes: Variable resistor unit, resistor array unit, or series / parallel variable resistor unit and resistor array unit; The control terminal of the variable resistor unit receives the first control signal output by the fuse module to control the first resistance value of the variable resistor unit. The resistor array unit includes multiple resistor elements, which are used to change the number of resistor elements in the path where the first current is connected by the first control signal output by the fuse module, so as to control the second resistance value of the resistor array unit.

3. The current compensation circuit according to claim 2, characterized in that, The variable resistor unit includes: a third transistor; The control terminal of the third transistor receives the first control signal, and the first and second terminals of the third transistor are connected in series with the resistor array unit to adjust the first resistance value of the third transistor.

4. The current compensation circuit according to claim 2, characterized in that, The resistor array unit includes: A plurality of first resistive elements connected in series, and a plurality of first switches, wherein the first and second terminals of the first switches are connected in parallel with the first resistive elements; The control terminal of the first switch receives the corresponding first control signal.

5. The current compensation circuit according to claim 2, characterized in that, The resistor array unit includes: A plurality of second resistive elements connected in parallel, and a plurality of second switches, wherein the first and second terminals of the second switches are connected in series with the second resistive elements; The control terminal of the second switch receives the corresponding first control signal.

6. The current compensation circuit according to claim 1, characterized in that, Also includes: A voltage follower, connected to the first terminal of the first transistor, is used to receive the first control signal and control the first voltage at the first terminal of the first transistor.

7. The current compensation circuit according to claim 6, characterized in that, The voltage follower includes: an operational amplifier; the negative input terminal of the operational amplifier is used to receive the first control signal, the non-inverting input terminal of the operational amplifier is connected to the drain of the first transistor, and the output terminal of the operational amplifier is connected to the gate of the first transistor; or, The voltage follower includes an operational amplifier and a fourth transistor. The negative input terminal of the operational amplifier is used to receive the first control signal. The positive input terminal of the operational amplifier is connected to the first terminal of the fourth transistor. The output terminal of the operational amplifier is connected to the control terminal of the fourth transistor. The second terminal of the fourth transistor is connected to the drain of the first transistor.

8. The current compensation circuit according to any one of claims 1 to 7, characterized in that, Also includes: One or more voltage switching modules, with the output terminal used to output multiple second control signals; The second control signal is used to calibrate the resistance value of the resistor module and / or the magnitude of the first voltage; One or more multiplexing modules have their input terminals connected to the output terminals of the voltage switching modules and the fuse modules, and their output terminals are connected to the resistor modules and / or the first terminals of the first transistors; the multiplexing modules are used to select one of the second control signal and the first control signal for output.

9. The current compensation circuit according to claim 8, characterized in that, The voltage switching module includes: a plurality of first voltage divider resistors connected in series between the power supply terminal and the ground terminal, and the nodes adjacent to the first voltage divider resistors serve as output terminals, which are used to output an alternative voltage to the multiplexing module; The multiplexing module selects one of the alternative voltages as the second control signal.

10. The current compensation circuit according to any one of claims 1 to 7, characterized in that, The fuse module includes: The first fuse array is used to output multiple third control signals based on the fuse state; The voltage switching unit includes: multiple second voltage divider resistors connected in series between the power supply terminal and the ground terminal, and multiple third switches; adjacent nodes of the second voltage divider resistors are connected to the first terminals of the corresponding third switches; the second terminals of the third switches are connected together as the output terminals of the fuse module for outputting the first control signal; the control terminals of the third switches are connected to the first fuse array and receive the corresponding third control signal.

11. A logarithmic detector, characterized in that, include: A logarithmic amplifier used to receive radio frequency signals and output a second current. ； The current compensation circuit as described in any one of claims 1 to 10; The arithmetic unit is connected to the logarithmic amplifier and the current compensation circuit. The arithmetic unit receives the second current and the compensation current, and outputs a third current.

12. The logarithmic detector according to claim 11, characterized in that, Also includes: The output unit is connected to the arithmetic unit and receives the third current and converts it into an output voltage. A feedback unit is connected to the arithmetic unit and to the output terminal of the output unit; the feedback unit is used to provide feedback current to the arithmetic unit based on the output voltage. The arithmetic unit specifically obtains the third current based on the first current and the second current, and outputs the third current to the output unit.

13. A chip, characterized in that, include: At least one radio frequency channel; The logarithmic detector as described in claim 11 or 12 is connected to the radio frequency channel and is used to detect the radio frequency signal provided by the radio frequency channel.

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