A high-speed voltage acquisition device and method

Abstract

The application provides a high-speed voltage acquisition device and method, and relates to the technical field of industrial automation testing.The device comprises a lower computer, an ADC, an upper computer, an Ethernet module and a busbar connector; the ADC is connected with a pressure sensor interface through the busbar connector and is used for collecting voltage data; the lower computer comprises an MCU, the MCU is electrically connected with the ADC, data is sent to the ADC and data sent by the ADC is received by using an analog SPI mode; voltage data received is compressed, and then the compressed data is sent to the upper computer through the Ethernet module; the upper computer analyzes the compressed data and converts the data into actual voltage values.The high-speed voltage acquisition device realizes high-speed and reliable acquisition and transmission of pressure sensor signals at a 10kHz sampling rate under a 100m communication distance, significantly improves data transmission efficiency and signal restoration accuracy, and reduces MCU resource consumption.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of industrial automation testing, in particular to a high-speed voltage acquisition device and method. BACKGROUND

[0002] In the field of industrial production and safety protection, the performance of explosion-proof valves, as key safety equipment, needs to be accurately evaluated and monitored. Explosion-proof valve test benches, as specialized equipment for detecting, evaluating, and verifying the performance of explosion-proof valves, can simulate extreme working conditions and comprehensively test key parameters such as opening pressure, sealing performance, pressure resistance, and response time, providing important basis for the design, manufacturing, improvement, and safety of actual application of explosion-proof valves.

[0003] During the testing of explosion-proof valves, the acquisition of pressure sensor signals is one of the core steps. Pressure sensors can sense the pressure changes in the environment of explosion-proof valves in real time and convert them into electrical signals for output. Accurate and high-speed acquisition of these pressure signals is essential for precise analysis of the performance of explosion-proof valves under different working conditions, timely detection of potential safety hazards, and optimization of design parameters of explosion-proof valves. However, existing explosion-proof valve test benches need to acquire pressure sensor signals at a distance of 30 meters at high speed, as the pressure sensor outputs a 0-5V voltage signal (analog signal) that needs to be acquired at high speed with a sampling rate of 10kHz (10,000 data points per second). The existing LabVIEW module based on USB 3.0 communication is limited to a maximum communication distance of 5 meters, which cannot meet the requirements. Ordinary data acquisition modules generally only have a sampling rate of 10Hz, which cannot meet the requirement of 10kHz sampling rate. SUMMARY

[0004] To address the technical problems in the prior art that explosion-proof valve test benches need to acquire pressure sensor signals at a distance and at high speed, and the current communication distance cannot achieve long-distance transmission and the sampling rate of ordinary data acquisition modules cannot meet the high-speed acquisition requirement, the present application proposes a high-speed voltage acquisition device and method to meet the requirements.

[0005] To achieve the above purposes, the technical solution adopted by the present application is as follows:

[0006] A voltage acquisition method applied to a high-speed voltage acquisition device, the high-speed voltage acquisition device comprising: a lower computer, an analog-to-digital converter (ADC), an upper computer, a W5500 Ethernet module, and a busbar connector; the ADC is connected with a pressure sensor through the busbar connector, and is used for acquiring voltage data; the lower computer comprises a microcontroller (MCU), the MCU is electrically connected with the ADC, data is sent to the ADC and data sent by the ADC is received by using an analog SPI mode; voltage data received is compressed, and then the compressed data is sent to the upper computer through the W5500 Ethernet module; the upper computer receives the compressed data sent by the MCU through the W5500 Ethernet module through an Ethernet card, and performs data analysis and conversion into actual voltage values; the method comprises: initializing and power configuring the high-speed voltage acquisition device; the ADC acquires voltage data of the pressure sensor; the MCU stores original 18-bit ADC data collected from the ADC into a uint32_t variable, adopts a queue data structure to buffer the collected data, adopts a formula conversion to convert integer data into floating-point voltage data when dequeuing, and transmits floating-point voltage data buffered in 10 ms of each channel to the upper computer after compression processing by using a compression technology; the upper computer receives the compressed data, and performs analysis to obtain actual voltage values.

[0007] The floating-point voltage data is compressed by using a compression technology, and the compression processing comprises the following steps:

[0008] The neural network model is pre-trained by using a series of simulated acquired voltage data, the data are floating-point voltage readings collected in a real circuit environment, and the numerical range is stable at 1 to 5 V; the data acquisition process covers various working conditions and load scenes, including different temperature environments, power fluctuation conditions and signal noise interference; the data enable the autoencoder to learn the essential features and distribution rules of the voltage signal; the encoder and the decoder of the autoencoder adopt an asymmetric design, the encoder part is responsible for gradually compressing 100-dimensional floating-point data input by the lower computer MCU into a low-dimensional potential space, the encoder adopts a three-layer neural network structure, specifically: the input is first linearly mapped from 100 to 32 and activated through ReLU, then sequentially linearly mapped from 32 to 16 and from 16 to 10, also activated through ReLU, and finally outputs 10-dimensional features in the potential layer and uses the Tanh function to constrain the representation range;

[0009] On the pre-trained neural network model, a structured pruning algorithm is adopted, which specifically includes three stages: first, the model is pre-trained, and the complete autoencoder architecture is used to train the collected 1-5V voltage dataset to learn the effective feature representation and reconstruction rule of the input data; this stage uses the Adam optimizer and the mean square error loss function to update all weight parameters through batch gradient descent, ensuring that the model has a good initial performance basis; then, a differential pruning operation is performed, and an asymmetric pruning strategy is adopted according to the different deployment environments and functional requirements of the encoder and decoder; the MCU end encoder adopts a pruning ratio of 20%-50%, which greatly reduces the parameter quantity and calculation demand; the pruning process is based on the weight size criterion, and the weight connection with the largest absolute value is retained in each layer, and the rest is zeroed to form a sparse network structure; finally, fine-tuning training with mask constraint is performed on the sparse architecture after pruning to continue optimizing the remaining parameters; during the fine-tuning process, a mask protection mechanism is introduced, and the pruning mask is reapplied after each training step to ensure that the pruned weights remain zero value at all times, preventing the recovery of redundant connections by gradient update; this stage enables the model to maintain high sparsity while gradually recovering the accuracy loss caused by pruning, ultimately obtaining a lightweight and high-performance neural network model.

[0010] Compared with the prior art, the beneficial effects of the present application are:

[0011] 1. Realize long-distance high-speed signal acquisition: in the prior art, the maximum communication distance of the LabVIEW module based on USB 3.0 communication is only 5 meters, which cannot meet the 30-meter long-distance transmission requirement. The present application not only achieves the goal of high-speed data transmission at a distance of 30 meters, but also expands the communication distance to 100 meters, fully meeting the needs of long-distance signal acquisition in industrial scenes such as explosion-proof valve test benches. In addition, the sampling rate of ordinary data acquisition modules is usually only 10Hz, which cannot meet the requirement of a sampling rate of 10kHz. The ADS8698-ISO module used in the present application has a sampling rate of 500ksps, which, combined with the efficient communication of the MCU, realizes 8-channel 10kHz high-speed signal acquisition and accurately captures the transient characteristics of pressure changes.

[0012] 2. Efficient data processing and caching: a separate coding and decoding architecture is adopted, and data compression is realized through a lightweight neural network, with a compression ratio of nearly 40:1, which significantly reduces the data transmission volume and avoids the problem of SPI transmission blocking ADC acquisition. The collected data is cached using a queue data structure, and is packaged and sent every 10ms, solving the contradiction between the acquisition rate and the network transmission rate, and ensuring the continuity and real-time performance of data transmission.

[0013] 3. Reliable Communication Protocol Selection: Compared to TCP, UDP has lower header overhead (saving approximately 20%), is simpler to implement in embedded systems, and avoids data backlog issues. Combined with the W5500 Ethernet module, it ensures reliable 10ms timed transmission, meeting real-time requirements.

[0014] 4. High-precision signal restoration and storage: The host computer receives UDP data packets and uses PC computing power to perform high-precision decoding, restoring the compressed data to the actual voltage value and storing it in a MySQL database, ensuring data integrity and traceability. The decoder employs a four-layer neural network structure, effectively learning low-dimensional latent representations, achieving feature decompression and information reconstruction, maintaining consistency between input and output, and improving the accuracy of signal restoration.

[0015] 5. Low resource consumption and high adaptability: Addressing the resource constraints of MCUs, a structured pruning optimization strategy is employed, significantly reducing the number of neural network parameters and computational complexity while maintaining high model accuracy. Furthermore, quantization further reduces the numerical precision of model weights and activation values, decreasing storage space and transmission bandwidth requirements. Simultaneously, the impact of quantization errors on system accuracy is minimized, ensuring system stability and reliability.

[0016] 6. Improved Testing Accuracy and Reliability: Through high-speed, long-distance signal acquisition and transmission, the transient characteristics of pressure changes in explosion-proof valves under different operating conditions were accurately captured, providing reliable data support for performance evaluation and fault diagnosis of explosion-proof valves. This avoids the problem of signal distortion caused by electromagnetic interference when transmitting analog signals directly over long distances via cables, thus improving the accuracy and reliability of test results.

[0017] Other features and advantages of the embodiments of this application will be described in detail in the following detailed description section. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the ADS8698-ISO module structure according to Embodiment 1 of the present invention;

[0019] Figure 2 This is a schematic diagram of the interface circuit between the ADS8698-ISO module and the MCU according to Embodiment 1 of the present invention;

[0020] Figure 3 This is a schematic diagram of the interface circuit between the ADS8698-ISO module and an external voltage sensor according to Embodiment 1 of the present invention.

[0021] Figure 4 This is a flowchart of a high-speed voltage acquisition method according to Embodiment 2 of the present invention;

[0022] Figure 5This is a schematic diagram of an autoencoder model according to Embodiment 2 of the present invention;

[0023] Figure 6 This is a diagram of the voltage acquisition communication data format according to Embodiment 2 of the present invention. Detailed Implementation

[0024] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings, so as to more clearly understand the purpose, features and advantages of this invention. It should be understood that the embodiments shown in the drawings are not intended to limit the scope of this invention, but are only for illustrating the essential spirit of the technical solutions of this invention. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0025] Unless the context requires otherwise, throughout the specification and claims, the word “comprising” and its variations, such as “including” and “having”, shall be understood to have an open, inclusive meaning, that is, to be interpreted as “including, but not limited to”.

[0026] Throughout this specification, references to "an embodiment" or "an embodiment" indicate that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Therefore, the appearance of "in an embodiment" or "an embodiment" in various places throughout the specification does not necessarily refer to the same embodiment. Furthermore, a particular feature, structure, or characteristic may be combined in any manner in one or more embodiments.

[0027] The singular forms “a” and “the” used in this specification and the appended claims include plural references unless otherwise expressly stated herein. It should be noted that the term “or” is generally used to mean “and / or” unless otherwise expressly stated herein.

[0028] In the following description, in order to clearly demonstrate the structure and working method of the present invention, a number of directional terms will be used. However, terms such as "front", "back", "left", "right", "outside", "inside", "outward", "inward", "up", and "down" should be understood as convenient terms and not as limiting terms.

[0029] The implementation details of the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following content is only for the convenience of understanding the implementation details and is not necessary for implementing this solution.

[0030] In the field of industrial automation testing and monitoring, especially in scenarios involving the performance testing of critical equipment such as explosion-proof valves, stringent requirements are placed on the high-speed, long-distance acquisition and transmission of sensor signals. Taking existing explosion-proof valve test benches as an example, they need to acquire the 0-5V voltage signal (analog signal) output by the pressure sensor at a high-speed sampling rate of 10kHz at a distance of 30 meters to accurately capture the transient characteristics of pressure changes and provide reliable data support for the performance evaluation and fault diagnosis of explosion-proof valves.

[0031] However, current technical solutions have significant limitations. On the one hand, while LabVIEW modules based on USB 3.0 communication possess high-speed data transmission capabilities, their maximum communication distance is only 5 meters, which is insufficient to meet the requirement of long-distance transmission of 30 meters. On the other hand, the sampling rate of ordinary data acquisition modules is typically only 10Hz, far from the high-speed sampling requirement of 10kHz, making it impossible to accurately capture transient changes in pressure signals. Furthermore, if analog signals are directly transmitted via long-distance cables, they are not only susceptible to electromagnetic interference leading to signal distortion, but also suffer from reduced acquisition accuracy due to signal attenuation, thus affecting the accuracy and reliability of the test results.

[0032] To overcome the aforementioned technical bottlenecks, this invention proposes a novel high-speed voltage acquisition device. By integrating core technologies such as multi-channel high-speed acquisition (e.g., providing 8 voltage acquisition channels to acquire pressure sensor signals (1-5V) at a frequency of 10kHz), efficient data processing, lightweight data transmission, and intelligent analysis by the host computer, it achieves high-speed acquisition and reliable transmission of pressure sensor signals at a distance of 30 meters or even 100 meters at 10kHz, providing a high-performance and high-reliability signal acquisition solution for industrial scenarios such as explosion-proof valve test benches.

[0033] Example 1

[0034] This embodiment discloses a high-speed voltage acquisition device, which is mainly used in industrial scenarios such as explosion-proof valve test benches. This device meets the stringent requirements for high-speed, long-distance acquisition and transmission of pressure sensor signals in industrial settings.

[0035] refer to Figures 1 to 3 A high-speed voltage acquisition device includes a microcontroller (MCU), an analog-to-digital converter (ADC), a host computer, a W5500 Ethernet module, and a female connector.

[0036] The hardware design of the high-speed voltage acquisition device adopts a modular, layered stacking design. Specifically, the ADC uses the ADS8698-ISO module (integrating SPI digital isolation and high-performance voltage regulation circuitry). The ADS8698 is an 8-channel, 18-bit resolution, 500ksps sampling rate successive approximation register (SAR) analog-to-digital converter (ADC) from Texas Instruments (TI). The ADS8698's 8 channels, 18-bit resolution, and 500ksps sampling rate directly match the high-speed voltage acquisition device's requirement of "8 voltage acquisition channels + 10kHz sampling rate," with a range configuration of 0-5.12V, covering the 1-5V output range of the pressure sensor, ensuring signal acquisition accuracy. The high-speed voltage acquisition device uses a DC-DC power module K7805-2000R3 to convert the 24V DC input power to a 5V DC output. Figure 1 As shown, a 5V DC power supply is connected to the ADS8698-ISO module to power it. The ADS8698-ISO module is connected to the pressure sensor interface via a female connector.

[0037] The MCU uses an STM32F407ZGT6 chip, which sends data to and receives data from the ADC via simulated SPI. The MCU's PD8, PD9, PD10, PD11, PD13, and PD15 pins are connected to the SPI interface communication pins SDO, DAISY, SCLK, CS, RESET, and SDI of the ADS8698-ISO module, establishing the electrical connection between the MCU and the ADC. This simulated SPI data transmission means manually simulating the SPI protocol timing signals using the MCU's general-purpose input / output (GPIO) ports, rather than relying on a hardware SPI peripheral, to achieve communication with the ADC.

[0038] The time required for the MCU to read data from the 8-channel ADC using simulated SPI includes: single-channel time (chip select time, 1 GPIO write operation), time to write two bytes of data (including 24 GPIO write operations and 8 register operations), time to read 18 bits of data (including 36 GPIO write operations, 18 GPIO read operations, and 18 register and conditional operations), and chip select deselect time (1 GPIO write operation). By achieving efficient communication between the MCU and the ADC through simulated SPI, with the GPIO set to 50MHz, the time for a single channel is approximately 2.34µs, and the data reading time for all 8 channels is approximately 18.72µs, far lower than the 10kHz sampling period (100μs), meeting real-time requirements.

[0039] In some embodiments, the data processing and caching architecture of the high-speed voltage acquisition device employs data compression and queue concatenation techniques. Since 18-bit ADC data requires 3 bytes, it is stored using uint32_t (32-bit unsigned integer) and converted to floating-point voltage using formulas, reducing storage overhead. To resolve the contradiction of "acquisition rate > network transmission rate," a queue data structure is used to cache data, which is then sent in packets every 10ms. Without compression, 8 channels × 10kHz × 3 bytes / sample = 2400 bytes / 10ms; adding the header / checksum, the total transmission volume is approximately 2407 bytes. Compression techniques (such as separate encoding / decoding) can reduce the data volume and prevent SPI transmission (2407 bytes at a 42MHz clock speed requires approximately 457μs) from blocking ADC acquisition (a new acquisition needs to be started every 100μs). Without compression or queue caching, direct transmission would cause the CPU to be blocked for a long time, affecting sampling continuity.

[0040] In some embodiments, the high-speed voltage acquisition device selects the UDP protocol for data transmission. Compared to TCP, which requires handling connection, retransmission, and congestion control, UDP has lower header overhead (saving approximately 20%), and its embedded implementation is simpler, avoiding data accumulation. Combined with the W5500 Ethernet module, data is converted into Ethernet frames via the SPI interface for transmission, ensuring the reliability of 10ms timed transmissions.

[0041] The host computer receives compressed data sent by the MCU via the W5500 Ethernet module through its Ethernet network card, and performs data parsing and storage: the host computer parses the UDP packets sent by the MCU, extracts the 8-channel voltage data (including compression identifiers), converts it into actual voltage values, and finally stores it in the MySQL database. This process must strictly match the data packaging format (such as message header, number of data items, checksum) of the MCU (lower-level computer) to ensure data integrity.

[0042] The novel high-speed voltage acquisition device in this embodiment is applied to industrial scenarios such as explosion-proof valve test benches. Through a modular and layered hardware design, it adopts an ADC and MCU adapted to meet the requirements and achieves efficient communication. It uses data compression and queue splicing technology to solve the contradiction between acquisition and transmission rates. The UDP protocol is selected in conjunction with the W5500 Ethernet module to ensure reliable data transmission. The host computer accurately parses and stores the data, meeting the stringent requirements for high-speed acquisition and reliable transmission of pressure sensor signals at a distance of 30 meters at 10kHz.

[0043] Example 2

[0044] Based on Example 1, the W5500 Ethernet module connects to the MCU via SPI, then converts the data into Ethernet transmission and reception. In the STM32F407ZGT6 chip, the SPI clock frequency is 42MHz, so the fastest transmission time per byte is: 2407 bytes transfer time: This will affect the 100µs ADC acquisition, so a separate encoding and decoding architecture was designed.

[0045] The separate encoding / decoding architecture achieves data compression through a lightweight neural network and allocates tasks based on the differences in device computing power: the lower-level machine (MCU) with limited computing power focuses on data acquisition and compression. The encoder in the MCU adopts a three-layer neural network structure. The upper-level machine (PC) is responsible for high-precision decoding and storage, and the decoder adopts a four-layer neural network structure. The system employs an intelligent model pruning strategy and a reliable transmission protocol, significantly reducing MCU resource consumption and ensuring data transmission reliability while maintaining a compression ratio of nearly 40:1.

[0046] This embodiment provides a voltage acquisition method based on the high-speed voltage acquisition device of Embodiment 1. This method employs a separate encoding / decoding architecture, such as... Figure 4 As shown, the method specifically includes the following steps:

[0047] Step 1: Initialization and power configuration.

[0048] The 24V DC input power is converted to 5V DC output using a K7805-2000R3 DC-DC power module. This 5V DC power is then connected to the ADS8698-ISO module to power it. The hardware of the high-speed voltage acquisition device is then initialized.

[0049] Step 2: Collect voltage data from the pressure sensor.

[0050] Voltage acquisition is performed on each single channel, including the following steps:

[0051] Chip Select: The MCU performs one GPIO write operation to select a specific channel of the ADS8698-ISO module.

[0052] Write data: The MCU performs 24 GPIO write operations and 8 register operations to send control commands or configuration data to the ADC.

[0053] Reading data: The MCU performs 36 GPIO write operations, 18 GPIO read operations, and 18 register and judgment operations to read 18-bit voltage data from the ADC.

[0054] Deselect chip: The MCU performs one GPIO write operation to end the acquisition of the current channel.

[0055] Multi-channel voltage acquisition: Repeat the single-channel voltage acquisition steps to complete the voltage acquisition of all 8 channels in sequence.

[0056] Efficient communication between the MCU and ADC is achieved by simulating SPI. With GPIO set to 50MHz, the time for a single channel is about 2.34µs, and the total data reading time for 8 channels is about 18.72µs, which meets the real-time requirement of a 10kHz sampling period (100μs).

[0057] Step 3: Cache and compress the collected voltage data.

[0058] The lower-level machine (MCU) stores the raw 18-bit ADC data acquired from the ADC into a uint32_t variable (32-bit unsigned integer). It uses a queue data structure to buffer the acquired data. When dequeuing, it uses a formula conversion to convert the integer data into floating-point voltage data. Each channel applies compression technology to compress the floating-point voltage data buffered within 10ms before preparing it for transmission, reducing storage overhead.

[0059] Specifically, each channel generates 100 floating-point voltage data points (1-5V) within 10ms using a formula. These are then compressed into a 10-byte feature vector by a pruned lightweight neural network, converting the 100 floating-point voltage data points into 10 8-bit integers (0-255), achieving a compression ratio of approximately 40:1. The lightweight encoder employs a 3-layer MLP network (100→32→16→10), and through pruning and quantization optimization, it is adapted to the low-computing-power environment of MCUs.

[0060] In some embodiments, the lower-level machine employs compression technology, including the following steps:

[0061] S3-1, Neural Network Pre-training.

[0062] The neural network is trained using a series of simulated voltage data, consisting of floating-point voltage readings acquired in real-world circuit environments, with values ​​stable between 1 and 5V. The data acquisition process covers various operating conditions and load scenarios, including different temperature environments, power supply fluctuations, and signal noise interference, ensuring the diversity and representativeness of the training data. This high-quality dataset enables the autoencoder to learn the essential characteristics and distribution patterns of the voltage signal, thus maintaining high fidelity during compression and reconstruction. Furthermore, an "online calibration / domain adaptation mechanism" (periodically embedding a small number of original samples for lightweight recalibration) is employed as a robustness measure.

[0063] The encoder and decoder employ an asymmetric design to balance compression efficiency and reconstruction accuracy. The autoencoder model is as follows: Figure 5As shown, the encoder is responsible for progressively compressing the 100-dimensional floating-point data input from the lower-level machine (MCU) into a low-dimensional latent space. The encoder employs a three-layer neural network structure: the input first undergoes a linear mapping from 100 to 32 and is activated by ReLU (Rectified Linear Unit), followed by linear layers from 32 to 16 and then from 16 to 10, also activated by ReLU. Finally, the latent layer outputs 10-dimensional features, and the representation range is constrained by the Tanh function. Therefore, the encoder compresses 100-dimensional floating-point data into 10-dimensional byte data, greatly reducing the communication burden.

[0064] S3-2. Apply a pruning algorithm to the pre-trained neural network model.

[0065] Subsequently, considering the limited resources of the MCU, a pruning algorithm was adopted on the pre-trained neural network model to minimize the amount of computation and memory usage while ensuring accuracy. The model pruning stage is after the autoencoder has completed 26 epochs of pre-training. Here, epoch represents the process during neural network training where the entire dataset is completely input and propagates forward and backward once.

[0066] To improve the real-time performance and computational efficiency of embedded deployments, this embodiment employs a structured pruning optimization strategy, significantly reducing the number of neural network parameters and computational complexity. Structured pruning is a technique that systematically removes entire layers, channels, or rows / columns of weighted connections from a neural network. Its core principle is to reduce the number of model parameters and computational complexity in a rule-based manner while maintaining hardware friendliness.

[0067] This embodiment employs a structured pruning optimization strategy, the implementation of which is divided into three key stages:

[0068] First, the model is pre-trained using a complete autoencoder architecture on a collected 1-5V voltage dataset to learn effective feature representations and reconstruction patterns from the input data. In this stage, the Adam optimizer and mean squared error loss function are used, and all weight parameters are updated through batch gradient descent to ensure the model achieves a good initial performance foundation.

[0069] Subsequently, differentiated pruning operations are performed, employing an asymmetric pruning strategy based on the different deployment environments and functional requirements of the encoder and decoder. For the encoder portion, which will run on a resource-constrained MCU, a more aggressive pruning ratio of 20%-50% is adopted, significantly reducing the number of parameters and computational requirements. The pruning process is based on a weighting principle, retaining the weight connection with the largest absolute value (1-pruning ratio) at each layer, and setting the rest to zero, forming a sparse network structure.

[0070] Finally, fine-tuning training with mask constraints is performed to further optimize the remaining parameters on the pruned sparse architecture. A mask protection mechanism is introduced during fine-tuning, reapplying the pruned mask after each training step to ensure that pruned weights remain at zero values, preventing gradient updates from restoring redundant connections. This stage allows the model to maintain high sparsity while gradually recovering the accuracy loss caused by pruning, ultimately resulting in a lightweight yet high-performance neural network model that meets the real-time voltage signal processing requirements of embedded systems.

[0071] S3-3. Quantize the pruned neural network model.

[0072] Quantization of a structured pruning neural network model involves reducing the numerical precision of model weights and activation values ​​(e.g., converting them from 32-bit floating-point numbers to 8-bit integers). This process maintains the lightweight advantage of the pruned model while further compressing storage space and improving hardware computing efficiency, while also weighing the impact of quantization errors on system accuracy.

[0073] This implementation enables bidirectional conversion between floating-point numbers in the range [-1, 1] and 8-bit integers, adapting to varying storage and transmission requirements. On the lower-level device (MCU), the conversion from floating-point to 8-bit integers (quantization) is implemented, mapping floating-point numbers in the range [-1, 1] proportionally to [0, 255], compressing the data bit width to save storage space (from 32-bit floating-point to 8-bit integer) and transmission bandwidth. The quantization formula is as follows:

[0074]

[0075] in, round The function is a rounding function, where x represents the normalized value of the input signal, typically within [...]. Q(x) represents the quantized integer value between [0, 255], where [x, 1] is the integer value.

[0076] Finally, the trained neural network model is ported to the MCU. Zero weights are skipped by pruning masks to reduce multiplication operations. The MCU first loads the pruned parameters trained in Python using C language and then implements the encoder program.

[0077] Step 4: Transmit the compressed data to the host computer.

[0078] During the process of transmitting compressed data to the host computer, the compressed data needs to be encapsulated using a standardized data packet format to ensure communication reliability and parsing efficiency, such as... Figure 6 As shown, the data packet structure includes:

[0079] 1. Frame header: 4 bytes (0xAA, 0xBB, 0xCC, 0xDD);

[0080] 2. Data length: 2 bytes (indicating the number of subsequent valid data bytes);

[0081] 3. Data field;

[0082] 4. Checksum: 1 byte (cumulative checksum).

[0083] Specifically, the data packet structure adopts a layered design: the frame header is a 4-byte fixed identifier (0xAA, 0xBB, 0xCC, 0xDD) used to synchronize the receiver and identify the start of the data packet; the data length field occupies 2 bytes, explicitly indicating the number of valid bytes in the subsequent data fields in unsigned integer form, supporting dynamic length data transmission; the data field carries the actual compressed measurement data (such as multi-channel voltage sampling values), and its content and length are dynamically defined by the upper-layer protocol; the checksum is a 1-byte cumulative sum, generated by summing all bytes in the data field bit by bit and taking the lower 8 bits, used by the receiver to verify data integrity, and triggering a retransmission mechanism if the check fails. This format balances communication efficiency (fixed length field occupies 6 bytes) and flexibility (variable data field length), and is suitable for high-speed, reliable data interaction scenarios between embedded systems and host computers.

[0084] The data packet structure also uses big-endian storage for multi-byte data. Big-endian storage means that the most significant byte of the data is stored in memory or at the low address (or starting position) of the data packet, and the remaining bytes are arranged in descending order of weight. In addition, a queue management method is used during data transmission. That is, to ensure successful data transmission, after C# successfully receives a data packet, it sends an acknowledgment signal. After the MCU receives the data transmission success signal, it removes the transmitted data from the queue.

[0085] In some embodiments, the UDP protocol is selected for data transmission to the host computer due to its low header overhead, simple embedded implementation, and ability to avoid data accumulation. The MCU sends data to the W5500 Ethernet module via the SPI interface. The W5500 Ethernet module converts the data into Ethernet frames and sends them to the host computer according to the UDP protocol to ensure the reliability of the 10ms timed transmission. After data compression, each channel corresponds to 10 bytes of data. The system sends these 10 bytes of channel data every 10ms using the UDP protocol, for a total of 80 bytes of data sent across 8 channels.

[0086] Step 5: The host computer receives the compressed data and parses it to obtain the actual voltage value.

[0087] The host computer utilizes PC computing power to achieve high-precision decoding, receiving and reconstructing data. This is implemented using C# programming. Within C#, the ONNX runtime is used to build the neural network required by the decoder in the autoencoder. The specific steps include:

[0088] S5-1: The host computer receives compressed data packets sent by the MCU via the UDP protocol.

[0089] During data transmission, the communication status can be visually represented by the indicator light color: when communication is in normal condition, the indicator light is bright green; if a communication failure occurs, specifically if there is no data transmission for 10 consecutive seconds, the indicator light will turn red; and when not in a test state or when communication has ended, the indicator light will be dark green.

[0090] S5-2. Perform data parsing and storage on the compressed data packet.

[0091] The decoder in the autoencoder parses the compressed data packets, progressively restoring the latent representation to data of the same dimension as the input. The decoder employs a four-layer neural network structure, such as... Figure 5 As shown, the process is as follows: 10→16 linear layers (ReLU activation), 16→32 linear layers (ReLU activation), 32→64 linear layers (ReLU activation), and finally 64→100 linear layers to output the reconstructed result. Through this structure, the model can effectively learn low-dimensional latent representations while maintaining consistency between input and output, achieving feature decompression and information reconstruction.

[0092] Differential pruning operations are then performed on the data that has undergone feature decompression and information reconstruction. The host computer adopts a relatively conservative pruning ratio of 10%-30% to maintain better signal reconstruction quality.

[0093] The pruned neural network model is dequantized using the following formula:

[0094]

[0095] Dequantization, the inverse process of quantization, remaps the quantized discrete integers back to their original numerical range (in this case, floating-point numbers within the range [-1, 1]). Through dequantization, approximate original floating-point information can be recovered from stored or transmitted 8-bit integer data, enabling the conversion of compressed data into actual voltage values. The converted voltage values ​​are then stored in a MySQL database to ensure data integrity and traceability.

[0096] This embodiment uses a pruned and compressed approach to process the collected voltage data, which has a significant effect compared to directly transmitting uncompressed data, as shown in Table 1.

[0097] Table 1. Optimization effect of pruning on the compressed transmission model

[0098]

[0099] This embodiment designs a separate encoding and decoding architecture. The lower-level machine (MCU) uses a lightweight neural network to focus on data acquisition and compression, while the upper-level machine (PC) is responsible for high-precision decoding and storage. It adopts an intelligent model pruning strategy and a reliable transmission protocol to achieve a compression ratio of nearly 40:1, reducing MCU resource consumption, ensuring transmission reliability, meeting real-time requirements, and adapting to different computing power environments through pre-training, pruning, quantization and other processing. The effect after compression and transmission is significant.

[0100] This invention addresses the need for long-distance, high-speed pressure sensor signal acquisition in explosion-proof valve test benches by providing a novel high-speed voltage acquisition device and method that integrates multi-channel high-speed acquisition, efficient data processing and compression, lightweight UDP data transmission, and intelligent analysis by the host computer. Through a separate encoding / decoding architecture and intelligent model pruning strategy, it achieves high-speed and reliable transmission at a 10kHz sampling rate over communication distances of 30 meters or even 100 meters, significantly reducing MCU resource consumption, improving data transmission efficiency and signal restoration accuracy, and providing a high-performance, high-reliability signal acquisition solution for industrial scenarios.

[0101] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the invention by those skilled in the art without departing from the spirit and essence of the invention. Such modifications or substitutions should all fall within the scope of the invention, or any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the invention should be covered within the protection scope of the invention. Therefore, the protection scope of the invention should be determined by the scope of the claims.

Claims

1. A voltage acquisition method applied to a high-speed voltage acquisition device, the high-speed voltage acquisition device comprising: Lower-level machine, analog-to-digital converter (ADC), upper-level machine, W5500 Ethernet module, and female connector; The ADC connects to the pressure sensor interface via a female connector for acquiring voltage data. The lower-level device includes a microcontroller (MCU), electrically connected to the ADC. The MCU sends data to and receives data from the ADC using an analog SPI interface. It compresses the received voltage data and then sends the compressed data to the upper-level device via a W5500 Ethernet module. The upper-level device receives the compressed data sent by the MCU via the W5500 Ethernet module through an Ethernet network card, parses the data, and converts it into the actual voltage value. The method is characterized by: initializing and configuring the power supply of the high-speed voltage acquisition device; the ADC acquiring voltage data from the pressure sensor; the MCU storing the raw 18-bit ADC data acquired by the ADC into a uint32_t variable, using a queue data structure to buffer the acquired data, and converting the integer data to floating-point voltage data using a formula conversion when dequeuing; each channel compressing the buffered floating-point voltage data within 10ms using compression technology before transmitting it to the upper-level device; and the upper-level device receiving the compressed data and parsing it to obtain the actual voltage value. The compression process for the floating-point voltage data includes the following steps: The neural network model is pre-trained using a series of simulated voltage data. These data are floating-point voltage readings collected in real circuit environments, with a stable value range between 1 and 5V. The data acquisition process covers various operating conditions and load scenarios, including different temperature environments, power supply fluctuations, and signal noise interference. This data enables the autoencoder to learn the essential characteristics and distribution patterns of the voltage signal. The encoder and decoder of the autoencoder adopt an asymmetric design. The encoder is responsible for progressively compressing the 100-dimensional floating-point data input from the lower-level MCU into a low-dimensional latent space. The encoder adopts a three-layer neural network structure, specifically: the input first undergoes a linear mapping from 100 to 32 and is activated by ReLU, then sequentially passes through linear layers from 32 to 16 and 16 to 10, also activated by ReLU, and finally outputs 10-dimensional features in the latent layer, using the Tanh function to constrain the representation range. A structured pruning algorithm is applied to a pre-trained neural network model. This algorithm comprises three stages: First, model pre-training is performed using a complete autoencoder architecture on a collected 1-5V voltage dataset to learn effective feature representations and reconstruction patterns of the input data. This stage uses the Adam optimizer and mean squared error loss function, updating all weight parameters through batch gradient descent to ensure a good initial performance foundation for the model. Subsequently, differentiated pruning is performed, employing an asymmetric pruning strategy based on the different deployment environments and functional requirements of the encoder and decoder. The MCU-side encoder is pruned... The pruning ratio is 20%-50%, significantly reducing the number of parameters and computational requirements. The pruning process is based on the weight size criterion, retaining the weight connection with the largest absolute value in each layer and setting the rest to zero, forming a sparse network structure. Finally, fine-tuning training with mask constraints is performed to continue optimizing the remaining parameters on the pruned sparse architecture. A mask protection mechanism is introduced during the fine-tuning process, and the pruning mask is reapplied after each training step to ensure that the pruned weights always remain at zero values, preventing gradient updates from restoring redundant connections. This stage enables the model to maintain high sparsity while gradually recovering the accuracy loss caused by pruning, ultimately obtaining a lightweight and high-performance neural network model.

2. The method according to claim 1, characterized in that, The ADC uses an ADS8698-ISO module with a range of 0-5.12V, covering the 1-5V output range of the pressure sensor. A DC-DC power supply module K7805-2000R3 converts the 24V DC input power to 5V DC output, and the 5V DC power supply is connected to the ADS8698-ISO module to power it. The ADS8698-ISO module is configured with 8 channels, 18-bit resolution, and a 500ksps sampling rate to simultaneously acquire 8 pressure sensor signals.

3. The method according to claim 2, characterized in that, The MCU uses an STM32F407ZGT6 chip. The PD8, PD9, PD10, PD11, PD13, and PD15 pins of the STM32F407ZGT6 chip are connected to the communication pins SDO, DAISY, SCLK, CS, RESET, and SDI of the SPI interface of the ADS8698-ISO module to realize the electrical connection between the MCU and the ADC. The time for the MCU to read a single channel using simulated SPI includes: chip select time, time to write two bytes of data, time to read 18 bits of data, and time to deselect the chip select. Therefore, the time to read 8 channels is 8 times the time to read a single channel.

4. The method according to claim 1, characterized in that, The floating-point voltage data is compressed using compression technology, and the following steps are also included: quantizing the pruned neural network model, and on the lower-level machine, quantizing the floating-point number to an 8-bit integer, mapping the floating-point number in [-1, 1] to [0, 255] proportionally, and compressing the data bit width to save storage space and transmission bandwidth. The quantization formula is as follows: In the formula, round The function is a rounding function, where x represents the normalized value of the input signal, and its value ranges from [...]. Q(x) represents the quantized integer value between [0, 255], where [x, 1] is the integer value.

5. The method according to claim 4, characterized in that, The step of transmitting the compressed data to the host computer includes: During data transmission, the compressed data needs to be encapsulated using a standardized data packet format. The data packet adopts a layered structure design: the frame header is a 4-byte fixed identifier, including 0xAA, 0xBB, 0xCC, and 0xDD, used to synchronize the receiving end and identify the start of the data packet; the data length field occupies 2 bytes, explicitly indicating the number of valid bytes in the subsequent data field in unsigned integer form, supporting dynamic length data transmission; the data field carries the actual compressed multi-channel voltage sampling values; the checksum is a 1-byte cumulative sum, generated by summing all bytes in the data field bit by bit and taking the lower 8 bits, used by the receiving end to verify data integrity, and triggering a retransmission mechanism if the check fails; the data packet structure uses big-endian order to store multi-byte data; in addition, a queue management method is also used during data transmission.

6. The method according to claim 5, characterized in that, The host computer receives compressed data, parses it to obtain the actual voltage value, including: The host computer receives compressed data packets sent by the MCU via the UDP protocol; it parses and stores the compressed data packets, specifically including: parsing the compressed data packets through the decoder part of the autoencoder, gradually restoring the latent representation to data of the same dimension as the input. The decoder adopts a four-layer neural network structure, the process is: 10→16 linear layer, 16→32 linear layer, 32→64 linear layer, all three linear layers use ReLU activation, and the final 64→100 linear layer outputs the reconstruction result; Differential pruning operations are performed on the reconstruction results, with the host computer using a pruning ratio of 10%-30% for pruning. The neural network model that has undergone the pruning process is then dequantized. The dequantization formula is as follows: In the formula, q represents the quantized integer value, which is an unsigned integer ranging from [0, 255]; D(q) represents the dequantized normalized value, ranging from [0, 255]. Between 1 and 1; Dequantization, as the inverse process of quantization, recovers the original floating-point information from the transmitted 8-bit integer data, thereby converting compressed data into actual voltage values.

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