A method and device for suppressing high-frequency oscillation at a receiving end of a DRU-MMC

Abstract

A DRU-MMC receiving end high-frequency oscillation suppression method and device, the method comprising: detecting AC system side impedance and whether there is an oscillation trend in the AC system side voltage; if it is judged that oscillation occurs, calculating the theoretically required output reverse damping voltage as the voltage outer loop command value according to the AC system side impedance; tracking the generated voltage outer loop command value and outputting a modulation signal; generating a driving pulse for each bridge arm of the power electronic energy converter according to the modulation signal, thereby controlling the series current converter to output active damping to offset the damping of the AC system side; and extracting the positive sequence voltage phase and angular frequency of the AC system side grid connection point according to the detected AC system side voltage, the positive sequence voltage phase being used for the phase input of the modulation module and the angular frequency being used for calculating the theoretically required output reverse damping voltage. The present application can remodel the impedance according to the possible oscillation frequency and present a positive damping characteristic to achieve a good oscillation suppression effect.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power electronic converters, in particular to a DRU-MMC receiving end high-frequency oscillation suppression method and device. BACKGROUND

[0002] Modular multilevel converter technology is widely used in high-voltage direct current transmission field due to its high commutation reliability, flexible control mode and low harmonic content, etc. The stability problem of MMC grid-connected project is increasingly obvious, and high-frequency oscillation phenomenon frequently occurs, which seriously affects the safe and stable operation of the power system. The high-frequency oscillation of the flexible direct current system is different from the low-frequency oscillation problem dominated by electromechanical coupling in the traditional power system. It is an oscillation problem caused by the interaction between different devices dominated by power electronic control, which is a new type of power system stability problem in the process of power development. High-frequency oscillation can stimulate the AC system to produce a larger amplitude of harmonic, seriously distort the AC voltage and AC current, increase the system operation loss, and more likely to break through the primary equipment to make the system shut down. Therefore, it is of great significance to study the high-frequency oscillation suppression method of flexible direct current to improve the safety, stability and reliability of the project.

[0003] The long control link delay of the diode-rectifier unit (DRU)-MMC system based on modular multilevel converter (MMC) makes the high-frequency impedance of the flexible direct current system present negative damping characteristics, which is easy to interact with the distribution parameters of the AC transmission line to cause high-frequency oscillation phenomenon. The flexible direct current converter station presents the characteristics of high voltage, large capacity and long link delay, and the AC system connected may have multiple capacitance effect frequency bands. The parameter design of the suppression scheme needs to coordinate the phase characteristics of the output impedance of the converter station in multiple capacitance effect frequency bands. Therefore, the suppression effect of the high-frequency oscillation suppression scheme in the new energy grid-connected field may not be obvious or invalid, and even it may cause oscillation at additional frequencies. If the high-frequency oscillation is not effectively suppressed, it will have a serious impact on the main grid and seriously endanger the safe and stable operation of the power system.

[0004] Therefore, considering the parameters of the power electronic converter itself and the uncertainty of the system, how to adapt to the AC high-frequency oscillation of the DRU-MMC receiving end and reshape the impedance according to the possible oscillation frequency to present positive damping characteristics so as to achieve good oscillation suppression effect is the control difficulty of the power electronic converter. SUMMARY

[0005] In view of the defects of the prior art, the purpose of the present application is to provide a DRU-MMC receiving end high-frequency oscillation suppression method and device.

[0006] The application discloses a DRU-MMC receiving end high-frequency oscillation suppression device, which comprises a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a double closed-loop control module, a modulation module and a phase-locked loop module.

[0007] The high-frequency oscillation detection module is used for detecting the AC system side impedance and detecting whether the AC system side voltage has an oscillation trend.

[0008] The outer loop equivalent impedance generation module is used for calculating the required reverse damping voltage as a voltage outer loop instruction value if the high-frequency oscillation detection module judges that the system has oscillation according to the AC system side impedance detected by the high-frequency oscillation detection module.

[0009] The double closed-loop control module is used for tracking the voltage outer loop instruction value generated by the outer loop equivalent impedance generation module and outputting a modulation signal.

[0010] The modulation module is used for generating a driving pulse of each bridge arm of the power electronic energy converter according to the modulation signal, so as to control the series current transformer to output an active damping to offset the damping of the AC system side and suppress the high-frequency oscillation.

[0011] The phase-locked loop module is used for extracting the positive sequence voltage phase θ c and the angular frequency ω c of the AC system side grid connection point according to the AC system side voltage V g detected by the high-frequency oscillation detection module, and inputting the positive sequence voltage phase θ c to the modulation module as a phase input and inputting the angular frequency ω c to the outer loop equivalent impedance generation module for calculating the required reverse damping voltage.

[0012] Further, the high-frequency oscillation detection module screens and compares the AC system side voltage V g through a power frequency notch link, a tracking screening link and a threshold judgment link to detect the oscillation.

[0013] Step 1: the power frequency notch link effectively removes the fundamental frequency component in the AC system side voltage V g collected by the high-frequency oscillation detection module.

[0014] Step 2: the tracking screening link is realized through a tracking screening channel, the tracking screening channel is composed of multiple sub-channels, signals enter the equal-frequency-band multi-signal tracking screening channel through the power frequency notch link, the sub-channels realize rapid tracking of the frequency and amplitude of the oscillation signal in the target frequency range by adopting a phase-locked loop and a low-pass filter technology, and the entire medium-high frequency region is covered by distributing multiple sub-channels in equal frequency bands.

[0015] Step 3: the output signals of the sub-channels pass through the threshold judgment link to realize rapid detection of the medium-high frequency oscillation signal.

[0016] Further, step 2 specifically comprises:

[0017] Step 2.1, the instantaneous value V of three-phase voltage gj After the power frequency notch processing, the fundamental frequency component is removed, wherein j=a, b, c;

[0018] Step 2.2, the processed signal is then input into a screening channel with a center frequency set as f PLL_i , wherein the initial set frequency of the PLL of the screening channel i is f PLL_i ;

[0019] Step 2.3, in order to ensure that the channel i can accurately detect the signal frequency in a specific frequency band and ignore the signals in other frequency bands, a tracking screening link Δf k is added in the PLL, and the PLL of the channel i only tracks the signals within the frequency range f PLL_i ±Δf k ;

[0020] Step 2.4, by adding a pair of low-pass filters on the d-axis and q-axis respectively, the frequency components outside the frequency band f PLL_i ±Δf k in the input signal are significantly attenuated, and the signals within the frequency band are retained. After such processing, the signal is finally transmitted to the threshold judgment link for further detection and analysis.

[0021] Further, the outer loop equivalent impedance generation module calculates the required reverse damping voltage as the voltage outer loop instruction value according to the alternating current system side impedance detected by the high-frequency oscillation detection module, comprising:

[0022] When the high-frequency oscillation detection module detects that the system is oscillating, the outer loop equivalent impedance generation module compensates the voltage of the analog line impedance to realize the grid impedance cancellation, and the resistance and inductance of the analog line are represented by R se , L se respectively, and the selection of the resistance and inductance R se , L se needs to consider the impedance Z g of the alternating current system side, at this time, the equivalent impedance of the alternating current system side is:

[0023] ;

[0024] The selected resistance and inductance R se , L se make the equivalent impedance Z g ’ run within the stable range of the system, so as to suppress the oscillation of the alternating current system side, and the generated voltage outer loop instruction value Vsedref and V seqref are respectively:

[0025] ;

[0026] ;

[0027] wherein, I gd and I gq are respectively the values of the alternating current system side current in the dq coordinate system.

[0028] Further, the double closed-loop control module tracks the voltage outer loop command value generated by the outer loop equivalent impedance generation module and outputs the modulation signal, comprising:

[0029] The voltage outer loop command value V sedref and V seqref are obtained by the outer loop equivalent impedance generation module, and then the double closed-loop control module respectively subtracts the actual voltage output values V sed and V seq of the series converter, and inputs the PI regulator for PI control to obtain the series converter output d-axis current reference value I sedref and the q-axis current reference value I seqref are respectively:

[0030] ;

[0031] ;

[0032] After obtaining the series converter output d-axis current reference value I sedref and the q-axis current reference value I seqref , the double closed-loop control module continues to control the actual output currents I sed and I seq of the series converter, and then subtracts the dq-axis reference current command values I sedref and I seqref respectively, and then outputs the PI regulator for PI control to obtain the modulation signals m d and m q :

[0033] ;

[0034] .

[0035] A DRU-MMC receiving end high-frequency oscillation suppression method, comprising:

[0036] Detecting the alternating current system side impedance and detecting whether the alternating current system side voltage has an oscillation trend;

[0037] If the system is determined to be oscillating, the theoretically required reverse damping voltage is calculated based on the detected AC system side impedance and used as the outer voltage loop command value.

[0038] Track the generated outer loop voltage command value and output the modulation signal;

[0039] The modulation signal generates drive pulses for each arm of the power electronic energy converter, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0040] Based on the detected AC system side voltage V g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

[0041] Furthermore, the detection of whether the AC system side voltage has an oscillation trend includes:

[0042] Step 1: The power frequency notch filter is used to filter the acquired AC system side voltage V. g Effective removal of fundamental frequency components from the data;

[0043] Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal enters the equal-frequency multi-signal tracking and screening channel after passing through the power frequency notch filter. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal frequency bands, the entire mid-to-high frequency region is covered.

[0044] Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

[0045] Furthermore, step 2 specifically includes:

[0046] Step 2.1, instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c;

[0047] Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ;

[0048] Step 2.3, in order to ensure that channel i can accurately detect the signal frequency in a certain frequency band and ignore the signals in other frequency bands, a tracking filter Δf is added in the PLL k , the PLL of channel i only tracks the signals in the frequency range f PLL_i ± Δf k ;

[0049] Step 2.4, by adding a pair of low-pass filters on the d-axis and q-axis respectively, the frequency components in the input signal outside the frequency band f PLL_i ± Δf k are significantly attenuated, and the signals within the frequency band are retained. After such processing, the signal is finally transmitted to the threshold judgment link for further detection and analysis.

[0050] Further, the reverse damping voltage required in theory according to the detected impedance on the AC system side is calculated as the voltage outer loop command value, comprising:

[0051] When the high-frequency oscillation detection module detects that the system is oscillating, the outer loop equivalent impedance generation module compensates the voltage of the analog line impedance to realize the grid impedance offset. The resistance and inductance of the analog line are represented by R se , L se , respectively, and the selection of the resistance and inductance R se , L se needs to consider the impedance Z g on the AC system side. At this time, the equivalent impedance on the AC system side is:

[0052] ;

[0053] The selected resistance and inductance R se , L se make the equivalent impedance Z g ’ within the stable range of the system, so as to suppress the oscillation on the AC system side. The generated voltage outer loop command values V sedref and V seqref are respectively:

[0054] ;

[0055] ;

[0056] Wherein, I gd and I gq are the values of the current on the AC system side in the dq coordinate system.

[0057] Further, the voltage outer loop command value generated by the tracking is outputted and a modulation signal is outputted, comprising:

[0058] Obtain the outer loop voltage command value V sedref and V seqref Then, compare the actual voltage output value V of the series converter. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively:

[0059] ;

[0060] ;

[0061] Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Then, continue to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q :

[0062] ;

[0063] .

[0064] This invention has outstanding substantive features and significant progress compared to the prior art, specifically:

[0065] (1) This invention is not only applicable to weak grid conditions caused by increased grid impedance, but also dynamically adjusts the damping coefficient by adjusting the output signal of the series converter (such as the amplitude and phase of the injected voltage) in real time to meet the oscillation suppression requirements under different operating conditions.

[0066] (2) Traditional passive damping requires parallel or series resistors (such as RC damping circuits) to dissipate oscillation energy through resistor heating, but this introduces additional fundamental wave loss (especially significant loss in high voltage and high power scenarios). This invention uses active damping of a series converter to generate a current / voltage signal that is inversely phase to the oscillation component through a control algorithm. It injects damping energy only for the high-frequency oscillation component and does not affect the fundamental wave power transmission. Therefore, there is almost no additional fundamental wave loss, and the system efficiency is higher.

[0067] (3) This invention can suppress system oscillations within 0.05s, such as Figure 8 As shown. This method can also improve the short-circuit ratio of the AC system and enhance system stability. The improvement in system strength will directly improve the power transfer characteristics and control stability of the MMC. Attached Figure Description

[0068] Figure 1 This is a schematic diagram of the structure of the DRU-MMC receiving-end AC high-frequency oscillation system based on the series impedance adjustment of the converter transformer in an embodiment of the present invention;

[0069] Figure 2 This is a schematic diagram of the structure of the DRU-MMC receiver-end high-frequency oscillation suppression device in an embodiment of the present invention;

[0070] Figure 3 This is a flowchart of the high-frequency oscillation suppression method at the receiving end of the DRU-MMC in this embodiment of the invention;

[0071] Figure 4 This is a schematic diagram of the high-frequency oscillation detection module in an embodiment of the present invention;

[0072] Figure 5 This is a schematic diagram of the outer ring equivalent impedance generation module in an embodiment of the present invention;

[0073] Figure 6 This is a schematic diagram of the structure of the series converter voltage and current dual closed-loop control module in an embodiment of the present invention;

[0074] Figure 7 This is a system structure diagram of the series converter after adding series compensation in an embodiment of the present invention;

[0075] Figure 8 This is a simulation comparison diagram of the embodiment of the present invention with and without the series converter applied. Detailed Implementation

[0076] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0077] like Figure 1 As shown, a high-frequency AC oscillation system based on series impedance adjustment of DRU-MMC receiver-end is described. The high-frequency oscillation suppression method of DRU-MMC receiver-end of this invention uses a Modular Multilevel Converter (MMC) series converter to adjust the series equivalent impedance in real time to reshape the impedance of the AC system side, thereby achieving high-frequency oscillation suppression.

[0078] The MMC converter transformer series converter includes a converter transformer body, a series converter, a power taking transformer, and a power taking converter, the winding of the converter transformer body includes a grid side winding, a valve side winding, and a power taking winding, the series converter is connected to the ground end of the grid side winding of the converter transformer in a cascade H-bridge form, the primary winding of the power taking transformer is connected to the power taking winding of the converter transformer, the AC side of the power taking converter is connected to the power taking transformer, and the DC side is connected to the DC side of the series converter.

[0079] As shown in Figure 2 , the embodiment of the present application provides a DRU-MMC receiving end AC high-frequency oscillation suppression device based on converter transformer series impedance adjustment, which comprises a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a double closed loop control module, a modulation module, and a phase-locked loop module.

[0080] The high-frequency oscillation detection module is used to detect whether the AC system side impedance and the AC system side voltage have an oscillation trend.

[0081] The outer loop equivalent impedance generation module is used to calculate the required output reverse damping voltage as a voltage outer loop instruction value if the high-frequency oscillation detection module judges that the system has oscillation according to the AC system side impedance detected by the high-frequency oscillation detection module.

[0082] The double closed loop control module is used to track the voltage outer loop instruction value generated by the outer loop equivalent impedance generation module and output a modulation signal.

[0083] The modulation module is used to generate a drive pulse of each bridge arm of the power electronic energy converter according to the modulation signal, so as to control the series converter to output active damping to offset the damping of the AC system side and suppress high-frequency oscillation.

[0084] The phase-locked loop module is used to extract the positive sequence voltage phase θ g and the angular frequency ω c of the AC system side grid connection point according to the AC system side voltage V c detected by the high-frequency oscillation detection module, the positive sequence voltage phase θ c is used for the phase input of the modulation module, and the angular frequency ω c is used for calculating the required output reverse damping voltage V sedref and V seqref .

[0085] As shown in Figure 3 , the embodiment of the present application provides a DRU-MMC receiving end high-frequency oscillation suppression method, which comprises the following steps:

[0086] Step one, the high-frequency oscillation detection module collects the AC system side voltage Vg And the impedance of the AC system side;

[0087] Step two involves using a high-frequency oscillation detection module with three stages (power frequency notch filtering, tracking and screening, and threshold judgment) to measure the AC system side voltage V. g Screening and comparison are performed to quickly detect oscillations;

[0088] Specifically, such as Figure 4 The diagram shown illustrates the method of equal-frequency band multi-channel signal tracking and filtering in an embodiment of the present invention. The implementation process is as follows:

[0089] Step 1: The power frequency notch filter is used to filter the AC system side voltage V acquired by the high-frequency oscillation detection module. g Effective removal of fundamental frequency components from the data;

[0090] Step 2: The tracking and filtering channel consists of multiple sub-channels, each focusing on signals within a specific frequency range. The signal passes through a power frequency notch filter and enters the equal-band multi-signal tracking and filtering channel. These sub-channels, employing phase-locked loops (PLLs) and low-pass filter technology, achieve rapid tracking of the frequency and amplitude of oscillating signals within the target frequency range. By distributing multiple sub-channels in equal-band arrangements, the entire mid-to-high frequency region is covered.

[0091] Preferably, the explanation is based on the i-th filtering channel:

[0092] Step 2.1, instantaneous value of three-phase voltage V gj (j=a, b, c) After power frequency notch filtering, the fundamental frequency component is removed;

[0093] Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ;

[0094] Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within;

[0095] Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf kThe frequency components outside the frequency band are significantly attenuated, while the signals within the frequency band are retained. After such processing, the signals are finally transmitted to the threshold judgment link for further detection and analysis;

[0096] Step 3: The output signals of each sub-channel pass through the threshold judgment link to realize rapid detection of the high-frequency oscillation signals.

[0097] Step 3: If the judgment system oscillates, the outer loop equivalent impedance generation module calculates the theoretically required output reverse damping voltage as the voltage outer loop command value according to the alternating current system side impedance detected by the high-frequency oscillation detection module, and obtains the inner loop current command value by subtracting the actual output voltage of the series converter from the voltage outer loop command value.

[0098] The specific implementation steps are as follows:

[0099] As shown in Figure 5 , it is an outer loop equivalent impedance generation module and a phase-locked loop module structure diagram. The high-frequency oscillation detection module detects the alternating current system side impedance, and the outer loop equivalent impedance generation module calculates the theoretically required output reverse damping voltage as the voltage outer loop command value. The specific steps are as follows:

[0100] When the high-frequency oscillation detection module detects that the system oscillates, the outer loop equivalent impedance generation module compensates the voltage of the simulated line impedance to realize the impedance cancellation of the power grid. The resistance and inductance of the simulated line are represented by R se and L se , respectively. The selection of the resistance and inductance R se and L se needs to consider the impedance Z g of the alternating current system side. At this time, the equivalent impedance of the alternating current system side is:

[0101] ;

[0102] The selected resistance and inductance R se and L se make the equivalent impedance Z g ’ In the stable range of the system, the alternating current system side oscillation can be suppressed, and the generated voltage outer loop command values V sedref and V seqref are respectively:

[0103] ;

[0104] ;

[0105] Among them, I gd and I gq are the values of the alternating current system side current in the dq coordinate system.

[0106] The d-axis voltage of the series converter is used for output virtual resistance or balancing active power, and the q-axis voltage is used for realizing the control function of virtual inductance. When the current control type inverter outputs the q-axis current component, the voltage and current phases are not the same, at this time, the equivalent resistance or inductance controlled is simulated from the d and q axes respectively, that is, the resistance and inductance both exist in the d and q axis voltage components. The stability improvement function is realized by changing the AC system side impedance through the virtual inductance. The given virtual inductance is obtained by the phase-locked loop module of the grid-connected inverter output angular frequency ω c , multiplied by the selected virtual inductance value Lse as the voltage given, output to the line through the series converter, offset part of the inductance voltage drop, so that the equivalent inductance is in the stable operation range, offset the AC system side impedance to suppress the high frequency oscillation of the system.

[0107] Step four, the double closed loop control module tracks the voltage outer loop instruction value generated by the equivalent impedance generation module of the outer loop and outputs the modulation signal, and the specific implementation steps are as follows:

[0108] As Figure 6 shown, it is the double closed loop control module of the series converter in the embodiment of the application. After obtaining the voltage outer loop instruction value V sedref and V seqref through the equivalent impedance generation module of the outer loop, the double closed loop control module is respectively subtracted from the actual voltage output value V sed and V seq of the series converter, and is input to the PI regulator for PI control, so as to obtain the d-axis current reference value I sedref and the q-axis current reference value I seqref of the series converter output respectively:

[0109] ;

[0110] ;

[0111] After obtaining the d-axis current reference value I sedref and the q-axis current reference value I seqref of the series converter output, the double closed loop control module continues to control the actual output current I sed and I seq of the series converter, and then subtracts the dq-axis reference current instruction value I sedref and I seqref respectively, and then outputs the PI regulator for PI control, so as to obtain the modulation signal m d and m q :

[0112] ;

[0113] .

[0114] After the modulated signal is transformed into a signal in the abc coordinate system through the inverse Park transform, it generates drive pulses for each arm of the series converter. The modulated signal in the abc coordinate system is:

[0115] ;

[0116] Phase-locked loop (PLL) mode extraction of the positive sequence voltage phase θ at the grid connection point of the AC system side. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required output reverse damping voltage V sedref and V seqref .

[0117] Step 5: The modulation module generates drive pulses for each arm of the power electronic power converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0118] like Figure 7 The diagram shown is a system structure diagram of the series converter after adding series compensation in an embodiment of the present invention. After the outer loop equivalent impedance generation module generates the outer loop reference voltage of the dual closed-loop control module of the series converter, the modulation module generates the driving pulses of each bridge arm of the power electronic energy converter to control the series converter to output the theoretically required reverse damping voltage.

[0119] Step 6: After determining that the system oscillation has disappeared, control the output of the series converter to be 0.

[0120] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A high-frequency oscillation suppression device at the receiver end of a DRU-MMC, characterized in that, It includes a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a dual closed-loop control module, a modulation module, and a phase-locked loop module; The high-frequency oscillation detection module is used to detect the AC system side impedance and whether the AC system side voltage has an oscillation trend. The outer loop equivalent impedance generation module is used to calculate the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module if the high-frequency oscillation detection module determines that the system is oscillating. The dual closed-loop control module is used to track the voltage outer loop command value generated by the outer loop equivalent impedance generation module and output the modulation signal. The modulation module is used to generate drive pulses for each arm of the power electronic energy converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations. The phase-locked loop module is used to detect the AC system side voltage V detected by the high-frequency oscillation detection module. g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

2. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 1, characterized in that: The high-frequency oscillation detection module detects the AC system side voltage V through a power frequency notch filter, a tracking and screening process, and a threshold judgment process. g Screening and comparison are performed to detect oscillations: Step 1: The power frequency notch filter is used to filter the AC system side voltage V acquired by the high-frequency oscillation detection module. g Effective removal of fundamental frequency components from the data; Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal enters the equal-frequency multi-signal tracking and screening channel after passing through the power frequency notch filter. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal frequency bands, the entire mid-to-high frequency region is covered. Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

3. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 2, characterized in that: Step 2 specifically includes: Step 2.1, instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c; Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ; Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within; Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

4. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 1, characterized in that: The outer loop equivalent impedance generation module calculates the theoretically required reverse damping voltage output as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module, including: When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is: ； Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively: ； ； Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

5. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 4, characterized in that: The dual closed-loop control module tracks the voltage outer loop command value generated by the outer loop equivalent impedance generation module and outputs a modulation signal, including: The outer loop voltage command value V is obtained through the outer loop equivalent impedance generation module. sedref and V seqref Then, the actual voltage output value V of the series converter is compared with the actual voltage output value V through the dual closed-loop control module. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively: ； ； Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Subsequently, the dual closed-loop control module continues to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q : ； 。 6. A method for suppressing high-frequency oscillations at the receiver end of a DRU-MMC, characterized in that, include: Detect the AC system side impedance and detect whether the AC system side voltage has an oscillation trend; If the system is determined to be oscillating, the theoretically required reverse damping voltage is calculated based on the detected AC system side impedance and used as the outer voltage loop command value. Track the generated outer loop voltage command value and output the modulation signal; The modulation signal generates drive pulses for each arm of the power electronic energy converter, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations. Based on the detected AC system side voltage V g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

7. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 6, characterized in that: The detection of whether the AC system side voltage has an oscillation trend includes: Step 1: The power frequency notch filter is used to filter the acquired AC system side voltage V. g Effective removal of fundamental frequency components from the data; Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal enters the equal-frequency multi-signal tracking and screening channel after passing through the power frequency notch filter. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal frequency bands, the entire mid-to-high frequency region is covered. Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

8. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 7, characterized in that: Step 2 specifically includes: Step 2.1, instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c; Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ; Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within; Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

9. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 6, characterized in that: The step of calculating the theoretically required reverse damping voltage output based on the detected AC system side impedance as the outer voltage loop command value includes: When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is: ； Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively: ； ； Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

10. The high-frequency oscillation suppression method at the receiving end of DRU-MMC as described in claim 6, characterized in that: The tracking generates an outer loop voltage command value and outputs a modulated signal, including: Obtain the outer loop voltage command value V sedref and V seqref Then, compare the actual voltage output value V of the series converter. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively: ； ； Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Then, continue to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q : ； 。

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