Control circuit of multiphase power conversion circuit and control method thereof

Abstract

The invention provides a control circuit of a multi-phase power conversion circuit and a control method thereof. The control circuit comprises N sensing circuits, a dead time management circuit, a clock pulse generator and N control signal generators. The N sensing circuits are respectively coupled to corresponding ones of the N-phase LLC resonant DC converter output stages. Each sensing circuit generates a corresponding dead time adjustment signal according to a source-drain voltage of one switch in a synchronous switch group in a corresponding LLC resonant DC converter output stage. The dead time management circuit is coupled to the N sensing circuits, receives dead time adjustment signals generated by the N sensing circuits, and generates N groups of adjusted dead time adjustment signals. The clock pulse generator is used for generating N groups of clock pulse signals. And a phase difference of pi / N exists between two adjacent clock pulse signals in the N groups of clock pulse signals. The N control signal generators respectively receive the corresponding clock pulse signals and the corresponding adjusted dead time adjusting signals so as to generate N groups of first control signals and N groups of second control signals.

Description

Technical Field

[0001] This invention relates to a control circuit and control method for a multiphase power conversion circuit. Background Technology

[0002] Traditional DC-DC converters can be categorized into isolated and non-isolated types. Isolated circuits consist of a primary side (connected to the input voltage) and a secondary side (connected to the output voltage), electrically isolated by components such as coil windings or optocouplers. Non-isolated circuits, on the other hand, allow the input voltage to be directly transferred to the output inductor / capacitor during conversion. Both isolated and non-isolated circuits include an output inductor and an output capacitor.

[0003] However, due to factors such as operating environment or unstable inductor quality, the ripple effect of the output voltage can become more pronounced (i.e., the peak-to-peak value of the output voltage ripple is larger). To suppress this ripple effect, the output capacitor needs a large capacitance value (e.g., 1–10F) to improve output voltage stability. However, using a large output capacitor in the circuit increases the circuit layout area. Therefore, how to improve output voltage stability while simultaneously reducing the capacitance value of the output capacitor is a significant challenge in this field. Summary of the Invention

[0004] This invention relates to a control circuit and control method for a multiphase power conversion circuit, which can synchronously control the multiphase power conversion circuit to achieve zero voltage switching (ZVS) in order to effectively generate a stable output voltage.

[0005] According to an embodiment of the present invention, the control circuit of the present invention is suitable for a multiphase power conversion circuit. The multiphase power conversion circuit includes an input capacitor, an N-phase LLC resonant DC-DC converter (LLC Direct Current Transformer, LLCCDX) output stage, and an output capacitor, where N is a positive integer greater than 1. Each phase of the N-phase LLC resonant DC-DC converter output stage includes a power switch group, a resonant module, and a synchronous switch group. The control circuit is coupled to the N-phase LLC resonant DC-DC converter output stage and generates N sets of first control signals and N sets of second control signals, wherein there is a dead time between the first and second control signals of the same set, to control the power switch group and the synchronous switch group. The control circuit includes N sensing circuits. The N sensing circuits are respectively coupled to a corresponding one in the N-phase LLC resonant DC-DC converter output stage. Each sensing circuit generates a corresponding dead time adjustment signal according to the on-state of one of the switches in the corresponding LLC resonant DC-DC converter output stage, either the power switch group or the synchronous switch group. A dead time management circuit is coupled to the N sensing circuits, receives the dead time adjustment signals generated by the N sensing circuits, and generates N sets of adjusted dead time adjustment signals. A clock generator is used to generate N sets of clock signals. There is a phase difference of π / N between adjacent clock signals in the N sets of clock signals. N control signal generators respectively receive the corresponding clock signals and the corresponding adjusted dead time adjustment signals to generate the N sets of first control signals and the N sets of second control signals.

[0006] In the control circuit according to an embodiment of the present invention, the dead time adjustment signal has a first state and a second state. After the dead time management circuit determines that all N dead time adjustment signals are not in the first state, it provides the N dead time adjustment signals in the second state to the corresponding control signal generator.

[0007] In the control circuit according to an embodiment of the present invention, a first state is used to extend the dead time, and a second state is used to shorten the dead time.

[0008] In the control circuit according to an embodiment of the present invention, the dead time management circuit is selected from integrated circuits, PCB circuits, or a combination of both.

[0009] In the control circuit according to an embodiment of the present invention, the switching state refers to the level value based on the source-drain voltage (VDS).

[0010] According to embodiments of the present invention, the control method for the multiphase power conversion circuit of the present invention is suitable for a control circuit. The multiphase power conversion circuit includes an input capacitor, an N-phase LLC resonant DC-DC converter (LLC Direct Current Transformer, LLC DCX) output stage, and an output capacitor, where N is a positive integer greater than 1. Each phase of the N-phase LLC resonant DC-DC converter output stage includes a power switch group, a resonant module, and a synchronous switch group. The control circuit is coupled to the N-phase LLC resonant DC-DC converter output stage and generates N sets of first control signals and second control signals, wherein there is a dead time between the first control signal and the second control signal of the same set, to control the power switch group and the synchronous switch group. The control method includes the following steps: generating a corresponding dead time adjustment signal based on the conduction state of one of the power switches or rectifier switches in the power switch or synchronous switch group in the output stage of the corresponding LLC resonant DC-DC converter; receiving the dead time adjustment signals generated by N sensing circuits and generating N sets of adjusted dead time adjustment signals; generating N sets of clock signals, wherein there is a phase difference of π / N between adjacent clock signals in the N sets of clock signals; and receiving the corresponding clock signals and the corresponding adjusted dead time adjustment signals respectively to generate N sets of first control signals and N sets of second control signals.

[0011] In the control method according to an embodiment of the present invention, the dead time adjustment signal has a first state and a second state. The control method further includes: after determining that all N dead time adjustment signals are not in the first state, providing the N dead time adjustment signals in the second state to the corresponding control signal generator.

[0012] In the control method according to an embodiment of the present invention, a first state is used to extend the dead time, and a second state is used to shorten the dead time.

[0013] In the control method according to an embodiment of the present invention, the switching state refers to the level value based on the source-drain voltage.

[0014] Based on the above, the control circuit and control method of the multiphase power conversion circuit of the present invention can sense the source-drain voltage of one switch in the synchronous switch group in each phase of the output stage of the N-phase LLC resonant DC-DC converter to generate a corresponding dead time adjustment signal. In this way, the dead time between the control signals in each phase of the output stage of the N-phase LLC resonant DC-DC converter can be effectively adjusted synchronously to effectively improve the conversion efficiency of the multiphase power conversion circuit.

[0015] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0016] Figure 1A as well as Figure 1B This is a schematic diagram of a multiphase power conversion circuit and a control circuit according to an embodiment of the present invention;

[0017] Figure 2 This is a flowchart of the control method according to an embodiment of the present invention;

[0018] Figure 3 This is a schematic diagram of a clock signal according to an embodiment of the present invention;

[0019] Figure 4 This is a schematic diagram of the output current and control signals according to an embodiment of the present invention;

[0020] Figures 5A to 5C These are schematic diagrams illustrating various operations of embodiments of the present invention;

[0021] Figure 6A This is a schematic diagram of a control circuit with a distributed architecture according to an embodiment of the present invention;

[0022] Figure 6B This is a schematic diagram of a control circuit with a modular architecture according to an embodiment of the present invention;

[0023] Figure 7 This is a flowchart of the control method of the control circuit in an embodiment of the present invention.

[0024] Explanation of reference numerals in the attached figures

[0025] 10: DC-DC converter;

[0026] 100: Multiphase power conversion circuit;

[0027] 110: Power switch assembly;

[0028] 111, 112: Phase adjustment circuit;

[0029] 120: Resonant module;

[0030] 121: Energy storage components;

[0031] 130: Synchronous switch group;

[0032] 141, 142, 210_1~210_3, 610_1~610_3: Sensing circuits;

[0033] 143: Controller;

[0034] 144: Microcontroller;

[0035] 200, 600: Control circuit;

[0036] 220, 620: Dead time management circuit;

[0037] 230, 630: Clock generator;

[0038] 240_1~240_3, 640_1~640_3: Control signal generator;

[0039] 621: Logic circuit;

[0040] 622_1~622_3: Time-sharing unit;

[0041] 623_1~623_3: Switch;

[0042] Cin: Input capacitance;

[0043] Cout: Output capacitor;

[0044] Co: Load capacitance;

[0045] Cr: Capacitor;

[0046] SW1_1, SW1_2, SW2_1, SW2_2: Switches;

[0047] SR1, SR2: Rectifier switches;

[0048] S210~S240, S710~S740: Steps;

[0049] SA_1~SA_3, SB_1~SB_3, QA_1~QA_3, QB_1~QB_3: control signal;

[0050] Vin: Power supply voltage;

[0051] Vout: Output voltage;

[0052] VTM1~VTM3: Output stages of LLC resonant DC-DC converters;

[0053] Lr: Inductance;

[0054] I1~I3: Output current;

[0055] Tdead1~Tdead3: Dead time adjustment signals;

[0056] Tdead1+~Tdead3+、Tdead1-~Tdead3-: Adjusted dead time adjustment signals;

[0057] CLK1~CLK3: Clock signals;

[0058] td1~td3: Delay time;

[0059] Tp_A, Tp_B: Switching periodic sensing signals;

[0060] To_A, To_B: Switch the conduction sensing signal;

[0061] I_Lm: Excitation current;

[0062] I_Lr: Resonant current;

[0063] SR_Vds: Diode forward voltage drop;

[0064] Vsw: Control terminal voltage;

[0065] CLK_bus: Clock signal bus;

[0066] Tp_bus: Switching cycle bus. Detailed Implementation

[0067] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0068] Figure 1A as well as Figure 1B This is a schematic diagram of a multiphase power conversion circuit and a control circuit according to an embodiment of the present invention. Please also refer to... Figure 1A and Figure 1B A multiphase power conversion circuit 100 is coupled to a DC-DC converter 10 and a control circuit 200. The multiphase power conversion circuit 100 may include an N-phase full-bridge LLC resonant DC-DC converter (Full-bridge LLC DCX) output stage, where N is a positive integer greater than 1. The DC-DC converter 10 provides a power supply voltage Vin to the N-phase LLC resonant DC-DC converter input stage of the multiphase power conversion circuit 100. The control circuit 200 may include N sensing circuits, a dead time management circuit, a clock generator, and N control signal generators. The N control signal generators may each be a pulse width modulation (PWM) generator. The control circuit 200 is used to provide N sets of first control signals (QA_1~QA_3, SA_1~SA_3) and N sets of second control signals (QB_1~QB_3, SB_1~SB_3) to the output stage of the N-phase LLC resonant DC-DC converter of the multiphase power conversion circuit 100.

[0069] In one embodiment of the present invention, taking a three-phase system as an example (i.e., N equals 3), the multiphase power conversion circuit 100 includes an input capacitor Cin, three-phase LLC resonant DC-DC converter output stages VTM1 to VTM3, and an output capacitor Cout. Each of the three-phase LLC resonant DC-DC converter output stages VTM1 to VTM3 is a full-bridge LLC resonant DC-DC converter. Each phase of the three-phase LLC resonant DC-DC converter output stages VTM1 to VTM3 includes a power switch group 110, a resonant module 120, a synchronous switch group 130, and a load capacitor Co. The control circuit 200 is coupled to the three-phase LLC resonant DC-DC converter output stages VTM1 to VTM3 and generates three sets of first control signals QA_1 to QA_3, SA_1 to SA_3 and three sets of second control signals QB_1 to QB_3, SB_1 to SB_3. There is a dead time between the first control signal and the second control signal in the same set to control the power switch group 110 and the synchronous switch group 130.

[0070] Taking the output stage VTM1 of the LLC resonant DC-DC converter as an example, the power switch group 110 includes phase adjustment circuits 111 and 112 and switches SW1_1, SW1_2, SW2_1, and SW2_2. Switches SW1_1, SW1_2, SW2_1, and SW2_2 can be N-type transistors, but the invention is not limited thereto. The first terminal of switch SW1_1 is coupled to the power supply voltage Vin. The second terminal of switch SW1_1 is coupled to the first terminal of switch SW1_2 and the resonant module 120. The second terminal of switch SW1_2 is coupled to the ground voltage. The first terminal of switch SW2_1 is coupled to the power supply voltage Vin. The second terminal of switch SW2_1 is coupled to the first terminal of switch SW1_2 and the resonant module 120. The second terminal of switch SW2_2 is coupled to the ground voltage. The phase adjustment circuit 111 is coupled to the control terminals of switches SW1_1 and SW1_2, and controls switches SW1_1 and SW1_2 according to control signals QA_1 and QB_1. The phase adjustment circuit 112 is coupled to the control terminals of switch SW2_1 and switch SW2_2, and controls switch SW2_1 and switch SW2_2 according to control signals QA_1 and QB_1.

[0071] The resonant module 120 includes a capacitor Cr, an inductor Lr, and an energy storage component 121. The energy storage component 121 is a transformer and includes a primary side, a first secondary side, and a second secondary side. The first terminal of the capacitor Cr is coupled to the second terminal of switch SW1_1 and the first terminal of switch SW1_2. The second terminal of the capacitor Cr is coupled to the first terminal of the inductor Lr. The second terminal of the inductor Lr is coupled to one terminal of the primary side of the energy storage component 121. The other terminal of the primary side of the energy storage component 121 is coupled to the second terminal of switch SW2_1 and the first terminal of switch SW2_2.

[0072] Synchronous switch group 130 includes rectifier switch SR1 and rectifier switch SR2. The first terminal of rectifier switch SR1 is coupled to one end of the first secondary side of energy storage component 121. The other end of the first secondary side of energy storage component 121 is coupled to one end of the second secondary side and the first terminal of load capacitor Co. The second terminal of rectifier switch SR1 is coupled to the second terminal of rectifier switch SR2 and the second terminal of load capacitor Co. The control terminal of rectifier switch SR1 receives control signal SA_1. The first terminal of rectifier switch SR2 is coupled to the other end of the second secondary side of energy storage component 121. The second terminal of rectifier switch SR2 is coupled to the second terminal of load capacitor Co. The control terminal of rectifier switch SR2 receives control signal SA_2. Power switch group 110 converts the DC power supply voltage Vin into an AC signal, and resonant module 120 resonates and / or transforms the AC signal. Synchronous switch group 130 can convert the resonant and / or transformed AC signal back into a DC signal to generate output current I1.

[0073] Similarly, the output stage VTM2 of the LLC resonant DC-DC converter can generate an output current I2 based on the power supply voltage Vin and control signals QA_2, QB_2, SA_2, and SB_2, and the output stage VTM3 of the LLC resonant DC-DC converter can generate an output current I3 based on the power supply voltage Vin and control signals QA_3, QB_3, SA_3, and SB_3. In this way, the output stages VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter can output currents I1 to I3 to the output capacitor Cout and generate an output voltage Vout.

[0074] refer to Figure 1B Taking a three-phase system as an example (i.e., N equals 3), the control circuit 200 includes sensing circuits 210_1 to 210_3, a dead-time management circuit 220, a clock generator 230, and control signal generators 240_1 to 240_3. Sensing circuits 210_1 to 210_3 are respectively coupled to the corresponding number in the output stage of the three-phase LLC resonant DC-DC converter. The dead-time management circuit 220 is coupled to sensing circuits 210_1 to 210_3. Control signal generators 240_1 to 240_3 are coupled to the dead-time management circuit 220 and the clock generator 230. It is worth noting that the number of clock signals, control signals, sensing circuits, and control signal generators in this invention are not limited to specific quantities. Figure 1B As shown. The number of clock signals, control signals, sensing circuits, and control signal generators can be determined based on the number of phases in the output stage of the LLC resonant DC-DC converter.

[0075] Figure 2 This is a flowchart of a control method according to an embodiment of the present invention. Figure 3 This is a schematic diagram of a clock signal according to an embodiment of the present invention. Figure 4This is a schematic diagram of the output current and control signals according to an embodiment of the present invention. Please refer to [the diagram first]. Figure 1A as well as Figure 2 The control circuit 200 can execute the following steps S210 to S240 to control the multiphase power conversion circuit 100. In step S210, the control circuit 200 generates a corresponding dead-time adjustment signal based on the conduction state of one of the power switches or rectifier switches in the corresponding LLC resonant DC-DC converter output stage or synchronous switch group. In step S220, the dead-time management circuit of the control circuit 200 receives the dead-time adjustment signals generated by N sensing circuits and generates N sets of adjusted dead-time adjustment signals. In step S230, the clock generator of the control circuit 200 generates N sets of clock signals, wherein adjacent clock signals in the N sets have a phase difference of π / N. In step S240, the N control signal generators of the control circuit 200 respectively receive the corresponding clock signals and the corresponding adjusted dead-time adjustment signals to generate N sets of first control signals and N sets of second control signals.

[0076] Specifically, please refer to Figure 1A as well as Figure 1B Taking a three-phase system as an example (i.e., N equals 3), the sensing circuits 210_1 to 210_3 can be respectively based on the power switch group 110 of the three-phase LLC resonant DC-DC converter (e.g., Figure 1A The switches SW1_1, SW1_2, SW2_1, SW2_2 shown, or one of the switches in the synchronous switch groups 130 of output stage VTM1 to VTM3 respectively (e.g., Figure 1A The dead time adjustment signals Tdead1 to Tdead3 are generated based on the source-drain voltage levels of the rectifier switch SR1 or rectifier switch SR2 shown. The dead time management circuit 220 receives the dead time adjustment signals Tdead1 to Tdead3 generated by the sensing circuits 210_1 to 210_3 and generates three sets of adjusted dead time adjustment signals Tdead1+ to Tdead3+ and Tdead1- to Tdead3-. In other words, the dead time management circuit 220 can generate dead time adjustment signals Tdead1 to Tdead3 for adjusting the dead time in each set of control signals based on the sensing results of the sensing circuits 210_1 to 210_3.

[0077] Next, the clock generator 230 can generate, for example... Figure 3 The clock signals CLK1-3 are shown. Figure 3As shown, taking the rising edge of the clock signals as an example, the delay time td1 between clock signal CLK1 and the reference clock signal CLK is 0. Clock signal CLK2 has a delay time td2 with the reference clock signal CLK. Clock signal CLK3 has a delay time td3 with the reference clock signal CLK. Therefore, there is a phase difference of π / 3 between two adjacent rising edges of clock signals CLK1 and CLK2, and a phase difference of π / 3 between two adjacent rising edges of clock signals CLK2 and CLK3.

[0078] Next, as Figure 4 As shown, control signal generator 240_1 receives clock signal CLK and a first set of adjusted dead time adjustment signals Tdead1+ and Tdead1-. Control signal generator 240_1 can generate a first set of first control signals QA_1 and SA_1 (which can be considered synchronization signals) and a first set of second control signals QB_1 and SB_1 (which can also be considered synchronization signals) based on clock signal CLK. The dead time between the first set of first control signals QA_1 and SA_1 and the first set of second control signals QB_1 and SB_1 can be adjusted accordingly based on dead time adjustment signals Tdead1+ and Tdead1- to achieve the effect of zero-voltage switching (ZVS). Control signal generator 240_2 receives clock signal CLK and a second set of adjusted dead time adjustment signals Tdead2+ and Tdead2-. Control signal generator 240_2 can generate a second set of first control signals QA_2, SA_2 and a second set of second control signals QB_2, SB_2 according to the clock signal CLK. The dead time between the second set of second control signals QA_2, SA_2 and the second set of second control signals QB_2, SB_2 can be adjusted accordingly according to the dead time adjustment signals Tdead2+, Tdead2- to achieve the effect of zero voltage switching. Control signal generator 240_3 can generate a third set of first control signals QA_3, SA_3 and a third set of second control signals QB_3, SB_3 according to the clock signal CLK. The dead time between the three sets of second control signals QA_3, SA_3 and the three sets of second control signals QB_3, SB_3 can be adjusted accordingly according to the dead time adjustment signals Tdead3+, Tdead3- to achieve the effect of zero voltage switching.

[0079] In this way, the control circuit 200 can adjust the switching control signal of each phase according to the power switch of each phase of the LLC resonant DC converter or the conduction state of the rectifier switch in the output stage, so that each adjacent two phases of the current I1 to I3 output by the output stage VTM1 to VTM3 of the three-phase LLC resonant DC converter can accurately have a phase difference of π / 3, and each phase of the output stage VTM1 to VTM3 of the three-phase LLC resonant DC converter can achieve the effect of zero voltage switching.

[0080] In one embodiment of the present invention, the value corresponding to the dead time adjustment signal Tdead1 can have three states: a first state corresponding to a high voltage level (e.g., the value "1"), a second state corresponding to a low voltage level (e.g., the value "0"), and a third state between the high and low voltage levels (e.g., the value "tri"). The first state is used to extend the dead time, and the second state is used to shorten the dead time. When the value corresponding to the dead time adjustment signal Tdead1 is 1, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 1, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can be 0. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can be extended by, for example, by one unit time. When the value corresponding to the dead time adjustment signal Tdead1 is 0, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 0, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can be 1. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can be reduced by, for example, one unit of time. When the value corresponding to the dead time adjustment signal Tdead1 is the value tri of the third state, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 0, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can also be 0. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can remain unchanged. Furthermore, the implementation methods of the dead time adjustment signals and control signals of other phases can be deduced similarly.

[0081] Figures 5A to 5C These are schematic diagrams illustrating various operations of embodiments of the present invention. Taking the operation result of the output stage VTM1 of the LLC resonant DC-DC converter as an example, such as... Figure 5AAs shown, during the period from time t0 to time t1, when the dead time (i.e., the length of the period from time t0 to time t1) between the first control signals QA_1, SA_1 and the first set of second control signals QB_1, SB_1 is too long, the excitation current I_Lm will form a diode forward voltage drop SR_Vds (as shown in the dashed box) on the rectifier switch SR1 / rectifier switch SR2, but the control terminal voltage Vsw of the primary side switch will oscillate around 0V. In addition, the resonant current I_Lr is unaffected. Therefore, the dead time management circuit 220 can generate an adjusted dead time adjustment signal Tdead1- corresponding to a value of 1 to shorten the dead time.

[0082] like Figure 5B As shown, during the period from time t0 to time t1, when the dead time (i.e., the duration of the period from time t0 to time t1) between the first control signals QA_1, SA_1 and the first set of second control signals QB_1, SB_1 is appropriate, the excitation current I_Lm will form a slight diode forward voltage drop SR_Vds (as shown in the dashed box) on the rectifier switch SR1 / rectifier switch SR2. Therefore, the dead time management circuit 220 can generate adjusted dead time adjustment signals Tdead1+ and Tdead1- corresponding to a value of 0 to maintain the dead time.

[0083] like Figure 5C As shown, during the period from time t0 to time t1, when the dead time (i.e., the length of the period from time t0 to time t1) between the first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 is too short, the rectifier switch SR1 / rectifier switch SR2 will not sense the diode forward voltage drop SR_Vds (as shown in the dashed box). Therefore, the dead time management circuit 220 can generate an adjusted dead time adjustment signal Tdead1+ corresponding to a value of 1 to extend the dead time.

[0084] Furthermore, it is worth noting that in multiphase control, control is based on the principle that all phase rectifier switches achieve zero-voltage switching. In this regard, increasing the dead time is preferable to decreasing it. In other words, the dead time management circuit 220 may only allow a decrease in dead time if all rectifier switches no longer require an extension of their dead time.

[0085] In another embodiment of the present invention, the value corresponding to the dead time adjustment signal Tdead1 can also be represented by, for example, "10", "01", and "00". When the value corresponding to the dead time adjustment signal Tdead1 is 10, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 1, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can be 0. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can be extended by, for example, by one unit time. When the value corresponding to the dead time adjustment signal Tdead1 is 01, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 0, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can be 1. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can be reduced by, for example, by one unit time. When the value corresponding to the dead time adjustment signal Tdead1 is 00, the value corresponding to the adjusted dead time adjustment signal Tdead1+ can be 0, and the value corresponding to the adjusted dead time adjustment signal Tdead1- can also be 0. Therefore, the dead time between the first group of first control signals QA_1, SA_1 and the first group of second control signals QB_1, SB_1 can remain unchanged. Furthermore, the implementation methods of the dead time adjustment signals and control signals for other phases can be deduced similarly.

[0086] Figure 6A This is a schematic diagram of a control circuit with a distributed architecture according to an embodiment of the present invention. (See reference) Figure 6A In one embodiment of the present invention, with Figure 1A Taking the output stages VTM1 to VTM3 of a three-phase LLC resonant DC-DC converter as an example, Figure 1A The control circuit 200 can be implemented in a distributed architecture, wherein the control circuit 200 may include sensing circuits and controllers disposed in each phase of the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3, and a microcontroller unit (MCU) 144 disposed outside the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3. The microcontroller 144 may, for example, include dead-time management circuitry and clock generator (e.g., Figure 1B The dead time management circuit 220 and clock generator 230 shown are selected from integrated circuits, PCB circuits, or a combination of both.

[0087] like Figure 6AAs shown, the output stage VTM1 of the LLC resonant DC-DC converter may further include sensing circuits 141 and 142 and a controller 143, and the output stages VTM2 and VTM3 of the LLC resonant DC-DC converter can be similarly described. It should be noted that each phase of the three-phase LLC resonant DC-DC converter output stages VTM1 to VTM3 may include at least one sensing circuit, but is not limited to... Figure 6A As shown. Controller 143 may include a control signal generator (such as...) Figure 1B The control signal generator 240_1 is shown. Sensing circuit 141 is coupled to the first terminal (i.e., the source terminal) of rectifier switch SR1 and controller 143 to sense the source-drain voltage of rectifier switch SR1 and generate a switching cycle sensing signal Tp_A and a switching on sensing signal To_A. Sensing circuit 142 is coupled to the first terminal (i.e., the source terminal) of rectifier switch SR2 and controller 143 to sense the source-drain voltage of rectifier switch SR2 and generate a switching cycle sensing signal Tp_B and a switching on sensing signal To_B. Controller 143 is also coupled to microcontroller 144, power switch group 110, and resonant module 120. Microcontroller 144 is coupled to the controller in each phase of the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3.

[0088] Microcontroller 144 can receive switching cycle sensing signals Tp_A and Tp_B via the switching cycle bus Tp_bus, and provide the corresponding dead time adjustment signal Tdead1 to controller 143. Microcontroller 144 can also receive the switching cycle sensing signals generated by the sensing circuits in each phase of the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3 via the switching cycle bus Tp_bus. Microcontroller 144 can provide the corresponding dead time adjustment signals Tdead1 to Tdead3 to the controllers in each phase of the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3, and can also provide a reference clock signal CLK to the controllers in each phase of the three-phase LLC resonant DC-DC converter output stage VTM1 to VTM3 via the clock signal bus CLK_bus.

[0089] The control signal generator within controller 143 generates a first set of first control signals QA_1, SA_1 and a first set of second control signals QB_1, SB_1 based on the dead time adjustment signal Tdead1 and the reference clock signal CLK. Controller 143 outputs the first set of first control signals QA_1, SA_1 and the first set of second control signals QB_1, SB_1 to power switch group 110 to synchronously control switches SW1_1, SW1_2, SW2_1, SW2_2 and rectifier switches SR1, SR2 to achieve zero-voltage switching. Furthermore, the output stages VTM2 and VTM3 of the LLC resonant DC-DC converter can be deduced similarly.

[0090] Figure 6B This is a schematic diagram of a control circuit with a modular architecture according to an embodiment of the present invention. (See reference) Figure 6B In one embodiment of the present invention, with Figure 1A Taking the output stages VTM1 to VTM3 of a three-phase LLC resonant DC-DC converter as an example, Figure 1A The control circuit 200 can also be implemented as follows: Figure 6B The control circuit 600 shown has an integrated architecture. The control circuit 600 includes sensing circuits 610_1 to 610_3, a dead-time control circuit 620, control signal generators 640_1 to 640_3, and a clock generator 630. Sensing circuits 610_1 to 610_3 are coupled to the dead-time control circuit 620 and the control signal generators 640_1 to 640_3. Control signal generators 640_1 to 640_3 are also coupled to the clock generator 630. The dead-time control circuit 620 includes logic circuit 621, time-division units 622_1 to 622_3, and switches 623_1 to 623_3. Logic circuit 621 is coupled to the control terminals of switches 623_1 to 623_3. Switches 623_1 to 623_3 are coupled between time-division units 622_1 to 622_3 and control signal generators 640_1 to 640_3.

[0091] Sensing circuits 610_1 to 610_3 are used to sense the source-drain voltage of one of the rectifier switches in the output stage VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter, respectively, to generate corresponding dead-time adjustment signals Tdead1 to Tdead3. Dead-time control circuit 620 can use the dead-time adjustment signals Tdead1 to Tdead3 as adjusted dead-time adjustment signals Tdead1+ to Tdead3+. Time-sharing units 622_1 to 622_3 can invert the dead-time adjustment signals Tdead1 to Tdead3 to obtain adjusted dead-time adjustment signals Tdead1- to Tdead3-. Logic circuit 621 can determine whether the adjusted dead-time adjustment signals Tdead1+ to Tdead3+ are all 0.

[0092] When the adjusted dead time adjustment signals Tdead1+ to Tdead3+ are all 0, logic circuit 621 turns on switches 623_1 to 623_3. Control signal generator 640_1 can generate a first set of first control signals QA_1, SA_1 and a first set of second control signals QB_1, SB_1 based on the adjusted dead time adjustment signals Tdead1+, Tdead1- and the clock signal CLK1. Control signal generator 640_2 can generate a second set of first control signals QA_2, SA_2 and a second set of second control signals QB_2, SB_2 based on the adjusted dead time adjustment signals Tdead2+, Tdead2- and the clock signal CLK2. Control signal generator 640_3 can generate a third set of first control signals QA_3, SA_3 and a third set of second control signals QB_3, SB_3 based on the adjusted dead time adjustment signals Tdead3+, Tdead3- and the clock signal CLK3.

[0093] Figure 7 This is a flowchart of a control method for a control circuit according to an embodiment of the present invention. (See reference) Figure 1A as well as Figure 7 In one embodiment of the present invention, the control circuit 200 may execute the following steps S710 to S740. In step S710, the control circuit 200 may synchronously control the output stages VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter, so that the output stages VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter respectively adjust the on-time of the power switch or rectifier switch. In step S720, the control circuit 200 may determine whether all dead-time adjustment signals Tdead1 to Tdead3 are not in the first state (i.e., whether they are all not the value "1"). If not, the control circuit 200 continues to execute step S710 to continue adjusting the on-time of the rectifier switch of each phase. If yes, the control circuit 200 executes step S730 to determine whether any dead-time adjustment signal is in the second state (i.e., whether they are all not the value "0"). If yes, the control circuit 200 continues to execute step S710 to continue adjusting the on-time of the rectifier switch of each phase. If not, the control circuit 200 executes step S740 to end the adjustment operation.

[0094] In this embodiment, the control circuit 200 can synchronously adjust the dead time between the control signals of each phase of the output stage VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter. When the dead time adjustment signal of any phase is in the first state (i.e., the value "1"), the dead time of each phase can be increased together until the dead time of all phases no longer needs to be increased, at which point the operation of determining whether the dead time of each phase needs to be shortened is performed. Furthermore, the control circuit 200 can synchronously adjust the dead time between the control signals of each phase of the output stage VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter. When the dead time adjustment signal of any phase is in the second state (i.e., the value "0"), the dead time of each phase can be decreased together until the dead time of all phases no longer needs to be decreased, at which point the adjustment operation ends. In this way, the control circuit 200 can perform effective synchronous adjustment of the output stages VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter, so that each phase of the output stages VTM1 to VTM3 of the three-phase LLC resonant DC-DC converter can achieve zero-voltage switching.

[0095] In summary, the control circuit and method of the multiphase power conversion circuit of the present invention can drive each phase of the output stage of the N-phase LLC resonant DC-DC converter at the same operating frequency and distribute them evenly within half a cycle with equal time differences (i.e., a phase difference of π / N between each phase). Furthermore, the control circuit and method of the multiphase power conversion circuit of the present invention can adjust the switching control signal of each phase according to the conduction state of at least one switch in the power switch group or synchronous switch group of each phase, and can ensure that the conduction time of each phase LLC resonant DC-DC converter output stage is the same as the time length of its respective resonant half-cycle, thereby achieving a lower series impedance. Moreover, the control circuit and method of the multiphase power conversion circuit of the present invention can synchronously adjust the dead time between the control signals of each phase of the N-phase LLC resonant DC-DC converter output stage to ensure that all zero-voltage switching requirements can be met within a common switching cycle.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A control circuit for a multiphase power conversion circuit, characterized in that, The multiphase power conversion circuit includes an input capacitor, an N-phase LLC resonant DC-DC converter output stage, and an output capacitor, where N is a positive integer greater than 1. Each phase of the N-phase LLC resonant DC-DC converter output stage includes a power switch group, a resonant module, and a synchronous switch group. The control circuit is coupled to the N-phase LLC resonant DC-DC converter output stage and generates N sets of first control signals and N sets of second control signals, wherein there is a dead time between the first control signal and the second control signal in the same set to control the power switch group and the synchronous switch group. The control circuit includes: N sensing circuits are respectively coupled to the corresponding ones in the output stage of the N-phase LLC resonant DC-DC converter, wherein each sensing circuit generates a corresponding dead time adjustment signal according to the on state of one of the power switch groups or the synchronous switch groups in the corresponding LLC resonant DC-DC converter output stage. A dead-time management circuit is coupled to the N sensing circuits, receives the dead-time adjustment signals generated by the N sensing circuits, and generates N sets of adjusted dead-time adjustment signals. A clock generator for generating N sets of clock signals, wherein adjacent clock signals in the N sets of clock signals have a phase difference of π / N; and N control signal generators respectively receive the corresponding clock signal and the corresponding adjusted dead time adjustment signal to generate the N sets of first control signals and the N sets of second control signals.

2. The control circuit according to claim 1, characterized in that, The dead time adjustment signal has a first state and a second state. After the dead time management circuit determines that all N dead time adjustment signals are not in the first state, it provides the N dead time adjustment signals in the second state to the corresponding control signal generator.

3. The control circuit according to claim 2, characterized in that, The first state is used to extend the dead time, and the second state is used to shorten the dead time.

4. The control circuit according to claim 1, characterized in that, The dead time management circuit is selected from integrated circuits, PCB circuits, or a combination of both.

5. The control circuit according to claim 1, characterized in that, The switching state refers to the level value based on the source-drain voltage.

6. A control method for a multiphase power conversion circuit, suitable for control circuits, characterized in that, The multiphase power conversion circuit includes an input capacitor, an N-phase LLC resonant DC-DC converter output stage, and an output capacitor, where N is a positive integer greater than 1. Each phase of the N-phase LLC resonant DC-DC converter output stage includes a power switch group, a resonant module, and a synchronous switch group. The control circuit is coupled to the N-phase LLC resonant DC-DC converter output stage and generates N sets of first control signals and second control signals, wherein there is a dead time between the first control signal and the second control signal in the same set to control the power switch group and the synchronous switch group. The control method includes: A corresponding dead time adjustment signal is generated based on the conduction state of one of the power switches or rectifier switches in the power switch or synchronous switch group in the corresponding LLC resonant DC-DC converter output stage. Receive the dead time adjustment signals generated by N sensing circuits, and generate N sets of adjusted dead time adjustment signals; Generate N sets of clock signals, wherein there is a phase difference of π / N between adjacent clock signals in the N sets of clock signals; and The corresponding clock signal and the corresponding adjusted dead time adjustment signal are received respectively to generate the N sets of first control signals and the N sets of second control signals.

7. The control method according to claim 6, characterized in that, The dead time adjustment signal has a first state and a second state, and the control method further includes: After determining that all N dead time adjustment signals are in a non-first state, the signal in the second state among the N dead time adjustment signals is provided to the corresponding control signal generator.

8. The control method according to claim 7, characterized in that, The first state is used to extend the dead time, and the second state is used to shorten the dead time.

9. The control method according to claim 6, characterized in that, The switching state refers to the level value based on the source-drain voltage.

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