Electric tuning frequency hopping filter based on MEMS technology and frequency offset compensation method thereof

Abstract

The invention belongs to the technical field of adjustable filtering elements, and particularly relates to an electric tuning frequency hopping filter based on the MEMS technology and a frequency offset compensation method thereof, the filter comprises a circuit board, the circuit board is provided with a digital chip P1, and the digital chip P1 is used for receiving radio frequency signals, triggering TRIG signals, selecting signal filtering or selecting signal direct connection; the filter chips S1 and S2 are used for selecting a specified frequency band according to the address code and used for signal filtering; the temperature measuring module is used for monitoring temperature signals of the filter chips S1 and S2 and transmitting the temperature signals to the digital chip P1; the temperature control module is used for controlling the temperature of the filter chips S1 and S2 within a certain range, and the digital chip P1 comprises branches MOSI, CS, CLK and TRIG; the method comprises steps 1 to 5. According to the invention, TRIG signals can be triggered, filtering at a specified frequency band can be realized, active heating or passive heat dissipation can be realized when the temperature is abnormal, frequency offset compensation can be realized in time, and distortion can be prevented.

Description

Technical Field

[0001] This invention belongs to the field of adjustable filter technology, specifically relating to an electrically tuned frequency hopping filter based on MEMS technology and its frequency offset compensation method. Background Technology

[0002] Filters contain amplification / tuning circuits. The temperature coefficients of parameters such as resistors, capacitors, and operational amplifier gains in these circuits can indirectly affect the filtering characteristics and cause frequency drift. To reduce this effect, MEMS (Micro-Electro-Mechanical Systems) technology is mainly used to integrate miniature sensors, actuators, signal processing circuits, and control circuits onto a chip. These components compensate for frequency drift, thereby improving the frequency stability of the filter.

[0003] Regarding the application of components, a search revealed a Chinese invention, CN109814281A, concerning a tunable light filter and its manufacturing method, as well as a tunable light filter assembly. This invention includes a tunable light filter, a silicon wafer die, an optical coating, a ring heater, a thermal contact pad, a thermistor, and a substrate. The thermal contact pad can receive electrical signals and transmit them to the ring heater. The thermistor can monitor the temperature of the light filter die and modify the electrical signal based on the monitored temperature.

[0004] When the ambient temperature changes, a ring heater can be used to provide auxiliary heating to stabilize the frequency when the temperature decreases. Conversely, when the temperature increases, the wavelength of the filter increases and the frequency decreases. If a fan is used for cooling, dust is easily stirred up. In addition, if liquid cooling is used, the water vapor generated can easily damage some components. Therefore, this invention proposes an electrically tuned frequency hopping filter and its frequency offset compensation method that can compensate in a timely manner under hot and cold conditions based on MEMS technology. Summary of the Invention

[0005] The purpose of this invention is to provide an electrically tunable frequency hopping filter based on MEMS technology and its frequency offset compensation method, which can trigger a TRIG signal, filter a specified frequency band, actively heat up or passively dissipate heat when the temperature is abnormal, and compensate for the frequency offset in a timely manner to prevent distortion.

[0006] The specific technical solution adopted by this invention is as follows: The electrically tunable frequency hopping filter based on MEMS technology includes a circuit board on which: Digital chip P1 receives radio frequency signals, triggers a TRIG signal, and selects signal filtering or signal pass-through. Filter chips S1 and S2 select a specified frequency band for signal filtering based on the address code; The temperature measurement module is used to monitor the temperature signals of the filter chips S1 and S2 and transmit them to the digital chip P1; The temperature control module is used to control the temperature of the filter chips S1 and S2 within a certain range.

[0007] As an optional solution, the digital chip P1 includes branches MOSI, CS, CLK, and TRIG.

[0008] As an optional solution, the temperature measuring module includes a first thermistor and a second thermistor spaced apart; The first thermistor is used to monitor the temperature signals of the filter chips S1 and S2 and transmit them to the digital chip P1.

[0009] As an optional solution, the temperature control module includes heat dissipation fins (4) arranged vertically on the outside of the circuit board, a heat conduction bag, and a heating resistor connected to the digital chip P1; The top of the heat-conducting bladder is connected to a circulation tube, and the heat-conducting bladder is provided with heat insulation holes for accommodating the first thermistor and the second thermistor. The heat-conducting bladder is filled with stratified nitrogen and refrigerant.

[0010] As an optional solution, the filter chip S1 is connected in series with capacitors CS1, CS3, CS4, CS8, CS9, CS11, CS12, CS13, CS14, and CE1.

[0011] As an optional solution, the filter chip S2 is connected in series with capacitors CS2, CS5, CS6, CS7, CS10, CS15, CS16, CS17, CS18, and CE2.

[0012] As an optional approach, the address code is calculated as follows: Address code = 50 in, The tuning center frequency within the frequency band. The lowest frequency within the segment. The highest frequency within the segment is 250, and the total number of steps within the segment is 250. The address code calculation result is rounded to the nearest integer.

[0013] As an optional solution, the address code contains 10 bits of parallel binary code, numbered A9 to A0, compatible with CMOS and TTL levels; Among them, A9 to A8 are frequency band selection codes, and A7 to A0 are intra-segment address codes; When frequency band control A9=0 and A8=0, the selected signal is passed through; When the frequency band control A9=0 and A8=1, the frequency band selection is 108MHz~225MHz; When the frequency band control A9=1 and A8=0, the frequency band selection is 225MHz~400MHz; When the frequency band control A9=1 and A8=1, the frequency band selection is 400MHz~678MHz.

[0014] As an alternative, inductors LL1 and LL2 for resonance are connected between the filter chips S1 and S2.

[0015] The frequency offset compensation method for electrically tuned frequency hopping filters includes the following steps: Step 1: Receive the radio frequency signal, determine whether the signal is pass-through or trigger the TRIG signal through the digital chip P1, and select signal filtering; Step 2: Calculate the address code using digital chip P1, select the specified frequency band, and call either filter chip S1 or filter chip S2 for signal filtering. After filtering, the signal is output. Step 3: By monitoring the temperature signals of filter chips S1 and S2, the temperature signals are transmitted to digital chip P1 for collection and processing. A threshold is set, and an alarm is triggered once the threshold is exceeded. Step 4: When the filter temperature is below the threshold, heat filter chips S1 and S2 until the temperature reaches the threshold range, then stop heating; Step 5: When the filter temperature is higher than the threshold, the refrigerant evaporates and dissipates heat to the outside of the casing (1) until the refrigerant is cooled down again and placed under nitrogen to prevent overheating.

[0016] The technical effects achieved by this invention are as follows: When receiving radio frequency signals, this invention triggers a TRIG signal. The digital chip P1 then sends a CS signal to determine whether to communicate with the filter chip S1 or the filter chip S2. A resonant circuit with a varactor diode is used to filter the specified frequency band. During the filtering process, temperature changes are monitored in real time. If the temperature is abnormal, the system can actively raise the temperature or passively dissipate heat. Through built-in MEMS components, the stability of the filtering is improved, mainly reducing signal drift caused by temperature. It can also compensate for frequency deviation in a timely manner to prevent distortion.

[0017] This invention, through steps one to five, uses a digital chip to select a resonant circuit based on a varactor diode to filter different frequency bands or allow signals to pass through. It also monitors the temperature change of the digital chip in real time within a small housing and compares it with a preset threshold. Once the threshold is exceeded, an alarm is triggered. It can actively heat up to resist the adverse effects of the external low temperature environment or passively cool down to continuously dissipate heat and prevent the wavelength of the filter from increasing and the frequency from decreasing due to overheating. Attached Figure Description

[0018] Figure 1 This is a circuit diagram of the digital chip P1 in Embodiment 1 of the present invention; Figure 2 This is a circuit diagram of the filter chip S1 in Embodiment 1 of the present invention; Figure 3 This is a circuit diagram of the filter chip S2 in Embodiment 1 of the present invention; Figure 4 This is a circuit diagram of the inductor branch in Embodiment 1 of the present invention; Figure 5 This is a front view of the electrically tuned frequency-hopping filter in Embodiment 1 of the present invention; Figure 6 This is a bottom view of the electrically tuned frequency hopping filter in Embodiment 1 of the present invention; Figure 7 This is a front view of the heat dissipation fins in Embodiment 1 of the present invention; Figure 8 This is an exploded view of the heat dissipation fins and heat conduction bag in Embodiment 1 of the present invention; Figure 9 This is a cross-sectional view of the heat-conducting bladder in Embodiment 1 of the present invention; Figure 10 This is a flowchart of the frequency offset compensation method for the electrically tuned frequency hopping filter in Embodiment 2 of the present invention.

[0019] The attached diagram lists the components represented by each number as follows: 1. Housing; 101. RF interface; 102. Control interface; 2. First thermistor; 3. Second thermistor; 4. Heat sink fins; 5. Heat conduction bladder; 501. Circulation tube; 502. Heat insulation hole; 6. Heating resistor. Detailed Implementation

[0020] To make the objectives and advantages of this invention clearer, the invention will be specifically described below with reference to embodiments. It should be understood that the following text is merely used to describe one or more specific embodiments of the invention and does not strictly limit the scope of protection specifically claimed by the invention.

[0021] Example 1: like Figures 1-9 As shown, the electrically tuned frequency hopping filter based on MEMS technology adopts a metal enclosed housing 1, with a circuit board fixed inside by screws. It uses the SPI (Serial Peripheral Interface) synchronous serial communication protocol for data transmission and control. The RF interface 101, control interface 102, digital chip P1, and filter chips S1 and S2 are coupled to the surface of the circuit board. The digital chip P1 receives the RF signal, triggers the TRIG signal, and selects signal filtering or signal pass-through. The filter chips S1 and S2 select a specified frequency band for signal filtering according to the address code.

[0022] See attached document Figure 5 and Figure 6 Both the RF interface 101 and the control interface 102 penetrate the housing 1. The RF interface 101 can be an SMP-JYD40-S model interface, and the control interface 102 can be a DS-SQT-105-01-LD model interface.

[0023] See attached document Figure 1 Pin 1 of digital chip P1 is connected to a 200V power supply; Pins 2, 3, and 5 are grounded; Pin 4 is connected to a +3.3V power supply, and pin 6 is connected to a -3.3V power supply. Pin 7 connects to the CLK (Serial Clock) branch. When configuring filter parameters (such as cutoff frequency and gain) or reading data, CLK ensures that the master and slave devices operate on the same clock cycle. The frequency is adjustable (set by the master device) and directly affects the communication speed. It uses 16-bit serial binary code control, MSB first (most significant bit sent first). The maximum CLK frequency is 14.4MHz. The 16-bit serial control tuning code (A0~A15) is TTL / CMOS 3.3V, where A0 is the least significant bit, A15 is the most significant bit, A10 is the mode selection (1 for low power mode, 0 for normal operation mode), A8 and A9 are segment selection codes, A0~A7 are data bits, and A11~A15 are invalid bits and must not be occupied. Pin 8 is connected to the MOSI (Master Out Slave In) branch to send filter parameters (such as FIR / IIR coefficients and operating mode control word) to programmable filter chips S1 and S2. One bit of data is transmitted in each clock cycle of CLK. Pin 9 is connected to the TRIG branch, and the output trigger pin OUT_TRIG is pulled up internally by the digital chip P1 and triggered on the falling edge. OUT_TRIG is sent 2.2us after MOSI finishes sending data, and the low level of TRIG lasts for ≥1us. Pin 10 is connected to the CS (Chip Select) branch. The CS signal determines whether to communicate with the filter chip S1 or the filter chip S2. The time interval between the falling edge of CS and the first rising edge of CLK is greater than two clock cycles, and the time interval between the rising edge of CS and the sixteenth falling edge of CLK is greater than two clock cycles.

[0024] See attached document Figure 1 The address code is calculated as follows: Address code = 50 in, The tuning center frequency within the frequency band. The lowest frequency within the segment. The highest frequency within the segment is 250, and the total number of steps within the segment is 250. The address code calculation result is rounded to the nearest integer.

[0025] As an optional solution, after the address code is calculated; When frequency band control A9=0 and A8=0, the selected signal is passed through; When the frequency band control A9=0 and A8=1, the frequency band selection is 108MHz~225MHz; When the frequency band control A9=1 and A8=0, the frequency band selection is 225MHz~400MHz; When the frequency band control A9=1 and A8=1, the frequency band selection is 400MHz~678MHz.

[0026] See attached document Figure 2 The filter chip S1 is connected in series with capacitors CS1, CS3, CS4, CS8, CS9, CS11, CS12, CS13, CS14, and CE1. Among them, the TX (Transport) direct-through branch 1022I, 2240I, and 4068I, the TX4 branch, and the RX (Receive) impedance branch are branched out.

[0027] See attached document Figure 3 The filter chip S2 is connected in series with capacitors CS2, CS5, CS6, CS7, CS10, CS15, CS16, CS17, CS18, and CE2. Among them, the TX (Transport) direct-through branch 1022O, 2240O, and 4068O, the TX1 branch, and the RX (Receive) impedance branch are branched out.

[0028] See attached document Figure 2 , Figure 3 and Figure 4 The filter chips S1 and S2 are connected by inductors LL1 and LL2 for resonance. Inductor LL1 is connected in series with capacitors CL1 and CL2, and inductor LL2 is connected in series with capacitors CL3 and CL4, forming a resonant circuit, thereby filtering harmonic signals of a specific frequency.

[0029] See attached document Figure 5 , Figure 8 and Figure 9The housing 1 contains 15 sets of first thermistors 2 and second thermistors 3 spaced apart. The adjacent first thermistors 2 and second thermistors 3 are bonded together with rock wool sheets to minimize heat exchange between them. The first thermistors 2 monitor the temperature signals of filter chips S1 and S2, and the second thermistors 3 monitor the temperature signal of housing 1. These temperature signals are collected and processed by digital chip P1 to detect abnormal temperatures of filter chips S1 and S2 in a timely manner, set thresholds, and trigger an alarm once the thresholds are exceeded.

[0030] See attached document Figure 5 , Figure 7 and Figure 9 When the filter temperature is below the threshold, in this embodiment, heat dissipation fins 4, heat conduction bags 5, and heating resistors 6 connected to digital chip P1 are arranged vertically on the outside of the circuit board. The digital chip P1 activates the heating resistors 6 to heat the heat conduction bags 5, so that the heat is transferred to the filter chips S1 and S2. The 15 heating resistors 6 are widely distributed and heat up at the same time, resulting in high heat conduction efficiency. Heating stops when the temperature reaches the threshold range, thus avoiding a decrease in the wavelength and an increase in the frequency of the filter. See Figure 8 and Figure 9 When the filter temperature exceeds the threshold, the heat-conducting bladder 5 is filled with layered nitrogen and refrigerant. The heat-conducting bladder 5 is heated, and the refrigerant evaporates and rises above the nitrogen. In addition, in this embodiment, a circulation pipe 501 is connected to the top of the heat-conducting bladder 5, which passes through the heat dissipation fins 4. Thus, the heat of the refrigerant is transferred along the circulation pipe 501 to the heat dissipation fins 4 and dissipated to the outside of the shell 1 until the refrigerant cools down again and falls back into the heat-conducting bladder 5, below the nitrogen. Moreover, the heat-conducting bladder 5 is provided with heat insulation holes 502 for accommodating the first thermistor 2 and the second thermistor 3. The inner wall of the heat insulation holes 502 is attached with glass wool to prevent the first thermistor 2 and the second thermistor 3 from heating the refrigerant and to prevent the wavelength of the filter from increasing and the frequency from decreasing due to overheating. Among them, the refrigerant can be HFOs (hydrofluoroolefins), which have a higher density than nitrogen. After being heated and evaporated, it can rise above the nitrogen and accumulate in the circulation pipe 501, squeezing the nitrogen into the heat-conducting bag 5 below. In order to improve the heat conduction efficiency, both the heat-conducting bag 5 and the circulation pipe 501 can be made of silicone. Further, see Figure 7 The circulation pipe 501 is rake-shaped, with a wide opening at one end and multiple tubes at the other end, so that the two ends have different degrees of freedom. This allows the refrigerant in the evaporating state to flow in one direction as much as possible, continuously transferring heat to the heat dissipation fins 4. Since there is a temperature difference between the heat dissipation fins 4 and the outside air, they can dissipate their own heat to the outside through the temperature gradient.

[0031] In summary, after detecting abnormal temperature signals, the system can actively raise the temperature to resist the decrease in wavelength and increase in frequency of the filter caused by the low temperature environment, or passively dissipate heat to prevent the increase in wavelength and decrease in frequency of the filter caused by overheating, thereby controlling the temperature of filter chips S1 and S2 within a certain range.

[0032] Example 2: like Figure 10 As shown, the frequency offset compensation method for an electrically tunable frequency hopping filter, taking the MEMS-based electrically tunable frequency hopping filter in Example 1 as an example, includes the following steps to address the temperature drift of the filter and provide timely frequency offset compensation: Step 1: Receive RF signals from the RX impedance branch connected to RF interface 101. The digital chip P1 determines whether the signal is pass-through or triggers the TRIG signal, and selects signal filtering accordingly. Among them, the signal direct connection can be selected as direct connection branch 1022I, 2240I, 4068I, TX4 branch, direct connection branch 1022O, 2240O, 4068O, TX1 branch respectively; Step 2: Calculate the address code using digital chip P1, select the specified frequency band, and call either filter chip S1 or filter chip S2 for signal filtering. The CS signal determines whether to communicate with filter chip S1 or filter chip S2. The interval between the falling edge of CS and the first rising edge of CLK is greater than two clock cycles, and the interval between the rising edge of CS and the sixteenth falling edge of CLK is greater than two clock cycles. The address code is calculated as follows: Address code = 50 in, The tuning center frequency within the frequency band. The lowest frequency within the segment. The highest frequency within the segment is 250, and the total number of steps within the segment is 250. The address code calculation result is rounded to the nearest integer. After the address code is calculated; When frequency band control A9=0 and A8=0, the selected signal is passed through; When the frequency band control A9=0 and A8=1, the frequency band selection is 108MHz~225MHz; When the frequency band control A9=1 and A8=0, the frequency band selection is 225MHz~400MHz; When the frequency band control A9=1 and A8=1, the frequency band selection is 400MHz~678MHz; After filtering, the signal is output; Step 3: The temperature signals of filter chips S1 and S2 are monitored by the first thermistor 2 and recorded as T1. The temperature signal of housing 1 is monitored by the second thermistor 3 and recorded as T2. These temperature signals are collected and processed by the digital chip P1 to detect abnormal temperatures of filter chips S1 and S2 in a timely manner. A threshold is set, and an alarm is triggered once the threshold is exceeded. Step 4: When the filter temperature is below the threshold, the digital chip P1 activates the heating resistor 6 to heat the heat conduction bag 5, so that the heat is transferred to the filter chips S1 and S2. The 15 heating resistors 6 are widely distributed and heat up at the same time, resulting in high heat conduction efficiency. Heating stops when the temperature reaches the threshold range to avoid the filter wavelength from decreasing and the frequency from increasing. Step 5: When the filter temperature is higher than the threshold, the heat-conducting bag 5 is heated, the refrigerant evaporates and rises above the nitrogen gas, so that the heat of the refrigerant is transferred along the circulation pipe 501 to the heat dissipation fins 4 and dissipates heat to the outside of the shell 1 until the refrigerant cools down again and falls back to the heat-conducting bag 5, below the nitrogen gas, to prevent the wavelength of the filter from increasing and the frequency from decreasing due to overheating. The refrigerant selected is HFOs (hydrofluoroolefins), which have a higher density than nitrogen. After being heated and evaporated, it can rise above the nitrogen and accumulate in the circulation pipe 501, squeezing the nitrogen into the heat-conducting bag 5 below. In order to improve the heat conduction efficiency, both the heat-conducting bag 5 and the circulation pipe 501 can be made of silicone.

[0033] In summary, through steps one through five, a resonant circuit based on a varactor diode is selected using a digital chip to filter different frequency bands or allow direct signal transmission. The temperature change of the digital chip is monitored in real time within a small housing 1 and compared with a preset threshold. Once the threshold is exceeded, an alarm is triggered. The system can actively raise the temperature to resist the adverse effects of the low temperature environment or passively lower the temperature to continuously dissipate heat and prevent the wavelength of the filter from increasing and the frequency from decreasing due to overheating. No additional cooling equipment such as fans is required, the system occupies little space, and does not reduce the sealing performance.

[0034] The above description is merely an optional embodiment of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention. Structures, devices, and operating methods not specifically described or explained in this invention, unless otherwise specified or limited, shall be implemented according to conventional means in the art.

Claims

1. An electrically tunable frequency-hopping filter based on MEMS technology, comprising a circuit board, characterized in that, The circuit board is equipped with: Digital chip P1 receives radio frequency signals, triggers a TRIG signal, and selects signal filtering or signal pass-through. Filter chips S1 and S2 select a specified frequency band for signal filtering based on the address code; The temperature measurement module is used to monitor the temperature signals of the filter chips S1 and S2 and transmit them to the digital chip P1; The temperature control module is used to control the temperature of the filter chips S1 and S2 within a certain range.

2. The electrically tunable frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The digital chip P1 includes branches MOSI, CS, CLK, and TRIG.

3. The electrically tuned frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The temperature measuring module includes a first thermistor (2) and a second thermistor (3) spaced apart. The first thermistor (2) is used to monitor the temperature signals of the filter chips S1 and S2 and transmit them to the digital chip P1.

4. The electrically tuned frequency hopping filter based on MEMS technology according to claim 3, characterized in that: The temperature control module includes heat dissipation fins (4), heat conduction bag (5), and heating resistor (6) connected to the digital chip P1, which are arranged vertically on the outside of the circuit board. The top of the heat-conducting bag (5) is connected to a circulation pipe (501), and the heat-conducting bag (5) is provided with a heat insulation hole (502) for accommodating the first thermistor (2) and the second thermistor (3). The heat-conducting bladder (5) is filled with layered nitrogen and refrigerant.

5. The electrically tunable frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The filter chip S1 is connected in series with capacitors CS1, CS3, CS4, CS8, CS9, CS11, CS12, CS13, CS14, and CE1.

6. The electrically tunable frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The filter chip S2 is connected in series with capacitors CS2, CS5, CS6, CS7, CS10, CS15, CS16, CS17, CS18, and CE2.

7. The electrically tuned frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The address code is calculated as follows: Address code = 50 in, The tuning center frequency within the frequency band. The lowest frequency within the segment. The highest frequency within the segment is 250, and the total number of steps within the segment is 250. The address code calculation result is rounded to the nearest integer.

8. The electrically tunable frequency hopping filter based on MEMS technology according to claim 2, characterized in that: The address code contains 10 parallel binary codes, numbered A9 to A0, and is compatible with CMOS and TTL levels. Among them, A9 to A8 are frequency band selection codes, and A7 to A0 are intra-segment address codes; When frequency band control A9=0 and A8=0, the selected signal is passed through; When the frequency band control A9=0 and A8=1, the frequency band selection is 108MHz~225MHz; When the frequency band control A9=1 and A8=0, the frequency band selection is 225MHz~400MHz; When the frequency band control A9=1 and A8=1, the frequency band selection is 400MHz~678MHz.

9. The electrically tunable frequency hopping filter based on MEMS technology according to claim 1, characterized in that: The filter chips S1 and S2 are connected by inductors LL1 and LL2 for resonance.

10. A frequency offset compensation method for an electrically tunable frequency hopping filter, applied to the electrically tunable frequency hopping filter based on MEMS technology as described in any one of claims 1-9, characterized in that, Includes the following steps: Step 1: Receive the radio frequency signal, determine whether the signal is pass-through or trigger the TRIG signal through the digital chip P1, and select signal filtering; Step 2: Calculate the address code using digital chip P1, select the specified frequency band, and call either filter chip S1 or filter chip S2 for signal filtering. After filtering, the signal is output. Step 3: By monitoring the temperature signals of filter chips S1 and S2, the temperature signals are transmitted to digital chip P1 for collection and processing. A threshold is set, and an alarm is triggered once the threshold is exceeded. Step 4: When the filter temperature is below the threshold, heat filter chips S1 and S2 until the temperature reaches the threshold range, then stop heating; Step 5: When the filter temperature is higher than the threshold, the refrigerant evaporates and dissipates heat to the outside of the casing (1) until the refrigerant is cooled down again and placed under nitrogen to prevent overheating.

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