A short-waveband high-frame-rate lossless infrared image real-time acquisition method

Abstract

The application discloses a kind of short-wave high frame rate lossless infrared image real-time acquisition methods, the output frequency of detector is controlled by controlling power voltage, solve the low frequency of infrared short-wave detector, the low frame frequency of output image.Problems.The acquisition method includes: starting detector and setting initial operating voltage, integrating programmable resistance in DC-DC circuit, for subsequent dynamic voltage adjustment;High-precision sampling resistor is connected to the output end of the detector, real-time acquisition voltage signal and transmission to FPGA, FPGA converts analog voltage signal into digital signal through analog-digital converter, for subsequent closed-loop control;FPGA continuously detects the frame rate output by the detector, collects the working temperature through the temperature sensor integrated near the detector, and feeds back to FPGA;FPGA judges whether the frame rate meets the requirements based on dynamic adaptive bias voltage;Energy storage capacitor energy recovery and release;Image preprocessing and protocol switching.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of infrared image acquisition, and particularly relates to a short-wave high-frame-rate lossless infrared image real-time acquisition method. BACKGROUND

[0002] With its excellent anti-interference characteristics, excellent secrecy and strong atmospheric penetration, infrared imaging technology has found its use in multiple industries, including but not limited to military reconnaissance, security monitoring, medical diagnosis and industrial detection. Traditional infrared image acquisition devices usually collect and record the thermal distribution and other physical property information of target objects based on infrared sensors. In view of the continuous progress in the field of infrared technology, the demand for data refresh frequency, energy efficiency and image quality non-destructiveness of such devices in practical applications is also increasing.

[0003] In traditional infrared imaging technology, the frame rate of infrared detectors is relatively limited. Especially when high-frame-rate imaging is performed, the amount of data collected is large, and the processing difficulty is increased, which affects the response speed and real-time performance of the system. In addition, in some specific applications, the power consumption problem of the device is increasingly prominent, which limits its use in scenarios that require long-time operation or high mobility. Therefore, although the existing technology has made significant progress in infrared image acquisition, there is still a contradiction between frame rate, power consumption and real-time performance.

[0004] Chinese patent CN101957982A discloses a real-time infrared image processing system based on a single field programmable gate array (FPGA). Specifically, the system mainly includes a signal conditioning module, an analog-to-digital conversion module, an image processing and system control module, and a video output module. The signal conditioning module provides a bias voltage drive for the infrared detector and sends the analog video image signal output by the infrared detector to the analog-to-digital conversion module after conditioning. The analog-to-digital conversion module converts the conditioned analog signal into a digital signal, which is then transmitted to the image processing and system control module. The image processing and system control module is responsible for controlling the infrared detector and processing the digital video image signal, including steps such as blind element replacement, non-uniformity correction, basic image processing, image enhancement, and character superposition. However, the system still has the following shortcomings:

[0005] 1) Communication protocol limitation: only Camera Link protocol is used to send video output to the host computer to obtain digital video signal, and multiple output protocols cannot be switched.

[0006] 2) Low image frame rate: at a resolution of 640x512, only a processing speed of 100 frames per second is achieved. SUMMARY

[0007] In order to make up for the deficiencies of the prior art, the present application aims at providing a technical scheme of a short-wave high-frame-rate lossless infrared image real-time acquisition method, which controls the output frequency of the detector by controlling the power supply voltage, solves the problem of low working frequency of the infrared short-wave detector and low output image frame frequency, realizes short-wave high-frame-rate lossless real-time image acquisition under the premise of not losing image quality by optimizing the image correction algorithm and adopting a new high-performance data transmission interface, and realizes short-wave high-frame-rate lossless real-time acquisition and compatibility with multiple communication protocols.

[0008] In one aspect, a short-wave high-frame-rate lossless infrared image real-time acquisition method is requested to protect, comprising the following steps:

[0009] Step 1, starting the detector and setting the initial working voltage, integrating a programmable resistor in the DC-DC circuit for subsequent dynamic voltage adjustment;

[0010] Step 2, connecting a high-precision sampling resistor to the output end of the detector, acquiring the voltage signal in real time and transmitting it to the FPGA (programmable gate array), and converting the analog voltage signal into a digital signal by the FPGA through an analog-to-digital converter for subsequent closed-loop control;

[0011] Step 3, the FPGA continuously detects the frame rate output by the detector, collects the working temperature through a temperature sensor integrated near the detector, and feeds back to the FPGA;

[0012] Step 4, the FPGA judges whether the frame rate meets the requirements based on dynamic adaptive bias voltage;

[0013] Step 5, energy storage capacitor energy recovery and release;

[0014] Step 6, image preprocessing and protocol switching.

[0015] Further, in step 4, the judgment process includes:

[0016] Step 4-1, scene complexity estimation;

[0017] Step 4-2, adjusting the voltage based on the closed-loop control algorithm;

[0018] Step 4-3, when the frame rate meets the standard and the temperature is stable, the FPGA locks the current voltage value and enters the real-time monitoring mode.

[0019] Further, the content of scene complexity estimation is:

[0020] ① Point cloud modeling: converting the pixel coordinates (x i ,y i ) of the infrared image into point cloud data P={p1,p2,...,p n}, where n is the image resolution (e.g., 640×512=327,680 pixels);

[0021] ② Simple Complex Construction: Define a connection distance threshold ρ between pixels to construct adjacency relationships, i.e.:

[0022] ,

[0023] in, For pixels and The Euclidean distance between them;

[0024] ③ Vietoris-Rips complex: If two points , Euclidean distance If the distance between any two points is less than or equal to ρ, then an edge is established; if the distance between any two points is less than or equal to ρ, then a triangle is formed, and so on to generate a higher-dimensional simplex.

[0025] ④ Cohomology group calculation: Calculate the number of connected components b0, corresponding to the number of independent heat source targets in the image; calculate the number of ring structures b1, corresponding to the number of holes in complex shapes such as smoke and obstructions; the calculation of the number of ring structures b1 is based on the Euler eigenvalue formula:

[0026] ;

[0027] in, For Euler eigenvalues, the topological eigenvalues ​​are calculated based on the Euler eigenvalue formula. ρ represents the number of vertices in the constructed Vietoris-Rips complex (or simply the point cloud connectivity graph); E represents the number of edges, which is the number of line segments connected in the Vietoris-Rips complex according to a distance threshold ρ. Specifically, when any two pixels... and Euclidean distance between At that time, an edge is formed between them; ρ is the number of faces, which refers to the number of two-dimensional faces (usually triangles) formed in a complex. When the distance between any two points is less than or equal to the threshold ρ, they will form a triangular face.

[0028] ⑤ Evaluate the scenario complexity: Define a complexity function by combining the weighted values ​​of b0 and b1:

[0029] ,

[0030] in, CFor the scene complexity, the value representing the overall complexity of the current infrared image scene, the system can determine whether to increase the frame rate to capture more details or reduce the frame rate to save power consumption according to this value.

[0031] For the dimension of the 0-dimensional homology group (the number of connected components), it represents the number of independent connected regions in the image; For the dimension of the 1-dimensional homology group (the number of ring structures), it represents the number of holes or ring structures in the image; For the dimension of the 1-dimensional homology group (the number of ring structures), it represents the number of holes or ring structures in the image; The weight coefficient of is an adjustable parameter, which is used to control the influence of the number of independent heat sources on the final complexity score C The greater the value, the greater the influence of the number of independent heat sources on the complexity. The weight coefficient of is an adjustable parameter, which is used to control the influence of the number of independent heat sources on the final complexity score The greater the value, the greater the influence of the number of independent heat sources on the complexity. The weight coefficient of is an adjustable parameter, which is used to control the influence of the number of independent heat sources on the final complexity score The greater the value, the greater the influence of the number of independent heat sources on the complexity.

[0032] Further, in the voltage adjustment stage based on the closed-loop control algorithm, if the current frame rate is lower than the target value, the FPGA triggers the PID control algorithm to calculate the voltage adjustment ΔV, and gradually increases the output voltage of the DC-DC circuit through the programmable resistance until the frame rate meets the standard; if the temperature of the detector exceeds the safety threshold, the FPGA starts the fuzzy control algorithm to dynamically reduce the voltage according to the temperature deviation.

[0033] Further, step 5 includes super frequency stage power collection and low power consumption mode energy release,

[0034] Super frequency stage power collection: During the super frequency operation of the detector, the residual power collection module of the DC-DC circuit captures the power that has not been completely absorbed, and the power is stored in the super capacitor with a charging efficiency ≥ 90%;

[0035] Low power consumption mode energy release: When the detector enters the normal working mode, the energy stored in the super capacitor is released based on the FPGA logic control to supplement the power supply demand of the DC-DC circuit.

[0036] Further, in step 6, the image preprocessing includes blind cell replacement, non-uniformity correction (based on scene adaptive algorithm) and edge enhancement processing on the original image data (14-bit grayscale, resolution 640×512) output by the detector. The preprocessed image data is transmitted to the interface board through a double buffering mechanism (double FIFO buffer).

[0037] Further, in step 6, according to the requirements of the upper computer, the FPGA automatically switches the communication protocol, and the specific strategy is as follows:

[0038] Low load scenario: select USB3.0 interface, bandwidth 5Gbps, delay <=2ms;

[0039] High load scenario: switch to PCIe Gen3 x4 interface, bandwidth 4GB / s, support 10Gb / s real-time transmission;

[0040] Data format: keep RAW original data, support lossless transmission.

[0041] In another aspect, a short-wave high-frame-rate lossless infrared image real-time acquisition system is requested to be protected, which is used to execute the short-wave high-frame-rate lossless infrared image real-time acquisition method, and the system comprises a detector, an ADC board, an FPGA platform, a core board and an interface board. The ADC board is an analog-to-digital conversion board, which is used to convert analog signals output by an infrared detector into digital signals. The FPGA platform adopts Xilinx Kintex-7 FPGA 7K325T as a master control chip, has high programmability, and supports multiple communication protocols. The core board is used to be responsible for preprocessing and preliminary analysis of image data, including but not limited to blind element replacement and non-uniformity correction. The interface board integrates USB 3.0, 10G Ethernet interface, Camera Link and PCIe interface, and supports multiple high-speed data transmission protocols.

[0042] Compared with the prior art, the present application has the following advantages:

[0043] (1) Support multiple high-speed interfaces: the existing infrared detector has the problems of limited transmission interface types, low transmission rate and unstable transmission data. The FPGA chip in the present application provides protocol drivers of USB3.0, 10G network interface, Camera Link and PCIe interface, which can ensure that the quality of large data infrared images is not affected during transmission, realizes lossless real-time processing, and supports high-frame-rate image transmission.

[0044] (2) Real-time transmission of lossless high-frame original image data: the traditional infrared image acquisition has the problems of low frame rate, easy data loss during transmission, unstable transmission, and transmission interface not supporting high-speed transmission. The acquisition equipment realized by changing the working voltage of the detector, with the help of high-speed digital-to-analog conversion board and lossless real-time transmission technology of high-frame-rate infrared image data, can support a data transmission speed of 2.5Gb / s or above, with a maximum of 10Gb / s, a resolution supporting two modes of 640*512 and 512*1024, and a frame rate ranging from 600-1000fps. Because of the high supported rate, all the collected and transmitted data are RAW original data.

[0045] (3) Ability to dynamically adjust the working frame rate based on scene complexity: This invention utilizes cohomology theory to analyze the topological structure features of infrared images, thereby intelligently judging the complexity of the scene and dynamically adjusting the frame rate accordingly. Specifically, by constructing a point cloud model of the image and calculating its corresponding 0-dimensional and 1-dimensional cohomology groups ( and This allows the system to extract information such as the number and distribution of heat source targets in an image. This information helps the system identify whether a scene contains multiple independent heat sources or complex structural changes, such as smoke or obstructions. Based on this topological feature analysis, when increased scene complexity is detected, the system automatically increases the frame rate to capture more details; conversely, if the scene is relatively static, the frame rate is reduced to save power. This method not only improves the system's response efficiency but also optimizes resource utilization, making image acquisition at high frame rates more intelligent and efficient.

[0046] (4) Reduced overall power consumption: During detector overclocking, some electrical energy is often not fully utilized. The energy recovery mechanism can efficiently capture and store this energy. This not only reduces energy waste but also effectively reduces the overall energy consumption of the system. Compared with traditional methods, energy recovery technology allows the reuse of electrical energy that would otherwise be wasted, improving the energy efficiency of the entire system. Especially in application scenarios that require frequent adjustment of the detector's operating voltage, this technology can ensure that every watt of electrical energy is fully utilized, further optimizing the system's performance. Attached Figure Description

[0047] Figure 1 This is a flowchart of the method of the present invention;

[0048] Figure 2 This is a structural block diagram of the data acquisition system of the present invention. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0050] Example 1

[0051] like Figure 1 As shown, a method for real-time acquisition of short-band high frame rate lossless infrared images includes the following steps:

[0052] Step 1: Start the detector and set the initial operating voltage.

[0053] The short-wave infrared detector is provided with an initial working voltage (such as a default value of 1.8V) through a DC-DC circuit. A programmable resistor is integrated in the DC-DC circuit for subsequent dynamic adjustment of the voltage.

[0054] Step 2, a high-precision sampling resistor (such as 0.1Ω) is connected to the output end of the detector, and the voltage signal is collected in real time and transmitted to the FPGA (programmable gate array). The FPGA converts the analog voltage signal into a digital signal through an analog-to-digital converter (ADC module) for subsequent closed-loop control.

[0055] Step 3, the FPGA continuously detects the frame rate of the detector output (such as a target frame rate set to 800fps), and collects the working temperature through a temperature sensor integrated near the detector and feeds back to the FPGA.

[0056] Step 4, the FPGA judges whether the frame rate meets the requirements based on dynamic adaptive bias.

[0057] The specific judgment process includes:

[0058] (1) Scene complexity estimation

[0059] ① Point cloud modeling: convert the pixel coordinates (x i ,y i ) of the infrared image into point cloud data P={p1,p2,...,p n}, where n is the image resolution (such as 640×512=327,680 pixels).

[0060] ② Simplex construction: define a connection distance threshold ρ between pixel points to construct adjacency relationships, i.e.

[0061] ,

[0062] where is the Euclidean distance between pixel points and .

[0063] ③ Vietoris-Rips complex: if the Euclidean distance between two points , is , an edge is established; if the distance between three points is ≤ ρ, a triangle is formed, and so on to generate high-dimensional simplices.

[0064] ④ Cohomology group calculation:

[0065] 0-dimensional cohomology group : calculate the number of connected components , which corresponds to the number of independent heat source targets in the image.

[0066] 1-dimensional cohomology group : Calculate the number of ring structures This corresponds to the number of holes in complex shapes such as smoke and obstructions. The calculation of the number of ring structures, b1, is based on the Euler eigennumber formula:

[0067] ,

[0068] in, For Euler eigenvalues, the topological eigenvalues ​​are calculated based on the Euler eigenvalue formula. ρ represents the number of vertices in the constructed Vietoris-Rips complex (or simply the point cloud connectivity graph); E represents the number of edges, which is the number of line segments connected in the Vietoris-Rips complex according to a distance threshold ρ. Specifically, when any two pixels... and Euclidean distance between At that time, an edge is formed between them; ρ is the number of faces, which refers to the number of two-dimensional faces (usually triangles) formed in a complex. When the distance between any two points is less than or equal to the threshold ρ, they will form a triangular face.

[0069] ⑤ Assess the complexity of the scenario: Combined with and The weighted values ​​are used to define the complexity function:

[0070] ,

[0071] in, C Scene complexity is a numerical value representing the overall complexity of the current infrared image scene. The system can use this value to determine whether to increase the frame rate to capture more details or decrease the frame rate to save power. The dimension (number of connected components) of the 0-dimensional cohomology group represents the number of independent connected regions in the image; The dimension of the 1-dimensional cohomology group (number of ring structures) represents the number of holes or ring structures in the image; for The weighting coefficient is an adjustable parameter used to control the impact of the number of independent heat sources on the final complexity score. C The extent of the impact The larger the value, the greater the impact of the number of independent heat sources on complexity. for The weighting coefficient is an adjustable parameter used to control the number of holes / ring structures. The greater the value, the greater the influence of complex occlusion or morphology in the scene on the complexity.

[0072] When the scene complexity is low, the frame rate is reduced, and when the scene complexity is high, the frame rate is increased to collect more information. The parallel computing unit dedicated HLS module is deployed in the FPGA to ensure that the single frame processing delay is less than 2ms.

[0073] (2) Adjust the voltage based on the closed-loop control algorithm

[0074] When the frame rate is insufficient, the voltage is increased: if the current frame rate is lower than the target value, the FPGA triggers the PID control algorithm (proportional coefficient Kp=0.5, integral time Ti=10ms, and differential time Td=2ms) to calculate the voltage adjustment ΔV. The output voltage of the DC-DC circuit is gradually increased through programmable resistance (such as 0.1V each time), until the frame rate meets the standard.

[0075] When the temperature is too high, the voltage is reduced: if the temperature of the detector exceeds the safety threshold (such as 60℃), the FPGA starts the fuzzy control algorithm to dynamically reduce the voltage (such as 0.05V each time) according to the temperature deviation, to avoid overheating damage.

[0076] (3) When the frame rate meets the standard and the temperature is stable, the FPGA locks the current voltage value (such as 2.2V) and enters the real-time monitoring mode.

[0077] Step 5, energy storage capacitor energy recovery and release.

[0078] Super frequency stage energy collection: During the detector super frequency operation (such as voltage increased to 2.2V), the remaining energy collection module of the DC-DC circuit captures the energy that is not completely absorbed. The energy is stored in a super capacitor (such as 10F / 5.5V) with a charging efficiency of ≥90%.

[0079] Low power consumption mode energy release: When the detector enters the normal working mode (such as voltage back to 1.8V), the intelligent management system (based on FPGA logic control) releases the energy stored in the super capacitor to supplement the power supply demand of the DC-DC circuit.

[0080] Release strategy: energy is allocated on demand (such as releasing 10% of the stored energy for each frame of image acquisition).

[0081] Step 6, image preprocessing and protocol switching.

[0082] (1) Image preprocessing: the original image data (14-bit grayscale, resolution 640x512) output by the detector is replaced with blind elements, non-uniformity correction (based on scene adaptive algorithm), and edge enhancement processing. The preprocessed image data is transmitted to the interface board through a double buffering mechanism (double FIFO buffer).

[0083] (2) Dynamic protocol selection and data output: Based on the host's requirements (through I²C bus communication), the FPGA automatically switches the communication protocol.

[0084] Low load scenario: Preferentially select USB3.0 interface (bandwidth 5Gbps), delay ≤2ms.

[0085] High load scenario: Switch to PCIe Gen3 x4 interface (bandwidth 4GB / s), support 10Gb / s real-time transmission.

[0086] Data format: Preserve RAW raw data (14 bits), support lossless transmission.

[0087] The system can automatically select the optimal transmission protocol according to the current data load and real-time requirements. For example, preferentially use USB 3.0 interface in low load, and switch to 10G Ethernet interface or PCIe interface in high load or need higher bandwidth. Through the built-in flow control algorithm, the system can dynamically adjust the bandwidth allocation between different interfaces to ensure the stability and efficiency of data flow.

[0088] In the process of data transmission, double buffering mechanism is adopted for data caching and processing to avoid data loss or delay. When one buffer is transmitting data, the other buffer can simultaneously process data, thereby improving the overall efficiency of the system. A set of advanced flow control algorithm is built-in to optimize the load balance between different interfaces, ensuring stable transmission rate under high load conditions.

[0089] This method uses advanced compression technologies such as JPEG2000 to compress images, reducing data volume while ensuring image quality. The compression ratio can be adjusted according to specific application requirements. In the process of data transmission, redundancy check is carried out, using error detection and correction (ECC) technology to ensure the integrity and accuracy of data, especially suitable for data transmission in long distance or unstable network environment.

[0090] The application first provides the working voltage of the detector by a DC-DC circuit, wherein the voltage control resistance of the DC-DC circuit is replaced by a programmable resistance, and the infrared detector is started at the normal working voltage at the initial time; the high-precision sampling resistance arranged at the detector can feed back the voltage to the FPGA in real time to control the smoothness of the DC-DC output voltage; secondly, after the detector outputs the image data to the FPGA, the FPGA detects whether the frame rate of the detector reaches the target frame rate, and if not, the programmable resistance at the DC-DC is controlled to increase the output voltage to increase the working voltage of the detector to achieve the effect of improving the image frame rate of the detector. In addition, a temperature sensor is arranged at the detector, the working environment temperature of the detector is detected, the bias voltage is automatically adjusted to reach the target frame rate, and the stability and reliability of the equipment under different working conditions are ensured. After the image data output by the detector enters the FPGA, not only the format conversion and protocol output are performed, but also the image content is analyzed by introducing the homotopy theory. As an important tool of algebraic topology, the homotopy theory can extract the number, distribution form and structure change of the heat source target in the image from the mathematical level, identify the connected regions and hole characteristics by constructing the image point cloud model and calculating the 0-dimensional and 1-dimensional homotopy groups, and quantize the scene complexity, so as to automatically adjust the bias voltage and ensure the stability of the equipment under different working conditions. Finally, the FPGA converts the image data into various high-speed protocol outputs to realize real-time image acquisition. In the voltage adjustment stage, the energy recovery mechanism is introduced, the electric energy not completely absorbed by the detector is recovered through the DC-DC circuit, stored in the energy storage capacitor, and the residual electric energy during the working of the detector is stored and reused.

[0091] Embodiment 2

[0092] As shown in Figure 2 A short-wave high-frame-rate lossless infrared image real-time acquisition system is used to execute the short-wave high-frame-rate lossless infrared image real-time acquisition method in embodiment 1. The acquisition system includes a detector, an ADC board, an FPGA platform, a core board and an interface board.

[0093] FPGA platform: Xilinx Kintex-7 FPGA 7K325T is used as the main control chip, which has high programmability and supports multiple communication protocols.

[0094] ADC board: high-resolution and high-precision analog-to-digital conversion board, which is used to convert the analog signal output by the infrared detector into a digital signal to ensure the accuracy of the acquisition data.

[0095] Core board: responsible for the preprocessing and preliminary analysis of image data, including blind cell replacement, non-uniformity correction and other steps.

[0096] Interface board: integrated USB 3.0, 10G Ethernet interface, Camera Link and PCIe interface, supporting multiple high-speed data transmission protocols.

[0097] Example 3

[0098] Experimental verification and performance evaluation

[0099] Experimental setup: Infrared images with a resolution of 1920x1080 were used for testing, with a data volume of approximately 32MB / frame and an image frame rate of 50fps.

[0100] Transmission delay: When using the USB 3.0 interface for data transmission, the maximum transmission delay of the system is 2ms; when using the 2.5G network interface, the delay is about 1.5ms; when using the PCIe interface, the delay is reduced to 0.8ms.

[0101] Transmission efficiency: Under the condition of lossless transmission of full image data, the transmission rate of the USB 3.0 interface can reach 4.8Gbps, the transmission rate of the 10G network interface is 10Gbps, and the transmission rate of the PCIe interface can reach a maximum of 8Gbps, which is much higher than that of the USB 3.0 and network interfaces.

[0102] (1) Detector bias voltage control

[0103] Voltage regulation module: By precisely controlling the working voltage of the detector, its working frequency can be effectively improved. For example, gradually increase the bias voltage from the standard value to the optimized value, record the change effect of each step, and finally determine the optimal parameter combination.

[0104] Experimental verification: Through a series of experimental verification, it is found that when the bias voltage is increased by 10% from the default value, the frame rate is increased by about 20%, while maintaining a high image quality.

[0105] (2) Real-time monitoring and feedback

[0106] State monitoring: The system has real-time monitoring function, which can continuously track the working state of the detector, and automatically adjust the operating parameters as needed. For example, when detecting that the frame rate fluctuates greatly, the system will automatically adjust the bias voltage to restore stability.

[0107] (3) Self-diagnosis function:

[0108] When detecting abnormal conditions (such as signal distortion or frame rate drop), the system will immediately issue an alarm and try to restore normal working state through self-adjustment. For example, if it detects that the image in a certain area is distorted, the system will automatically recalibrate the detector settings in that area.

[0109] The application is suitable for real-time image acquisition and transmission of high frame rate, including an ADC board and a core board capable of high frame rate data acquisition and transmission, estimating scene complexity and environment temperature through upper harmonic theory, controlling bias voltage of the detector, and improving output frame rate of the detector. The application is equipped with USB3.0, gigabit network interface, Camera Link and PCIe interface, supports lossless real-time transmission of high frame rate image data, and uses energy storage capacitor to collect and store unused energy of the detector.

[0110] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for real-time acquisition of short-band high frame rate lossless infrared images, characterized in that, Includes the following steps: Step 1: Start the detector and set the initial operating voltage. Integrate a high-precision programmable resistor in the DC-DC circuit for subsequent dynamic voltage adjustment. Step 2: Connect a high-precision sampling resistor to the output of the detector to collect voltage signals in real time and transmit them to the FPGA. The FPGA converts the analog voltage signals into digital signals through an analog-to-digital converter for subsequent closed-loop control. Step 3: The FPGA continuously monitors the frame rate output by the detector and collects the operating temperature through a temperature sensor integrated near the detector, and feeds it back to the FPGA. Step 4: The FPGA determines whether the frame rate meets the requirements based on dynamic adaptive bias; the determination process includes: Step 4-1, Scene Complexity Estimation; Specific details are as follows: ① The pixel coordinates (x, y) of the infrared image i ,y i Convert the data to point cloud data P={p1,p2,...,p}. n }, where n is the image resolution; ② Define the connection distance threshold ρ between pixels and construct the adjacency relationship; ③ If two points , Euclidean distance If the distance between any two points is less than or equal to ρ, then an edge is established; if the distance between any two points is less than or equal to ρ, then a triangle is formed, and so on to generate a higher-dimensional simplex. ④ Calculate the number of connected components b0, which corresponds to the number of independent heat source targets in the image; calculate the number of ring structures b1, which corresponds to the number of holes in the complex shapes of smoke and obstructions. ⑤ Combining the weighted values ​​of b0 and b1, define the complexity function: ,in, For scene complexity; Step 4-2: Adjust the voltage based on the closed-loop control algorithm; dynamically adjust the working frame rate based on the scene complexity. If the current frame rate is lower than the target value, the FPGA triggers the PID control algorithm to calculate the voltage adjustment amount ΔV, and gradually increases the output voltage of the DC-DC circuit through the programmable resistor until the frame rate reaches the target. If the detector temperature exceeds the safety threshold, the FPGA starts the fuzzy control algorithm to dynamically reduce the voltage according to the temperature deviation. Step 4-3: When the frame rate meets the standard and the temperature is stable, the FPGA locks the current voltage value and enters real-time monitoring mode; Step 5: Energy recovery and release from the energy storage capacitor; Step 6: Image preprocessing and protocol switching.

2. The method for real-time acquisition of short-band high frame rate lossless infrared images according to claim 1, characterized in that, Step 5 includes energy harvesting during the overclocking phase and energy release in low-power mode. Overclocking stage energy harvesting: During the detector's overclocking operation, residual energy that is not fully absorbed is captured by the residual energy harvesting module of the DC-DC circuit. The energy is stored in a supercapacitor with a charging efficiency of ≥90%. Low-power mode energy release: When the detector enters normal operating mode, the energy stored in the supercapacitor is released based on FPGA logic control to supplement the power supply needs of the DC-DC circuit.

3. The method for real-time acquisition of short-band high frame rate lossless infrared images according to claim 1, characterized in that, In step 6, image preprocessing includes blind pixel replacement, non-uniformity correction, and edge enhancement processing of the raw image data output by the detector; the preprocessed image data is transmitted to the interface board through a double buffering mechanism.

4. The method for real-time acquisition of short-band high frame rate lossless infrared images according to claim 3, characterized in that, In step 6, the FPGA automatically switches the communication protocol according to the requirements of the host computer. The specific strategy is as follows: Low-load scenarios: Select USB 3.0 interface, bandwidth 5Gbps, latency ≤2ms; High-load scenarios: Switch to PCIe Gen3 x4 interface, bandwidth 4GB / s, supports 10Gb / s real-time transmission; Data format: Retains original RAW data and supports lossless transmission.

5. A short-band high frame rate lossless infrared image real-time acquisition system, used to execute the short-band high frame rate lossless infrared image real-time acquisition method according to any one of claims 1-4, characterized in that, This includes detectors, ADC boards, FPGA platforms, core boards, and interface boards. The ADC board is an analog-to-digital converter board used to convert the analog signals output by the infrared detector into digital signals. The FPGA platform uses a Xilinx Kintex-7 FPGA 7K325T as the main control chip, which has high programmability and supports multiple communication protocols; The core board is responsible for the preprocessing and preliminary analysis of image data, including but not limited to blind pixel replacement and non-uniformity correction. The interface board integrates USB 3.0, 10G Ethernet, Camera Link, and PCIe interfaces, supporting multiple high-speed data transmission protocols.

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