Semiconductor element

Abstract

A semiconductor device includes a substrate, a semiconductor stack on the substrate, and a first semiconductor layer on the semiconductor stack. The semiconductor stack includes a first semiconductor structure adjacent to the substrate, a second semiconductor structure on the first semiconductor structure, and a first active region between the first semiconductor structure and the second semiconductor structure. The first semiconductor layer is located on the second semiconductor structure and comprises Al < x > < 1 > Ga < 1-x > < 1 > As, and x < 1 > lt is larger than or equal to 0.005; and 0.2 part. The first semiconductor layer has a first thickness between 3 [mu] m and 8 [mu] m. The semiconductor element outputs a first power with an optical wavelength greater than or equal to 900 nm and less than 1100 nm and a second power with an optical wavelength less than 900 nm and greater than 700 nm, and the ratio of the second power to the sum of the first power and the second power is less than or equal to 30%.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor device, and in particular, to a semiconductor optoelectronic device. BACKGROUND

[0002] III-V semiconductor materials containing group III and group V elements can be used in various semiconductor optoelectronic devices such as light emitting diodes, laser diodes (LDs), photodiodes (PDs), or solar cells, or can be power devices such as switching elements or rectifiers, and can be applied in the fields of illumination, medical treatment, display, communication, sensing, power systems, etc.

[0003] For example, light emitting diodes, as one of the main applications of semiconductor devices, have the advantages of high brightness, low energy consumption, small size, fast response, long service life, etc., and are widely used. SUMMARY

[0004] According to an embodiment of the present application, a semiconductor device includes a semiconductor stack, a first electrode structure, a conductive structure, and a first contact structure. The semiconductor stack includes a first semiconductor structure, an active structure, and a second semiconductor structure stacked in sequence. The conductive structure is located below the first semiconductor structure. The first contact structure is located between the first semiconductor structure and the conductive structure and forms a plurality of contact surfaces with the conductive structure. The first electrode structure is located on the second semiconductor structure and has an electrode pad and first and second extension portions connected to the electrode pad. From a top view, the first and second extension portions have a first region adjacent to the first extension portion, a second region adjacent to the second extension portion, and a third region between the first and second regions. The plurality of contact surfaces overlap the first, second, and third regions in a vertical direction, and the plurality of contact surfaces have first, second, and third contact areas in the first, second, and third regions, respectively, with the third contact area being larger than the first and second contact areas. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1A A top view of a semiconductor device according to some embodiments of the present application;

[0006] Figure 1B A cross-sectional view of the semiconductor device of Figure 1A along the A-A' line;

[0007] Figure 1C An enlarged cross-sectional view of the R1 region in Figure 1B

[0008] Figure 1D ​Cross-sectional view of a first active region of some embodiments;

[0009] Figure 2A Cross-sectional view of a semiconductor device of some embodiments of the present application;

[0010] Figure 2B Cross-sectional view of Figure 2A Enlarged cross-sectional view of the R2 region;

[0011] Figure 2C Cross-sectional view of a second active region of some embodiments;

[0012] Figure 3 Emission spectrum of semiconductor devices of the present application with different first semiconductor layer aluminum content;

[0013] Figure 4 Emission spectrum of semiconductor devices of the present application with different well layer thicknesses;

[0014] Figure 5 Emission spectrum of semiconductor devices of the present application with and without a second semiconductor layer;

[0015] Figure 6 Cross-sectional view of a package structure of some embodiments of the present application;

[0016] Figure 7 Emission spectrum of semiconductor devices of the present application with different well layer thicknesses.

[0017] Legend:

[0018] 10, 20, 30: semiconductor device

[0019] 100: substrate

[0020] 102: semiconductor stack

[0021] 103: first semiconductor structure

[0022] 104, 104': first active region

[0023] 104a: first confinement layer

[0024] 104b: second confinement layer

[0025] 104c, 104c': first active layer

[0026] 104c1, 104c1', 104c1": first barrier layer

[0027] 104c2, 104c2', 104c2": first well layer

[0028] 105: second semiconductor structure

[0029] 106: First semiconductor layer

[0030] 106a: Rough surface

[0031] 107: Second semiconductor layer

[0032] 108: First contact structure

[0033] 108a: First contact part

[0034] 109: Second contact structure

[0035] 109a: Second contact part

[0036] 110: Third Semiconductor Structure

[0037] 111, 111': Second active zone

[0038] 111a: Third confinement layer

[0039] 111b: Fourth Confinement Layer

[0040] 111c, 111c': Second active layer

[0041] 111c1, 111c1', 111c1”: Second barrier layer

[0042] 111c2, 111c2', 111c2”: Second well layer

[0043] 112: Fourth Semiconductor Structure

[0044] 113: Tunnel Structure

[0045] 113a: First doped layer

[0046] 113b: Second doped layer

[0047] 114: Third semiconductor layer

[0048] 120: First electrode

[0049] 120a: Electrode pad

[0050] 120b1: First extension

[0051] 120b2: Second extension

[0052] 130: Second electrode

[0053] 140: Insulation structure

[0054] 141: Hole

[0055] 141a: First hole

[0056] 141b: Second hole

[0057] 150: Conductive structure

[0058] 160: Reflective Structure

[0059] 170: Joint structure

[0060] 180: Protective Structure

[0061] 180a: First opening

[0062] 300: Package structure

[0063] 31: Packaging substrate

[0064] 32: Through hole

[0065] 33: Carrier

[0066] 33a: Part 1

[0067] 33b: Part Two

[0068] 35: Joint line

[0069] 36: Electrical connection structure

[0070] 36a, 36b: Contact pads

[0071] 38: Packaging materials

[0072] t1: First thickness

[0073] t2, t2', t2”: Second thickness

[0074] t3: Third thickness

[0075] t4: Fourth thickness

[0076] t5, t5', t5”: Fifth thickness

[0077] s1: First side

[0078] s2: Second side

[0079] z1: First area

[0080] z2: Second region

[0081] z3: Third Region

[0082] z4: Fourth Region

[0083] z5: Fifth Region

[0084] z6: Sixth Region Detailed Implementation

[0085] To make the description of the present invention more detailed and complete, the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that the following embodiments of the semiconductor device illustrated for the present invention do not limit the present invention to the following embodiments. In the drawings or the description, similar or identical components will be described using similar or identical reference numerals, and unless otherwise specified, the shapes or sizes of the components in the drawings are only illustrative, and the size ratios and relative positions between the components may be exaggerated for the purpose of clear description, and in fact, they are not limited thereto. It should be particularly noted that the components not shown or described in the drawings may be in forms known to those skilled in the art.

[0086] Unless otherwise specified, the general formula InGaP represents In 1- , 1-x8 , x14 , 1-x6-x7 , x13 , x6 , x12 , x11 , x15 , x10 , 1-x14 , x9 , 1-x13 , x9 , 1-x12 , x8 , 1-x11 , x7 , 1-x10 , 1-x5 , 1-x15 Ga 1-x0 P, where 0 < x0 < 1; the general formula AlInP represents Al x1 In 1-x1 P, where 0 < x1 < 1; the general formula AlGaInP represents Al x2 Ga x3 In 1-x2-x3 P, where 0 < x2 < 1 and 0 < x3 < 1; the general formula InGaAsP represents In x4 Ga 1-x4 As x5 P 1-x5 , where 0 < x4 < 1, 0 < x5 < 1; the general formula AlGaInAs represents Al x6 Ga x7 In<000​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​, where 0 < x14 < 1, 0 < x15 < 1; the general formula AlInGaN represents Al x16 In x17 Ga 1-x16-x17 N, where 0 < x16 < 1, 0 < x17 < 1. When the semiconductor device is a light-emitting device, the content of each element can be adjusted according to different purposes, for example, it can be adjusted to adjust the bandgap or peak wavelength.

[0087] The semiconductor device of the present invention can be a light-emitting device (such as a light-emitting diode or a laser diode), a light-absorbing device (such as a photodetector), or a non-optical and electrical device. The composition and / or dopant contained in each layer of the semiconductor device of the present invention can be known by any appropriate analysis method (such as secondary ion mass spectrometry (SIMS) or energy dispersive X-ray spectroscopy (EDX)). Similarly, the thickness of each layer of the semiconductor device can be known by any suitable analysis method, such as transmission electron microscopy (TEM) or scanning electron microscopy (SEM).

[0088] Unless otherwise specified, similar descriptions such as "the first component (or layer, structure, etc.) is located on (or under) the second component (or layer, structure, etc.)" may include embodiments where the first component and the second component are in direct contact, and may also include embodiments where there are other additional components between the first component and the second component and they are not in direct contact with each other. Similarly, terms related to bonding and connection, such as "connected" and "interconnected", unless otherwise defined, may refer to two structures in direct contact, or may also refer to two structures not in direct contact, with other structures provided between these two structures. In addition, it should be understood that the up-and-down positional relationship of each layer (or structure) may change due to different viewing directions. Furthermore, in the present disclosure, the statement that a layer or structure "is composed of X" means that the main component of the above layer or structure is X, but it does not exclude that the above layer or structure contains dopants or inevitable impurities.

[0089] Figure 1A FIG. is a top view schematic diagram of the semiconductor device 10 according to some embodiments of the present invention. <00​​​​​​​​​​​​​As shown, the semiconductor element 10 includes a substrate 100, a semiconductor stack 102, a first electrode 120, a second electrode 130, and a first semiconductor layer 106. The semiconductor stack 102 is located on the substrate 100. The first semiconductor layer 106 is located on the side of the semiconductor stack 102 away from the substrate 100. The first electrode 120 is located on the first semiconductor layer 106, and the second electrode 130 is located below the substrate 100. Furthermore, the semiconductor element 10 may optionally include an insulating structure 140, a conductive structure 150, a reflective structure 160, a bonding structure 170, and / or a protective structure 180.

[0091] like Figure 1A As shown, the first electrode 120 includes an electrode pad 120a and optionally includes an extension electrode 120b connected to the electrode pad 120a. In this embodiment, the extension electrode 120b includes a first extension 120b1 and a second extension 120b2. The first extension 120b1 is in direct contact with the electrode pad 120a, and the second extension 120b2 is in direct contact with the first extension 120b1 and extends in a direction perpendicular to the first extension 120b1. The width of the first extension 120b1 is greater than or equal to the width of the second extension 120b2. In some embodiments, the width of the first extension 120b1 may be gradual (not shown). For example, the width of the first extension 120b1 gradually increases in the direction toward the electrode pad 120a and gradually decreases in the direction away from the electrode pad 120a. In this embodiment, the semiconductor element 10 has only one electrode pad 120a. In other embodiments, the semiconductor element 10 may have two or more electrode pads 120a (not shown).

[0092] The first electrode 120 and the second electrode 130 are used for electrical connection to an external power source. The materials of the first electrode 120 and the second electrode 130 can be the same or different. For example, the materials of the first electrode 120 and the second electrode 130 may include metal oxide materials, metallic materials, or alloys. Metal oxide materials include indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), indium cerium oxide (ICO), indium titanium oxide (ITiO), indium gallium oxide (IGO), or gallium aluminum zinc oxide (GAZO) or indium zinc oxide (IZO). Metallic materials include germanium (Ge), beryllium (Be), zinc (Zn), gold (Au), platinum (Pt), titanium (Ti), aluminum (Al), tin (Sn), nickel (Ni), or copper (Cu), etc. The alloy may contain at least two of the metals selected from the group consisting of the above-mentioned metals, such as germanium gold nickel (GeAuNi), beryllium gold (BeAu), germanium gold (GeAu), or zinc gold (ZnAu).

[0093] The substrate 100 comprises a conductive material or an insulating material. The conductive material may include gallium arsenide (GaAs), indium phosphide (InP), silicon carbide (SiC), gallium phosphide (GaP), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN), germanium (Ge), or silicon (Si), etc. The insulating material may include sapphire glass. In this embodiment, the substrate 100 is a bonding substrate rather than a growth substrate, and the substrate 100 is bonded to the semiconductor stack 102 via a bonding structure 170. In some embodiments, the substrate 100 is a growth substrate, meaning that the semiconductor stack 102 can be formed on the substrate 100 using epitaxial fabrication processes such as metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE).

[0094] The semiconductor stack 102 includes a first semiconductor structure 103 adjacent to the substrate 100, a second semiconductor structure 105 distant from the substrate 100, and a first active region 104 located between the first semiconductor structure 103 and the second semiconductor structure 105. The first semiconductor structure 103 and the second semiconductor structure 105 may each be a single-layer or multi-layer structure, and may include a cladding layer to restrict electron-hole recombination within the first active region 104. More specifically, the first semiconductor structure 103 and the second semiconductor structure 105 have different conductivity types. For example, the first semiconductor structure 103 may be an n-type semiconductor and the second semiconductor structure 105 may be a p-type semiconductor; or the first semiconductor structure 103 may be a p-type semiconductor and the second semiconductor structure 105 may be an n-type semiconductor. Therefore, the first semiconductor structure 103 and the second semiconductor structure 105 may provide electrons and holes, or holes and electrons, respectively. The aforementioned p-type semiconductor is, for example, a semiconductor doped with carbon (C), zinc (Zn), beryllium (Be), or magnesium (Mg), and the n-type semiconductor is, for example, a semiconductor doped with silicon (Si), germanium (Ge), tin (Sn), selenium (Se), or tellurium (Te). In some embodiments, the doping concentration of the first semiconductor structure 103 and / or the second semiconductor structure 105 may be between 1 × 10⁻⁶. 16 / cm 3 Up to 5×10 18 / cm 3 The thicknesses of the first semiconductor structure 103 and the second semiconductor structure 105 may be the same or different. In some embodiments, the thicknesses of the first semiconductor structure 103 and / or the second semiconductor structure 105 are 1 μm or less, respectively, to reduce the overall thickness of the semiconductor element 10 and meet the requirements of miniaturization. For example, the thicknesses of the first semiconductor structure 103 and / or the second semiconductor structure 105 may be 0.1 μm, 0.3 μm, 0.5 μm, or 0.7 μm.

[0095] The first semiconductor structure 103, the second semiconductor structure 105, and / or the first active region 104 may include III-V semiconductor materials. III-V semiconductor materials may include aluminum (Al), gallium (Ga), arsenic (As), phosphorus (P), nitrogen (N), or indium (In). In some embodiments, the first semiconductor structure 103, the second semiconductor structure 105, and the first active region 104 may not contain nitrogen (N). Specifically, the aforementioned III-V semiconductor materials may be binary compound semiconductors (e.g., GaAs, GaP, or GaN), ternary compound semiconductors (e.g., InGaAs, AlGaAs, InGaP, AlInP, InGaN, or AlGaN), or quaternary compound semiconductors (e.g., AlGaInAs, AlGaInP, AlInGaN, InGaAsP, InGaAsN, or AlGaAsP). In some embodiments, the first active region 104 includes only ternary compound semiconductors (e.g., InGaAs, AlGaAs, InGaP, AlInP, InGaN, or AlGaN) or quaternary compound semiconductors (e.g., AlGaAsInAs, AlGaInP, AlInGaN, InGaAsP, InGaAsN, or AlGaAsP).

[0096] The semiconductor stack 102 may include a single heterostructure, a double heterostructure (DH), a double-side double heterostructure (DDH), or a multiple quantum well structure. In some embodiments, when the semiconductor element 10 is a light-emitting element, the first active region 104 may emit light, causing the semiconductor element 10 to output power. The aforementioned light may include visible light and / or invisible light, and the peak wavelength of the light may depend on the material composition of the first active region 104. For example, when the material of the first active region 104 contains InGaN, it may emit blue or deep blue light with a peak wavelength of 400nm to 490nm, or green light with a peak wavelength of 490nm to 550nm, or red light with a peak wavelength of 560nm to 650nm; when the material of the first active region 104 contains AlGaN, it may emit ultraviolet light with a peak wavelength of 250nm to 400nm; when the material of the first active region 104 contains InGaAs, InGaAsP, AlGaAs, or AlGaInAs, it may emit infrared light with a peak wavelength of 700nm to 1700nm; when the material of the first active region 104 contains InGaP or AlGaInP, it may emit red light with a peak wavelength of 610nm to 700nm, or yellow light with a peak wavelength of 530nm to 600nm.

[0097] The first active region 104 can be undoped or unintentionally doped. When the first active region 104 is unintentionally doped, the doping concentration of the first active region 104 can be less than or equal to 1 × 10⁻⁶. 16 / cm 3 . refer to Figure 1C The first active region 104 may include a first confinement layer 104a adjacent to the first semiconductor structure 103, a second confinement layer 104b adjacent to the second semiconductor structure 105, and a first active layer 104c located between the first confinement layer 104a and the second confinement layer 104b. The first active layer 104c includes a first barrier layer 104c1 and a first well layer 104c2. In some embodiments, the first active layer 104c includes a plurality of alternately stacked first barrier layers 104c1 and a plurality of first well layers 104c2. In some embodiments, the first active layer 104c may have 3 to 18 pairs of first barrier layers 104c1 and first well layers 104c2. The first well layer 104c2 may be located between two adjacent first barrier layers 104c1, between a first barrier layer 104c1 and a first confinement layer 104a, or between a first barrier layer 104c1 and a second confinement layer 104b.

[0098] In some embodiments, the first well layer 104c2 may be a semiconductor material containing indium (In), such as In a1 Ga 1- a1 As、Al a2 Ga 1-a1-a2 In a1 As or In a1 Ga 1-a1 AsP, etc., where a1 is the indium content of the first well layer 104c2, enabling the first active region 104 to emit light with a peak wavelength between 900 nm and 1000 nm. In some embodiments, the indium content of the first well layer 104c2 may be a certain value, and may be between 0.02 and 0.4. In some embodiments, the first confinement layer 104a, the second confinement layer 104b, and / or the first barrier layer 104c1 may be AlInP, InGaP, AlGaAs, AlGaAsP, or AlGaInP. The band gap of the first confinement layer 104a, the second confinement layer 104b, and / or the first barrier layer 104c1 is larger than the band gap of the first well layer 104c2. When the first confinement layer 104a, the second confinement layer 104b, and / or the first barrier layer 104c1 contains aluminum (Al), for example Al... a3 Ga 1-a3 As, increasing the aluminum content a3 can increase the band gap of the first confinement layer 104a, the second confinement layer 104b, and / or the first barrier layer 104c1, thereby improving the ability to confine electrons and enhancing the quantum efficiency of the semiconductor device 10, such as the external quantum efficiency (EQE) or the internal quantum efficiency (IQE). In some embodiments, the aluminum content of the first confinement layer 104a, the second confinement layer 104b, and / or the first barrier layer 104c1 can be a fixed value. Specifically, the indium content represents the ratio of In to all Group III elements, and the aluminum content represents the ratio of Al to all Group III elements. The indium content of the first well layer 104c2 and the aluminum content of the first confinement layer 104a, the second confinement layer 104b, and the first barrier layer 104c1 can be obtained by analytical techniques such as EDX or SIMS.

[0099] In some embodiments, the aluminum content of the first confinement layer 104a and / or the second confinement layer 104b may have a gradient variation. For example, the aluminum content of the first confinement layer 104a may gradually increase from the side closer to the first well layer 104c2 towards the side closer to the first semiconductor structure 103, or the aluminum content of the second confinement layer 104b may gradually increase from the side closer to the first well layer 104c2 towards the side closer to the second semiconductor structure 105. This gradient variation in the aluminum content of the first confinement layer 104a and / or the second confinement layer 104b can improve electron mobility and reduce the forward voltage of the semiconductor element 10.

[0100] Similarly, the aluminum content of the first barrier layer 104c1 can also exhibit a gradient variation. For example... Figure 1C As shown, each first barrier layer 104c1 in the first active layer 104c' has a first side s1 close to the first semiconductor structure 103 and a second side s2 opposite to the first side s1, and the aluminum content of the first barrier layer 104c1 gradually increases or decreases from the first side s1 to the second side s2. In some embodiments, the aluminum content of the first barrier layer 104c1 first increases and then decreases from the first side s1 to the second side s2. In some embodiments, the maximum value of the aluminum content in the first barrier layer 104c1 is located at the center of the first barrier layer 104c1, or close to the first side s1, or close to the second side s2. When the aluminum content of the first barrier layer 104c1 has a gradient change, its aluminum content can vary in the range of 0 to 0.25. In other words, the aluminum content of the first barrier layer 104c1 can increase from 0 to 0.25 and then decrease to 0. The gradient change of the aluminum content of the first barrier layer 104c1 can be a linear change or a step-like change. The gradient change in aluminum content of the first barrier layer 104c1 can adjust the band structure of the first barrier layer 104c1, making it easier for electrons to cross the first barrier layer 104c1 and thus reducing the forward voltage of the semiconductor device 10.

[0101] The first barrier layer 104c1 has a first thickness t1, and the first well layer 104c2 has a second thickness t2. In some embodiments, the first thickness t1 may be greater than or equal to the second thickness t2. Depending on the application, the first thickness t1 may be increased to improve the reliability of the semiconductor device 10, or decreased to reduce the forward voltage of the semiconductor device 10. In some embodiments, the second thickness t2 may be adjusted to adjust the spectral shape of the light emitted by the semiconductor device 10. The first thickness t1 may be between 5 nm and 50 nm, for example, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, or 50 nm. The second thickness t2 may be between 2 nm and 20 nm, for example, 2 nm, 5 nm, 10 nm, 15 nm, or 20 nm. In some embodiments, all the first well layers 104c2 have the same thickness. In some embodiments, the thickness of the first well layer 104c2 located between the first barrier layer 104c1 and the first limiting layer 104a (or the second limiting layer 104b) is greater than the thickness of the first well layer 104c2 located between two adjacent first barrier layers 104c1, so as to improve the power output of the semiconductor device 10.

[0102] In some embodiments, the first limiting layer 104a and the second limiting layer 104b may have the same or different thicknesses. In some embodiments, the thicknesses of the first limiting layer 104a and the second limiting layer 104b may be greater than the first thickness t1 and the second thickness t2, respectively.

[0103] See Figure 1BA first semiconductor layer 106 is disposed between the second semiconductor structure 105 and the first electrode 120. The first semiconductor layer 106 can improve the current dispersion effect between the first electrode 120 and the semiconductor stack 102, thereby improving the light emission uniformity of the semiconductor element 10. The first semiconductor layer 106 and the second semiconductor structure 105 have the same conductivity type, and the doping concentration of the first semiconductor layer 106 can be greater than or equal to the doping concentration of the second semiconductor structure 105. In some embodiments, the doping concentration of the first semiconductor layer 106 can be 1 × 10⁻⁶. 16 / cm 3 Up to 1×10 19 / cm 3 The first semiconductor layer 106 has a third thickness t3. In some embodiments, the third thickness t3 may be between 3 μm and 8 μm, for example, 3 μm, 5 μm, 7 μm, or 8 μm. In some embodiments, the third thickness t3 of the first semiconductor layer 106 may be greater than or equal to the thickness of the second semiconductor structure 105. In some embodiments, the first semiconductor layer 106 may have a rough surface 106a to increase the light extraction efficiency of the semiconductor element 10.

[0104] In some embodiments, when the peak wavelength of the light emitted by the first active region 104 is between 900 nm and 1000 nm (infrared light), this light can be divided into a first part with a wavelength greater than or equal to 900 nm and less than 1100 nm, and a second part with a wavelength less than 900 nm and greater than 700 nm. The first part of the light is invisible light, while the second part of the light includes some visible light (red light), therefore the second part of the light may be perceived by the human eye and cause visual interference. In some embodiments, the first semiconductor layer 106 can absorb the second part of the light and / or the first part of the light, and the absorption of the second part of the light by the first semiconductor layer 106 is greater than the absorption of the first part of the light. When the light emitted by the first active region 104 passes through the first semiconductor layer 106, most of the second part of the light will be absorbed by the first semiconductor layer 106. Therefore, setting the first semiconductor layer 106 can reduce the second part of the light, thereby reducing the visual interference caused by the light emitted by the semiconductor element 10.

[0105] The first semiconductor layer 106 may include a III-V group semiconductor material. In some embodiments, the first semiconductor layer 106 may be Al. n1 Ga 1-n1 As, where 0.005 ≤ n1 < 0.2, to increase the absorption of light in the second part. For example, the aluminum content n1 of the first semiconductor layer 106 can be 0.01, 0.03, 0.05, 0.07 or 0.1.

[0106] like Figure 1BAs shown, the semiconductor element 10 may selectively include a second semiconductor layer 107 disposed between the first semiconductor layer 106 and the second semiconductor structure 105 to further absorb a second portion of the light emitted by the first active region 104. Specifically, the second semiconductor layer 107 has a better absorption effect on the second portion of the light and / or the first portion of the light than the first semiconductor layer 106, and the absorption of the second portion of the light by the second semiconductor layer 107 is greater than the absorption of the first portion of the light. The second semiconductor layer 107 has the same conductivity type as the first semiconductor layer 106, and the doping concentration of the second semiconductor layer 107 may be less than or equal to the doping concentration of the first semiconductor layer 106. In some embodiments, the second semiconductor layer 107 may comprise an aluminum-free III-V group semiconductor material, such as GaAs.

[0107] In some embodiments, the second semiconductor layer 107 has a fourth thickness t4, which may be less than or equal to the third thickness t3 of the first semiconductor layer 106. The fourth thickness t4 may be between 1 μm and 8 μm, for example, 1 μm, 3 μm, 5 μm, or 8 μm. In some embodiments, since the first semiconductor layer 106 and the second semiconductor layer 107 may also absorb light from the first portion, the sum of the third thickness t3 and the fourth thickness t4 may be less than or equal to 16 μm to reduce power loss at the output of the semiconductor element 10. In some embodiments, the sum of the third thickness t3 and the fourth thickness t4 may be greater than or equal to 4 μm to ensure effective absorption of light from the second portion.

[0108] The total power emitted by the semiconductor element 10 can be divided into a first power and a second power, referring to the light intensity of the first portion and the light intensity of the second portion, respectively. The ratio of the second power to the total power (i.e., the sum of the first power and the second power) can be defined as a first proportion of the semiconductor element 10. The smaller the first proportion, the lower the risk of visual interference. In some embodiments, the first proportion may be less than or equal to 30% to avoid visual interference, for example, it may be 1%, 5%, 10%, or 20%. In some embodiments, when the semiconductor element 10 operates with a current of 1000mA, the second power may be between 80mW and 170mW, for example, 80mW, 100mW, 150mW, or 170mW.

[0109] In some embodiments, the first proportion of light emitted by the semiconductor element 10 can be reduced by adjusting the structure of the first active region 104. Figure 1D This is a cross-sectional schematic diagram of the first active region 104' according to another embodiment of the present invention, showing the area corresponding to Figure 1B The R1 region. For example... Figure 1D As shown, the structure of the first active region 104' is similar to... Figure 1CSimilar to the first active region 104, the main difference is that the first active layer 104c' of the first active region 104' may include a first region z1, and selectively include a second region z2 and / or a third region z3. Specifically, the second region z2 is located between the first region z1 and the first limiting layer 104a, and the second region z2 is directly connected to the first region z3. The third region z3 is located between the first region z1 and the second limiting layer 104b, and the third region z3 is directly connected to the first region z3.

[0110] The second region z2 includes one or more first barrier layers 104c1' and one or more first well layers 104c2', and the second thickness t2' of any first well layer 104c2' in the second region z2 is greater than the second thickness t2 of each first well layer 104c2 in the first region z1. Specifically, the valence band of each first well layer 104c2 has multiple different potential energy levels. Electrons preferentially fill the lower energy levels before filling the higher energy levels, and during electron-hole recombination, electrons at higher energy levels can emit light with shorter wavelengths than electrons at lower energy levels. Since the second region z2 is closer to the first semiconductor structure 103 than the first region z1 and has more electrons, the first well layer 104c2' of the second region z2 is more likely to have electrons filling the higher energy levels and emit more of the second portion of light than the first well layer 104c2 of the first region z1. Increasing the thickness of the first well layer 104c2' in the second region z2 can cause the potential energy of the high-energy level of the first well layer 104c2' to move towards the low-energy level, thereby increasing the emission wavelength. This can reduce the second power and / or the first ratio of the overall emission of the semiconductor device 10, thereby reducing visual interference.

[0111] In some embodiments, one or more or each of the first barrier layers 104c1' in the second region z2 has substantially the same material composition and / or thickness as one or more or each of the first barrier layers 104c1 in the first region z1. For example, the first barrier layer 104c1 in the first region z1 and the first barrier layer 104c1' in the second region z2 both contain AlGaAs, AlInP, AlGaAsP or AlGaInP and the proportions of each element are the same, and the thicknesses are the same.

[0112] In some embodiments, the number of first well layers 104c2' in the second region z2 is less than the number of first well layers 104c2 in the first region z1, and / or the first well layers 104c2' and the first well layers 104c2 have substantially the same material composition. For example, if the first well layers 104c2 in the first region z1 and the first well layers 104c2' in the second region z2 both contain InGaAs, AlGaInAs, or InGaAsP, then the proportions of each element are the same in both.

[0113] The third region z3 includes one or more first barrier layers 104c1” and one or more first well layers 104c2”, and the second thickness t2” of any first well layer 104c2” in the third region z3 is greater than the second thickness t2 of each first well layer 104c2 in the first region z1. Increasing the thickness of the first well layer 104c2” in the third region z3 can further reduce the second power and first ratio of light emitted by the semiconductor device 10, thereby reducing visual interference. Similarly, in some embodiments, one or more or each of the first barrier layers 104c1” in the third region z3 has substantially the same material composition and / or thickness as one or more or each of the first barrier layers 104c1 in the first region z1. For example, the first barrier layers 104c1 in the first region z1 and the first barrier layers 104c1” in the third region z3 both contain AlGaAs, AlInP, AlGaAsP, or AlGaInP, and the proportions of each element are the same, as are their thicknesses. Further, in some embodiments, one or more or each of the first barrier layers 104c1’ in the first region z1, one or more or each of the first barrier layers 104c1’ in the second region z2, and one or more or each of the first barrier layers 104c1” in the third region z3 have substantially the same material composition and / or thickness (first thickness t1).

[0114] In some embodiments, the number of first well layers 104c2” in the third region z3 is less than the number of first well layers 104c2 in the first region z1, and / or one or more or each of the first well layers 104c2” has substantially the same material composition as one or more or each of the first well layers 104c2. For example, the first well layers 104c2 in the first region z1 and the first well layers 104c2” in the third region z3 both contain InGaAs, AlGaInAs, or InGaAsP, and the proportions of each element are the same in both. Further, in some embodiments, the first well layers 104c2 in the first region z1, the first well layers 104c2' in the second region z2, and the first well layers 104c2” in the third region z3 have substantially the same material composition.

[0115] In some embodiments, the second region z2 may include 1 to 5 groups (e.g., 1, 2, 3, 4, 5) of the first barrier layer 104c1' and the first well layer 104c2', and the third region z3 may include 1 to 5 groups (e.g., 1, 2, 3, 4, 5) of the first barrier layer 104c1" and the first well layer 104c2" and the second power decreases as the number of the first well layer 104c2' and / or the first well layer 104c2" increases. In the first region z1, the second region z2, and the third region z3, the second thicknesses t2, t2', and t2" of the first well layers 104c2, 104c2', and 104c2" may be between 2nm and 20nm, for example, 2nm, 5nm, 10nm, 15nm, or 20nm. In some embodiments, the first thickness t1 may be greater than or equal to the second thicknesses t2' and t2".

[0116] In some embodiments, the thickness ratio (t2' / t2) of the first well layer 104c2' to the first well layer 104c2 can be between 1.5 and 3. Similarly, the thickness ratio (t2" / t2) of the first well layer 104c2" to the first well layer 104c2 can be between 1.5 and 3. The plurality of first well layers 104c2' in the second region z2 and / or the plurality of first well layers 104c2" in the third region z3 can have the same thickness (e.g., Figure 1D (as shown) or different thicknesses, for example, the second thickness t2' of the plurality of first well layers 104c2' in the second region z2 can be gradually increased toward the first confinement layer 104a (not shown), or the second thickness t2" of the plurality of first well layers 104c2" can be gradually increased toward the second confinement layer 104b (not shown). Since increasing the thickness of the first well layer 104c2' and / or the first well layer 104c2" may alter its peak emission wavelength, the material composition of the first well layer 104c2' and / or the first well layer 104c2" can be selectively adjusted to maintain consistent peak emission wavelengths for the first well layer 104c2', the first well layer 104c2" and the first well layer 104c2. In some embodiments, the first well layers 104c2, 104c2', and 104c2" are all indium-containing semiconductor materials, and the indium content of the first well layer 104c2' and / or the first well layer 104c2" is less than the indium content of the first well layer 104c2. In some embodiments, the difference in indium content between the first well layers 104c2', 104c2" and the first well layer 104c2 may be between 0 and 0.1.

[0117] like Figure 1BAs shown, the insulating structure 140, conductive structure 150, reflective structure 160, and bonding structure 170 are located between the semiconductor stack 102 and the substrate 100. Specifically, the insulating structure 140 is located between the first semiconductor structure 103 and the substrate 100, and is connected to the first semiconductor structure 103. The conductive structure 150 is located between the insulating structure 140 and the substrate 100, and is connected to the insulating structure 140. The insulating structure 140 and the conductive structure 150 are substantially transparent to light emitted from the first active region 104, for example, they can each have a transmittance of more than 80% to light emitted from the first active region 104. The insulating structure 140 has a plurality of holes 141, and the conductive structure 150 fills these holes 141 and connects to the first semiconductor structure 103 to form contact areas in these holes 141, allowing the conductive structure 150 to form an electrical connection with the semiconductor stack 102. In this embodiment, the holes 141 include a first hole 141a that overlaps with the electrode pad 120a in the vertical direction, and a second hole 141b that does not overlap with the extended electrode 120b and the electrode pad 120a in the vertical direction. That is, the insulating structure 140 and the electrode pad 120a do not overlap in the vertical direction, thereby improving the reliability of the semiconductor element 10. In some embodiments, the insulating structure 140 includes a plurality of second holes 141b, and these second holes 141b are located between two adjacent second extensions 120b2 in the vertical direction. By adjusting the distribution of these second holes 141b, current can flow into or out of the first semiconductor structure 103 uniformly, thereby improving the light emission uniformity of the semiconductor element 10. In some embodiments, the width of the first hole 141a may be greater than the width of the second hole 141b.

[0118] The insulating structure 140 may be a single-layer or multi-layer structure. When the insulating structure 140 is a single layer, its refractive index is less than 2; when the insulating structure 140 comprises multiple layers, the refractive index of each layer may be less than 2. The insulating structure 140 may include dielectric layers, such as silicon nitride (SiNx), aluminum oxide (AlOx), silicon oxide (SiOx), magnesium fluoride (MgFx), titanium oxide (TiOx), niobium oxide (Nb2O5), or combinations thereof. In some embodiments, the insulating structure 140 may include a distributed Bragg reflector structure (DBR), formed by alternating stacking of at least two first dielectric layers and a second dielectric layer with different refractive indices. In some embodiments, the materials of the first dielectric layer and the second dielectric layer may include aluminum oxide (Al2O5). 3) Silicon dioxide (SiO2), titanium dioxide (TiO2), or tantalum oxide (Nb2O5).

[0119] The conductive structure 150 may comprise a metallic material or a metal oxide material. Metallic materials include silver (Ag), germanium (Ge), gold (Au), nickel (Ni), or combinations thereof. Metal oxide materials include indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), indium zinc oxide (IZO), or combinations thereof, indium cerium oxide (ICO), indium titanium oxide (ITiO), indium gallium oxide (IGO), or gallium aluminum zinc oxide (GAZO).

[0120] A reflective structure 160 is located between the conductive structure 150 and the substrate 100, and can reflect light emitted from the first active region 104 toward the first electrode 120 to exit the semiconductor element 10. The reflective structure 160 has a reflectivity greater than 80% for light emitted from the first active region 104. The reflective structure 160 may be conductive and comprises a semiconductor material, a metallic material, or an alloy. The semiconductor material may include binary, ternary, or quaternary III-V group semiconductor materials. The metallic material may include copper (Cu), aluminum (Al), tin (Sn), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), or platinum (Pt). The alloy may comprise at least two selected from the group consisting of the aforementioned metals. In an embodiment, the reflective structure 160 may include a distributed Bragg reflector (DBR) structure. The DBR structure can be formed by alternately stacking two or more semiconductor layers with different refractive indices, such as AlAs / GaAs, AlGaAs / GaAs, or InGaP / GaAs.

[0121] The bonding structure 170 connects the substrate 100 and the reflective structure 160, and can be a single-layer or multi-layer structure (not shown). The bonding structure 170 is conductive and may contain a metal oxide material, a metallic material, or an alloy. The metal oxide material may include indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), zinc oxide (ZnO), indium cerium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO), or combinations thereof. The metallic material may include copper (Cu), aluminum (Al), tin (Sn), gold (Au), silver (Ag), lead (Pb), titanium (Ti), nickel (Ni), platinum (Pt), or tungsten (W). The alloy may contain at least two selected from the group consisting of the aforementioned metals.

[0122] A protective structure 180 is disposed on the first electrode 120, the first semiconductor layer 106, and the semiconductor stack 102 to avoid forming unnecessary conductive paths and prevent the semiconductor stack 102 from being affected by the external environment, thus preventing a decrease in reliability. The protective structure 180 can be transparent to light emitted from the first active domain 104, for example, having a transmittance of over 80%. The material of the protective structure 180 includes a dielectric material, such as tantalum oxide (TaOx), aluminum oxide (AlOx), silicon oxide (SiOx), titanium oxide (TiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), niobium oxide (Nb2O5), or spin-coated glass (SOG). In some embodiments, the protective structure 180 has a first opening 180a corresponding to the electrode pad 120a for external wires to connect to the electrode pad 120a. In some embodiments, the width of the first opening 180a is smaller than the width of the electrode pad 120a.

[0123] refer to Figure 1B The semiconductor element 10 may selectively include a first contact structure 108 and a second contact structure 109 to reduce the forward voltage of the semiconductor element 10. Specifically, the first contact structure 108 is located between the first semiconductor structure 103 and the conductive structure 150 to reduce the resistance between the first semiconductor structure 103 and the conductive structure 150. The second contact structure 109 is located between the first semiconductor layer 106 and the first electrode 120 to reduce the resistance between the first semiconductor layer 106 and the first electrode 120. The first contact structure 108 and the second contact structure 109 may be single-layer or multi-layer structures, and contain III-V semiconductor materials, metallic materials, or alloys. When the first contact structure 108 and / or the second contact structure 109 contain III-V semiconductor materials, the first contact structure 108 has the same conductivity type as the first semiconductor structure 103, and the second contact structure 109 has the same conductivity type as the second semiconductor structure 105. In some embodiments, the doping concentration of the first contact structure 108 and the second contact structure 109 may be between 1 × 10⁻⁶ and 1 × 10⁻⁶, respectively. 18 / cm 3 Up to 1×10 20 / cm 3 Between. In some embodiments, the first contact structure 108 and the second contact structure 109 may respectively include GaAs, GaP or InGaAs.

[0124] The first contact structure 108 may be a patterned layer. In some embodiments, the first contact structure 108 may include a plurality of first contact portions 108a that are separated from each other, and these first contact portions 108a are located in the second hole 141b but not in the first hole 141a. In other words, the first contact structure 108 does not overlap with the electrode pad 120a and the extended electrode 120b in the vertical direction. In some embodiments, the first contact structure 108 may be a continuous film layer (not shown) located between the insulating structure 140 and the first semiconductor structure 103, and has an opening corresponding to the electrode pad 120a (similar to the first hole 141a of the insulating structure 140). That is, the first contact structure 108 may overlap with the extended electrode 120b but not with the electrode pad 120a in the vertical direction. The conductive structure 150 contacts the first contact structure 108 in the second hole 141b and directly contacts the first semiconductor structure 103 in the first hole 141a. Because the resistance between the first contact structure 108 and the conductive structure 150 is lower than the resistance between the first semiconductor structure 103 and the conductive structure 150, current mainly flows into or out of the first semiconductor structure 103 through the second hole 141b rather than the first hole 141a. The thickness of the first contact structure 108 can be equal to or less than the thickness of the insulating structure 140. In some embodiments, the thickness of the first contact structure 108 can be between 5 nm and 100 nm, for example, 5 nm, 10 nm, 20 nm, 50 nm, 75 nm, or 100 nm.

[0125] Similarly, the second contact structure 109 may also be a patterned layer. In some embodiments, the second contact structure 109 may include a plurality of second contact portions 109a that are separated from each other. These second contact portions 109a are located below the extended electrode 120b but not below the electrode pad 120a to facilitate current diffusion. Figure 1B As shown, the width of each second contact portion 109a is smaller than the width of the second extension portion 120b2, and the second extension portion 120b2 covers the top surface and side surface of the second contact portion 109a. In some embodiments, the width of each second contact portion 109a is the same as the width of the second extension portion 120b2 (not shown). In some embodiments, the thickness of the second contact structure 109 may be between 50 nm and 80 nm, for example, 50 nm, 60 nm, 70 nm, or 80 nm. In some embodiments, both the extended electrode 120b and the second contact portion 109a directly contact the first semiconductor layer 106.

[0126] Figure 2A This is a cross-sectional schematic diagram of a semiconductor element 20 according to another embodiment of the present invention. Figure 2B for Figure 2AThe diagram shows an enlarged cross-sectional view of region R2 of the semiconductor element 20. The semiconductor element 20 has a structure similar to that of the semiconductor element 10, the main difference being that the semiconductor stack 102 of the semiconductor element 20 further includes a third semiconductor structure 110, a second active region 111, a fourth semiconductor structure 112, and a tunneling structure 113. In some embodiments, the semiconductor element 20 may optionally include a third semiconductor layer 114 located between the semiconductor stack 102 and the reflective structure 160.

[0127] like Figure 2A As shown, the third semiconductor structure 110 is located above the second semiconductor structure 105, the fourth semiconductor structure 112 is located above the third semiconductor structure 110, and the second active region 111 is located between the third semiconductor structure 110 and the fourth semiconductor structure 112. In this embodiment, the first semiconductor layer 106 (and the second semiconductor layer 107) is located between the fourth semiconductor structure 112 and the first electrode 120. The third semiconductor structure 110 and the fourth semiconductor structure 112 can be single-layer or multi-layer structures, and may include a coating layer to restrict the recombination of electron-hole pairs within the second active region 111. The third semiconductor structure 110 and the fourth semiconductor structure 112 have different conductivity types. For example, the third semiconductor structure 110 and the fourth semiconductor structure 112 can be n-type and p-type, or p-type and n-type, respectively. Thus, the third semiconductor structure 110 and the fourth semiconductor structure 112 can provide electrons and holes, or holes and electrons, to the second active region 111, respectively. In this embodiment, the conductivity type of the third semiconductor structure 110 is different from the conductivity type of the second semiconductor structure 105. In other words, the third semiconductor structure 110 has the same conductivity type as the first semiconductor structure 103, and the fourth semiconductor structure 112 has the same conductivity type as the second semiconductor structure 105.

[0128] The third semiconductor structure 110, the fourth semiconductor structure 112, and / or the second active region 111 may include III-V semiconductor materials. Specifically, the aforementioned III-V semiconductor materials may be binary compound semiconductors (e.g., GaAs, GaP, or GaN), ternary compound semiconductors (e.g., InGaAs, AlGaAs, InGaP, AlInP, InGaN, or AlGaN), or quaternary compound semiconductors (e.g., AlGaInAs, AlGaInP, AlInGaN, InGaAsP, InGaAsN, or AlGaAsP). In some embodiments, the second active region 111 may only include ternary compound semiconductors (e.g., InGaAs, AlGaAs, InGaP, AlInP, InGaN, or AlGaN) or quaternary compound semiconductors (e.g., AlGaAsInAs, AlGaInP, AlInGaN, InGaAsP, InGaAsN, or AlGaAsP). The composition, thickness, and doping concentration of the third semiconductor structure 110 and the fourth semiconductor structure 112 can be referred to the relevant descriptions of the first semiconductor structure 103 and the second semiconductor structure 105, and will not be repeated here.

[0129] The structure of the second active region 111 is similar to that of the first active region 104. For example... Figure 2B As shown, the second active region 111 includes a third confinement layer 111a adjacent to the third semiconductor structure 110, a fourth confinement layer 111b adjacent to the fourth semiconductor structure 112, and a second active layer 111c located between the third confinement layer 111a and the fourth confinement layer 111b. In some embodiments, the second active region 111 is substantially the same as the first active region 104. The material composition, thickness, and doping concentration of the third confinement layer 111a and the fourth confinement layer 111b can be referred to the relevant descriptions of the first confinement layer 104a and the second confinement layer 104b, and will not be repeated here. In some embodiments, the third confinement layer 111a and the fourth confinement layer 111b may have substantially the same thickness and / or material composition as the first confinement layer 104a and the second confinement layer 104b.

[0130] The second active layer 111c includes a second barrier layer 111c1 and a second well layer 111c2. In some embodiments, the second active layer 111c includes a plurality of alternately stacked second barrier layers 111c1 and a plurality of second well layers 111c2. The second well layer 111c2 may be located between two adjacent second barrier layers 111c1, between a second barrier layer 111c1 and a third confinement layer 111a, or between a second barrier layer 111c1 and a fourth confinement layer 111b. The material composition, thickness, and doping concentration of the second barrier layer 111c1 and the second well layer 111c2 can be referred to the relevant descriptions of the first barrier layer 104c1 and the first well layer 104c2, and will not be repeated here. In some embodiments, the second barrier layer 111c1 and the second well layer 111c2 may have the same number, thickness, and / or material composition as the first barrier layer 104c1 and the first well layer 104c2, respectively. In some embodiments, the second active layer 111c is substantially the same as the first active layer 104c.

[0131] The second well layer 111c2 comprises InGaAs, AlGaInAs, or InGaAsP, enabling the second active region 111 to emit light with a peak wavelength between 900 nm and 1000 nm. In some embodiments, the first active region 104 emits light with a first peak wavelength, while the second active region 111 emits light with a second peak wavelength. In this embodiment, the first peak wavelength and the second peak wavelength are approximately the same, therefore the semiconductor element 20 can output more light than the semiconductor element 10. In some embodiments, the difference between the first peak wavelength and the second peak wavelength is less than 3 nm.

[0132] Figure 2C This is a cross-sectional schematic diagram of the second active region 111' according to another embodiment of the present invention, showing the area corresponding to Figure 2A The R2 region. For example... Figure 2C As shown, the structure of the second active region 111' is similar to... Figure 2BSimilar to the second active region 111, the main difference is that the second active layer 111c' of the second active region 111' may include a fourth region z4, and selectively include a fifth region z5 and / or a sixth region z6. The fifth region z5 is located between the fourth region z4 and the third confinement layer 111a and is directly connected to the fourth region z4. The sixth region z6 is located between the fourth region z4 and the fourth confinement layer 111b and is directly connected to the fourth region z4. The fifth region z5 includes one or more second barrier layers 111c1' and one or more second well layers 111c2', and the thickness t5' of any second well layer 111c2' in the fifth region z5 is greater than the thickness t5 of each second well layer 111c2 in the fourth region z4. Similarly, the sixth region z6 includes one or more second barrier layers 111c1” and one or more second well layers 111c2”, and the thickness t5” of any second well layer 111c2” in the sixth region z6 is greater than the thickness t5 of each second well layer 111c2 in the fourth region z4. This is to reduce the second power and / or the first ratio of light emitted by the semiconductor device 20, thereby reducing visual interference. In some embodiments, the second barrier layers 111c1' of the fifth region z5, the second barrier layers 111c1” of the sixth region z6, and the second barrier layers 111c1 of the fourth region z4 have substantially the same material composition and / or thickness. In some embodiments, the number of second well layers 111c2' in the fifth region z5 and / or the number of second well layers 111c2” in the sixth region z6 is less than the number of second well layers 111c2 in the fourth region z4, and the second well layers 111c2, 111c2', and 111c2” have substantially the same material composition. In some embodiments, the second barrier layer 111c1' and the second well layer 111c2' of the fifth region z5 may have the same composition, quantity, thickness, and / or other characteristics as the first barrier layer 104c1' and the first well layer 104c2' of the aforementioned second region z2, and the second barrier layer 111c1" and the second well layer 111c2" of the sixth region z6 may have the same composition, quantity, thickness, and / or other characteristics as the first barrier layer 104c1" and the first well layer 104c2" of the aforementioned third region z3, which will not be repeated here. Figure 2C The second active region 111' and Figure 1D The first active region 104' is essentially the same.

[0133] In some embodiments, the semiconductor stack 102 of the semiconductor element 20 may include a combination of a first active region 104 and a second active region 111, a combination of a first active region 104 and a second active region 111', a combination of a first active region 104' and a second active region 111, or a combination of a first active region 104' and a second active region 111'.

[0134] A tunneling structure 113 is disposed between the second semiconductor structure 105 and the third semiconductor structure 110 to facilitate electron transfer between them. The tunneling structure 113 has a pn junction and includes a first heavily doped layer 113a adjacent to the second semiconductor structure 105 and a second heavily doped layer 113b adjacent to the third semiconductor structure 110. The first heavily doped layer 113a and the second heavily doped layer 113b have different conductivity types. In some embodiments, the first heavily doped layer 113a has the same conductivity type as the second semiconductor structure 105, while the second heavily doped layer 113b has the same conductivity type as the third semiconductor structure 110. The doping concentration of the tunneling structure 113 may be higher than that of the second semiconductor structure 105 and / or the third semiconductor structure 110. In some embodiments, the doping concentration of the tunneling structure 113 may be equal to or greater than 1 × 10⁻⁶. 19 / cm 3 The thickness of the tunneling structure 113 is equal to or less than 50 nm to ensure that electrons can pass through the tunneling structure 113.

[0135] refer to Figure 2A A third semiconductor layer 114 is disposed between the first semiconductor structure 103 and the insulating structure 140, and may have the same conductivity type as the first semiconductor structure 103. The third semiconductor layer 114 may comprise a material composition similar to the first semiconductor layer 106 or the second semiconductor layer 107, and the third semiconductor layer 114 may absorb a second portion of the light. More specifically, when light emitted from the first active region 104 and / or the second active region 111, or light reflected by the reflecting structure 160, passes through the third semiconductor layer 114, a second portion of it may be absorbed by the third semiconductor layer 114 to further eliminate visual interference generated by the semiconductor element 20. In some embodiments, the third semiconductor layer 114 may include Al n2 Ga 1-n2 As, where 0 ≤ n2 ≤ 0.1, for example, it can be 0.01, 0.03, 0.05, or 0.07. In some embodiments, the thickness of the third semiconductor layer 114 can be between 0.2 μm and 8 μm. In some embodiments, the doping concentration of the third semiconductor layer 114 can be between 1 × 10⁻⁶. 16 / cm 3 Up to 1×10 19 / cm 3 Within the range.

[0136] Figure 3This is an emission spectrum diagram of different semiconductor elements implemented according to the present invention. The horizontal axis represents the wavelength of light, and the vertical axis represents the relative power of the semiconductor element, where the maximum value of the relative power is 1. Curves a, b, and c represent different semiconductor elements, each with a structure substantially the same as semiconductor element 20, except for a different aluminum content in the first semiconductor layer 106. Curves a, b, and c represent the emission spectra of semiconductor elements with aluminum contents of 0.2%, 0.04%, and 0.03% in the first semiconductor layer 106, respectively. Figure 3 As can be seen, as the aluminum content of the first semiconductor layer 106 decreases, the relative power at wavelengths below 900nm decreases.

[0137] according to Figure 3 It can be seen that the total power of a semiconductor element is the area under the curve with wavelengths between 700nm and 1000nm, while the second power of a semiconductor element is the area under the curve with wavelengths between 700nm and 900nm. In this embodiment, the second power of curve b is less than the second power of curve a, and the second power of curve c is less than the second power of curve b. In this embodiment, the first proportions of curves a, b, and c are 15.3%, 13.5%, and 12%, respectively. Therefore, it can be seen that the second power and the first proportion of the semiconductor element decrease as the aluminum content of the first semiconductor layer 106 decreases. In other words, reducing the aluminum content of the first semiconductor layer 106 can enhance the absorption effect for light with wavelengths below 900nm, i.e., the absorption effect for the second portion of light.

[0138] Figure 4 The following are emission spectra of different semiconductor devices according to the present invention. Curves d and e are emission spectra of different semiconductor devices, each with a structure substantially the same as semiconductor device 20, except that they have different thicknesses of the first well layer 104c2 and the second well layer 111c2. The semiconductor device of curve d includes a first well layer 104c2 and a second well layer 111c2 with a thickness of 13 nm, and the semiconductor device of curve e includes a first well layer 104c2 and a second well layer 111c2 with a thickness of 7 nm. Figure 4 It is known that the second power of semiconductor element 20 decreases as the thickness of the first well layer 104c2 and the second well layer 111c2 decreases. In this embodiment, the second power of curve e is less than the second power of curve d. The first ratios of curves d and e are 29.9% and 26.8%, respectively. That is, reducing the thickness of the first well layer 104c2 and / or the second well layer 111c2 can reduce the light in the second part and reduce visual interference.

[0139] Reducing the thickness of the first well layer 104c2 and / or the second well layer 111c2 can also reduce the full width at half maximum (FWHM) of light. More specifically, FWHM is the distance between two points on the spectrum where the relative light intensity is half the peak light intensity. In this embodiment, the FWHM of curve e is smaller than that of curve d, and curve e contracts to the left of the peak relative to curve d, particularly in the wavelength range of 850 nm to 920 nm. In other words, reducing the FWHM of the spectrum may also reduce the light in the second part and reduce visual interference.

[0140] Figure 5 The images show the emission spectra of different semiconductor devices according to the present invention. Curves f and g are emission spectra of different semiconductor devices. The structure of each semiconductor device is substantially the same as that of semiconductor device 20, except that the materials and thicknesses of the first semiconductor layer 106 and the second semiconductor layer 107 are different. The semiconductor device of curve f includes a first semiconductor layer 106 with a thickness of 8 μm, and the first semiconductor layer 106 is made of Al. 0.03 Ga 0.97 As. The semiconductor element of curve g includes a first semiconductor layer 106 with a thickness of 4 μm and a second semiconductor layer 107 with a thickness of 4 μm, wherein the first semiconductor layer 106 and the second semiconductor layer 107 are Al, respectively. 0.03 Ga 0.97 As and GaAs. From Figure 5 It can be seen that replacing a portion of the first semiconductor layer 106 with the second semiconductor layer 107 can further reduce the second power. In this embodiment, the second power of curve g is less than that of curve f. The first proportions of curves f and g are 6.3% and 4.2%, respectively. Therefore, it can be concluded that the second semiconductor layer 107 has a better absorption effect on the second portion of light than the first semiconductor layer 106.

[0141] Figure 6This is a schematic diagram of a packaging structure 300 according to some embodiments of the present invention. The packaging structure 300 includes the aforementioned semiconductor element 30, a packaging substrate 31, a carrier 33, a bonding wire 35, an electrical connection structure 36, and a packaging material 38. The packaging substrate 31 may contain ceramic or glass material. The packaging substrate 31 has a plurality of through-holes 32. The through-holes 32 may be filled with a conductive material such as metal to facilitate conductivity and / or heat dissipation. The carrier 33 is located on one side of the surface of the packaging substrate 31 and also contains a conductive material such as metal. The electrical connection structure 36 is located on the other side of the surface of the packaging substrate 31. In this embodiment, the electrical connection structure 36 includes a first contact pad 36a and a second contact pad 36b, and the first contact pad 36a and the second contact pad 36b are electrically connected to the carrier 33 through the through-holes 32. In some embodiments, the electrical connection structure 36 may further include a thermal pad (not shown), for example, located between the first contact pad 36a and the second contact pad 36b.

[0142] Semiconductor element 30 is located on carrier 33 and can be any of the semiconductor elements described in the foregoing embodiments (e.g., semiconductor elements 10, 20, and variations thereof). In this embodiment, carrier 33 includes a first portion 33a and a second portion 33b. Semiconductor element 30 is disposed on the first portion 33a and electrically connected to the second portion 33b via bonding wire 35. The bonding wire 35 may be made of a metal, such as gold, silver, copper, aluminum, or an alloy containing at least any of the above elements. Encapsulation material 38 covers semiconductor element 30 and has the effect of protecting semiconductor element 30. Specifically, encapsulation material 38 may contain resin materials such as epoxy resin, silicone resin, etc. Encapsulation material 38 may further contain multiple wavelength conversion particles (not shown) to convert the light emitted by semiconductor element 30 from a first peak wavelength to a second peak wavelength. The second peak wavelength may be greater than the first peak wavelength.

[0143] Figure 7 The emission spectra of different semiconductor elements according to the present invention, the structures of these semiconductor elements and Figure 2AThe semiconductor devices 20 are substantially the same and have the same number of well layers. In the semiconductor device of curve h, the first active layer 104c does not have the second region z2 and the second active layer 111c does not have the fifth region z5, that is, all well layers in the first active layer 104c and the second active layer 111c have the same thickness; in the semiconductor device of curve i, the first active layer 104c has the second region z2 and the second active layer 111c has the fifth region z5, and the second region z2 and the fifth region z5 respectively contain 3 thickened well layers 104c2' and 111c2'; in the semiconductor device of curve j, the first active layer 104c has the second region z2 and the fifth active layer 111c has the fifth region z5. The second active layer 111c has a fifth region z5, and both the second region z2 and the fifth region z5 contain five thickened well layers 104c2' and 111c2'; in the semiconductor device of curve k, the first active layer 104c has a second region z2 and a third region z3, and the second active layer 111c has a fifth region z5 and a sixth region z6, and the second region z2, the third region z3, the fifth region z5, and the sixth region z6 each contain three thickened well layers 104c2', 104c2'", 111c2', and 111c2'. Figure 7 As can be seen from curves i, j, and k, increasing the thickness of the well layer in the second region z2 and the fifth region z5 (or / and the third region z3 and the sixth region z6) can reduce the second power and increase the first power, thereby reducing the first proportion of light emitted by the semiconductor device and reducing visual interference. Furthermore, the first power and half-width at half-maximum (FWHM) of the semiconductor device can increase with the increase in the number of thickened well layers.

[0144] Based on the above, embodiments of the present invention can provide a semiconductor stack, semiconductor element, or packaging structure. By adjusting the dopant concentration distribution in the semiconductor stack, further improvements can be achieved, for example, in photoelectric properties such as capacitance and forward voltage. Specifically, the semiconductor stack, semiconductor element, and semiconductor assembly of the present invention can be applied to products in the fields of lighting, medical, display, communication, sensing, and power systems, such as lamps, monitors, mobile phones, tablet computers, automotive dashboards, televisions, computers, wearable devices (such as watches, bracelets, necklaces, etc.), traffic signals, outdoor displays, and medical devices.

[0145] While the present invention has been disclosed above with reference to embodiments, it is not intended to limit the invention. Those skilled in the art should understand that modifications or alterations can be made without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be determined by the appended claims. Furthermore, the above embodiments can be combined or substituted with each other where appropriate, and are not limited to the specific embodiments described. For example, the parameters of a specific component or the connection relationship between a specific component and other components disclosed in one embodiment can also be applied to other embodiments, and all fall within the scope of protection of the present invention.

Claims

1. A semiconductor element comprising: Base; A semiconductor stack is located on the substrate and includes a first semiconductor structure, a second semiconductor structure located on the first semiconductor structure, and a first active region located between the first semiconductor structure and the second semiconductor structure; as well as A first semiconductor layer is located on the second semiconductor structure and has a first thickness between 3 μm and 8 μm; The first semiconductor layer contains Al x1 Ga 1-x1 As, 0.005≤x1<0.

2.

2. The semiconductor device of claim 1, further comprising a second semiconductor layer located between the first semiconductor layer and the second semiconductor structure, the second semiconductor layer not containing aluminum and having a second thickness between 1 μm and 8 μm.

3. The semiconductor device as claimed in claim 2, wherein, The sum of the first thickness and the second thickness is between 4 μm and 16 μm.

4. The semiconductor device as claimed in claim 1, wherein, The first active region comprises alternating stacked first barrier layers and multiple first well layers, wherein the thickness of the first well layers is between 2 nm and 20 nm.

5. The semiconductor device as claimed in claim 4, wherein, The first active region includes a first region and a second region located between the first region and the first semiconductor structure. Both the first region and the second region include the first barrier layer and the first well layer, and the thickness of any first well layer in the second region is greater than the thickness of any first well layer in the first region.

6. The semiconductor device as claimed in claim 5, wherein, The ratio of the thickness of the first well layer in the second region to the thickness of the first well layer in the first region is between 1.5 and 3.

7. The semiconductor device as claimed in claim 5, wherein, The second region includes 2 to 5 sets of the first barrier layer and the first trap layer.

8. The semiconductor device as claimed in claim 5, wherein, The first region is directly connected to the second region.

9. The semiconductor device as claimed in claim 5, wherein, The first well layer in the second region has substantially the same material composition as the first well layer in the first region.

10. The semiconductor device of claim 1, wherein, The first active region can emit light with a peak wavelength between 900 nm and 1000 nm.

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