USB circuit, operation method thereof and USB device

Abstract

The invention provides a USB circuit, an operation method thereof and a USB device. The USB circuit comprises an uplink port interface circuit, a routing circuit, a first mode integration circuit, a second mode integration circuit, a downlink port interface circuit and a control circuit. And the uplink port interface circuit is connected with a USB host. And the routing circuit is connected with the uplink port interface circuit. The downlink port interface circuit is connected with at least one of the first mode integration circuit and the second mode integration circuit. The control circuit is connected with the routing circuit. The control circuit determines whether to connect the routing circuit to the first mode integration circuit or the second mode integration circuit according to a connection state between the USB circuit and the USB host, so as to dynamically switch an operation mode between the USB circuit and the USB host.

Description

TECHNICAL FIELD

[0001] The present application relates to an electronic circuit, and in particular, to a Universal Serial Bus (USB, hereinafter referred to as USB) circuit, an operating method thereof, and a USB device. BACKGROUND

[0002] Generally speaking, a USB4 host including a connection manager (CM). The USB4 host enumerates, configures and manages a USB4 device connected to the USB4 host through the connection manager. Since different connection managers correspond to different versions, and the specification applied by the USB4 device develops rapidly, the USB4 host and the USB4 device often have incompatibility or cannot be successfully connected.

[0003] However, in order to solve the above problems, the current USB4 host can only continuously re-establish a connection with the USB4 device, or output Billboard Device information to prompt the user. In this way, the user needs to update the connection manager version of the USB4 host by himself. SUMMARY

[0004] The present application provides a USB circuit, which can dynamically switch the operation mode between the USB circuit and the USB host, and automatically eliminate abnormal conditions of incompatibility or unsuccessful connection with the USB host.

[0005] An embodiment of the present application provides a USB circuit. The USB circuit includes an upstream port interface circuit, a routing circuit, a first mode integration circuit, a second mode integration circuit, a downstream port interface circuit, and a control circuit. The upstream port interface circuit is used to connect a USB host. The routing circuit is connected to the upstream port interface circuit. The downstream port interface circuit is connected to at least one of the first mode integration circuit and the second mode integration circuit, and is used to connect at least one output device. The control circuit is connected to the routing circuit. The control circuit is used to determine whether to connect the routing circuit to the first mode integration circuit or the second mode integration circuit according to the connection state between the USB circuit and the USB host.

[0006] Embodiments of the present application further provide an operation method of a USB circuit. The operation method comprises the following steps. A USB host is connected through an uplink port interface circuit of the USB circuit. The uplink port interface circuit is further connected to a routing circuit of the USB circuit. The USB circuit further comprises a downlink port interface circuit, a first mode integration circuit and a second mode integration circuit. A control circuit of the USB circuit determines whether to connect the routing circuit to the first mode integration circuit or the second mode integration circuit according to a connection state between the USB circuit and the USB host.

[0007] Embodiments of the present application further provide a USB device. The USB device comprises at least one uplink connection port, at least one downlink connection port and a USB circuit. The USB circuit comprises an uplink port interface circuit, a routing circuit, a first mode integration circuit, a second mode integration circuit, a downlink port interface circuit and a control circuit. The uplink port interface circuit is used to connect a USB host through the uplink connection port. The routing circuit is connected to the uplink port interface circuit. The downlink port interface circuit is connected to at least one of the first mode integration circuit and the second mode integration circuit, and is used to connect at least one output device through the downlink connection port. The control circuit is connected to the routing circuit. The control circuit is used to determine whether to connect the routing circuit to the first mode integration circuit or the second mode integration circuit according to a connection state between the USB circuit and the USB host.

[0008] Based on the above, the USB circuit, the operation method thereof and the USB device according to embodiments of the present application can dynamically switch among different operation modes corresponding to the mode integration circuits by the control circuit connecting the routing circuit to the target mode integration circuit according to the connection state between the USB circuit and the USB host. In this way, the USB circuit can automatically connect to the USB host, thereby eliminating abnormal connection conditions.

[0009] In order to make the above content more understandable, several embodiments are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 is a circuit block diagram of a USB device and a USB circuit according to an embodiment of the present application.

[0011] Figure 2 is a flow chart of an operation method of a USB circuit according to an embodiment of the present application.

[0012] Figure 3 is a circuit block diagram of a USB host according to an embodiment of the present application.

[0013] Figure 4 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application.

[0014] Figure 5 is a circuit block diagram of a USB circuit according to another embodiment of the present application. Figure 4 is a circuit block diagram of a PCIe tunnel router according to an embodiment of the present application.

[0015] Figures 6A-6B is a flowchart of an operation method of a USB circuit according to an embodiment of the present application. Figure 4

[0016] Figure 7 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application.

[0017] Figure 8 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application.

[0018] Figure 9 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application.

[0019] BRIEF DESCRIPTION OF DRAWINGS

[0020] 100, 400, 700, 800, 900: USB device

[0021] 100C, 400C, 700C, 800C, 900C: USB circuit

[0022] 110, 410, 710, 810, 911-912: Upstream connection port

[0023] 120, 420, 720, 821-823, 921-923: Downstream connection port

[0024] 130, 430, 730, 830, 930: Upstream port interface circuit

[0025] 140, 440, 740, 840, 940: Downstream port interface circuit

[0026] 150, 450, 750, 850, 950: Control circuit

[0027] 160, 460, 760, 860, 960: Routing circuit

[0028] 170, 470, 770, 870, 970: First mode integration circuit

[0029] 180, 480, 780, 880, 980: Second mode integration circuit

[0030] 310: Controller​

[0031] 320: PD controller

[0032] 330, 331: tunneling adapter

[0033] 340: physical layer circuit

[0034] 350: connection port

[0035] 461, 761, 861, 961: first multiplexer

[0036] 462, 762, 862, 962: second multiplexer

[0037] 463, 763, 863, 963: third multiplexer

[0038] 471, 771, 871, 971: PCIe tunneling router

[0039] 472, 872, 972: DP tunneling router

[0040] 473, 773, 873, 973: USB3 tunneling router

[0041] 481-485, 781-785, 881-885, 981-985: connection protocol

[0042] 491, 892, 992: PD controller

[0043] 492: buffer

[0044] 510: tunneling upstream adapter

[0045] 521-522: tunneling downstream adapter

[0046] 571: hub (or switch)

[0047] 993: re-timer

[0048] CB1: USB-C cable

[0049] CB2: DP cable

[0050] HD1, HD2: USB host

[0051] OD1-OD5: output device

[0052] S210-S220, S610-S660, S651-S655: step

[0053] SC1: first control signal

[0054] SC2: second control signal

[0055] SC3: third control signal DETAILED DESCRIPTION

[0056] Some embodiments of the present application will be described in detail in the following with reference to the drawings. The elements denoted by the same reference numerals in the following description are regarded as the same or similar elements. These embodiments are only some of the embodiments of the present application and do not disclose all the embodiments of the present application. Rather, these embodiments are only examples in the scope of the patent application of the present application.

[0057] Figure 1 is a circuit block diagram of a USB device and a USB circuit according to an embodiment of the present application. Referring to Figure 1 , the USB device 100 can be, for example, an electronic device that applies the USB4 specification. The USB device 100 is configured to be connected to a USB host HD1. The USB host HD1 is a host that applies the USB4 specification and includes a connection manager (not shown) of any version. The USB device 100 is also configured to be connected to an output device OD1. The output device OD1 can be, for example, a display, an external hard disk, and various communication interface devices, etc. In some applications, the USB device 100 is not connected to the output device OD1.

[0058] In Figure 1 the embodiment, the USB device 100 includes at least one upstream connection port 110, at least one downstream connection port 120, and a USB circuit 100C. The USB circuit 100C can be, for example, a USB integrated circuit. The USB circuit 100C includes an upstream port interface circuit 130, a downstream port interface circuit 140, a control circuit 150, a routing circuit 160, a first mode integration circuit 170, and a second mode integration circuit 180.

[0059] In the embodiment, the upstream port interface circuit 130 is configured to be connected to the USB host HD1 through the upstream connection port 110. The upstream port interface circuit 130 and the upstream connection port 110 can be, for example, an upstream-facing port (UFP) circuit in the USB device 100.

[0060] In this embodiment, the downstream port interface circuit 140 is configured to connect the output device ODI via the downstream connection port 120. The downstream port interface circuit 140 and the downstream connection port 120 can be, for example, a Downstream-Facing Port (DFP) circuit in the USB circuit 100C. The downstream port interface circuit 140 is further connected to at least one of the first mode integration circuit 170 and the second mode integration circuit 180.

[0061] In this embodiment, the first mode integration circuit 170 corresponds to a first mode of the USB circuit 100C. The first mode can be, for example, a mode of operation compliant with the USB4 specification. The second mode integration circuit 180 corresponds to a second mode of the USB circuit 100C. The second mode can be, for example, a mode of operation compliant with a legacy USB specification, such as the USB3 and / or USB2 specification.

[0062] In this embodiment, the routing circuit 160 is connected to the upstream port interface circuit 130 and the control circuit 150. The routing circuit 160 is controlled by the control circuit 150 to switch between connecting to the first mode integration circuit 170 and the second mode integration circuit 180.

[0063] In this embodiment, the control circuit 150 can be, for example, a signal converter, a Field Programmable Gate Array (FPGA), a Central Processing Unit (CPU), or other programmable general purpose or special purpose microprocessors (Microprocessor), Digital Signal Processors (DSP), programmable controllers, Application Specific Integrated Circuits (ASIC), Programmable Logic Devices (PLD) or other similar devices or combinations of these devices, which can load and execute relevant firmware or software to achieve control and computing functions.

[0064] Figure 2 is a flowchart of a method of operating a USB circuit according to an embodiment of the present application. Referring to Figure 1 and Figure 2 , the USB circuit 100C can perform steps S210-S220. The order of these steps S210-S220 is merely exemplary and not limited thereto.

[0065] At step S210, the uplink port interface circuit 130 connects the USB host HD1 through the uplink connection port 110.

[0066] At step S220, the control circuit 150 determines whether to connect the routing circuit 160 to the first mode integration circuit 170 or the second mode integration circuit 180 according to a connection state between the USB circuit 100C and the USB host HD1. The connection state indicates an agreement result of the operation mode between the USB circuit 100C and the USB host HD1. The connection state may, for example, indicate a failure of the first mode or a failure of the second mode.

[0067] It is worth mentioning that by the control circuit 150 selecting to connect the routing circuit 160 to the first mode integration circuit 170 or the second mode integration circuit 180 according to the connection state between the USB circuit 100C and the USB host HD1, the USB circuit 100C can dynamically switch between the first mode and the second mode. In this way, even if the connection manager in the USB host HD1 is incompatible with the USB device 100 or cannot successfully connect, the USB device 100 can change the operation mode through the USB circuit 100C and then connect to the USB host HD1 in an adaptive operation mode, so as to automatically eliminate the abnormal situation of connection without user intervention.

[0068] Figure 3 is a circuit block diagram of a USB host according to an embodiment of the present application. Referring to Figure 3 , the USB host HD2 may, for example, be Figure 1 an embodiment of the USB host HD1 in . The USB host HD2 includes a controller 310, a Power Delivery (PD) controller 320, a plurality of tunnel adaptors 330-33N, a physical layer circuit 340, and a connection port 350, where N is a positive integer greater than 1.

[0069] In this embodiment, the connection port 350 connects the physical layer circuit 340 and the PD controller 320. The connection port 350 may, for example, be a connection port applying USB-C (hereinafter referred to as USB-C). The connection port 350 is used to connect a USB device (for example, the USB device 100 in Figure 1 ).

[0070] In this embodiment, the PD controller 320 connects the controller 310. The PD controller 320 communicates with the connected USB device through the connection port 350 to agree on operation modes such as power delivery and data transmission between each other. The PD controller 320 transmits the result of the communication to the controller 310.

[0071] In this embodiment, the controller 310 connects the plurality of tunneling adapters 330~33N. The controller 310 selects one of the plurality of tunneling adapters 330~33N according to the result of the communication action, to transmit data to the connected USB device through the selected tunneling adapter, the physical layer circuit 340, and the connection port 350.

[0072] In this embodiment, the physical layer circuit 340 and the plurality of tunneling adapters 330~33N respectively comply with the USB4 specification. The tunneling adapters 330~33N respectively correspond to different tunneling protocols, to process and transmit data based on the corresponding tunneling protocol respectively.

[0073] Figure 4 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present disclosure. Referring to Figure 4 , the USB device 400 is used to connect to a USB host HD2. The USB device 400 includes at least one upstream connection port 410, at least one downstream connection port 420, and a USB circuit 400C. The USB circuit 400C includes an upstream port interface circuit 430, a downstream port interface circuit 440, a control circuit 450, a routing circuit 460, a first mode integration circuit 470, and a second mode integration circuit 480. The USB device 400 and the USB circuit 400C can be referred to the related descriptions of the USB device 100 and the USB circuit 100C for analogy.

[0074] In Figure 4 this embodiment, the upstream connection port 410 can be, for example, a connection port applying USB-C. The upstream connection port 410 is used to connect to a corresponding connection port (for example, the connection port 350 of the USB host HD2) in the USB host HD2 through a USB-C cable CB1. Figure 3 The downstream connection port 420 can be, for example, a connection port applying USB-C, USB Type-A, DisplayPort (DP), High Definition Multimedia Interface (HDMI), or other transmission specifications.

[0075] In this embodiment, the first mode integration circuit 470 includes multiple tunneling routers 471-473. These tunneling routers 471-473 conform to the USB4 specification and each corresponds to a different tunneling protocol. Specifically, tunneling router 471 may be, for example, a tunneling router conforming to the PCI Express (PCIe) specification (hereinafter referred to as PCIe tunneling router 471). Tunneling router 472 may be, for example, a DP tunneling router conforming to the DisplayPort (DP) specification (hereinafter referred to as DP tunneling router 472). Tunneling router 473 may be, for example, a USB3 tunneling router conforming to the USB4 specification (i.e., USB3 Tunneling).

[0076] Please refer to the above. Figure 5 , Figure 5 Based on the present invention Figure 4 The circuit block diagram of the PCIe tunneling router shown in the embodiment is as follows. The PCIe tunneling router 471 includes at least one tunneling up adapter 510 and a plurality of tunneling down adapters 521 to 522, wherein the number of tunneling down adapters 521 to 522 is for illustrative purposes only.

[0077] In this embodiment, the tunneling uplink adapter 510 is connected to the hub (or switch) 571 of the first mode integration circuit 470, and multiple tunneling downlink adapters 521-522. The tunneling uplink adapter 510 encapsulates raw data (e.g., PCIe data) from the USB host HD2 into tunneled data conforming to the USB4 specification.

[0078] In this embodiment, multiple tunneling downlink adapters 521-522 are respectively connected to a hub (or switch) 571. Each tunneling downlink adapter 521-522 restores the tunneled data conforming to the USB4 specification to the original data (e.g., PCIe data). In this embodiment, the DP tunneling router 472 and the USB3 tunneling router 473 can be described by analogy with the relevant description of the PCIe tunneling router 471.

[0079] Back Figure 4The second mode integration circuit 480 has a plurality of connection agreements 481-485. The connection agreements 481-485 conform to the specification of the Legacy mode (e.g., the USB 2 specification), and correspond to different transmission speeds, respectively. In detail, the connection agreement 481 indicates a USB 2.0 connection agreement. The connection agreement 482 indicates a USB 5G connection agreement. The connection agreement 483 indicates a USB 10G connection agreement. The connection agreement 484 indicates a USB 20G connection agreement. The connection agreement 485 indicates a Billboard Device connection agreement. In the Legacy mode, the connection agreements 481-485 are ordered as the connection agreement 484, the connection agreement 483, the connection agreement 482, the connection agreement 481, and the connection agreement 485, in accordance with the transmission speed of data transmission from fast to slow.

[0080] In the present embodiment, the routing circuit 460 includes a first multiplexer 461, a second multiplexer 462, and a third multiplexer 463. The first multiplexer 461 is connected to the upstream port interface circuit 430 and the control circuit 450. The second multiplexer 462 is connected to the control circuit 450 and the second mode integration circuit 480. The second multiplexer 462 is also connected to the first multiplexer 461. The third multiplexer 463 is connected to the control circuit 450 and the first mode integration circuit 470. The third multiplexer 463 is also connected to the first multiplexer 461.

[0081] The first multiplexer 461 is controlled by the control circuit 450. The first multiplexer 461 selects to be connected to the second multiplexer 462 or the third multiplexer 463 according to a first control signal SC1 from the control circuit 450. That is, the first multiplexer 461 switches between being connected to the second multiplexer 462 and the third multiplexer 463 according to the first control signal SC1, to further switch between being connected to the first mode integration circuit 470 and the second mode integration circuit 480. The first multiplexer 461 can also be referred to as an agreement routing circuit.

[0082] In the present embodiment, the second multiplexer 462 is controlled by the control circuit 450. The second multiplexer 462 selects one of the plurality of connection agreements to be connected to the second mode integration circuit 480 according to a second control signal SC2 from the control circuit 450. The connection agreements correspond to the plurality of connection agreements 481-485 in the second mode integration circuit 480, respectively. That is, when the first multiplexer 461 is connected to the second multiplexer 462, the second multiplexer 462 switches between different connection agreements according to the second control signal SC2. The second multiplexer 462 can also be referred to as a USB routing circuit.

[0083] In this embodiment, the third multiplexer 463 is controlled by the control circuit 450. The third multiplexer 463 selects one of the plurality of tunneling protocols to connect to the first mode integration circuit 470 according to a third control signal SC3 from the control circuit 450. The tunneling protocols correspond to the plurality of tunneling protocols in the first mode integration circuit 470 respectively, and correspond to the plurality of tunneling routers 471-473 respectively. That is, when the first multiplexer 461 is connected to the third multiplexer 463, the third multiplexer 463 switches between different tunneling protocols (i.e., different tunneling routers 471-473) according to the third control signal SC3. The third multiplexer 463 can also be referred to as a tunneling routing circuit.

[0084] In this embodiment, the upstream port interface circuit 430 can be, for example, a first Combo-Physical Layer circuit. The upstream port interface circuit 430 includes corresponding physical layer circuits and a Transport Layer circuit (not shown). The upstream port interface circuit 430 is connected to the upstream connection port 410 and the routing circuit 460.

[0085] In detail, a first channel end of the upstream port interface circuit 430 is connected to the first multiplexer 461. The upstream port interface circuit 430 converts the format of data transmitted to the first multiplexer 461 into an analog format. A second channel end of the upstream port interface circuit 430 is connected to the upstream connection port 410. The upstream port interface circuit 430 processes data transmitted through the upstream connection port 410 to complete the interface conversion operation of the corresponding upstream stream port in the USB4 specification.

[0086] In this embodiment, the USB circuit 400C further includes a Power Delivery (PD) controller 491. The PD controller 491 is connected to the upstream connection port 410 and the control circuit 450. In some embodiments, the PD controller 491 is provided in other circuits of the USB device 400, and is not integrated in the USB circuit 400C.

[0087] In this embodiment, the USB circuit 400C further includes a buffer 492. The buffer 492 can be, for example, a Data Buffer. The buffer 492 is connected to the first mode integration circuit 470, the second mode integration circuit 480, and the downstream port interface circuit 440.

[0088] In detail, a first channel end of the buffer 492 is connected to an output channel end of the second mode integration circuit 480. A second channel end of the buffer 492 is connected to a plurality of tunneling downstream adapters (including Figure 5The tunneling downlink adapters 521-522 are used. The third channel of buffer 492 is connected to the first output channel of downlink port interface circuit 440. Buffer 492 temporarily stores data transmitted to any of the tunneling routers 471-473, the second mode integration circuit 480, and the downlink port interface circuit 440. The aforementioned data may be, for example, PCIe data, DP data, USB3 compliant data, or USB2 compliant data. Buffer 492 preprocesses the temporarily stored data (e.g., DP data).

[0089] In this embodiment, the downlink port interface circuit 440 may be, for example, a second hybrid physical layer circuit. The downlink port interface circuit 440 includes a corresponding physical layer circuit and a transport layer circuit (not shown). The downlink port interface circuit 440 is connected to the downlink connection port 420, the routing circuit 460, and the buffer 492.

[0090] In detail, the first channel of the downlink port interface circuit 440 is connected to buffer 492. The downlink port interface circuit 440 temporarily stores data in buffer 492. The second channel of the downlink port interface circuit 440 is connected to multiple tunneling downlink adapters (including those of multiple tunneling routers 471-473) respectively. Figure 5 The tunneling downlink adapters 521-522 are used. The third channel of the downlink port interface circuit 440 is connected to the downlink connection port 420. The downlink port interface circuit 440 processes data from multiple tunneling routers 471-473 to perform conversion operations for various transmission interfaces (including PCIe, DP, and USB3). In some applications, the downlink port interface circuit 440 directly transmits data (e.g., PCIe data) from multiple tunneling routers 471-473 to the corresponding downlink connection port 420 (e.g., a PCIe connection port), thereby accelerating data transmission speed.

[0091] Figures 6A-6B Based on the present invention Figure 4 A flowchart illustrating the operation method of the USB circuit in the embodiment. (See reference) Figure 4 as well as Figures 6A-6B The USB circuit 400C can execute steps S610 to S660. The order of these steps S610 to S660 is merely illustrative and not intended to be limiting. In this embodiment, steps S610 to S660 can be applied to the following exemplary situations.

[0092] In this embodiment, the PD controller 491 connects to the PD controller in the USB host HD2 (e.g., via the uplink connection port 410) Figure 3 The PD controller 320 communicates with each other to agree on operating modes such as power transmission and data transmission. The PD controller 491 transmits the results of the communication to the control circuit 450.

[0093] In particular, a set of Configuration Channel (CC) pins in the PD controller 491 is connected to a set of CC pins in the PD controller of the USB host HD2 through the upstream connection port 410 and the USB-C cable CB1. The PD controller 491 transmits CC signals to the PD controller of the USB host HD2. The CC signals comply with the specification in the PD agreement and indicate various communication information between the USB device 400 and the USB host HD2. The aforementioned communication information includes data transmission agreements, such as operating in the first mode, operating in the second mode, or operating in the second mode with a target transmission speed.

[0094] In the present embodiment, the first mode is an operating mode complying with the USB4 specification and can be, for example, a tunnel mode. The first mode also indicates a tunnel data agreement to correspond to different tunnel routers 471-473. The tunnel data agreement can be, for example, one of a PCIe tunnel agreement, a DP tunnel agreement, and a USB3 tunnel agreement.

[0095] In the present embodiment, the second mode is an operating mode complying with the Legacy mode specification and can be, for example, USB2 or USB3. The second mode also indicates a target connection agreement to correspond to different transmission speeds. The target connection agreement can be, for example, one of a plurality of connection agreements 481-485.

[0096] In addition, the PD controller 491 transmits management control signals to the connection manager of the USB host HD2. The management control signals indicate the setting or feedback of the data transmission agreement between the upstream connection port 410 and the USB host HD2.

[0097] In step S610, the PD controller 491 performs a communication action with the PD controller in the USB host HD2 to enter the preset first mode (i.e., the tunnel mode). The PD controller 491 continues the communication action of the tunnel data agreement based on the tunnel mode. The PD controller 491 feeds back the result of the communication action to the control circuit 450.

[0098] At this time, the control circuit 450 determines the connection state between the USB circuit 400C and the USB host HD2 according to whether the communication action is successful or not. In detail, when the communication action is successful, the control circuit 450 determines that the connection state indicates that the USB circuit 400C and the USB host HD2 complete the connection of the corresponding tunnel data agreement in the tunnel mode. On the other hand, when the communication action fails, the control circuit 450 determines that the connection state indicates that the USB circuit 400C and the USB host HD2 cannot establish the connection of the tunnel mode.

[0099] At step S620, when the connection status indicates that the operation of the first mode (i.e., the tunneling mode) corresponding to the first mode integration circuit 470 fails, it indicates that the connection between the USB circuit 400C and the USB host HD2 in the tunneling mode cannot be established, or the USB host HD2 does not support the tunneling mode.

[0100] At step S630, the control circuit 450 sets the communication action between the PD controller 491 and the USB host HD2 to enter the second mode (i.e., the Legacy mode) according to the connection status at step S620. That is, the control circuit 450 switches the routing circuit 460 from being connected to the first mode integration circuit 470 to being connected to the second mode integration circuit 480, so as to automatically change from the connection configuration of the tunneling mode to the connection configuration of the Legacy mode.

[0101] It should be noted that the USB circuit 400C switches between the tunneling mode and the Legacy mode based on the connection status between itself and the USB host HD1 in a firmware-based manner. Therefore, the USB circuit 400C does not need to change the operation mode by performing various adapters set by additional settings. In this way, the USB circuit 400C can automatically and dynamically exclude abnormal conditions of the connection between the USB device 400 and the USB host HD2.

[0102] At step S640, in the process of re-performing the communication action regarding the Legacy mode, the PD controller 491 determines whether the USB host HD2 supports the preset reconnection instruction (e.g., the "PD Data Reset" instruction) according to the CC signal and / or the management control signal.

[0103] When the USB host HD2 supports the preset reconnection instruction (i.e., the "PD Data Reset" instruction), it indicates that the PD controller 491 and the USB host HD2 can directly re-perform the communication action. The USB circuit 400C proceeds to step S660.

[0104] At step S660, based on the "PD Data Reset" instruction, the PD controller 491 and the PD controller in the USB host HD2 re-perform the communication action to enter the second mode (i.e., the Legacy mode). In this way, the USB circuit 400C and the USB host HD2 complete the setting of the operation mode (i.e., the Legacy mode) between each other.

[0105] In another aspect, when the USB host HD2 does not support the preset reconnection instruction (i.e., the "PD Data Reset" instruction), it indicates that the PD controller 491 and the USB host HD2 cannot directly re-communicate. The USB circuit 400C proceeds to steps S651-S655.

[0106] In steps S651-S655, when the routing circuit 450 switches from being connected to the first mode integration circuit 470 to being connected to the second mode integration circuit 480, the PD controller 491 executes a plurality of reconnection instructions to cause the upstream port interface circuit 430 to reestablish a connection relationship with the USB host HD2 according to the reconnection instructions, and thus enter the second mode (i.e., the Legacy mode). In this way, in the Legacy mode, the second mode integration circuit 480 transmits data from the USB host HD2 according to the reestablished connection relationship.

[0107] In detail, in steps S651-S652, the PD controller 491 and the PD controller in the USB host HD2 re-communicate sequentially based on a plurality of reconnection instructions (e.g., the "USB-C Error Recovery" instruction and the "Enable Legacy Term" instruction).

[0108] In step S653, during the re-communication, the PD controller 491 determines whether the Legacy mode in the USB host HD2 conforms to the USB3 specification according to the CC signal and / or the management control signal.

[0109] When the Legacy mode of the USB host HD2 conforms to the USB3 specification, it indicates that the PD controller 491 and the USB host HD2 can directly set the Legacy mode conforming to the USB3 specification based on the preset transmission speed. In this way, the USB circuit 400C and the USB host HD2 complete setting the operation mode (i.e., the Legacy mode) between each other.

[0110] In another aspect, when the Legacy mode of the USB host HD2 does not conform to the USB3 specification, it indicates that the PD controller 491 and the USB host HD2 cannot directly set the Legacy mode conforming to the USB3 specification based on the preset transmission speed. That is, the control circuit 450 determines that the connection state indicates that the USB circuit 400C and the USB host HD2 cannot establish the preset Legacy mode according to the communication. The USB circuit 400C proceeds to steps S654-S655.

[0111] That is, when the connection status indicates that the operation of the second mode (i.e., the Legacy mode) corresponding to the second mode integration circuit 480 fails, it indicates that the Legacy mode based on the USB3 specification cannot be established between the USB circuit 400C and the USB host HD2, or the Legacy mode of the USB host HD2 does not support the USB3 specification. At this time, the control circuit 450 sequentially connects the routing circuit 460 to the second mode integration circuit 480 based on the plurality of connection protocols 481-485 according to the connection status and the plurality of transmission speeds in step S653.

[0112] In steps S654-S655, the PD controller 491 reestablishes the communication action with the PD controller in the USB host HD2 sequentially based on a plurality of reconnection instructions (e.g., a "PD Hard Reset" instruction and an "Enable Legacy Term" instruction). First, the PD controller 491 and the USB host HD2 set the Legacy mode conforming to the USB3 specification based on the fastest connection protocol 484. Assuming that the connection status indicates that the operation of the Legacy mode corresponding to the connection protocol 484 fails, the PD controller 491 and the USB host HD2 set the Legacy mode based on the second fastest connection protocol 483, and so on until the USB circuit 400C and the USB host HD2 complete setting the Legacy mode conforming to the USB2 or USB3 specification between each other.

[0113] Figure 7 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application. Referring to Figure 7 , the USB device 700 is used to connect to a USB host (e.g., the USB host HD2 of Figure 4 ). The USB device 700 includes an upstream connection port 710, a downstream connection port 720, and a USB circuit 700C. The USB circuit 700C includes an upstream port interface circuit 730, a downstream port interface circuit 740, a control circuit 750, a routing circuit 760, a first mode integration circuit 770, a second mode integration circuit 780, a PD controller 791, and a buffer 792. The USB device 700 and the USB circuit 700C can be referred to the related description of the USB device 400 and the USB circuit 400C and be analogized.

[0114] In Figure 7 the embodiment, the USB device 700 can be used as a USB4-to-PCIe interface conversion device. The USB device 700 connects to the USB host through the upstream port interface circuit 730 and the upstream connection port 710. The upstream connection port 710 can be, for example, a connection port applying USB-C.

[0115] Further, the USB device 700 connects the output device OD2 through the downstream port interface circuit 740 and the downstream connection port 720. The downstream connection port 720 can be, for example, a PCIe-applied connection port. The output device OD2 can be, for example, a solid-state disk (SSD) device applied with a Non-Volatile Memory Express (NVMe) communication protocol.

[0116] In the application of the PCIe interface conversion device, the USB device 700 transmits data between the USB host and the output device OD2 through one of the PCIe tunneling router 771 and the USB3 tunneling router 773.

[0117] It should be noted that, compared with Figure 4 Embodiments, since data applied with the PCIe specification does not need to be preprocessed before being transmitted, in the application of the PCIe interface conversion device, the first mode integration circuit 770 can remove the DP tunneling router. Further, the USB circuit 700C can also remove the buffer.

[0118] Figure 8 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application. Referring to Figure 8 , the USB device 800 is used to connect a USB host. The USB device 800 includes an upstream connection port 810, a plurality of downstream connection ports 821-823, and a USB circuit 800C. The USB circuit 800C includes an upstream port interface circuit 830, a downstream port interface circuit 840, a control circuit 850, a routing circuit 860, a first mode integration circuit 870, a second mode integration circuit 880, a PD controller 891, and a buffer 892. The USB device 800 and the USB circuit 800C can be referred to the related description of the USB device 400 and the USB circuit 400C and be analogized.

[0119] In Figure 8 Embodiments, the USB device 800 can serve as a USB4-to-PCIe, DP, and USB interface conversion device. The USB device 800 connects a USB host (for example, the USB host HD2 of Figure 4 ) through the upstream port interface circuit 830 and the upstream connection port 810. The upstream connection port 810 can be, for example, a USB-C-applied connection port.

[0120] In this embodiment, the USB device 800 connects the output device OD2 through the downstream port interface circuit 840 and the downstream connection port 821. The downstream connection port (i.e., the PCIe connection port) 821 and the connected output device (i.e., the NVMe device) OD2 can be referred to the related descriptions of the downstream connection port 720 and the output device OD2 and be analogized.

[0121] In addition, the USB device 800 also connects the output device OD3 through the downstream port interface circuit 840 and the downstream connection port 822. The downstream connection port 822 can be, for example, a connection port applying DP. The output device OD3 can be, for example, a DP device applying DP specification, such as a display.

[0122] In the application of the DP interface conversion device, the USB device 800 transmits data between the USB host and the output device OD3 through one of the DP tunneling router 872 and the second mode integration circuit 880. The content of the aforementioned data is data conforming to DP format.

[0123] In addition, the USB device 800 also connects the output device OD4 through the downstream port interface circuit 840 and the downstream connection port 823. The downstream connection port 822 can be, for example, a connection port applying USB-C. The output device OD3 can be, for example, a USB device or a USB hub applying USB4 specification.

[0124] In the application of the USB interface conversion device, the USB device 800 transmits data between the USB host and the output device OD4 through one of the USB3 tunneling router 873 and the second mode integration circuit 880. The content of the aforementioned data is data conforming to USB format.

[0125] Figure 9 is a circuit block diagram of a USB device and a USB circuit according to another embodiment of the present application. Referring to Figure 9 , the USB device 800 is used to connect multiple USB hosts. The USB device 900 includes multiple upstream connection ports 911-912, multiple downstream connection ports 921-923, and a USB circuit 900C. The USB circuit 900C includes an upstream port interface circuit 930, a downstream port interface circuit 940, a control circuit 950, a routing circuit 960, a first mode integration circuit 970, a second mode integration circuit 980, a PD controller 991, and a buffer 992. The USB device 900 and the USB circuit 900C can be referred to the related descriptions of the USB device 400 and the USB circuit 400C and be analogized.

[0126] In Figure 9In an embodiment, the USB device 900 can serve as an interface conversion device for USB4. The USB device 900 connects a USB host (e.g., the USB host HD2) through the upstream port interface circuit 930, the upstream connection port 911, and a USB-C cable CB1. The upstream connection port 911 can be, for example, a USB-C connection port. The USB device 800 also connects a video source host (e.g., a display card) through the upstream port interface circuit 930, the upstream connection port 912, and a DP cable CB2. The upstream connection port 912 can be, for example, a DP connection port. Figure 4

[0127] In the present embodiment, the USB device 900 connects an output device OD7 through the downstream port interface circuit 940 and the downstream connection port 923. The downstream connection port 923 can be, for example, a USB-C connection port. The output device OD7 can be, for example, a USB device or a USB hub that complies with the USB4 specification. The downstream connection port (i.e., USB-C connection port) 923 and the connected output device (i.e., USB device) OD7 can be referred to the related descriptions of the downstream connection port 823 and the output device OD4 and be analogized.

[0128] In the present embodiment, the USB device 900 also connects an output device OD5 through the downstream port interface circuit 940 and the downstream connection port 921. The downstream connection port 921 can be, for example, a DP connection port. The output device OD5 can be, for example, a DP device that complies with the DP specification, such as a display.

[0129] In addition, the USB device 900 also connects an output device OD6 through the downstream port interface circuit 940 and the downstream connection port 922. The downstream connection port 922 can be, for example, a USB-C connection port. The output device OD6 can be, for example, another DP device that has a USB-C connection port and complies with the DP specification, such as another display.

[0130] It should be noted that the USB circuit 900C also includes a re-timer 993. The re-timer 993 can be, for example, a DP re-timer used to process DP data, to maintain the connection quality of the DP interface, and to implement the DisplayPort Alternative mode (DP Alt mode). The re-timer 993 is connected to the upstream port interface circuit 930 and the downstream port interface circuit 940.

[0131] ​In the application of the DP interface conversion device, the USB device 900 transmits data between the USB host and / or the image source host and the plurality of output devices OD5-OD6 through at least one of the DP tunneling router 972, the USB3 tunneling router 973, and the second mode integration circuit 980. The content of the data is data conforming to the DP format. In this way, the USB device 900 can realize the function of using multiple displays at the same time.

[0132] In the DP Alt mode, the above-mentioned data can be transmitted between the uplink port interface circuit 930 and the downlink port interface circuit 940 through the reclocker 993 without being encapsulated into tunneling data conforming to the USB4 specification via the DP tunneling router 972.

[0133] In summary, the USB circuit, the operation method thereof, and the USB device of the embodiments of the present application can realize the conversion function of various interfaces and the conversion function of various transmission speeds. Through the operation of the firmware of the USB circuit according to the connection state between the USB circuit and the USB host, the USB device can dynamically switch between the tunneling mode and the Legacy mode. In some embodiments, through the USB circuit, the Legacy mode is sequentially set based on different connection protocols, and the USB device can adaptively adjust the protocol between the USB circuit and the USB host. In this way, the USB device can be connected with various versions of USB hosts and successfully enumerate the connected output devices, thereby excluding abnormal connection conditions.

[0134] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the above embodiments, or make equivalent replacement to part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A Universal Serial Bus (USB) circuit, comprising: Uplink port interface circuitry, used to connect to a USB host; The routing circuit connects to the uplink port interface circuit. First-mode integrated circuit; Second-mode integrated circuit; Downlink port interface circuit, connecting at least one of the first mode integration circuit and the second mode integration circuit, and used to connect at least one output device; as well as A control circuit, connected to the routing circuit, is used to determine whether to connect the routing circuit to the first mode integrated circuit or the second mode integrated circuit based on the connection status between the USB circuit and the USB host.

2. The USB circuit of claim 1, wherein when the connection state indicates that the operation of the first mode corresponding to the first mode integration circuit has failed, the control circuit switches the routing circuit from being connected to the first mode integration circuit to being connected to the second mode integration circuit according to the connection state.

3. The USB circuit according to claim 2, wherein when the routing circuit switches from being connected to the first mode integration circuit to being connected to the second mode integration circuit, the uplink port interface circuit re-establishes a connection with the USB host according to a plurality of reconnection commands, so that the second mode integration circuit transmits data from the USB host according to the connection relationship.

4. The USB circuit according to claim 1, wherein the first mode integration circuit includes a plurality of tunneling routers, wherein the tunneling routers correspond to different tunneling protocols and conform to the USB4 specification.

5. The USB circuit according to claim 1, wherein the second mode integrated circuit has multiple connection protocols, wherein the connection protocols correspond to different transmission speeds.

6. The USB circuit of claim 5, wherein when the connection state indicates that the operation of the second mode corresponding to the second mode integration circuit has failed, the control circuit sequentially connects the routing circuit to the second mode integration circuit based on the connection state and multiple transmission speeds, according to the connection protocols.

7. The USB circuit of claim 1, wherein the routing circuit comprises: The first multiplexer connects the uplink port interface circuit and the control circuit. The second multiplexer is connected to the control circuit and the second mode integration circuit, and is used to connect to the first multiplexer; as well as The third multiplexer connects the control circuit and the first mode integration circuit, and is used to connect the first multiplexer.

8. The USB circuit of claim 7, wherein the first multiplexer is selectively connected to the second multiplexer or the third multiplexer according to a first control signal from the control circuit. The second multiplexer selects one of multiple connection protocols to connect to the second mode integration circuit based on a second control signal from the control circuit. The third multiplexer selects one of a plurality of tunneling protocols to connect to the first mode integration circuit based on a third control signal from the control circuit.

9. The USB circuit according to claim 1, further comprising: A power delivery controller, connected to the control circuit, is used to communicate with the USB host, wherein the control circuit determines the connection status based on the success or failure of the communication.

10. The USB circuit according to claim 1, further comprising: The buffer connects the first mode integration circuit, the second mode integration circuit, and the downlink port interface circuit.

11. The USB circuit according to claim 1, further comprising: A re-timer is connected to the uplink port interface circuit and the downlink port interface circuit.

12. A method for operating a USB circuit, comprising: The USB circuit connects to a USB host via its uplink port interface circuit, which also connects to the routing circuit of the USB circuit. The USB circuit further includes a downlink port interface circuit, a first-mode integration circuit, and a second-mode integration circuit. The control circuit of the USB circuit determines whether to connect the routing circuit to the first mode integrated circuit or the second mode integrated circuit based on the connection status between the USB circuit and the USB host.

13. A USB device, comprising: At least one uplink connection port; At least one downstream connection port; as well as USB circuitry includes: Uplink port interface circuitry for connecting to a USB host via the at least one uplink connection port; The routing circuit connects to the uplink port interface circuit. First-mode integrated circuit; Second-mode integrated circuit; A downlink port interface circuit, connecting at least one of the first mode integration circuit and the second mode integration circuit, and used to connect at least one output device through the at least one downlink connection port; and A control circuit, connected to the routing circuit, is used to determine whether to connect the routing circuit to the first mode integrated circuit or the second mode integrated circuit based on the connection status between the USB circuit and the USB host.

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