A digital circuit simulation test method and system

Abstract

The application discloses a kind of digital circuit simulation test method and system, method as follows: S1, constructs circuit simulation model, and the simulation input end and simulation output end of circuit simulation model are established Multiple simulation transmission chains are labeled with corresponding time sequence, and the time sequence labeling information of simulation transmission chain is obtained;S2, set up multiple simulation transmission sections of simulation transmission chain, establish the simulation branch chain of each simulation transmission section, to establish transmission section transmission channel, the information of simulation transmission section is labeled with combination, and the combination information of simulation transmission section is obtained;S3, obtain the preset test excitation file, carry out the segmented test of multiple simulation transmission sections to simulation transmission chain, in each test process, the state determination of time length remaining information and test remaining information is carried out, according to the determination result, test time length is adjusted, and the adjusted time length is obtained.

Description

Technical Field

[0001] This invention belongs to the field of digital circuit simulation and testing technology, and specifically proposes a digital circuit simulation and testing method and system. Background Technology

[0002] As the complexity of digital circuit design increases, traditional simulation testing methods face multiple challenges. Traditional digital circuit simulation testing is usually based on overall testing, making it difficult to test functions or logic individually or in combination. It has low testing flexibility, lacks specificity, has low testing accuracy, makes it difficult to efficiently locate simulation test anomalies, and makes it difficult to flexibly adjust test duration, thus failing to achieve a balance between efficiency and accuracy.

[0003] Chinese Patent Publication No. CN1235278C discloses a general digital circuit simulation test system and test method. Although this patent has the advantages of strong versatility, high code reusability and high scalability, it has the problems of low test efficiency and low accuracy. Summary of the Invention

[0004] To address the aforementioned problems in the existing technology, this invention provides a digital circuit simulation and testing method and system.

[0005] The present invention adopts the following technical solution:

[0006] A digital circuit simulation and testing method includes the following steps:

[0007] S1. Construct a circuit simulation model, establish multiple simulation transmission chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transmission chains;

[0008] S2. Set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment, and then establish a transmission channel for the transmission segment. Combine the labeled information of the simulated transmission segments to obtain the combined information of the simulated transmission segments.

[0009] S3. Obtain the preset test stimulus file, perform segmented testing of multiple simulated transmission segments on the simulated transmission chain, determine the status of remaining duration information and remaining test information during each segment test, adjust the test duration according to the determination results, and obtain the adjusted duration.

[0010] Preferably, in step S1:

[0011] S1.1 Obtain the circuit hardware information of the digital circuit under test, and obtain the hardware description language based on the circuit hardware information;

[0012] S1.2. The circuit simulation model is obtained by describing and modeling the digital circuit under test using the hardware description language.

[0013] S1.3 Obtain the simulation input and simulation output terminals of the circuit simulation model;

[0014] S1.4 Obtain preset simulation timing information, establish timing simulation signal transmission relationship between simulation input and simulation output based on preset simulation timing information, and obtain multiple simulation transmission chains of preset simulation timing information;

[0015] S1.5. The simulation transmission chain is time-marked using preset simulation timing information to obtain the timing marking information for each simulation transmission chain.

[0016] Preferably, step S2 includes:

[0017] S2.1 Set up multiple simulation transmission segments for the simulation transmission chain, and establish a simulation branch chain between the transmission segment output end and the simulation output end of each simulation transmission segment;

[0018] S2.2 Establish the transmission channel of each simulation transmission segment to the corresponding simulation transmission segment and simulation output terminal through the simulation branch chain;

[0019] S2.3. Label each simulated transmission segment to obtain the simulated transmission segment labeling information;

[0020] S2.4 Obtain the simulation transmission segment annotation information of each simulation output terminal through the simulation output terminal;

[0021] S2.5. Combine the simulation transmission segment annotation information of multiple simulation output terminals through the simulation output terminal to obtain the simulation transmission segment combination information;

[0022] S2.6 Obtain multiple simulated transmission segment combination information of simulated transmission chains with different timing annotation information through simulated transmission segment combination information.

[0023] Preferably, step S3 includes:

[0024] S3.1 Obtain a preset test stimulus file, extract the features of the test signals from the preset test stimulus file, and obtain multiple test feature signals;

[0025] S3.2. Segment the preset test stimulus file according to multiple test characteristic signals to obtain multiple test stimulus file test segments;

[0026] S3.3. The simulation transmission segment and its combination information are used to allocate test segments in multiple test stimulus files to obtain the transmission matching test segments corresponding to the simulation transmission segments and the transmission matching combination test segments corresponding to the simulation transmission segment combination information.

[0027] S3.4. Allocate simulation test duration for the simulation transmission segment and obtain simulation test duration allocation information;

[0028] S3.5 Input the transmission matching test segment and its transmission matching combination test segment of the preset test stimulus file into the simulation transmission chain with the corresponding timing label for simulation test;

[0029] S3.6 Obtain the information used for simulation test duration, adjust the simulation test duration allocation information according to all simulation test duration information, obtain the test duration adjustment information of the simulation transmission segment, and adjust the test duration of the corresponding simulation transmission segment according to the test duration adjustment information;

[0030] S3.7. Obtain single-segment test information of transmission matching test segment and multi-segment combination test information of transmission matching combination test segment of each simulated transmission segment through the simulation output terminal.

[0031] Preferably, in step S3.4, the simulation test duration is allocated to the simulation transmission segment to obtain simulation test duration allocation information, specifically including:

[0032] S3.4.1 Calculate the corresponding simulation test duration based on the preset stimulus file;

[0033] S3.4.2 Obtain the transmission matching test segment information of the simulated transmission segment, and calculate the test segment test duration of each transmission matching test segment based on the simulation test duration;

[0034] S3.4.3. Simulate the transmission test chain quantity according to the test duration of the test segment and obtain simulation test process information;

[0035] S3.4.4 Obtain the simulation test duration information for the current simulation test segment based on the simulation test process information.

[0036] Preferably, step 3.5 specifically includes:

[0037] S3.5.1 Obtain the test duration and simulation test duration information of the current simulation test segment, calculate the difference between the test duration and simulation test duration information, and obtain the remaining duration information of the current simulation test segment;

[0038] S3.5.2. Determine the time utilization status of the simulation test segment based on the remaining time information of the simulation test segment, and obtain the time utilization status determination information.

[0039] S3.5.3 Obtain the transmission matching test segment information and actual test information of the current simulation test segment, calculate the difference between the transmission matching test segment information and the actual test information, and obtain the remaining test information of the current simulation test segment;

[0040] S3.5.4. Based on the remaining time information and the remaining test information, determine the duration adjustment of the simulation test segment to obtain duration adjustment determination information;

[0041] S3.5.5 Calculate the duration adjustment coefficient of the current simulation test segment based on the duration adjustment judgment information, and adjust the duration of the current simulation test segment according to the duration adjustment coefficient of the current simulation test segment to obtain the adjustment duration of the current simulation test segment;

[0042] S3.5.6. Obtain the remaining test duration based on the current simulation test segment's adjustment duration, and adjust the simulation test duration based on the remaining test duration to obtain the remaining simulation test segment's adjustment duration.

[0043] Preferably, in step S3.5.2, when the remaining time information is positive, the time utilization status of the simulation test segment is determined in a positive state; when the remaining time information is 0, the time utilization status of the simulation test segment is determined in a negative state.

[0044] Preferably, in step S3.5.4: if the duration utilization judgment information of the current simulation test segment is in a positive state, then when the duration adjustment judgment information is in a positive state, the current simulation test segment is determined not to be adjusted; if the duration utilization judgment information of the current simulation test segment is in a negative state, then when the duration adjustment judgment information is in a negative state, the current simulation test segment is determined to be adjusted.

[0045] Preferably, in step S3.5.4, the duration adjustment determination of the simulation test segment is performed based on the remaining duration information and the remaining test information to obtain duration adjustment determination information. Specifically: when the remaining test information is positive, the duration adjustment status of the simulation test segment is determined to be negative; when the remaining test information is 0, the duration adjustment status of the simulation test segment is determined to be positive.

[0046] This invention also discloses a digital circuit simulation and testing system for performing the above method, specifically including the following modules:

[0047] The transport quantity construction module is used to build a circuit simulation model, establish multiple simulation transport chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transport chains.

[0048] The transmission segment splitting and combining module is used to set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment, and then establish a transmission channel for the transmission segment. It combines the annotation information of the simulated transmission segments to obtain the combined information of the simulated transmission segments.

[0049] The segmented test adjustment module is used to obtain a preset test stimulus file, perform segmented tests on multiple simulated transmission segments of the simulated transmission chain, determine the status of remaining duration and test duration information during each test segment, and adjust the test duration based on the determination results to obtain the adjusted duration.

[0050] Compared with the prior art, the present invention has the following significant technical advancements:

[0051] This invention optimizes test resource allocation, ensuring full coverage of critical test scenarios while avoiding over-testing of non-critical paths. It accurately simulates circuit timing behavior through timing annotation information; it supports multi-stage verification in complex circuits by simulating branch chains and transmission channels, improving the comprehensiveness and relevance of testing. Through segmented testing and dynamic duration adjustment, it concentrates test resources on critical paths and uncovered test scenarios, improving testing efficiency and coverage. It avoids over-testing of non-critical paths, reducing waste of test resources and lowering testing costs. By simulating transmission segment division and combination information, it supports flexible configuration of test scenarios to adapt to different circuit designs and testing needs. It dynamically adjusts test duration based on real-time test data to adapt to timing changes and signal characteristics in complex circuits. Through dynamic duration adjustment and state determination, it automates the testing process, reducing manual intervention and improving verification efficiency. Attached Figure Description

[0052] Figure 1 The present invention is a flowchart of a digital circuit simulation and testing method according to a preferred embodiment.

[0053] Figure 2 This is a flowchart of step S1 in a preferred embodiment of the present invention.

[0054] Figure 3 This is a flowchart of step S2 in a preferred embodiment of the present invention.

[0055] Figure 4 This is a flowchart of step S3 in a preferred embodiment of the present invention.

[0056] Figure 5 This is a block diagram of a digital circuit simulation and testing system according to a preferred embodiment of the present invention. Detailed Implementation

[0057] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0058] like Figure 1 As shown in the preferred embodiment of the present invention, a digital circuit simulation and testing method is proposed, comprising the following steps:

[0059] S1. Construct a circuit simulation model, establish multiple simulation transmission chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transmission chains;

[0060] S2. Set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment, and then establish a transmission channel for the transmission segment. Combine the labeled information of the simulated transmission segments to obtain the combined information of the simulated transmission segments.

[0061] S3. Obtain the preset test stimulus file, perform segmented testing of multiple simulated transmission segments on the simulated transmission chain, determine the status of remaining duration information and remaining test information during each segment test, adjust the test duration according to the determination results, and obtain the adjusted duration.

[0062] The technical solution of this invention is based on digital circuit design files (such as Verilog / VHDL code) to construct a high-precision circuit simulation model to simulate the actual behavior of the circuit.

[0063] Multiple simulation transmission chains (under different timings) are established between the input and output ends of the simulation model, and the timing information of each transmission chain is labeled to generate timing labeling information to meet the simulation test requirements at different times.

[0064] Each simulated transmission chain is divided into multiple simulated transmission segments (such as by functional modules) to enable segmented testing and evaluation.

[0065] A simulation branch chain (such as a multi-path signal branch) is established for each simulated transmission segment to obtain the transmission channels of multiple transmission segments, thereby realizing the acquisition of simulation test information for each transmission segment.

[0066] The annotation information of the simulated transmission segments is combined to generate simulated transmission segment combination information, obtain the functional combination of the stages, and realize partial stage combination evaluation.

[0067] Refine the granularity of testing to enhance the flexibility of simulation testing.

[0068] Load the preset test stimulus file to drive the input signal of the simulated transmission chain.

[0069] Each simulated transmission segment is tested in segments, and the remaining duration information (difference in duration used) and remaining test information (such as uncovered test scenarios) are monitored in real time during the test process.

[0070] Based on the status determination results of the remaining duration information and the remaining test information, the test duration of the current simulation transmission segment is dynamically adjusted (such as extending or shortening the test time) to generate the adjustment duration.

[0071] Optimize test resource allocation to ensure that critical test scenarios are fully covered, while avoiding over-testing of non-critical paths.

[0072] By using timing annotation information, the timing behavior of the circuit can be accurately simulated.

[0073] By simulating branch chains and transmission channels, multi-stage verification in complex circuits is supported, improving the comprehensiveness and relevance of testing.

[0074] By segmenting tests and dynamically adjusting test durations, test resources are centrally allocated to critical paths and uncovered test scenarios, thereby improving test efficiency and coverage.

[0075] Avoid overtesting non-critical paths to reduce waste of testing resources and lower testing costs.

[0076] By simulating the division and combination of transmission segments, it supports flexible configuration of test scenarios to adapt to different circuit designs and testing needs.

[0077] The test duration is dynamically adjusted based on real-time test data to adapt to timing changes and signal characteristics in complex circuits.

[0078] By dynamically adjusting the duration, we can ensure that the critical path is fully tested, thereby reducing the risk of design flaws.

[0079] Timely detection and repair of timing violations or functional issues during the simulation phase can prevent redesign due to design flaws after tape-out.

[0080] This invention can be extended to large-scale digital circuits and supports the verification of complex circuits with multiple paths and multiple timing constraints.

[0081] This invention automates the testing process by dynamically adjusting the duration and determining the status, thereby reducing manual intervention and improving verification efficiency.

[0082] like Figure 2 As shown, step S1 in this embodiment is as follows:

[0083] S1.1 Obtain the circuit hardware information of the digital circuit under test, and obtain the hardware description language based on the circuit hardware information;

[0084] S1.2. Describe and model the digital circuit under test using the hardware description language to obtain a circuit simulation model;

[0085] S1.3 Obtain the simulation input and simulation output terminals of the circuit simulation model; the simulation input and simulation output terminals perform different functions;

[0086] S1.4 Obtain preset simulation timing information, establish timing simulation signal transmission relationship between the simulation input terminal and the simulation output terminal according to the preset simulation timing information, and obtain multiple simulation transmission chains of preset simulation timing information;

[0087] S1.5. The simulation transmission chain is time-marked using preset simulation timing information to obtain the timing marking information of each simulation transmission chain.

[0088] In this step, hardware information, including circuit topology, component types, and signal connection relationships, is extracted from the physical design files (such as netlists, register transfer level descriptions) or design documents of the digital circuit under test.

[0089] Based on the extracted hardware information, the corresponding hardware description language code (such as Verilog or VHDL) is automatically generated.

[0090] Using the generated HDL code, a simulation model of the digital circuit under test is built in a simulation tool to ensure that the model can accurately reflect the logic function and timing behavior of the circuit.

[0091] Identify the simulation input and output terminals from the simulation model.

[0092] Obtain preset simulation timing information from test specifications or design documents, and perform simulation tests at different times.

[0093] Based on the preset simulation timing information, a timing simulation signal transmission relationship is established between the simulation input and simulation output, forming multiple simulation transmission chains. Each transmission chain represents a signal path from input to output and contains corresponding timing nodes.

[0094] Using preset simulation timing information, timing annotation is performed on each simulated transport chain.

[0095] The timing annotation information is associated with the simulation transport chain to generate complete timing annotation information for each simulation transport chain, which is used for subsequent simulation testing and timing verification.

[0096] By automatically extracting hardware information and generating HDL code, the workload of manual coding is reduced, and the efficiency of simulation model construction is improved.

[0097] The automatic establishment and timing labeling of the signal transmission relationship in timing simulation further accelerates the preparation process for simulation testing.

[0098] The simulation model is built based on real hardware information, which ensures the accuracy of the model and can truly reflect the logic and timing behavior of the circuit.

[0099] This invention supports different types of digital circuits and hardware description languages, and has wide applicability. It allows for flexible configuration of simulated transport chains and timing annotation information.

[0100] Simulation testing allows for the early verification of circuit functionality and performance, improving the reliability and stability of the design.

[0101] For circuits containing multiple signal paths and complex timing relationships, it can effectively establish and manage simulated transmission chains, ensuring that the timing behavior of each path is accurately simulated and verified.

[0102] Step S2 in this embodiment is described in [reference]. Figure 3 Specifically, it includes:

[0103] S2.1 Set up multiple simulation transmission segments for the simulation transmission chain, and establish a simulation branch chain between the transmission segment output end and the simulation output end of each simulation transmission segment;

[0104] S2.2 Establish the transmission channel of each simulation transmission segment to the corresponding simulation transmission segment and simulation output terminal through the simulation branch chain;

[0105] S2.3. Label each simulated transmission segment to obtain the simulated transmission segment labeling information;

[0106] S2.4 Obtain the simulation transmission segment annotation information of each simulation output terminal through the simulation output terminal;

[0107] S2.5. Combine the simulation transmission segment annotation information of multiple simulation output terminals through the simulation output terminal to obtain simulation transmission segment combination information;

[0108] S2.6 Obtain multiple simulated transmission segment combination information of simulated transmission chains with different timing annotation information through simulated transmission segment combination information.

[0109] This step breaks down each simulated transmission chain (such as a complete signal path from input to output) into multiple simulated transmission segments (such as register level, combinational logic level, cross-clock domain segment, etc.), with each transmission segment representing a specific logic / functional unit in the circuit.

[0110] By subdividing the transmission chain, simulation parameters can be set individually for different transmission segments, improving simulation flexibility.

[0111] A simulation branch chain is established between the output end of each simulation transmission segment and the simulation output end, which facilitates the direct acquisition of simulation test data of each transmission segment at the output end, enabling data analysis and positioning.

[0112] By using branch chains, different signal paths in the circuit can be covered, ensuring the comprehensiveness of simulation testing.

[0113] Based on the simulation branch chain, a transmission channel is established between each simulation transmission segment and the simulation output terminal to clarify the transmission path of the signal from the transmission segment to the output terminal.

[0114] The establishment of the transmission channel enables simulation tools to accurately track the signal flow, facilitating analysis and fault location.

[0115] Each simulated transmission segment is labeled, including timing information (such as delay and clock cycle) and functional information (such as signal type and logic function), to generate simulated transmission segment labeling information.

[0116] The annotation information of each transmission segment is obtained through the simulation output.

[0117] The transmission segment annotation information from multiple simulation output terminals is combined to generate simulation transmission segment combination information. This combination information reflects the simulation test data of functional combinations between different transmission segments.

[0118] By combining information, the collaborative operation of different transmission segments in the circuit can be analyzed globally, and potential linkage functions can be discovered through simulation testing.

[0119] Based on the simulated transmission segment combination information, multiple simulated transmission segment combination information of simulated transmission chains with different timing annotation information are obtained.

[0120] By subdividing the simulated transmission chain and establishing branch chains, independent simulation parameters can be set for different transmission segments to accurately simulate the actual behavior of the circuit and improve simulation accuracy.

[0121] The establishment of the transmission channel enables simulation tools to precisely control the signal flow and perform simulation testing and analysis on each transmission segment.

[0122] The establishment of simulation branch chains covers the multi-path signal flow in the circuit, ensuring that the simulation test can cover all possible signal paths and improve the comprehensiveness of the test.

[0123] Based on the simulated transmission segment combination information, the behavior of the circuit under different functional combinations can be analyzed and tested.

[0124] Precise simulation testing can verify the functionality and performance of circuits in advance, improving the reliability and stability of the design.

[0125] For circuits containing multiple signal paths and complex timing relationships, the method of this invention can effectively subdivide transmission chains, establish branch chains and transmission channels, and ensure the efficiency and accuracy of simulation testing.

[0126] By combining and analyzing the transmission segment annotation information, the root cause of the problem can be quickly located, accelerating the verification process.

[0127] For step S3 of this embodiment, see [link to example]. Figure 4Specifically, it includes:

[0128] S3.1 Obtain a preset test stimulus file, and extract the features of the test signals from the preset test stimulus file to obtain multiple test feature signals;

[0129] S3.2. The preset test stimulus file is segmented according to the multiple test feature signals to obtain multiple test stimulus file test segments;

[0130] S3.3. The simulated transmission segment and its combination information are used to allocate test segments in the multiple test stimulus files to obtain the transmission matching test segments corresponding to the simulated transmission segments and the transmission matching combination test segments corresponding to the simulation transmission segment combination information.

[0131] S3.4. Allocate simulation test duration for the simulation transmission segment and obtain simulation test duration allocation information;

[0132] S3.5. Input the transmission matching test segment and its transmission matching combination test segment of the preset test stimulus file into the simulation transmission chain with the corresponding timing label for simulation testing;

[0133] S3.6 Obtain the information used for simulation test duration, adjust the simulation test duration allocation information according to all the simulation test duration information, obtain the test duration adjustment information of the simulation transmission segment, and adjust the test duration of the corresponding simulation transmission segment according to the test duration adjustment information;

[0134] S3.7. Obtain single-segment test information of transmission matching test segment and multi-segment combination test information of transmission matching combination test segment of each simulated transmission segment through the simulation output terminal.

[0135] In this step, features of the test signals, such as signal waveforms, timing relationships, and amplitude changes, are extracted from a preset test stimulus file to generate multiple test feature signals. Based on the extracted test feature signals, the preset test stimulus file is divided into multiple test stimulus file test segments, each containing test signals with similar features.

[0136] Based on the information of the simulated transmission segment and its combination, multiple test stimulus file test segments are assigned to the corresponding simulated transmission segments and combinations of simulated transmission segments to form transmission matching test segments and transmission matching combination test segments.

[0137] Ensure that each simulated transmission segment and combination receives test signals relevant to its function, thereby improving the relevance of simulation testing.

[0138] Assign simulation test duration to each simulation transmission segment and generate simulation test duration allocation information.

[0139] Ensure that critical transmission segments and complex paths receive sufficient testing time, while avoiding over-testing of non-critical paths.

[0140] Input the transmission matching test segments and their transmission matching combination test segments from the preset test stimulus file into the simulation transmission chain with the corresponding timing annotation, and execute the simulation test.

[0141] By utilizing the timing annotation information of the previously obtained simulation transport chain, we can ensure that the simulation test is conducted under the correct timing conditions.

[0142] During the simulation test, information such as the actual test duration is obtained.

[0143] Based on the information used for simulation test duration, the simulation test duration allocation information is adjusted to generate test duration adjustment information.

[0144] Optimize test duration allocation to improve the efficiency and accuracy of simulation testing.

[0145] The simulation output terminal obtains single-segment test information of the transmission matching test segment for each simulated transmission segment, such as signal waveforms and timing verification results.

[0146] The multi-segment combination test information of the transmission matching combination test segment is obtained from the simulation transmission segment combination information, and the collaborative work between different transmission segments is analyzed.

[0147] By extracting features and segmenting files, the test stimulus file is divided into test segments that match the simulation transmission segments and combinations, ensuring that each transmission segment and combination can receive test signals related to its function, thereby improving the relevance of the simulation test.

[0148] The reasonable allocation and adjustment of simulation test duration avoids over-testing or under-testing, thus improving the efficiency of simulation testing.

[0149] By acquiring information on the duration of simulation tests and dynamically adjusting the allocation of simulation test duration, the simulation test process was further optimized, and the reliability of the test was improved.

[0150] For circuits containing multiple signal paths and complex timing relationships, the method of this invention can effectively segment the test stimulus file and allocate it to the corresponding simulation transmission segments and combinations, ensuring that the simulation test can cover all possible signal paths and timing conditions.

[0151] By acquiring single-segment and multi-segment combination test information, the behavior and performance of the circuit can be comprehensively analyzed.

[0152] In step S3.4, the simulation test duration is allocated to the simulation transmission segment to obtain simulation test duration allocation information, specifically including:

[0153] Calculate the corresponding simulation test duration based on the preset stimulus file;

[0154] The formula for calculating the simulation test duration is:

[0155] FCS = N*t u

[0156] Where FCS is the simulation test duration, N is the number of test feature signals, and t u This refers to the processing time for a single signal.

[0157] Obtain the transmission matching test segment information of the simulated transmission segment, and calculate the test segment test duration for each transmission matching test segment based on the simulated test duration;

[0158] The formula for calculating the test duration of a test segment is:

[0159]

[0160] Where CCS is the test duration of the test segment, FCS is the simulation test duration, M is the total number of simulated transmission segments, and K is the total number of simulated transmission segments. i This is the preset complexity weight for the current transmission matching test segment, with a value range of ≥1.

[0161] The transmission test chain quantity is simulated based on the test duration of the test segment, and the simulation test process information is obtained.

[0162] The information used to obtain the simulation test duration of the current simulation test segment is based on the simulation test process information.

[0163] This step calculates the total time required for the entire simulation test based on the complexity of the preset stimulus file. It ensures that the total test time meets the verification requirements.

[0164] Based on the transmission matching test segment information of the simulated transmission segment, the total simulation test time is allocated to each transmission matching test segment. The allocation is dynamically adjusted according to factors such as the criticality of the test segment in the circuit, signal path length, or timing risks, to ensure that critical paths receive sufficient test time.

[0165] Achieve reasonable allocation of testing resources, avoid excessive time consumption on non-critical paths, and ensure sufficient verification of critical paths.

[0166] According to the allocated test duration, each transmission matching test segment is simulated and tested sequentially, and key information during the simulation process is recorded.

[0167] Real-time collection of simulation test process information, including actual test time, etc.

[0168] Based on the simulation test process information, the actual test time usage of each simulation test segment is analyzed to identify test segments with insufficient or excessive test time, ensuring dynamic optimization of test time allocation.

[0169] By using formulaic calculations, the simulation test duration can be precisely allocated, ensuring that each test segment receives test time that matches its complexity and criticality.

[0170] Based on simulation test process information, the test duration allocation can be adjusted in real time to avoid resource waste or insufficient testing, thereby improving the efficiency and accuracy of simulation testing.

[0171] Dynamically adjust the test duration to promptly identify issues such as insufficient or redundant test duration, thereby improving the reliability and stability of the design.

[0172] To avoid excessive testing time being consumed by non-critical paths, resources should be concentrated on critical paths and complex timing regions to improve the utilization efficiency of testing resources.

[0173] By precisely allocating and dynamically adjusting test durations, unnecessary test iterations can be reduced, thereby lowering testing costs and time costs.

[0174] By collecting and analyzing simulation test information in real time, timing conflicts or functional problems can be quickly located, accelerating the verification process.

[0175] In step S3.5, the simulation test duration information is obtained, and the simulation test duration allocation information is adjusted according to the simulation test duration information to obtain the test duration adjustment information of the simulation transmission segment. The test duration of the corresponding simulation transmission segment is then adjusted according to the test duration adjustment information, specifically including:

[0176] Obtain the test duration and simulation test duration information of the current simulation test segment, calculate the difference between the test duration and simulation test duration information, and obtain the remaining duration information of the current simulation test segment;

[0177] Based on the remaining time information of the simulation test segment, the time utilization status of the simulation test segment is determined, and the time utilization status determination information is obtained.

[0178] Obtain the transmission matching test segment information and actual test information of the current simulation test segment, calculate the difference between the transmission matching test segment information and the actual test information, and obtain the remaining test information of the current simulation test segment;

[0179] Based on the remaining duration information and the remaining test information, the duration of the simulation test segment is adjusted to obtain duration adjustment determination information.

[0180] Calculate the duration adjustment coefficient of the current simulation test segment based on the duration adjustment judgment information, and adjust the duration of the current simulation test segment according to the duration adjustment coefficient of the current simulation test segment to obtain the adjustment duration of the current simulation test segment;

[0181] The formula for calculating the duration adjustment factor is:

[0182]

[0183] Where ST is the duration adjustment coefficient, and N r T represents the number of remaining signals to be tested in the current segment. t To initially allocate time to the current segment, T r For remaining time information, N t This represents the initial total number of signals in the current segment.

[0184] The remaining test duration is obtained based on the current adjustment duration of the simulation test segment. The duration of the simulation test segment is then adjusted based on the remaining test duration to obtain the remaining adjustment duration of the simulation test segment.

[0185] This step compares the preset test duration of the current simulation test segment with the actual simulation test duration, calculates the difference between the two, and obtains the remaining duration information of the current simulation test segment.

[0186] Quantitatively evaluate the time utilization efficiency of the current test segment and identify whether there is time redundancy.

[0187] Based on the remaining time information, the time utilization status of the current simulation test segment is determined, and time utilization status determination information is generated.

[0188] By comparing the transmission matching test segment information of the current simulation test segment with the actual test information, the difference between the two is calculated to obtain the remaining test information of the current simulation test segment.

[0189] Assess whether the current test segment has achieved the expected test objectives and identify any uncovered test scenarios.

[0190] By combining the remaining time information and the remaining test information, the duration of the current simulation test segment is adjusted, and duration adjustment determination information is generated.

[0191] Based on the duration adjustment determination information, the duration adjustment coefficient for the current simulation test segment is calculated. Based on the duration adjustment coefficient, the test duration of the current simulation test segment is dynamically adjusted to obtain the adjusted duration.

[0192] Enables fine-grained adjustment of test duration to ensure full coverage of key test scenarios.

[0193] Calculate the remaining simulation test duration based on the current adjustment duration of the simulation test segment.

[0194] The remaining test time is reallocated to other simulation test segments, generating an adjustment time for the remaining simulation test segments.

[0195] Optimize the overall utilization of testing resources to avoid wasting time.

[0196] By calculating the remaining test duration and test duration in real time, the test duration of each simulation test segment is dynamically adjusted to ensure that critical test scenarios are fully covered, while avoiding over-testing of non-critical paths.

[0197] Optimize the allocation of test resources to improve the efficiency and accuracy of simulation testing.

[0198] By adjusting the duration of testing, we ensure that all key test scenarios are covered, reducing blind spots in testing.

[0199] For circuits containing multiple signal paths and complex timing relationships, the method of this invention can flexibly adjust the test duration to ensure the efficiency and accuracy of simulation testing.

[0200] By monitoring and adjusting test duration in real time, timing conflicts or functional issues can be quickly identified, accelerating the verification process.

[0201] By precisely adjusting the duration, unnecessary test iterations can be reduced, thereby lowering testing costs and time costs.

[0202] In the above steps, the simulation test segment is adjusted based on the remaining time information and the remaining test information to obtain the duration adjustment determination information, as follows:

[0203] When the duration utilization judgment information of the current simulation test segment is in a positive state and the duration adjustment judgment information is in a positive state, the current simulation test segment is judged not to be adjusted.

[0204] When the duration determination information of the current simulation test segment is negative, and the duration adjustment determination information is negative, the current simulation test segment is adjusted.

[0205] In this embodiment, if the duration determination information of the current simulation test segment is in a "positive state" and the duration adjustment determination information is also in a "positive state", then it is determined that the current simulation test segment does not need to adjust the test duration and should maintain the original setting. If the duration remains and the test coverage is complete, it indicates that the current test segment has efficiently completed the objective and no additional adjustment is required.

[0206] If the duration utilization judgment information is "negative state" and the duration adjustment judgment information is "negative state", then it is determined that the test duration of the current simulation test segment needs to be adjusted.

[0207] If the test duration expires and the test is not completed, it indicates that there is a blind spot in the current test segment, and the insufficient coverage needs to be compensated by extending the test duration.

[0208] By combining the duration utilization status and the adjustment judgment status, the system dynamically determines whether to adjust the test duration, thus avoiding misjudgment based on a single indicator.

[0209] Judgment information is generated based on real-time test data (remaining test time, test coverage) to support dynamic optimization of the test process.

[0210] Avoid unnecessary time extensions and reduce waste of testing resources when there is remaining test time and complete test coverage.

[0211] If the test runs out of time and is not completed, extend the test duration in a timely manner to ensure coverage of key scenarios and improve test reliability.

[0212] By combining states, we can flexibly adapt to the complexity and timing requirements of different test segments and optimize the allocation of test time.

[0213] Automated decision-making logic reduces the need for manual adjustments to test duration and increases the automation level of the testing process.

[0214] In the above implementation steps, the time utilization status of the simulation test segment is determined based on the remaining time information of the simulation test segment, and the time utilization status determination information is obtained as follows:

[0215] When the remaining time information is positive, the duration of the simulation test segment is determined in a positive state using the state.

[0216] When the remaining duration information is 0, a negative state determination is made for the duration utilization state of the simulation test segment.

[0217] Based on the remaining duration information and the remaining test information, the duration of the simulation test segment is adjusted to obtain duration adjustment determination information, specifically including:

[0218] When the remaining test information is positive, a negative state determination is made for the duration adjustment state of the simulation test segment;

[0219] When the remaining test information is 0, a positive state determination is made for the duration adjustment state of the simulation test segment.

[0220] In this step, if the remaining duration of the current simulation test segment is positive, it means that the test segment has not fully utilized the allocated test duration within the specified time. This is then determined to be a "positive state".

[0221] If the remaining test time is 0 (meaning the actual time consumed equals the preset time), it indicates that the test segment fully utilized the allocated test time, but it is unclear whether it covered all critical test scenarios. This is considered a "negative state," and further judgment is needed based on other information (such as remaining test time) to determine whether the test time needs to be extended.

[0222] If the remaining test information for the current simulation test segment is positive, it indicates that there are unfinished test requirements in the test segment. This is classified as a "negative state," suggesting that the test duration needs to be increased to complete the remaining test objectives.

[0223] If the remaining test information is 0, it means that the test segment has met all test requirements. At this time, it is judged as a "positive state", indicating that the current test segment does not need to be adjusted for the test duration.

[0224] By using remaining time information, we can quickly assess the efficiency of test segment utilization and identify whether there is wasted time or insufficient testing.

[0225] By testing remaining information, we can assess the completeness of test coverage, ensure that all key test scenarios are covered, and reduce test blind spots.

[0226] When the remaining test information is positive, the test duration extension decision is automatically triggered to ensure that key test scenarios are fully covered and improve the reliability of the test.

[0227] When the remaining test information is 0, unnecessary time extensions are avoided, test resource waste is reduced, and test efficiency is improved.

[0228] By using preset judgment rules, the decision-making for adjusting test duration is automated, reducing manual intervention.

[0229] The test duration is dynamically adjusted based on real-time test data to adapt to the needs of different test scenarios and improve the flexibility and adaptability of simulation testing.

[0230] By precisely adjusting the duration, test resources are concentrated on test segments that require further verification, avoiding over-testing of non-critical paths and improving resource utilization efficiency.

[0231] Reduce unnecessary test iterations and time consumption, thereby lowering testing costs and time costs.

[0232] By dynamically monitoring remaining test information, we ensure that all critical test scenarios are covered, reducing the risk of design flaws.

[0233] like Figure 5 As shown, this embodiment discloses a digital circuit simulation and testing system for performing the above method, which includes the following modules:

[0234] The transport quantity construction module is used to build a circuit simulation model, establish multiple simulation transport chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transport chains.

[0235] The transmission segment splitting and combining module is used to set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment, and then establish a transmission channel for the transmission segment. It combines the annotation information of the simulated transmission segments to obtain the combined information of the simulated transmission segments.

[0236] The segmented test adjustment module is used to obtain a preset test stimulus file, perform segmented tests on multiple simulated transmission segments of the simulated transmission chain, determine the status of remaining duration and test duration information during each test segment, and adjust the test duration based on the determination results to obtain the adjusted duration.

[0237] This embodiment uses digital circuit design files (such as Verilog / VHDL code) to build a high-precision circuit simulation model to simulate the actual behavior of the circuit.

[0238] Multiple simulation transmission chains (under different timings) are established between the input and output ends of the simulation model, and the timing information of each transmission chain is labeled to generate timing labeling information to meet the simulation test requirements at different times.

[0239] Each simulated transmission chain is divided into multiple simulated transmission segments (such as by functional modules) to enable segmented testing and evaluation.

[0240] A simulation branch chain (such as a multi-path signal branch) is established for each simulated transmission segment to obtain the transmission channels of multiple transmission segments, thereby realizing the acquisition of simulation test information for each transmission segment.

[0241] The annotation information of the simulated transmission segments is combined to generate simulated transmission segment combination information, obtain the functional combination of the stages, and realize the evaluation of partial stage combination.

[0242] Refine the granularity of testing to enhance the flexibility of simulation testing.

[0243] Load the preset test stimulus file to drive the input signal of the simulated transmission chain.

[0244] Each simulated transmission segment is tested in segments, and the remaining duration information (difference in duration used) and remaining test information (such as uncovered test scenarios) are monitored in real time during the test process.

[0245] Based on the status determination results of the remaining duration information and the remaining test information, the test duration of the current simulation transmission segment is dynamically adjusted (such as extending or shortening the test time) to generate the adjustment duration.

[0246] Optimize test resource allocation to ensure that critical test scenarios are fully covered, while avoiding over-testing of non-critical paths.

[0247] By using timing annotation information, the timing behavior of the circuit can be accurately simulated.

[0248] By simulating branch chains and transmission channels, multi-stage verification in complex circuits is supported, improving the comprehensiveness and relevance of testing.

[0249] By segmenting tests and dynamically adjusting test durations, test resources are centrally allocated to critical paths and uncovered test scenarios, thereby improving test efficiency and coverage.

[0250] Avoid overtesting non-critical paths to reduce waste of testing resources and lower testing costs.

[0251] By simulating the division and combination of transmission segments, it supports flexible configuration of test scenarios to adapt to different circuit designs and testing needs.

[0252] The test duration is dynamically adjusted based on real-time test data to adapt to timing changes and signal characteristics in complex circuits.

[0253] By dynamically adjusting the duration, we can ensure that the critical path is fully tested, thereby reducing the risk of design flaws.

[0254] Timely detection and repair of timing violations or functional issues during the simulation phase can prevent redesign due to design flaws after tape-out.

[0255] The method can be extended to large-scale digital circuits, supporting the verification of complex circuits with multiple paths and multiple timing constraints.

[0256] By dynamically adjusting the duration and determining the status, the testing process can be automated, reducing manual intervention and improving verification efficiency.

[0257] Other aspects of this embodiment can be found in the above method embodiments.

[0258] The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above embodiments.

Claims

1. A digital circuit simulation and testing method, characterized in that, Includes the following steps: S1. Construct a circuit simulation model, establish multiple simulation transmission chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transmission chains; S2. Set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment to establish a transmission channel for the transmission segment, and combine the labeled information of the simulated transmission segments to obtain the combined information of the simulated transmission segments. The setting of multiple simulated transmission segments in the simulated transmission chain specifically involves dividing each simulated transmission chain into multiple simulated transmission segments, each of which represents a specific logic or functional unit in the circuit. S3. Obtain the preset test stimulus file, perform segmented testing of multiple simulated transmission segments on the simulated transmission chain, determine the status of remaining duration information and remaining test information during each segment test, adjust the test duration according to the determination result, and obtain the adjusted duration. Step S2 includes: S2.1 Set up multiple simulation transmission segments for the simulation transmission chain, and establish a simulation branch chain between the transmission segment output end and the simulation output end of each simulation transmission segment; S2.2 Establish the transmission channel of each simulation transmission segment to the corresponding simulation transmission segment and simulation output terminal through the simulation branch chain; S2.

3. Label each simulated transmission segment to obtain the simulated transmission segment labeling information; S2.4 Obtain the simulation transmission segment annotation information of each simulation output terminal through the simulation output terminal; S2.

5. Combine the simulation transmission segment annotation information of multiple simulation output terminals through the simulation output terminal to obtain the simulation transmission segment combination information; S2.6 Obtain multiple simulated transmission segment combination information of simulated transmission chains with different timing annotation information through simulated transmission segment combination information.

2. The digital circuit simulation and testing method according to claim 1, characterized in that, In step S1: S1.1 Obtain the circuit hardware information of the digital circuit under test, and obtain the hardware description language based on the circuit hardware information; S1.

2. The circuit simulation model is obtained by describing and modeling the digital circuit under test using the hardware description language. S1.3 Obtain the simulation input and simulation output terminals of the circuit simulation model; S1.4 Obtain preset simulation timing information, establish timing simulation signal transmission relationship between simulation input and simulation output based on preset simulation timing information, and obtain multiple simulation transmission chains of preset simulation timing information; S1.

5. The simulation transmission chain is time-marked using preset simulation timing information to obtain the timing marking information for each simulation transmission chain.

3. A digital circuit simulation and testing method according to any one of claims 1-2, characterized in that, Step S3 includes: S3.1 Obtain a preset test stimulus file, extract the features of the test signals from the preset test stimulus file, and obtain multiple test feature signals; S3.

2. Segment the preset test stimulus file according to multiple test characteristic signals to obtain multiple test stimulus file test segments; S3.

3. Allocate test segments to multiple test stimulus files based on the simulated transmission segments and their combination information to obtain the transmission matching test segments corresponding to the simulated transmission segments and the transmission matching combination test segments corresponding to the simulation transmission segment combination information. S3.

4. Allocate simulation test duration for the simulation transmission segment and obtain simulation test duration allocation information; S3.5 Input the transmission matching test segment and its transmission matching combination test segment of the preset test stimulus file into the simulation transmission chain with the corresponding timing label for simulation test; S3.6 Obtain the information used for simulation test duration, adjust the simulation test duration allocation information according to all simulation test duration information, obtain the test duration adjustment information of the simulation transmission segment, and adjust the test duration of the corresponding simulation transmission segment according to the test duration adjustment information; S3.

7. Obtain the single-segment test information of the transmission matching test segment of each simulated transmission segment and the multi-segment combination test information of the transmission matching combination test segment of the simulated transmission segment through the simulation output terminal.

4. The digital circuit simulation and testing method according to claim 3, characterized in that, In step S3.4, the process of allocating simulation test duration for the simulation transmission segment and obtaining simulation test duration allocation information specifically includes: S3.4.1 Calculate the corresponding simulation test duration based on the preset stimulus file; S3.4.2 Obtain the transmission matching test segment information of the simulated transmission segment, and calculate the test segment test duration of each transmission matching test segment based on the simulation test duration; S3.4.

3. Perform simulation testing on the simulated transmission chain according to the test duration of the test segment, and obtain simulation test process information; S3.4.4 Obtain the simulation test duration information for the current simulation test segment based on the simulation test process information.

5. The digital circuit simulation and testing method according to claim 3, characterized in that, Step 3.5 specifically includes: S3.5.1 Obtain the test duration and simulation test duration information of the current simulation test segment, calculate the difference between the test duration and simulation test duration information, and obtain the remaining duration information of the current simulation test segment; S3.5.

2. Determine the time utilization status of the simulation test segment based on the remaining time information of the simulation test segment, and obtain the time utilization status determination information. S3.5.3 Obtain the transmission matching test segment information and actual test information of the current simulation test segment, calculate the difference between the transmission matching test segment information and the actual test information, and obtain the remaining test information of the current simulation test segment; S3.5.

4. Based on the remaining time information and the remaining test information, determine the duration adjustment of the simulation test segment to obtain duration adjustment determination information; S3.5.5 Calculate the duration adjustment coefficient of the current simulation test segment based on the duration adjustment judgment information, and adjust the duration of the current simulation test segment according to the duration adjustment coefficient of the current simulation test segment to obtain the adjustment duration of the current simulation test segment; S3.5.

6. Obtain the remaining test duration based on the current simulation test segment's adjustment duration, and adjust the simulation test duration based on the remaining test duration to obtain the remaining simulation test segment's adjustment duration.

6. The digital circuit simulation and testing method according to claim 5, characterized in that, In step S3.5.2, when the remaining time information is positive, the time utilization status of the simulation test segment is determined in a positive state; when the remaining time information is 0, the time utilization status of the simulation test segment is determined in a negative state.

7. The digital circuit simulation and testing method according to claim 5, characterized in that, In step S3.5.4: if the duration utilization judgment information of the current simulation test segment is in a positive state, then when the duration adjustment judgment information is in a positive state, the current simulation test segment is determined not to be adjusted; if the duration utilization judgment information of the current simulation test segment is in a negative state, then when the duration adjustment judgment information is in a negative state, the current simulation test segment is determined to be adjusted.

8. A digital circuit simulation and testing system, used to perform the method as described in any one of claims 1-7, characterized in that, The system includes the following modules: The transport quantity construction module is used to build a circuit simulation model, establish multiple simulation transport chains for the simulation input and simulation output terminals of the circuit simulation model and perform corresponding timing annotations to obtain the timing annotation information of the simulation transport chains. The transmission segment splitting and combining module is used to set up multiple simulated transmission segments of the simulated transmission chain, establish a simulated branch chain for each simulated transmission segment to establish a transmission channel for the transmission segment, and combine the labeled information of the simulated transmission segments to obtain the combined information of the simulated transmission segments. The segmented test adjustment module is used to obtain a preset test stimulus file, perform segmented tests on multiple simulated transmission segments of the simulated transmission chain, determine the status of remaining duration and test duration information during each test segment, and adjust the test duration based on the determination results to obtain the adjusted duration.

Images