Preparation method of film bulk acoustic wave filter and film bulk acoustic wave filter

Abstract

The invention discloses a preparation method of a film bulk acoustic wave filter and the film bulk acoustic wave filter. The preparation method comprises the following steps: providing a silicon-based substrate; a silicon dioxide material is deposited on one side of a silicon-based substrate to form a first insulating layer, the first insulating layer comprises a first groove, and the first groove comprises a first sacrificial layer of a silicon material. A piezoelectric layer is deposited on the side, away from the silicon-based substrate, of the first insulating layer, a patterned second sacrificial layer and a patterned third sacrificial layer are prepared on the side, away from the silicon-based substrate, of the piezoelectric layer, and the second sacrificial layer and the third sacrificial layer are at least partially overlapped with the first sacrificial layer in the thickness direction of the silicon-based substrate; and the second sacrificial layer and the third sacrificial layer are made of silicon. And simultaneously releasing the first sacrificial layer, the second sacrificial layer and the third sacrificial layer. Therefore, different sacrificial layers can be released in the same process at the same time, the process cost is reduced, and device performance reduction caused by the process when the sacrificial layers made of different materials are released for multiple times is avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for fabricating a thin-film bulk acoustic wave filter and the thin-film bulk acoustic wave filter itself. Background Technology

[0002] Radio frequency (RF) filters are the cornerstone of wireless communication. Thin-film bulk acoustic resonators (FBARs), with their high quality factor, low loss, high reliability, miniaturization, and IC process compatibility, have become one of the core components for building RF bandpass filters. With the rapid development of 5G wireless communication, FBARs are required to have smaller size and higher performance: such as a larger effective electromechanical coupling coefficient (K), a higher quality factor (Q), fewer spurious modes, and a larger figure of merit (FOM). Traditional thin-film bulk acoustic resonators are typically sandwich structures of an upper electrode, a piezoelectric layer, and a lower electrode. Ideally, by applying alternating current to the surfaces of the upper and lower electrodes, the piezoelectric effect is utilized to excite longitudinal waves propagating along the thickness direction in the FBAR.

[0003] In fabricating thin-film bulk acoustic wave (TFT) resonators, multiple sacrificial layers need to be released to form cavities. In existing technologies, different materials are used for the sacrificial layers, and different conditions are required for their release. On the one hand, due to the different release conditions, different processes are needed. On the other hand, the gases used in the two different release processes may react, affecting the fabrication of the top electrode and leading to a decrease in the performance of the TFT filter. Summary of the Invention

[0004] This invention provides a method for fabricating a thin-film bulk acoustic wave filter and the thin-film bulk acoustic wave filter. By setting the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to be made of the same material, different sacrificial layers can be released simultaneously in the same process, reducing process costs and avoiding device performance degradation due to process reasons when sacrificial layers of different materials are released multiple times.

[0005] In a first aspect, embodiments of the present invention provide a method for fabricating a thin-film bulk acoustic wave filter, the method comprising: providing a silicon substrate;

[0006] A silicon dioxide material is deposited on one side of the silicon substrate to form a first insulating layer, the first insulating layer including a first groove, and the first groove including a first sacrificial layer of silicon material;

[0007] A piezoelectric layer is formed on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are formed on the side of the piezoelectric layer away from the silicon substrate. Along the thickness direction of the silicon substrate, the second sacrificial layer and the third sacrificial layer at least partially overlap the first sacrificial layer, and the material of the second sacrificial layer and the third sacrificial layer both include silicon.

[0008] A first electrode is formed on the side of the second and third sacrificial layers away from the silicon substrate;

[0009] Simultaneously, the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer are released to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer, and a third cavity in the third sacrificial layer.

[0010] Optionally, after fabricating a patterned second sacrificial layer and a patterned third sacrificial layer on the side of the piezoelectric layer away from the silicon substrate, the method further includes:

[0011] Silicon dioxide material is deposited on the side of the second and third sacrificial layers away from the silicon substrate to form a protective layer.

[0012] Optionally, after depositing silicon dioxide material on the side of the second and third sacrificial layers away from the silicon substrate, the method further includes:

[0013] The protective layer is etched to form a first protective layer on the side of the second sacrificial layer away from the silicon substrate, and a second protective layer on the side of the third sacrificial layer away from the silicon substrate. Along the thickness direction of the silicon substrate, the first protective layer overlaps with the second sacrificial layer, and the second protective layer overlaps with the third sacrificial layer.

[0014] Optionally, after depositing silicon dioxide material on the side of the second and third sacrificial layers away from the silicon substrate, the method further includes:

[0015] The protective layer is etched to form a first protective layer on the surface of the second sacrificial layer away from the silicon substrate, a second protective layer on the surface of the third sacrificial layer away from the silicon substrate, and a first epitaxial layer and a second epitaxial layer on the side of the piezoelectric layer away from the silicon substrate.

[0016] Wherein, along the thickness direction of the silicon substrate, the first protective layer overlaps with the second sacrificial layer, and the second protective layer overlaps with the third sacrificial layer; along the thickness direction perpendicular to the silicon substrate, the first epitaxial layer and the first sacrificial layer are in contact, and the second epitaxial layer and the second sacrificial layer are in contact.

[0017] Optionally, before depositing the piezoelectric layer on the side of the first insulating layer away from the silicon substrate, the method further includes:

[0018] A second insulating layer is formed on the side of the first insulating layer away from the silicon substrate, and a second electrode is formed on the side of the second insulating layer away from the silicon substrate. Along the thickness direction of the silicon substrate, both the first electrode and the second electrode at least partially overlap the first cavity.

[0019] Optionally, fabricating a piezoelectric layer on the side of the first insulating layer away from the silicon substrate includes:

[0020] The piezoelectric layer is deposited on the side of the second electrode away from the silicon substrate, such that the piezoelectric layer includes a first piezoelectric layer portion located on the surface of the second electrode and a second piezoelectric layer portion located on the surface of the second insulating layer, the first piezoelectric layer portion and the second piezoelectric layer portion being interconnected, and the height of the first piezoelectric layer portion from the silicon substrate being greater than the height of the second piezoelectric layer portion from the silicon substrate.

[0021] Optionally, fabricating a patterned second sacrificial layer and a patterned third sacrificial layer on the side of the piezoelectric layer away from the silicon substrate includes:

[0022] A second sacrificial layer is prepared on the side of the first piezoelectric layer portion away from the silicon substrate, and a third sacrificial layer is prepared at the connection position between the first piezoelectric layer portion and the second piezoelectric layer portion;

[0023] Fabricating a first electrode on the side of the second and third sacrificial layers away from the silicon substrate includes:

[0024] A first electrode is formed on the side of the second sacrificial layer and the third sacrificial layer away from the silicon substrate, such that the first electrode has a first step structure at the location of the second sacrificial layer and a second step structure at the location of the third sacrificial layer.

[0025] Optionally, fabricating the first electrode on the side of the second sacrificial layer and the third sacrificial layer away from the silicon substrate further includes:

[0026] A second groove is etched in the first piezoelectric layer portion, the second groove penetrating the first piezoelectric layer portion, and the first electrode also includes a first electrode portion covering the second groove, the first electrode portion being in contact with the second electrode;

[0027] After fabricating the first electrode on the side of the second and third sacrificial layers away from the silicon substrate, the process further includes:

[0028] A passivation layer is formed on the side of the first electrode away from the silicon substrate, and a third groove is formed on the passivation layer. The third groove penetrates the passivation layer and overlaps at least partially with a portion of the second piezoelectric layer along the thickness direction of the silicon substrate.

[0029] A first conductor is disposed in the second groove, and the first conductor is in partial contact with the first electrode. A second conductor is disposed in the third groove, and the second conductor is in contact with the first electrode.

[0030] Optionally, after forming a passivation layer on the side of the first electrode away from the silicon substrate, the method further includes:

[0031] A first via is formed, which penetrates the passivation layer, the piezoelectric layer, the second electrode, and the second insulating layer, and along the thickness direction of the silicon substrate, the first via at least partially overlaps with the first sacrificial layer.

[0032] Secondly, embodiments of the present invention also provide a thin-film bulk acoustic resonator, which is obtained by the fabrication method described in any of the first aspects.

[0033] This invention discloses a method for forming a first insulating layer by depositing silicon dioxide on one side of a silicon substrate. The first insulating layer includes a first groove, within which a first sacrificial layer of silicon material is included. A piezoelectric layer is deposited on the side of the first insulating layer away from the silicon substrate. A patterned second sacrificial layer and a patterned third sacrificial layer are then fabricated on the side of the piezoelectric layer away from the silicon substrate. Along the thickness direction of the silicon substrate, both the second and third sacrificial layers at least partially overlap the first sacrificial layer, and both are made of silicon. A first electrode is fabricated on the side of the second and third sacrificial layers away from the silicon substrate. The first, second, and third sacrificial layers are then released simultaneously. This allows different sacrificial layers to be released simultaneously in the same process, reducing process costs and avoiding device performance degradation due to process limitations when releasing sacrificial layers of different materials multiple times. Attached Figure Description

[0034] Figure 1 This is a schematic flowchart of a method for fabricating a thin-film bulk acoustic filter according to an embodiment of the present invention;

[0035] Figure 2 This is a schematic diagram of the fabrication process of a thin-film bulk acoustic filter provided in an embodiment of the present invention;

[0036] Figure 3 This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention.

[0037] Figure 4 This is a schematic diagram of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention;

[0038] Figure 5 This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention;

[0039] Figure 6 This is a schematic diagram of the process of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention;

[0040] Figure 7 This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be fully described below with reference to the accompanying drawings of the embodiments of this invention through specific implementation methods. Obviously, the described embodiments are only some, not all, embodiments of this invention. Various modifications and variations can be made to this invention without departing from the spirit or scope of this invention, which will be obvious to those skilled in the art. Therefore, this invention is intended to cover modifications and variations of this invention that fall within the scope of the corresponding claims (the claimed technical solutions) and their equivalents.

[0042] Furthermore, the terms "first," "second," and similar terms used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, terms such as "an," "one," or "the" do not indicate a quantity limitation, but rather indicate the presence of at least one. Terms such as "including" or "comprising" mean that the element or object preceding the word encompasses the element or object listed after the word and its equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly. In addition, descriptions of "same" or "equal" involved in the embodiments of this disclosure do not mean that two objects are completely equal in size or shape; they are allowed to be approximately the same or approximately equal within a certain error range. It should be noted that the implementation methods provided in the embodiments of this invention can be combined with each other without contradiction. Figure 1 This is a schematic flowchart of a method for fabricating a thin-film bulk acoustic filter according to an embodiment of the present invention. Figure 2This is a schematic diagram illustrating the fabrication process of a thin-film bulk acoustic filter according to an embodiment of the present invention. See also... Figure 1 and Figure 2 The preparation method includes:

[0043] S110 provides a silicon-based substrate.

[0044] Specifically, such as Figure 1 and Figure 2 As shown, a silicon substrate 10 is provided, wherein the material of the silicon substrate 10 includes silicon material, that is, the silicon substrate 10 includes a silicon wafer, which can reduce the manufacturing cost compared to the SOI (Silicon-On-Insulator) wafer in the prior art.

[0045] S120. Deposit silicon dioxide material on one side of a silicon substrate to form a first insulating layer, the first insulating layer including a first groove, the first groove including a first sacrificial layer of silicon material.

[0046] Specifically, in preparing the first insulating layer 110, silicon dioxide material can be deposited on one side of the silicon substrate 10. When a certain thickness is reached, a portion of the first insulating layer 110 is obtained. This portion of the first insulating layer 110 has a flat first surface on the side away from the silicon substrate 10. Then, silicon material is deposited on the first surface to prepare a first sacrificial layer 120 of silicon material in the central region of the first surface. Subsequently, silicon dioxide material is deposited on both sides of the edge region of the first surface to form a complete first insulating layer 110. At this point, the first insulating layer 110 is equivalent to having a first groove S1 in the central region, and the first groove S1 includes the first sacrificial layer 120. It can be understood that the first sacrificial layer 120 located in the first groove S1 is in contact with the first insulating layer 110 without any gap between them. Furthermore, the surface of the first sacrificial layer away from the silicon substrate 10 is flush with the surface of the first insulating layer 110 away from the silicon substrate 10, thereby ensuring the flatness of the first insulating layer 110 and the first sacrificial layer 120, facilitating subsequent processes.

[0047] S130. A piezoelectric layer is prepared on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are prepared on the side of the piezoelectric layer away from the silicon substrate.

[0048] Specifically, such as Figure 2As shown, a piezoelectric layer 130 is formed on the side of the first insulating layer 110 away from the silicon substrate 10. The material of the piezoelectric layer may include at least one selected from aluminum nitride (AlN), lithium niobate (LiNbO3), lithium tantalate (LiTaO3), lead zirconate titanate (PZT), zinc oxide (ZnO), scandium-doped aluminum nitride (ScAlN), quartz crystal, lead magnesium niobate (PMN), and lead fluoride (PbTiO3). This embodiment of the invention does not limit the specific material of the piezoelectric layer 130; those skilled in the art can set it as needed. Subsequently, a sacrificial layer of silicon material is placed on the side of the piezoelectric layer 130 away from the silicon substrate 10. This sacrificial layer covers the surface of the piezoelectric layer 130. The sacrificial layer is then etched to form a patterned second sacrificial layer 140 and a third sacrificial layer 150. The second sacrificial layer 140 and the third sacrificial layer 150 overlap at least partially with the first sacrificial layer 120, thereby ensuring that after the sacrificial layer is released, the cavity formed by the first sacrificial layer 120 overlaps with the cavities formed by the second sacrificial layer 140 and the third sacrificial layer 150, thereby improving the performance of the thin-film bulk acoustic wave filter.

[0049] S140. A first electrode is prepared on the side of the second and third sacrificial layers away from the silicon substrate.

[0050] A first electrode layer is deposited on the side of the second sacrificial layer 140 and the third sacrificial layer 150 away from the silicon substrate. The material of the first electrode layer may include at least one selected from platinum (Mo), aluminum (Al), copper (Cu), tungsten (W), tantalum (Ta), platinum (Pt), iridium (Ir), chromium (Cr), titanium (Ti), and gold (Au). This invention is not limited thereto, and those skilled in the art can configure it as needed. The first electrode layer is then etched to form a first electrode 160, which may be the top electrode of a thin-film bulk acoustic wave filter.

[0051] S150, simultaneously release the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer and a third cavity in the third sacrificial layer.

[0052] Specifically, in existing technologies, the first sacrificial layer is typically made of silicon, while the second and third sacrificial layers are made of silicon dioxide. Consequently, releasing the first, second, and third sacrificial layers requires two separate processes, increasing production complexity and cost. Furthermore, the gases released from the silicon dioxide and silicon materials are prone to reaction, affecting the thickness of the top electrode and degrading the performance of the thin-film bulk acoustic wave filter.

[0053] Therefore, in this embodiment of the invention, since the first sacrificial layer 120, the second sacrificial layer 140, and the third sacrificial layer 150 are all made of silicon, the sacrificial layers can be released simultaneously in the same process. This forms a first cavity S2 at the location of the first sacrificial layer 120, a second cavity S3 at the location of the second sacrificial layer 140, and a third cavity S4 at the location of the third sacrificial layer 150, reducing the number of process steps and thus reducing production costs. Furthermore, since the same gas is used in the release processes of different sacrificial layers, reactions are less likely to occur, avoiding performance degradation of the thin-film bulk acoustic filter due to process limitations when releasing sacrificial layers made of different materials multiple times, thus ensuring production reliability.

[0054] In summary, this embodiment of the invention forms a first insulating layer by depositing silicon dioxide material on one side of a silicon substrate. The first insulating layer includes a first groove, and the first groove includes a first sacrificial layer of silicon material. A piezoelectric layer is deposited on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are formed on the side of the piezoelectric layer away from the silicon substrate. Along the thickness direction of the silicon substrate, the second and third sacrificial layers at least partially overlap the first sacrificial layer, and both the second and third sacrificial layers are made of silicon. A first electrode is formed on the side of the second and third sacrificial layers away from the silicon substrate. The first, second, and third sacrificial layers are released simultaneously. In this way, different sacrificial layers can be released simultaneously in the same process, reducing process costs and avoiding device performance degradation due to process reasons when sacrificial layers of different materials are released multiple times.

[0055] Optionally, in yet another embodiment, Figure 3 This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention. Figure 4 This is a schematic diagram illustrating the process of fabricating another thin-film bulk acoustic filter provided in an embodiment of the present invention. See also... Figure 3 and Figure 4 The preparation method includes:

[0056] S210 provides a silicon-based substrate.

[0057] S220. Deposit silicon dioxide material on one side of a silicon substrate to form a first insulating layer, the first insulating layer including a first groove, the first groove including a first sacrificial layer of silicon material.

[0058] S230. A piezoelectric layer is prepared on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are prepared on the side of the piezoelectric layer away from the silicon substrate.

[0059] S240. Silicon dioxide material is deposited on the side of the second and third sacrificial layers away from the silicon substrate to form a protective layer.

[0060] Specifically, after the patterned second sacrificial layer 140 and third sacrificial layer 150 are formed, a silicon dioxide layer material can be deposited on the side of the second sacrificial layer 140 and third sacrificial layer 150 away from the silicon substrate 10 to form a protective layer 170 covering the surface of the second sacrificial layer 140, the third sacrificial layer 150 and the piezoelectric layer 130.

[0061] S250, Etch a protective layer to form a first protective layer on the side of the second sacrificial layer away from the silicon substrate, and form a second protective layer on the side of the third sacrificial layer away from the silicon substrate.

[0062] Specifically, such as Figure 4 In the illustrated embodiment, after forming the entire protective layer 170, the protective layer 170 is etched away to remove the protective layer 170 located on the surface of the piezoelectric layer 130, leaving the protective layer 170 located on the surfaces of the second sacrificial layer 140 and the third sacrificial layer 150. This results in the formation of a first protective layer 171 on the surface of the second sacrificial layer 140 away from the silicon substrate 10, and a second protective layer 172 on the surface of the third sacrificial layer 150 away from the silicon substrate 10. Along the thickness direction of the silicon substrate 10, the first protective layer 171 overlaps with the second sacrificial layer 140, and the second protective layer 172 overlaps with the third sacrificial layer 150. Preferably, the first protective layer 171 covers the second sacrificial layer 140, and the second protective layer 172 covers the third sacrificial layer 150. It is understandable that when releasing the second sacrificial layer 140 and the third sacrificial layer 150, the relevant gas is usually released from bottom to top. Then, a first protective layer 171 is provided on the surface of the second sacrificial layer 140 away from the silicon substrate 10, and a second protective layer 172 is provided on the surface of the third sacrificial layer 150 away from the silicon substrate 10. The first protective layer 171 and the second protective layer 172 prevent the relevant gas from entering the first electrode 160, avoid the relevant gas from affecting the thickness of the first electrode 160, and prevent the performance of the thin film bulk acoustic wave filter from degrading, thus ensuring the reliability of production.

[0063] S260. A first electrode is fabricated on the side of the second and third sacrificial layers away from the silicon substrate.

[0064] S270, simultaneously release the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer and a third cavity in the third sacrificial layer.

[0065] Optionally, in yet another embodiment, Figure 5This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in an embodiment of the present invention. Figure 6 This is a schematic diagram illustrating the process of fabricating another thin-film bulk acoustic filter according to an embodiment of the present invention. See also... Figure 5 and Figure 6 The preparation method includes:

[0066] S310 provides a silicon-based substrate.

[0067] S320. Deposit silicon dioxide material on one side of a silicon substrate to form a first insulating layer, the first insulating layer including a first groove, the first groove including a first sacrificial layer of silicon material.

[0068] S330. A piezoelectric layer is prepared on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are prepared on the side of the piezoelectric layer away from the silicon substrate.

[0069] S340. Silicon dioxide material is deposited on the side of the second and third sacrificial layers away from the silicon substrate to form a protective layer.

[0070] Specifically, after the patterned second sacrificial layer 140 and third sacrificial layer 150 are formed, a silicon dioxide layer material can be deposited on the side of the second sacrificial layer 140 and third sacrificial layer 150 away from the silicon substrate 10 to form a protective layer 170 covering the surface of the second sacrificial layer 140, the third sacrificial layer 150 and the piezoelectric layer 130.

[0071] S350, Etch a protective layer to form a first protective layer on the side of the second sacrificial layer away from the silicon substrate, form a second protective layer on the side of the third sacrificial layer away from the silicon substrate, and form a first epitaxial layer and a second epitaxial layer on the side of the piezoelectric layer away from the silicon substrate.

[0072] Specifically, such as Figure 6In the illustrated embodiment, after forming the entire protective layer 170, the protective layer 170 is etched to retain the protective layer 170 located on the surfaces of the second sacrificial layer 140 and the third sacrificial layer 150. This results in the formation of a first protective layer 171 on the surface of the second sacrificial layer 140 away from the silicon substrate 10, and a second protective layer 172 on the surface of the third sacrificial layer 150 away from the silicon substrate 10. Along the thickness direction of the silicon substrate 10, the first protective layer 171 overlaps with the second sacrificial layer 140, and the second protective layer 172 overlaps with the third sacrificial layer 150. Preferably, the first protective layer 171 covers the second sacrificial layer 140, and the second protective layer 172 covers the third sacrificial layer 150. It is understandable that when releasing the second sacrificial layer 140 and the third sacrificial layer 150, the relevant gas is usually released from bottom to top. Then, a first protective layer 171 is provided on the surface of the second sacrificial layer 140 away from the silicon substrate 10, and a second protective layer 172 is provided on the surface of the third sacrificial layer 150 away from the silicon substrate 10. The first protective layer 171 and the second protective layer 172 prevent the relevant gas from entering the first electrode 160, avoid the relevant gas from affecting the thickness of the first electrode 160, and prevent the performance of the thin film bulk acoustic wave filter from degrading, thus ensuring the reliability of production.

[0073] Furthermore, the protective layer 170 on the surface of the piezoelectric layer 130 located to the right of the second sacrificial layer 140, and the protective layer 170 on the surface of the piezoelectric layer 130 located to the left of the third sacrificial layer 150 are retained. Other protective layers on the surface of the piezoelectric layer 130 are etched away, thereby forming a first epitaxial layer 173 to the right of the second sacrificial layer 140 and a second epitaxial layer 174 to the left of the third sacrificial layer 150. In this way, the first protective layer 171, the second protective layer 172, the first epitaxial layer 173, and the second epitaxial layer 174 are all prepared simultaneously in the same process using the same materials, without the need for additional processes to separately prepare the first epitaxial layer 173 and the second epitaxial layer 174 using other materials, saving process steps and reducing production costs.

[0074] S360. A first electrode is fabricated on the side of the second and third sacrificial layers away from the silicon substrate.

[0075] S370, simultaneously release the first sacrificial layer, the second sacrificial layer and the third sacrificial layer to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer and a third cavity in the third sacrificial layer.

[0076] Optionally, in yet another embodiment, Figure 7 This is a schematic flowchart of another method for fabricating a thin-film bulk acoustic filter provided in this embodiment of the invention. See also... Figure 2 and Figure 7 The preparation method includes:

[0077] S410 provides silicon-based substrates.

[0078] S420. Deposit silicon dioxide material on one side of a silicon substrate to form a first insulating layer, the first insulating layer including a first groove, the first groove including a first sacrificial layer of silicon material.

[0079] S430. A second insulating layer is prepared on the side of the first insulating layer away from the silicon substrate, and a second electrode is prepared on the side of the second insulating layer away from the silicon substrate.

[0080] Specifically, a second insulating layer 210 is prepared on one side of the first insulating layer 110 and the first sacrificial layer 120. The second insulating layer 210 can serve as a seed layer. The arrangement of the second insulating layer 210 provides a good growth foundation for the subsequent fabrication of the piezoelectric layer 130 and can control the direction of crystal growth in the piezoelectric layer 130, thereby improving the film quality of the piezoelectric layer 130. A second electrode 220 is also provided on the side of the second insulating layer 210 away from the silicon substrate 10. The second electrode 220 covers a portion of the second insulating layer 210 to leave some space for the piezoelectric layer 130, ensuring that the piezoelectric layer 130 can adhere to the second insulating layer 210. The second electrode 220 is a bottom electrode. It is understood that, along the thickness direction of the silicon substrate 10, the first electrode 160 and the second electrode 210 both overlap with the first cavity S2 at least partially, thereby ensuring that the first cavity S2, the first electrode 160 and the second electrode 210 together form an acoustic resonant cavity, so that the sound waves in the piezoelectric layer 130 form a stable standing wave mode, and ensure the accuracy of the resonant frequency.

[0081] S440, deposit a piezoelectric layer on the side of the second electrode away from the silicon substrate.

[0082] Specifically, a piezoelectric layer 130 is fabricated on the side of the second electrode 220 away from the silicon substrate 10, and a step is present at the end of the piezoelectric layer 130 that overlaps with the first cavity S1 in the second electrode 220. Exemplarily, the piezoelectric layer 130 includes a first piezoelectric layer portion 131 located on the surface of the second electrode 220 and a second piezoelectric layer portion 132 located on the surface of the second insulating layer 210. The portion located on the surface of the second insulating layer 210 can be understood as being attached to the surface of the second insulating layer 210, i.e., the second piezoelectric layer portion 132 is attached to the surface of the second insulating layer 210. The first piezoelectric layer portion 131 and the second piezoelectric layer portion 132 are interconnected, and the height of the first piezoelectric layer portion 131 from the silicon substrate 10 is greater than the height of the second piezoelectric layer portion 132 from the silicon substrate 10. This creates a step at the connection point of the first piezoelectric layer portion 131 and the second piezoelectric layer portion 132, facilitating the subsequent formation of a patterned third sacrificial layer 150 at the step location.

[0083] S450, a second sacrificial layer is prepared on the side of the first piezoelectric layer portion away from the silicon substrate, and a third sacrificial layer is prepared at the connection position of the first piezoelectric layer portion and the second piezoelectric layer portion.

[0084] Specifically, the second sacrificial layer 140 is located on the side of the first piezoelectric layer portion 131 away from the silicon substrate 10, and the patterned second sacrificial layer 140 has a horizontal surface. The third sacrificial layer 150 is disposed at the connection position of the first piezoelectric layer portion 131 and the second piezoelectric layer portion 132, where the connection position of the first piezoelectric layer portion 131 and the second piezoelectric layer portion 132 forms a step. Thus, the patterned third sacrificial layer 150 includes both a horizontal surface and an inclined surface. In this way, the cavity formed after releasing the second sacrificial layer 140 and the third sacrificial layer 150 can improve the performance of the device.

[0085] S460. A first electrode is fabricated on the side of the second and third sacrificial layers away from the silicon substrate.

[0086] Specifically, such as Figure 2 As shown, a first electrode layer is deposited on the side of the second sacrificial layer 140 and the third sacrificial layer 150 away from the silicon substrate. The first electrode layer is then etched to retain portions of the first electrode layer around the second sacrificial layer 140, on a portion of the surface of the third sacrificial layer 150, and between the second and third sacrificial layers 140 and 150. Simultaneously, a second groove S5 is etched through the first piezoelectric layer portion 131. The second groove S5 penetrates the first piezoelectric layer portion 131. Then, the material of the first electrode layer is deposited again on the first electrode layer so that the formed first electrode 160 has a first step structure (not shown) at the location of the second sacrificial layer 140 and a second step structure (not shown) at the location of the third sacrificial layer 150.

[0087] Furthermore, the first electrode 160 also includes a first electrode portion 161 covering the second groove S5, and the first electrode portion 161 is in contact with the second electrode 220. It is understood that the first electrode portion 161 is insulated from the first electrode 160. In other words, the portion of the first electrode 160 including the first step structure and the second step structure is considered the second electrode portion. The first electrode portion 161 and the second electrode portion are independently configured, wherein the first electrode portion 161 is used for electrical connection with the second electrode 220 through the second groove S5, that is, the first electrode portion 161 corresponds to a portion of the second electrode 220.

[0088] S470. A passivation layer is prepared on the side of the first electrode away from the silicon substrate, and a third groove is prepared on the passivation layer. A first conductor is disposed in the second groove, and a second conductor is disposed in the third groove.

[0089] Specifically, a passivation layer 250 is prepared on the side of the first electrode 160 away from the silicon substrate 10. The passivation layer 250 can be any one of AlN, SiC, SiO2, and SiN. The passivation layer 250 does not readily absorb moisture, preventing oxidation of the underlying film and providing excellent protection. Furthermore, a third groove S6 is prepared on the passivation layer, penetrating the passivation layer 250 and overlapping at least partially with the second piezoelectric layer portion 132 along the thickness direction of the silicon substrate 10. This allows a second conductor 240 to be placed within the third groove S6, making contact between the second conductor 240 and the first electrode 160, thus serving as an external pad for the first electrode 160. Similarly, a first conductor 230 is placed within the second groove S5, allowing contact between the first conductor 230 and the second electrode 220 via the first electrode portion 161, serving as an external pad for the second electrode 220.

[0090] 480. Prepare the first through hole.

[0091] The first through hole S7 is the release hole of the first cavity S2. The first through hole S7 penetrates the passivation layer 250, the piezoelectric layer 130, the second electrode 220 and the second insulating layer 210. Along the thickness direction of the silicon substrate 10, the first through hole S7 overlaps at least partially with the first sacrificial layer 120, thereby ensuring the release of the first sacrificial layer 120.

[0092] 490. Simultaneously release the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer, and a third cavity in the third sacrificial layer.

[0093] In this embodiment of the invention, since the first sacrificial layer 120, the second sacrificial layer 140, and the third sacrificial layer 150 are all made of silicon, the sacrificial layers can be released simultaneously in the same process. This forms a first cavity S2 at the location of the first sacrificial layer 120, a second cavity S3 at the location of the second sacrificial layer 140, and a third cavity S4 at the location of the third sacrificial layer 150, reducing the number of process steps and thus reducing production costs. Furthermore, since the same gas is used in the release processes of different sacrificial layers, reactions are less likely to occur, avoiding performance degradation of the thin-film bulk acoustic filter due to process limitations when releasing sacrificial layers made of different materials multiple times, thus ensuring production reliability.

[0094] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A method for fabricating a thin-film bulk acoustic wave filter, characterized in that, Provide silicon-based substrates; A silicon dioxide material is deposited on one side of the silicon substrate to form a first insulating layer, the first insulating layer including a first groove, and the first groove including a first sacrificial layer of silicon material; A piezoelectric layer is formed on the side of the first insulating layer away from the silicon substrate, and a patterned second sacrificial layer and a patterned third sacrificial layer are formed on the side of the piezoelectric layer away from the silicon substrate. Along the thickness direction of the silicon substrate, the second sacrificial layer and the third sacrificial layer at least partially overlap the first sacrificial layer, and the material of the second sacrificial layer and the third sacrificial layer both include silicon. A first electrode is formed on the side of the second and third sacrificial layers away from the silicon substrate; Simultaneously, the first sacrificial layer, the second sacrificial layer, and the third sacrificial layer are released to form a first cavity in the first sacrificial layer, a second cavity in the second sacrificial layer, and a third cavity in the third sacrificial layer.

2. The preparation method according to claim 1, characterized in that, After fabricating a patterned second sacrificial layer and a patterned third sacrificial layer on the side of the piezoelectric layer away from the silicon substrate, the process further includes: Silicon dioxide material is deposited on the side of the second and third sacrificial layers away from the silicon substrate to form a protective layer.

3. The preparation method according to claim 2, characterized in that, After depositing silicon dioxide material on the side of the second and third sacrificial layers away from the silicon substrate, the process further includes: The protective layer is etched to form a first protective layer on the side of the second sacrificial layer away from the silicon substrate, and a second protective layer on the side of the third sacrificial layer away from the silicon substrate. Along the thickness direction of the silicon substrate, the first protective layer overlaps with the second sacrificial layer, and the second protective layer overlaps with the third sacrificial layer.

4. The preparation method according to claim 2, characterized in that, After depositing silicon dioxide material on the side of the second and third sacrificial layers away from the silicon substrate, the process further includes: The protective layer is etched to form a first protective layer on the surface of the second sacrificial layer away from the silicon substrate, a second protective layer on the surface of the third sacrificial layer away from the silicon substrate, and a first epitaxial layer and a second epitaxial layer on the side of the piezoelectric layer away from the silicon substrate. Wherein, along the thickness direction of the silicon substrate, the first protective layer overlaps with the second sacrificial layer, and the second protective layer overlaps with the third sacrificial layer; along the thickness direction perpendicular to the silicon substrate, the first epitaxial layer and the first sacrificial layer are in contact, and the second epitaxial layer and the second sacrificial layer are in contact.

5. The preparation method according to claim 1, characterized in that, Before depositing a piezoelectric layer on the side of the first insulating layer away from the silicon substrate, the method further includes: A second insulating layer is formed on the side of the first insulating layer away from the silicon substrate, and a second electrode is formed on the side of the second insulating layer away from the silicon substrate. Along the thickness direction of the silicon substrate, both the first electrode and the second electrode at least partially overlap the first cavity.

6. The preparation method according to claim 5, characterized in that, Fabricating a piezoelectric layer on the side of the first insulating layer away from the silicon substrate includes: The piezoelectric layer is deposited on the side of the second electrode away from the silicon substrate, such that the piezoelectric layer includes a first piezoelectric layer portion located on the surface of the second electrode and a second piezoelectric layer portion located on the surface of the second insulating layer, the first piezoelectric layer portion and the second piezoelectric layer portion being interconnected, and the height of the first piezoelectric layer portion from the silicon substrate being greater than the height of the second piezoelectric layer portion from the silicon substrate.

7. The preparation method according to claim 6, characterized in that, The fabrication of a patterned second sacrificial layer and a patterned third sacrificial layer on the side of the piezoelectric layer away from the silicon substrate includes: A second sacrificial layer is prepared on the side of the first piezoelectric layer portion away from the silicon substrate, and a third sacrificial layer is prepared at the connection position between the first piezoelectric layer portion and the second piezoelectric layer portion; Fabricating a first electrode on the side of the second and third sacrificial layers away from the silicon substrate includes: A first electrode is formed on the side of the second sacrificial layer and the third sacrificial layer away from the silicon substrate, such that the first electrode has a first step structure at the location of the second sacrificial layer and a second step structure at the location of the third sacrificial layer.

8. The preparation method according to claim 7, characterized in that, The fabrication of the first electrode on the side of the second and third sacrificial layers away from the silicon substrate further includes: A second groove is etched in the first piezoelectric layer portion, the second groove penetrating the first piezoelectric layer portion, and the first electrode also includes a first electrode portion covering the second groove, the first electrode portion being in contact with the second electrode; After fabricating the first electrode on the side of the second and third sacrificial layers away from the silicon substrate, the process further includes: A passivation layer is formed on the side of the first electrode away from the silicon substrate, and a third groove is formed on the passivation layer. The third groove penetrates the passivation layer and overlaps at least partially with a portion of the second piezoelectric layer along the thickness direction of the silicon substrate. A first conductor is disposed in the second groove, and the first conductor is in partial contact with the first electrode. A second conductor is disposed in the third groove, and the second conductor is in contact with the first electrode.

9. The preparation method according to claim 8, characterized in that, After preparing a passivation layer on the side of the first electrode away from the silicon substrate, the process further includes: A first via is formed, which penetrates the passivation layer, the piezoelectric layer, the second electrode, and the second insulating layer, and along the thickness direction of the silicon substrate, the first via at least partially overlaps with the first sacrificial layer.

10. A thin-film bulk acoustic wave filter, characterized in that, The thin-film bulk acoustic filter is obtained by the fabrication method described in any one of claims 1-9.

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